drivers/net/irda/via-ircc.c

   1 /********************************************************************
   2  Filename:      via-ircc.c
   3  Version:       1.0
   4  Description:   Driver for the VIA VT8231/VT8233 IrDA chipsets
   5  Author:        VIA Technologies,inc
   6  Date  :        08/06/2003
   7
   8 Copyright (c) 1998-2003 VIA Technologies, Inc.
   9
  10 This program is free software; you can redistribute it and/or modify it under
  11 the terms of the GNU General Public License as published by the Free Software
  12 Foundation; either version 2, or (at your option) any later version.
  13
  14 This program is distributed in the hope that it will be useful, but WITHOUT
  15 ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  17 See the GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along with
  20 this program; if not, see <http://www.gnu.org/licenses/>.
  21
  22 F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
  23 F02 Oct/28/02: Add SB device ID for 3147 and 3177.
  24  Comment :
  25        jul/09/2002 : only implement two kind of dongle currently.
  26        Oct/02/2002 : work on VT8231 and VT8233 .
  27        Aug/06/2003 : change driver format to pci driver .
  28
  29 2004-02-16: <sda@bdit.de>
  30 - Removed unneeded 'legacy' pci stuff.
  31 - Make sure SIR mode is set (hw_init()) before calling mode-dependent stuff.
  32 - On speed change from core, don't send SIR frame with new speed.
  33   Use current speed and change speeds later.
  34 - Make module-param dongle_id actually work.
  35 - New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
  36   Tested with home-grown PCB on EPIA boards.
  37 - Code cleanup.
  38
  39  ********************************************************************/
  40 #include <linux/module.h>
  41 #include <linux/kernel.h>
  42 #include <linux/types.h>
  43 #include <linux/skbuff.h>
  44 #include <linux/netdevice.h>
  45 #include <linux/ioport.h>
  46 #include <linux/delay.h>
  47 #include <linux/init.h>
  48 #include <linux/interrupt.h>
  49 #include <linux/rtnetlink.h>
  50 #include <linux/pci.h>
  51 #include <linux/dma-mapping.h>
  52 #include <linux/gfp.h>
  53
  54 #include <asm/io.h>
  55 #include <asm/dma.h>
  56 #include <asm/byteorder.h>
  57
  58 #include <linux/pm.h>
  59
  60 #include <net/irda/wrapper.h>
  61 #include <net/irda/irda.h>
  62 #include <net/irda/irda_device.h>
  63
  64 #include "via-ircc.h"
  65
  66 #define VIA_MODULE_NAME "via-ircc"
  67 #define CHIP_IO_EXTENT 0x40
  68
  69 static char *driver_name = VIA_MODULE_NAME;
  70
  71 /* Module parameters */
  72 static int qos_mtt_bits = 0x07; /* 1 ms or more */
  73 static int dongle_id = 0;       /* default: probe */
  74
  75 /* We can't guess the type of connected dongle, user *must* supply it. */
  76 module_param(dongle_id, int, 0);
  77
  78 /* Some prototypes */
  79 static int via_ircc_open(struct pci_dev *pdev, chipio_t *info,
  80                          unsigned int id);
  81 static int via_ircc_dma_receive(struct via_ircc_cb *self);
  82 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
  83                                          int iobase);
  84 static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
  85                                                 struct net_device *dev);
  86 static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
  87                                                 struct net_device *dev);
  88 static void via_hw_init(struct via_ircc_cb *self);
  89 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
  90 static irqreturn_t via_ircc_interrupt(int irq, void *dev_id);
  91 static int via_ircc_is_receiving(struct via_ircc_cb *self);
  92 static int via_ircc_read_dongle_id(int iobase);
  93
  94 static int via_ircc_net_open(struct net_device *dev);
  95 static int via_ircc_net_close(struct net_device *dev);
  96 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
  97                               int cmd);
  98 static void via_ircc_change_dongle_speed(int iobase, int speed,
  99                                          int dongle_id);
 100 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
 101 static void hwreset(struct via_ircc_cb *self);
 102 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
 103 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
 104 static int via_init_one(struct pci_dev *pcidev, const struct pci_device_id *id);
 105 static void via_remove_one(struct pci_dev *pdev);
 106
 107 /* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
 108 static void iodelay(int udelay)
 109 {
 110         u8 data;
 111         int i;
 112
 113         for (i = 0; i < udelay; i++) {
 114                 data = inb(0x80);
 115         }
 116 }
 117
 118 static const struct pci_device_id via_pci_tbl[] = {
 119         { PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
 120         { PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
 121         { PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
 122         { PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
 123         { PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
 124         { 0, }
 125 };
 126
 127 MODULE_DEVICE_TABLE(pci,via_pci_tbl);
 128
 129
 130 static struct pci_driver via_driver = {
 131         .name           = VIA_MODULE_NAME,
 132         .id_table       = via_pci_tbl,
 133         .probe          = via_init_one,
 134         .remove         = via_remove_one,
 135 };
 136
 137
 138 /*
 139  * Function via_ircc_init ()
 140  *
 141  *    Initialize chip. Just find out chip type and resource.
 142  */
 143 static int __init via_ircc_init(void)
 144 {
 145         int rc;
 146
 147         IRDA_DEBUG(3, "%s()\n", __func__);
 148
 149         rc = pci_register_driver(&via_driver);
 150         if (rc < 0) {
 151                 IRDA_DEBUG(0, "%s(): error rc = %d, returning  -ENODEV...\n",
 152                            __func__, rc);
 153                 return -ENODEV;
 154         }
 155         return 0;
 156 }
 157
 158 static int via_init_one(struct pci_dev *pcidev, const struct pci_device_id *id)
 159 {
 160         int rc;
 161         u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
 162         u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
 163         chipio_t info;
 164
 165         IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __func__, id->device);
 166
 167         rc = pci_enable_device (pcidev);
 168         if (rc) {
 169                 IRDA_DEBUG(0, "%s(): error rc = %d\n", __func__, rc);
 170                 return -ENODEV;
 171         }
 172
 173         // South Bridge exist
 174         if ( ReadLPCReg(0x20) != 0x3C )
 175                 Chipset=0x3096;
 176         else
 177                 Chipset=0x3076;
 178
 179         if (Chipset==0x3076) {
 180                 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __func__);
 181
 182                 WriteLPCReg(7,0x0c );
 183                 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
 184                 if((temp&0x01)==1) {   // BIOS close or no FIR
 185                         WriteLPCReg(0x1d, 0x82 );
 186                         WriteLPCReg(0x23,0x18);
 187                         temp=ReadLPCReg(0xF0);
 188                         if((temp&0x01)==0) {
 189                                 temp=(ReadLPCReg(0x74)&0x03);    //DMA
 190                                 FirDRQ0=temp + 4;
 191                                 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
 192                                 FirDRQ1=temp + 4;
 193                         } else {
 194                                 temp=(ReadLPCReg(0x74)&0x0C) >> 2;    //DMA
 195                                 FirDRQ0=temp + 4;
 196                                 FirDRQ1=FirDRQ0;
 197                         }
 198                         FirIRQ=(ReadLPCReg(0x70)&0x0f);         //IRQ
 199                         FirIOBase=ReadLPCReg(0x60 ) << 8;       //IO Space :high byte
 200                         FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
 201                         FirIOBase=FirIOBase  ;
 202                         info.fir_base=FirIOBase;
 203                         info.irq=FirIRQ;
 204                         info.dma=FirDRQ1;
 205                         info.dma2=FirDRQ0;
 206                         pci_read_config_byte(pcidev,0x40,&bTmp);
 207                         pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
 208                         pci_read_config_byte(pcidev,0x42,&bTmp);
 209                         pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
 210                         pci_write_config_byte(pcidev,0x5a,0xc0);
 211                         WriteLPCReg(0x28, 0x70 );
 212                         rc = via_ircc_open(pcidev, &info, 0x3076);
 213                 } else
 214                         rc = -ENODEV; //IR not turn on
 215         } else { //Not VT1211
 216                 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __func__);
 217
 218                 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
 219                 if((bTmp&0x01)==1) {  // BIOS enable FIR
 220                         //Enable Double DMA clock
 221                         pci_read_config_byte(pcidev,0x42,&oldPCI_40);
 222                         pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
 223                         pci_read_config_byte(pcidev,0x40,&oldPCI_40);
 224                         pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
 225                         pci_read_config_byte(pcidev,0x44,&oldPCI_44);
 226                         pci_write_config_byte(pcidev,0x44,0x4e);
 227   //---------- read configuration from Function0 of south bridge
 228                         if((bTmp&0x02)==0) {
 229                                 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
 230                                 FirDRQ0 = (bTmp1 & 0x30) >> 4;
 231                                 pci_read_config_byte(pcidev,0x44,&bTmp1);
 232                                 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
 233                         } else  {
 234                                 pci_read_config_byte(pcidev,0x44,&bTmp1);    //DMA
 235                                 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
 236                                 FirDRQ1=0;
 237                         }
 238                         pci_read_config_byte(pcidev,0x47,&bTmp1);  //IRQ
 239                         FirIRQ = bTmp1 & 0x0f;
 240
 241                         pci_read_config_byte(pcidev,0x69,&bTmp);
 242                         FirIOBase = bTmp << 8;//hight byte
 243                         pci_read_config_byte(pcidev,0x68,&bTmp);
 244                         FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
 245   //-------------------------
 246                         info.fir_base=FirIOBase;
 247                         info.irq=FirIRQ;
 248                         info.dma=FirDRQ1;
 249                         info.dma2=FirDRQ0;
 250                         rc = via_ircc_open(pcidev, &info, 0x3096);
 251                 } else
 252                         rc = -ENODEV; //IR not turn on !!!!!
 253         }//Not VT1211
 254
 255         IRDA_DEBUG(2, "%s(): End - rc = %d\n", __func__, rc);
 256         return rc;
 257 }
 258
 259 static void __exit via_ircc_cleanup(void)
 260 {
 261         IRDA_DEBUG(3, "%s()\n", __func__);
 262
 263         /* Cleanup all instances of the driver */
 264         pci_unregister_driver (&via_driver);
 265 }
 266
 267 static const struct net_device_ops via_ircc_sir_ops = {
 268         .ndo_start_xmit = via_ircc_hard_xmit_sir,
 269         .ndo_open = via_ircc_net_open,
 270         .ndo_stop = via_ircc_net_close,
 271         .ndo_do_ioctl = via_ircc_net_ioctl,
 272 };
 273 static const struct net_device_ops via_ircc_fir_ops = {
 274         .ndo_start_xmit = via_ircc_hard_xmit_fir,
 275         .ndo_open = via_ircc_net_open,
 276         .ndo_stop = via_ircc_net_close,
 277         .ndo_do_ioctl = via_ircc_net_ioctl,
 278 };
 279
 280 /*
 281  * Function via_ircc_open(pdev, iobase, irq)
 282  *
 283  *    Open driver instance
 284  *
 285  */
 286 static int via_ircc_open(struct pci_dev *pdev, chipio_t *info, unsigned int id)
 287 {
 288         struct net_device *dev;
 289         struct via_ircc_cb *self;
 290         int err;
 291
 292         IRDA_DEBUG(3, "%s()\n", __func__);
 293
 294         /* Allocate new instance of the driver */
 295         dev = alloc_irdadev(sizeof(struct via_ircc_cb));
 296         if (dev == NULL)
 297                 return -ENOMEM;
 298
 299         self = netdev_priv(dev);
 300         self->netdev = dev;
 301         spin_lock_init(&self->lock);
 302
 303         pci_set_drvdata(pdev, self);
 304
 305         /* Initialize Resource */
 306         self->io.cfg_base = info->cfg_base;
 307         self->io.fir_base = info->fir_base;
 308         self->io.irq = info->irq;
 309         self->io.fir_ext = CHIP_IO_EXTENT;
 310         self->io.dma = info->dma;
 311         self->io.dma2 = info->dma2;
 312         self->io.fifo_size = 32;
 313         self->chip_id = id;
 314         self->st_fifo.len = 0;
 315         self->RxDataReady = 0;
 316
 317         /* Reserve the ioports that we need */
 318         if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
 319                 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
 320                            __func__, self->io.fir_base);
 321                 err = -ENODEV;
 322                 goto err_out1;
 323         }
 324
 325         /* Initialize QoS for this device */
 326         irda_init_max_qos_capabilies(&self->qos);
 327
 328         /* Check if user has supplied the dongle id or not */
 329         if (!dongle_id)
 330                 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
 331         self->io.dongle_id = dongle_id;
 332
 333         /* The only value we must override it the baudrate */
 334         /* Maximum speeds and capabilities are dongle-dependent. */
 335         switch( self->io.dongle_id ){
 336         case 0x0d:
 337                 self->qos.baud_rate.bits =
 338                     IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
 339                     IR_576000 | IR_1152000 | (IR_4000000 << 8);
 340                 break;
 341         default:
 342                 self->qos.baud_rate.bits =
 343                     IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
 344                 break;
 345         }
 346
 347         /* Following was used for testing:
 348          *
 349          *   self->qos.baud_rate.bits = IR_9600;
 350          *
 351          * Is is no good, as it prohibits (error-prone) speed-changes.
 352          */
 353
 354         self->qos.min_turn_time.bits = qos_mtt_bits;
 355         irda_qos_bits_to_value(&self->qos);
 356
 357         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
 358         self->rx_buff.truesize = 14384 + 2048;
 359         self->tx_buff.truesize = 14384 + 2048;
 360
 361         /* Allocate memory if needed */
 362         self->rx_buff.head =
 363                 dma_zalloc_coherent(&pdev->dev, self->rx_buff.truesize,
 364                                     &self->rx_buff_dma, GFP_KERNEL);
 365         if (self->rx_buff.head == NULL) {
 366                 err = -ENOMEM;
 367                 goto err_out2;
 368         }
 369
 370         self->tx_buff.head =
 371                 dma_zalloc_coherent(&pdev->dev, self->tx_buff.truesize,
 372                                     &self->tx_buff_dma, GFP_KERNEL);
 373         if (self->tx_buff.head == NULL) {
 374                 err = -ENOMEM;
 375                 goto err_out3;
 376         }
 377
 378         self->rx_buff.in_frame = FALSE;
 379         self->rx_buff.state = OUTSIDE_FRAME;
 380         self->tx_buff.data = self->tx_buff.head;
 381         self->rx_buff.data = self->rx_buff.head;
 382
 383         /* Reset Tx queue info */
 384         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 385         self->tx_fifo.tail = self->tx_buff.head;
 386
 387         /* Override the network functions we need to use */
 388         dev->netdev_ops = &via_ircc_sir_ops;
 389
 390         err = register_netdev(dev);
 391         if (err)
 392                 goto err_out4;
 393
 394         net_info_ratelimited("IrDA: Registered device %s (via-ircc)\n",
 395                              dev->name);
 396
 397         /* Initialise the hardware..
 398         */
 399         self->io.speed = 9600;
 400         via_hw_init(self);
 401         return 0;
 402  err_out4:
 403         dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
 404                           self->tx_buff.head, self->tx_buff_dma);
 405  err_out3:
 406         dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
 407                           self->rx_buff.head, self->rx_buff_dma);
 408  err_out2:
 409         release_region(self->io.fir_base, self->io.fir_ext);
 410  err_out1:
 411         free_netdev(dev);
 412         return err;
 413 }
 414
 415 /*
 416  * Function via_remove_one(pdev)
 417  *
 418  *    Close driver instance
 419  *
 420  */
 421 static void via_remove_one(struct pci_dev *pdev)
 422 {
 423         struct via_ircc_cb *self = pci_get_drvdata(pdev);
 424         int iobase;
 425
 426         IRDA_DEBUG(3, "%s()\n", __func__);
 427
 428         iobase = self->io.fir_base;
 429
 430         ResetChip(iobase, 5);   //hardware reset.
 431         /* Remove netdevice */
 432         unregister_netdev(self->netdev);
 433
 434         /* Release the PORT that this driver is using */
 435         IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
 436                    __func__, self->io.fir_base);
 437         release_region(self->io.fir_base, self->io.fir_ext);
 438         if (self->tx_buff.head)
 439                 dma_free_coherent(&pdev->dev, self->tx_buff.truesize,
 440                                   self->tx_buff.head, self->tx_buff_dma);
 441         if (self->rx_buff.head)
 442                 dma_free_coherent(&pdev->dev, self->rx_buff.truesize,
 443                                   self->rx_buff.head, self->rx_buff_dma);
 444
 445         free_netdev(self->netdev);
 446
 447         pci_disable_device(pdev);
 448 }
 449
 450 /*
 451  * Function via_hw_init(self)
 452  *
 453  *    Returns non-negative on success.
 454  *
 455  * Formerly via_ircc_setup
 456  */
 457 static void via_hw_init(struct via_ircc_cb *self)
 458 {
 459         int iobase = self->io.fir_base;
 460
 461         IRDA_DEBUG(3, "%s()\n", __func__);
 462
 463         SetMaxRxPacketSize(iobase, 0x0fff);     //set to max:4095
 464         // FIFO Init
 465         EnRXFIFOReadyInt(iobase, OFF);
 466         EnRXFIFOHalfLevelInt(iobase, OFF);
 467         EnTXFIFOHalfLevelInt(iobase, OFF);
 468         EnTXFIFOUnderrunEOMInt(iobase, ON);
 469         EnTXFIFOReadyInt(iobase, OFF);
 470         InvertTX(iobase, OFF);
 471         InvertRX(iobase, OFF);
 472
 473         if (ReadLPCReg(0x20) == 0x3c)
 474                 WriteLPCReg(0xF0, 0);   // for VT1211
 475         /* Int Init */
 476         EnRXSpecInt(iobase, ON);
 477
 478         /* The following is basically hwreset */
 479         /* If this is the case, why not just call hwreset() ? Jean II */
 480         ResetChip(iobase, 5);
 481         EnableDMA(iobase, OFF);
 482         EnableTX(iobase, OFF);
 483         EnableRX(iobase, OFF);
 484         EnRXDMA(iobase, OFF);
 485         EnTXDMA(iobase, OFF);
 486         RXStart(iobase, OFF);
 487         TXStart(iobase, OFF);
 488         InitCard(iobase);
 489         CommonInit(iobase);
 490         SIRFilter(iobase, ON);
 491         SetSIR(iobase, ON);
 492         CRC16(iobase, ON);
 493         EnTXCRC(iobase, 0);
 494         WriteReg(iobase, I_ST_CT_0, 0x00);
 495         SetBaudRate(iobase, 9600);
 496         SetPulseWidth(iobase, 12);
 497         SetSendPreambleCount(iobase, 0);
 498
 499         self->io.speed = 9600;
 500         self->st_fifo.len = 0;
 501
 502         via_ircc_change_dongle_speed(iobase, self->io.speed,
 503                                      self->io.dongle_id);
 504
 505         WriteReg(iobase, I_ST_CT_0, 0x80);
 506 }
 507
 508 /*
 509  * Function via_ircc_read_dongle_id (void)
 510  *
 511  */
 512 static int via_ircc_read_dongle_id(int iobase)
 513 {
 514         net_err_ratelimited("via-ircc: dongle probing not supported, please specify dongle_id module parameter\n");
 515         return 9;       /* Default to IBM */
 516 }
 517
 518 /*
 519  * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
 520  *    Change speed of the attach dongle
 521  *    only implement two type of dongle currently.
 522  */
 523 static void via_ircc_change_dongle_speed(int iobase, int speed,
 524                                          int dongle_id)
 525 {
 526         u8 mode = 0;
 527
 528         /* speed is unused, as we use IsSIROn()/IsMIROn() */
 529         speed = speed;
 530
 531         IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
 532                    __func__, speed, iobase, dongle_id);
 533
 534         switch (dongle_id) {
 535
 536                 /* Note: The dongle_id's listed here are derived from
 537                  * nsc-ircc.c */
 538
 539         case 0x08:              /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
 540                 UseOneRX(iobase, ON);   // use one RX pin   RX1,RX2
 541                 InvertTX(iobase, OFF);
 542                 InvertRX(iobase, OFF);
 543
 544                 EnRX2(iobase, ON);      //sir to rx2
 545                 EnGPIOtoRX2(iobase, OFF);
 546
 547                 if (IsSIROn(iobase)) {  //sir
 548                         // Mode select Off
 549                         SlowIRRXLowActive(iobase, ON);
 550                         udelay(1000);
 551                         SlowIRRXLowActive(iobase, OFF);
 552                 } else {
 553                         if (IsMIROn(iobase)) {  //mir
 554                                 // Mode select On
 555                                 SlowIRRXLowActive(iobase, OFF);
 556                                 udelay(20);
 557                         } else {        // fir
 558                                 if (IsFIROn(iobase)) {  //fir
 559                                         // Mode select On
 560                                         SlowIRRXLowActive(iobase, OFF);
 561                                         udelay(20);
 562                                 }
 563                         }
 564                 }
 565                 break;
 566
 567         case 0x09:              /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
 568                 UseOneRX(iobase, ON);   //use ONE RX....RX1
 569                 InvertTX(iobase, OFF);
 570                 InvertRX(iobase, OFF);  // invert RX pin
 571
 572                 EnRX2(iobase, ON);
 573                 EnGPIOtoRX2(iobase, OFF);
 574                 if (IsSIROn(iobase)) {  //sir
 575                         // Mode select On
 576                         SlowIRRXLowActive(iobase, ON);
 577                         udelay(20);
 578                         // Mode select Off
 579                         SlowIRRXLowActive(iobase, OFF);
 580                 }
 581                 if (IsMIROn(iobase)) {  //mir
 582                         // Mode select On
 583                         SlowIRRXLowActive(iobase, OFF);
 584                         udelay(20);
 585                         // Mode select Off
 586                         SlowIRRXLowActive(iobase, ON);
 587                 } else {        // fir
 588                         if (IsFIROn(iobase)) {  //fir
 589                                 // Mode select On
 590                                 SlowIRRXLowActive(iobase, OFF);
 591                                 // TX On
 592                                 WriteTX(iobase, ON);
 593                                 udelay(20);
 594                                 // Mode select OFF
 595                                 SlowIRRXLowActive(iobase, ON);
 596                                 udelay(20);
 597                                 // TX Off
 598                                 WriteTX(iobase, OFF);
 599                         }
 600                 }
 601                 break;
 602
 603         case 0x0d:
 604                 UseOneRX(iobase, OFF);  // use two RX pin   RX1,RX2
 605                 InvertTX(iobase, OFF);
 606                 InvertRX(iobase, OFF);
 607                 SlowIRRXLowActive(iobase, OFF);
 608                 if (IsSIROn(iobase)) {  //sir
 609                         EnGPIOtoRX2(iobase, OFF);
 610                         WriteGIO(iobase, OFF);
 611                         EnRX2(iobase, OFF);     //sir to rx2
 612                 } else {        // fir mir
 613                         EnGPIOtoRX2(iobase, OFF);
 614                         WriteGIO(iobase, OFF);
 615                         EnRX2(iobase, OFF);     //fir to rx
 616                 }
 617                 break;
 618
 619         case 0x11:              /* Temic TFDS4500 */
 620
 621                 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __func__);
 622
 623                 UseOneRX(iobase, ON);   //use ONE RX....RX1
 624                 InvertTX(iobase, OFF);
 625                 InvertRX(iobase, ON);   // invert RX pin
 626
 627                 EnRX2(iobase, ON);      //sir to rx2
 628                 EnGPIOtoRX2(iobase, OFF);
 629
 630                 if( IsSIROn(iobase) ){  //sir
 631
 632                         // Mode select On
 633                         SlowIRRXLowActive(iobase, ON);
 634                         udelay(20);
 635                         // Mode select Off
 636                         SlowIRRXLowActive(iobase, OFF);
 637
 638                 } else{
 639                         IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __func__);
 640                 }
 641                 break;
 642
 643         case 0x0ff:             /* Vishay */
 644                 if (IsSIROn(iobase))
 645                         mode = 0;
 646                 else if (IsMIROn(iobase))
 647                         mode = 1;
 648                 else if (IsFIROn(iobase))
 649                         mode = 2;
 650                 else if (IsVFIROn(iobase))
 651                         mode = 5;       //VFIR-16
 652                 SI_SetMode(iobase, mode);
 653                 break;
 654
 655         default:
 656                 net_err_ratelimited("%s: Error: dongle_id %d unsupported !\n",
 657                                     __func__, dongle_id);
 658         }
 659 }
 660
 661 /*
 662  * Function via_ircc_change_speed (self, baud)
 663  *
 664  *    Change the speed of the device
 665  *
 666  */
 667 static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
 668 {
 669         struct net_device *dev = self->netdev;
 670         u16 iobase;
 671         u8 value = 0, bTmp;
 672
 673         iobase = self->io.fir_base;
 674         /* Update accounting for new speed */
 675         self->io.speed = speed;
 676         IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __func__, speed);
 677
 678         WriteReg(iobase, I_ST_CT_0, 0x0);
 679
 680         /* Controller mode sellection */
 681         switch (speed) {
 682         case 2400:
 683         case 9600:
 684         case 19200:
 685         case 38400:
 686         case 57600:
 687         case 115200:
 688                 value = (115200/speed)-1;
 689                 SetSIR(iobase, ON);
 690                 CRC16(iobase, ON);
 691                 break;
 692         case 576000:
 693                 /* FIXME: this can't be right, as it's the same as 115200,
 694                  * and 576000 is MIR, not SIR. */
 695                 value = 0;
 696                 SetSIR(iobase, ON);
 697                 CRC16(iobase, ON);
 698                 break;
 699         case 1152000:
 700                 value = 0;
 701                 SetMIR(iobase, ON);
 702                 /* FIXME: CRC ??? */
 703                 break;
 704         case 4000000:
 705                 value = 0;
 706                 SetFIR(iobase, ON);
 707                 SetPulseWidth(iobase, 0);
 708                 SetSendPreambleCount(iobase, 14);
 709                 CRC16(iobase, OFF);
 710                 EnTXCRC(iobase, ON);
 711                 break;
 712         case 16000000:
 713                 value = 0;
 714                 SetVFIR(iobase, ON);
 715                 /* FIXME: CRC ??? */
 716                 break;
 717         default:
 718                 value = 0;
 719                 break;
 720         }
 721
 722         /* Set baudrate to 0x19[2..7] */
 723         bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
 724         bTmp |= value << 2;
 725         WriteReg(iobase, I_CF_H_1, bTmp);
 726
 727         /* Some dongles may need to be informed about speed changes. */
 728         via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
 729
 730         /* Set FIFO size to 64 */
 731         SetFIFO(iobase, 64);
 732
 733         /* Enable IR */
 734         WriteReg(iobase, I_ST_CT_0, 0x80);
 735
 736         // EnTXFIFOHalfLevelInt(iobase,ON);
 737
 738         /* Enable some interrupts so we can receive frames */
 739         //EnAllInt(iobase,ON);
 740
 741         if (IsSIROn(iobase)) {
 742                 SIRFilter(iobase, ON);
 743                 SIRRecvAny(iobase, ON);
 744         } else {
 745                 SIRFilter(iobase, OFF);
 746                 SIRRecvAny(iobase, OFF);
 747         }
 748
 749         if (speed > 115200) {
 750                 /* Install FIR xmit handler */
 751                 dev->netdev_ops = &via_ircc_fir_ops;
 752                 via_ircc_dma_receive(self);
 753         } else {
 754                 /* Install SIR xmit handler */
 755                 dev->netdev_ops = &via_ircc_sir_ops;
 756         }
 757         netif_wake_queue(dev);
 758 }
 759
 760 /*
 761  * Function via_ircc_hard_xmit (skb, dev)
 762  *
 763  *    Transmit the frame!
 764  *
 765  */
 766 static netdev_tx_t via_ircc_hard_xmit_sir(struct sk_buff *skb,
 767                                                 struct net_device *dev)
 768 {
 769         struct via_ircc_cb *self;
 770         unsigned long flags;
 771         u16 iobase;
 772         __u32 speed;
 773
 774         self = netdev_priv(dev);
 775         IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
 776         iobase = self->io.fir_base;
 777
 778         netif_stop_queue(dev);
 779         /* Check if we need to change the speed */
 780         speed = irda_get_next_speed(skb);
 781         if ((speed != self->io.speed) && (speed != -1)) {
 782                 /* Check for empty frame */
 783                 if (!skb->len) {
 784                         via_ircc_change_speed(self, speed);
 785                         dev->trans_start = jiffies;
 786                         dev_kfree_skb(skb);
 787                         return NETDEV_TX_OK;
 788                 } else
 789                         self->new_speed = speed;
 790         }
 791         InitCard(iobase);
 792         CommonInit(iobase);
 793         SIRFilter(iobase, ON);
 794         SetSIR(iobase, ON);
 795         CRC16(iobase, ON);
 796         EnTXCRC(iobase, 0);
 797         WriteReg(iobase, I_ST_CT_0, 0x00);
 798
 799         spin_lock_irqsave(&self->lock, flags);
 800         self->tx_buff.data = self->tx_buff.head;
 801         self->tx_buff.len =
 802             async_wrap_skb(skb, self->tx_buff.data,
 803                            self->tx_buff.truesize);
 804
 805         dev->stats.tx_bytes += self->tx_buff.len;
 806         /* Send this frame with old speed */
 807         SetBaudRate(iobase, self->io.speed);
 808         SetPulseWidth(iobase, 12);
 809         SetSendPreambleCount(iobase, 0);
 810         WriteReg(iobase, I_ST_CT_0, 0x80);
 811
 812         EnableTX(iobase, ON);
 813         EnableRX(iobase, OFF);
 814
 815         ResetChip(iobase, 0);
 816         ResetChip(iobase, 1);
 817         ResetChip(iobase, 2);
 818         ResetChip(iobase, 3);
 819         ResetChip(iobase, 4);
 820
 821         EnAllInt(iobase, ON);
 822         EnTXDMA(iobase, ON);
 823         EnRXDMA(iobase, OFF);
 824
 825         irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
 826                        DMA_TX_MODE);
 827
 828         SetSendByte(iobase, self->tx_buff.len);
 829         RXStart(iobase, OFF);
 830         TXStart(iobase, ON);
 831
 832         dev->trans_start = jiffies;
 833         spin_unlock_irqrestore(&self->lock, flags);
 834         dev_kfree_skb(skb);
 835         return NETDEV_TX_OK;
 836 }
 837
 838 static netdev_tx_t via_ircc_hard_xmit_fir(struct sk_buff *skb,
 839                                                 struct net_device *dev)
 840 {
 841         struct via_ircc_cb *self;
 842         u16 iobase;
 843         __u32 speed;
 844         unsigned long flags;
 845
 846         self = netdev_priv(dev);
 847         iobase = self->io.fir_base;
 848
 849         if (self->st_fifo.len)
 850                 return NETDEV_TX_OK;
 851         if (self->chip_id == 0x3076)
 852                 iodelay(1500);
 853         else
 854                 udelay(1500);
 855         netif_stop_queue(dev);
 856         speed = irda_get_next_speed(skb);
 857         if ((speed != self->io.speed) && (speed != -1)) {
 858                 if (!skb->len) {
 859                         via_ircc_change_speed(self, speed);
 860                         dev->trans_start = jiffies;
 861                         dev_kfree_skb(skb);
 862                         return NETDEV_TX_OK;
 863                 } else
 864                         self->new_speed = speed;
 865         }
 866         spin_lock_irqsave(&self->lock, flags);
 867         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
 868         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
 869
 870         self->tx_fifo.tail += skb->len;
 871         dev->stats.tx_bytes += skb->len;
 872         skb_copy_from_linear_data(skb,
 873                       self->tx_fifo.queue[self->tx_fifo.free].start, skb->len);
 874         self->tx_fifo.len++;
 875         self->tx_fifo.free++;
 876 //F01   if (self->tx_fifo.len == 1) {
 877         via_ircc_dma_xmit(self, iobase);
 878 //F01   }
 879 //F01   if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
 880         dev->trans_start = jiffies;
 881         dev_kfree_skb(skb);
 882         spin_unlock_irqrestore(&self->lock, flags);
 883         return NETDEV_TX_OK;
 884
 885 }
 886
 887 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
 888 {
 889         EnTXDMA(iobase, OFF);
 890         self->io.direction = IO_XMIT;
 891         EnPhys(iobase, ON);
 892         EnableTX(iobase, ON);
 893         EnableRX(iobase, OFF);
 894         ResetChip(iobase, 0);
 895         ResetChip(iobase, 1);
 896         ResetChip(iobase, 2);
 897         ResetChip(iobase, 3);
 898         ResetChip(iobase, 4);
 899         EnAllInt(iobase, ON);
 900         EnTXDMA(iobase, ON);
 901         EnRXDMA(iobase, OFF);
 902         irda_setup_dma(self->io.dma,
 903                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
 904                         self->tx_buff.head) + self->tx_buff_dma,
 905                        self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
 906         IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
 907                    __func__, self->tx_fifo.ptr,
 908                    self->tx_fifo.queue[self->tx_fifo.ptr].len,
 909                    self->tx_fifo.len);
 910
 911         SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
 912         RXStart(iobase, OFF);
 913         TXStart(iobase, ON);
 914         return 0;
 915
 916 }
 917
 918 /*
 919  * Function via_ircc_dma_xmit_complete (self)
 920  *
 921  *    The transfer of a frame in finished. This function will only be called
 922  *    by the interrupt handler
 923  *
 924  */
 925 static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
 926 {
 927         int iobase;
 928         u8 Tx_status;
 929
 930         IRDA_DEBUG(3, "%s()\n", __func__);
 931
 932         iobase = self->io.fir_base;
 933         /* Disable DMA */
 934 //      DisableDmaChannel(self->io.dma);
 935         /* Check for underrun! */
 936         /* Clear bit, by writing 1 into it */
 937         Tx_status = GetTXStatus(iobase);
 938         if (Tx_status & 0x08) {
 939                 self->netdev->stats.tx_errors++;
 940                 self->netdev->stats.tx_fifo_errors++;
 941                 hwreset(self);
 942         /* how to clear underrun? */
 943         } else {
 944                 self->netdev->stats.tx_packets++;
 945                 ResetChip(iobase, 3);
 946                 ResetChip(iobase, 4);
 947         }
 948         /* Check if we need to change the speed */
 949         if (self->new_speed) {
 950                 via_ircc_change_speed(self, self->new_speed);
 951                 self->new_speed = 0;
 952         }
 953
 954         /* Finished with this frame, so prepare for next */
 955         if (IsFIROn(iobase)) {
 956                 if (self->tx_fifo.len) {
 957                         self->tx_fifo.len--;
 958                         self->tx_fifo.ptr++;
 959                 }
 960         }
 961         IRDA_DEBUG(1,
 962                    "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
 963                    __func__,
 964                    self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
 965 /* F01_S
 966         // Any frames to be sent back-to-back?
 967         if (self->tx_fifo.len) {
 968                 // Not finished yet!
 969                 via_ircc_dma_xmit(self, iobase);
 970                 ret = FALSE;
 971         } else {
 972 F01_E*/
 973         // Reset Tx FIFO info
 974         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
 975         self->tx_fifo.tail = self->tx_buff.head;
 976 //F01   }
 977
 978         // Make sure we have room for more frames
 979 //F01   if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
 980         // Not busy transmitting anymore
 981         // Tell the network layer, that we can accept more frames
 982         netif_wake_queue(self->netdev);
 983 //F01   }
 984         return TRUE;
 985 }
 986
 987 /*
 988  * Function via_ircc_dma_receive (self)
 989  *
 990  *    Set configuration for receive a frame.
 991  *
 992  */
 993 static int via_ircc_dma_receive(struct via_ircc_cb *self)
 994 {
 995         int iobase;
 996
 997         iobase = self->io.fir_base;
 998
 999         IRDA_DEBUG(3, "%s()\n", __func__);
1000
1001         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1002         self->tx_fifo.tail = self->tx_buff.head;
1003         self->RxDataReady = 0;
1004         self->io.direction = IO_RECV;
1005         self->rx_buff.data = self->rx_buff.head;
1006         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1007         self->st_fifo.tail = self->st_fifo.head = 0;
1008
1009         EnPhys(iobase, ON);
1010         EnableTX(iobase, OFF);
1011         EnableRX(iobase, ON);
1012
1013         ResetChip(iobase, 0);
1014         ResetChip(iobase, 1);
1015         ResetChip(iobase, 2);
1016         ResetChip(iobase, 3);
1017         ResetChip(iobase, 4);
1018
1019         EnAllInt(iobase, ON);
1020         EnTXDMA(iobase, OFF);
1021         EnRXDMA(iobase, ON);
1022         irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1023                   self->rx_buff.truesize, DMA_RX_MODE);
1024         TXStart(iobase, OFF);
1025         RXStart(iobase, ON);
1026
1027         return 0;
1028 }
1029
1030 /*
1031  * Function via_ircc_dma_receive_complete (self)
1032  *
1033  *    Controller Finished with receiving frames,
1034  *    and this routine is call by ISR
1035  *
1036  */
1037 static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1038                                          int iobase)
1039 {
1040         struct st_fifo *st_fifo;
1041         struct sk_buff *skb;
1042         int len, i;
1043         u8 status = 0;
1044
1045         iobase = self->io.fir_base;
1046         st_fifo = &self->st_fifo;
1047
1048         if (self->io.speed < 4000000) { //Speed below FIR
1049                 len = GetRecvByte(iobase, self);
1050                 skb = dev_alloc_skb(len + 1);
1051                 if (skb == NULL)
1052                         return FALSE;
1053                 // Make sure IP header gets aligned
1054                 skb_reserve(skb, 1);
1055                 skb_put(skb, len - 2);
1056                 if (self->chip_id == 0x3076) {
1057                         for (i = 0; i < len - 2; i++)
1058                                 skb->data[i] = self->rx_buff.data[i * 2];
1059                 } else {
1060                         if (self->chip_id == 0x3096) {
1061                                 for (i = 0; i < len - 2; i++)
1062                                         skb->data[i] =
1063                                             self->rx_buff.data[i];
1064                         }
1065                 }
1066                 // Move to next frame
1067                 self->rx_buff.data += len;
1068                 self->netdev->stats.rx_bytes += len;
1069                 self->netdev->stats.rx_packets++;
1070                 skb->dev = self->netdev;
1071                 skb_reset_mac_header(skb);
1072                 skb->protocol = htons(ETH_P_IRDA);
1073                 netif_rx(skb);
1074                 return TRUE;
1075         }
1076
1077         else {                  //FIR mode
1078                 len = GetRecvByte(iobase, self);
1079                 if (len == 0)
1080                         return TRUE;    //interrupt only, data maybe move by RxT
1081                 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1082                         IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1083                                    __func__, len, RxCurCount(iobase, self),
1084                                    self->RxLastCount);
1085                         hwreset(self);
1086                         return FALSE;
1087                 }
1088                 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1089                            __func__,
1090                            st_fifo->len, len - 4, RxCurCount(iobase, self));
1091
1092                 st_fifo->entries[st_fifo->tail].status = status;
1093                 st_fifo->entries[st_fifo->tail].len = len;
1094                 st_fifo->pending_bytes += len;
1095                 st_fifo->tail++;
1096                 st_fifo->len++;
1097                 if (st_fifo->tail > MAX_RX_WINDOW)
1098                         st_fifo->tail = 0;
1099                 self->RxDataReady = 0;
1100
1101                 // It maybe have MAX_RX_WINDOW package receive by
1102                 // receive_complete before Timer IRQ
1103 /* F01_S
1104           if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1105                   RXStart(iobase,ON);
1106                   SetTimer(iobase,4);
1107           }
1108           else    {
1109 F01_E */
1110                 EnableRX(iobase, OFF);
1111                 EnRXDMA(iobase, OFF);
1112                 RXStart(iobase, OFF);
1113 //F01_S
1114                 // Put this entry back in fifo
1115                 if (st_fifo->head > MAX_RX_WINDOW)
1116                         st_fifo->head = 0;
1117                 status = st_fifo->entries[st_fifo->head].status;
1118                 len = st_fifo->entries[st_fifo->head].len;
1119                 st_fifo->head++;
1120                 st_fifo->len--;
1121
1122                 skb = dev_alloc_skb(len + 1 - 4);
1123                 /*
1124                  * if frame size, data ptr, or skb ptr are wrong, then get next
1125                  * entry.
1126                  */
1127                 if ((skb == NULL) || (skb->data == NULL) ||
1128                     (self->rx_buff.data == NULL) || (len < 6)) {
1129                         self->netdev->stats.rx_dropped++;
1130                         kfree_skb(skb);
1131                         return TRUE;
1132                 }
1133                 skb_reserve(skb, 1);
1134                 skb_put(skb, len - 4);
1135
1136                 skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1137                 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __func__,
1138                            len - 4, self->rx_buff.data);
1139
1140                 // Move to next frame
1141                 self->rx_buff.data += len;
1142                 self->netdev->stats.rx_bytes += len;
1143                 self->netdev->stats.rx_packets++;
1144                 skb->dev = self->netdev;
1145                 skb_reset_mac_header(skb);
1146                 skb->protocol = htons(ETH_P_IRDA);
1147                 netif_rx(skb);
1148
1149 //F01_E
1150         }                       //FIR
1151         return TRUE;
1152
1153 }
1154
1155 /*
1156  * if frame is received , but no INT ,then use this routine to upload frame.
1157  */
1158 static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1159 {
1160         struct sk_buff *skb;
1161         int len;
1162         struct st_fifo *st_fifo;
1163         st_fifo = &self->st_fifo;
1164
1165         len = GetRecvByte(iobase, self);
1166
1167         IRDA_DEBUG(2, "%s(): len=%x\n", __func__, len);
1168
1169         if ((len - 4) < 2) {
1170                 self->netdev->stats.rx_dropped++;
1171                 return FALSE;
1172         }
1173
1174         skb = dev_alloc_skb(len + 1);
1175         if (skb == NULL) {
1176                 self->netdev->stats.rx_dropped++;
1177                 return FALSE;
1178         }
1179         skb_reserve(skb, 1);
1180         skb_put(skb, len - 4 + 1);
1181         skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4 + 1);
1182         st_fifo->tail++;
1183         st_fifo->len++;
1184         if (st_fifo->tail > MAX_RX_WINDOW)
1185                 st_fifo->tail = 0;
1186         // Move to next frame
1187         self->rx_buff.data += len;
1188         self->netdev->stats.rx_bytes += len;
1189         self->netdev->stats.rx_packets++;
1190         skb->dev = self->netdev;
1191         skb_reset_mac_header(skb);
1192         skb->protocol = htons(ETH_P_IRDA);
1193         netif_rx(skb);
1194         if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1195                 RXStart(iobase, ON);
1196         } else {
1197                 EnableRX(iobase, OFF);
1198                 EnRXDMA(iobase, OFF);
1199                 RXStart(iobase, OFF);
1200         }
1201         return TRUE;
1202 }
1203
1204 /*
1205  * Implement back to back receive , use this routine to upload data.
1206  */
1207
1208 static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1209 {
1210         struct st_fifo *st_fifo;
1211         struct sk_buff *skb;
1212         int len;
1213         u8 status;
1214
1215         st_fifo = &self->st_fifo;
1216
1217         if (CkRxRecv(iobase, self)) {
1218                 // if still receiving ,then return ,don't upload frame
1219                 self->RetryCount = 0;
1220                 SetTimer(iobase, 20);
1221                 self->RxDataReady++;
1222                 return FALSE;
1223         } else
1224                 self->RetryCount++;
1225
1226         if ((self->RetryCount >= 1) ||
1227             ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize) ||
1228             (st_fifo->len >= (MAX_RX_WINDOW))) {
1229                 while (st_fifo->len > 0) {      //upload frame
1230                         // Put this entry back in fifo
1231                         if (st_fifo->head > MAX_RX_WINDOW)
1232                                 st_fifo->head = 0;
1233                         status = st_fifo->entries[st_fifo->head].status;
1234                         len = st_fifo->entries[st_fifo->head].len;
1235                         st_fifo->head++;
1236                         st_fifo->len--;
1237
1238                         skb = dev_alloc_skb(len + 1 - 4);
1239                         /*
1240                          * if frame size, data ptr, or skb ptr are wrong,
1241                          * then get next entry.
1242                          */
1243                         if ((skb == NULL) || (skb->data == NULL) ||
1244                             (self->rx_buff.data == NULL) || (len < 6)) {
1245                                 self->netdev->stats.rx_dropped++;
1246                                 continue;
1247                         }
1248                         skb_reserve(skb, 1);
1249                         skb_put(skb, len - 4);
1250                         skb_copy_to_linear_data(skb, self->rx_buff.data, len - 4);
1251
1252                         IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __func__,
1253                                    len - 4, st_fifo->head);
1254
1255                         // Move to next frame
1256                         self->rx_buff.data += len;
1257                         self->netdev->stats.rx_bytes += len;
1258                         self->netdev->stats.rx_packets++;
1259                         skb->dev = self->netdev;
1260                         skb_reset_mac_header(skb);
1261                         skb->protocol = htons(ETH_P_IRDA);
1262                         netif_rx(skb);
1263                 }               //while
1264                 self->RetryCount = 0;
1265
1266                 IRDA_DEBUG(2,
1267                            "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1268                            __func__,
1269                            GetHostStatus(iobase), GetRXStatus(iobase));
1270
1271                 /*
1272                  * if frame is receive complete at this routine ,then upload
1273                  * frame.
1274                  */
1275                 if ((GetRXStatus(iobase) & 0x10) &&
1276                     (RxCurCount(iobase, self) != self->RxLastCount)) {
1277                         upload_rxdata(self, iobase);
1278                         if (irda_device_txqueue_empty(self->netdev))
1279                                 via_ircc_dma_receive(self);
1280                 }
1281         }                       // timer detect complete
1282         else
1283                 SetTimer(iobase, 4);
1284         return TRUE;
1285
1286 }
1287
1288
1289
1290 /*
1291  * Function via_ircc_interrupt (irq, dev_id)
1292  *
1293  *    An interrupt from the chip has arrived. Time to do some work
1294  *
1295  */
1296 static irqreturn_t via_ircc_interrupt(int dummy, void *dev_id)
1297 {
1298         struct net_device *dev = dev_id;
1299         struct via_ircc_cb *self = netdev_priv(dev);
1300         int iobase;
1301         u8 iHostIntType, iRxIntType, iTxIntType;
1302
1303         iobase = self->io.fir_base;
1304         spin_lock(&self->lock);
1305         iHostIntType = GetHostStatus(iobase);
1306
1307         IRDA_DEBUG(4, "%s(): iHostIntType %02x:  %s %s %s  %02x\n",
1308                    __func__, iHostIntType,
1309                    (iHostIntType & 0x40) ? "Timer" : "",
1310                    (iHostIntType & 0x20) ? "Tx" : "",
1311                    (iHostIntType & 0x10) ? "Rx" : "",
1312                    (iHostIntType & 0x0e) >> 1);
1313
1314         if ((iHostIntType & 0x40) != 0) {       //Timer Event
1315                 self->EventFlag.TimeOut++;
1316                 ClearTimerInt(iobase, 1);
1317                 if (self->io.direction == IO_XMIT) {
1318                         via_ircc_dma_xmit(self, iobase);
1319                 }
1320                 if (self->io.direction == IO_RECV) {
1321                         /*
1322                          * frame ready hold too long, must reset.
1323                          */
1324                         if (self->RxDataReady > 30) {
1325                                 hwreset(self);
1326                                 if (irda_device_txqueue_empty(self->netdev)) {
1327                                         via_ircc_dma_receive(self);
1328                                 }
1329                         } else {        // call this to upload frame.
1330                                 RxTimerHandler(self, iobase);
1331                         }
1332                 }               //RECV
1333         }                       //Timer Event
1334         if ((iHostIntType & 0x20) != 0) {       //Tx Event
1335                 iTxIntType = GetTXStatus(iobase);
1336
1337                 IRDA_DEBUG(4, "%s(): iTxIntType %02x:  %s %s %s %s\n",
1338                            __func__, iTxIntType,
1339                            (iTxIntType & 0x08) ? "FIFO underr." : "",
1340                            (iTxIntType & 0x04) ? "EOM" : "",
1341                            (iTxIntType & 0x02) ? "FIFO ready" : "",
1342                            (iTxIntType & 0x01) ? "Early EOM" : "");
1343
1344                 if (iTxIntType & 0x4) {
1345                         self->EventFlag.EOMessage++;    // read and will auto clean
1346                         if (via_ircc_dma_xmit_complete(self)) {
1347                                 if (irda_device_txqueue_empty
1348                                     (self->netdev)) {
1349                                         via_ircc_dma_receive(self);
1350                                 }
1351                         } else {
1352                                 self->EventFlag.Unknown++;
1353                         }
1354                 }               //EOP
1355         }                       //Tx Event
1356         //----------------------------------------
1357         if ((iHostIntType & 0x10) != 0) {       //Rx Event
1358                 /* Check if DMA has finished */
1359                 iRxIntType = GetRXStatus(iobase);
1360
1361                 IRDA_DEBUG(4, "%s(): iRxIntType %02x:  %s %s %s %s %s %s %s\n",
1362                            __func__, iRxIntType,
1363                            (iRxIntType & 0x80) ? "PHY err."     : "",
1364                            (iRxIntType & 0x40) ? "CRC err"      : "",
1365                            (iRxIntType & 0x20) ? "FIFO overr."  : "",
1366                            (iRxIntType & 0x10) ? "EOF"          : "",
1367                            (iRxIntType & 0x08) ? "RxData"       : "",
1368                            (iRxIntType & 0x02) ? "RxMaxLen"     : "",
1369                            (iRxIntType & 0x01) ? "SIR bad"      : "");
1370                 if (!iRxIntType)
1371                         IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __func__);
1372
1373                 if (iRxIntType & 0x10) {
1374                         if (via_ircc_dma_receive_complete(self, iobase)) {
1375 //F01       if(!(IsFIROn(iobase)))  via_ircc_dma_receive(self);
1376                                 via_ircc_dma_receive(self);
1377                         }
1378                 }               // No ERR
1379                 else {          //ERR
1380                         IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1381                                    __func__, iRxIntType, iHostIntType,
1382                                    RxCurCount(iobase, self),
1383                                    self->RxLastCount);
1384
1385                         if (iRxIntType & 0x20) {        //FIFO OverRun ERR
1386                                 ResetChip(iobase, 0);
1387                                 ResetChip(iobase, 1);
1388                         } else {        //PHY,CRC ERR
1389
1390                                 if (iRxIntType != 0x08)
1391                                         hwreset(self);  //F01
1392                         }
1393                         via_ircc_dma_receive(self);
1394                 }               //ERR
1395
1396         }                       //Rx Event
1397         spin_unlock(&self->lock);
1398         return IRQ_RETVAL(iHostIntType);
1399 }
1400
1401 static void hwreset(struct via_ircc_cb *self)
1402 {
1403         int iobase;
1404         iobase = self->io.fir_base;
1405
1406         IRDA_DEBUG(3, "%s()\n", __func__);
1407
1408         ResetChip(iobase, 5);
1409         EnableDMA(iobase, OFF);
1410         EnableTX(iobase, OFF);
1411         EnableRX(iobase, OFF);
1412         EnRXDMA(iobase, OFF);
1413         EnTXDMA(iobase, OFF);
1414         RXStart(iobase, OFF);
1415         TXStart(iobase, OFF);
1416         InitCard(iobase);
1417         CommonInit(iobase);
1418         SIRFilter(iobase, ON);
1419         SetSIR(iobase, ON);
1420         CRC16(iobase, ON);
1421         EnTXCRC(iobase, 0);
1422         WriteReg(iobase, I_ST_CT_0, 0x00);
1423         SetBaudRate(iobase, 9600);
1424         SetPulseWidth(iobase, 12);
1425         SetSendPreambleCount(iobase, 0);
1426         WriteReg(iobase, I_ST_CT_0, 0x80);
1427
1428         /* Restore speed. */
1429         via_ircc_change_speed(self, self->io.speed);
1430
1431         self->st_fifo.len = 0;
1432 }
1433
1434 /*
1435  * Function via_ircc_is_receiving (self)
1436  *
1437  *    Return TRUE is we are currently receiving a frame
1438  *
1439  */
1440 static int via_ircc_is_receiving(struct via_ircc_cb *self)
1441 {
1442         int status = FALSE;
1443         int iobase;
1444
1445         IRDA_ASSERT(self != NULL, return FALSE;);
1446
1447         iobase = self->io.fir_base;
1448         if (CkRxRecv(iobase, self))
1449                 status = TRUE;
1450
1451         IRDA_DEBUG(2, "%s(): status=%x....\n", __func__, status);
1452
1453         return status;
1454 }
1455
1456
1457 /*
1458  * Function via_ircc_net_open (dev)
1459  *
1460  *    Start the device
1461  *
1462  */
1463 static int via_ircc_net_open(struct net_device *dev)
1464 {
1465         struct via_ircc_cb *self;
1466         int iobase;
1467         char hwname[32];
1468
1469         IRDA_DEBUG(3, "%s()\n", __func__);
1470
1471         IRDA_ASSERT(dev != NULL, return -1;);
1472         self = netdev_priv(dev);
1473         dev->stats.rx_packets = 0;
1474         IRDA_ASSERT(self != NULL, return 0;);
1475         iobase = self->io.fir_base;
1476         if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1477                 net_warn_ratelimited("%s, unable to allocate irq=%d\n",
1478                                      driver_name, self->io.irq);
1479                 return -EAGAIN;
1480         }
1481         /*
1482          * Always allocate the DMA channel after the IRQ, and clean up on
1483          * failure.
1484          */
1485         if (request_dma(self->io.dma, dev->name)) {
1486                 net_warn_ratelimited("%s, unable to allocate dma=%d\n",
1487                                      driver_name, self->io.dma);
1488                 free_irq(self->io.irq, dev);
1489                 return -EAGAIN;
1490         }
1491         if (self->io.dma2 != self->io.dma) {
1492                 if (request_dma(self->io.dma2, dev->name)) {
1493                         net_warn_ratelimited("%s, unable to allocate dma2=%d\n",
1494                                              driver_name, self->io.dma2);
1495                         free_irq(self->io.irq, dev);
1496                         free_dma(self->io.dma);
1497                         return -EAGAIN;
1498                 }
1499         }
1500
1501
1502         /* turn on interrupts */
1503         EnAllInt(iobase, ON);
1504         EnInternalLoop(iobase, OFF);
1505         EnExternalLoop(iobase, OFF);
1506
1507         /* */
1508         via_ircc_dma_receive(self);
1509
1510         /* Ready to play! */
1511         netif_start_queue(dev);
1512
1513         /*
1514          * Open new IrLAP layer instance, now that everything should be
1515          * initialized properly
1516          */
1517         sprintf(hwname, "VIA @ 0x%x", iobase);
1518         self->irlap = irlap_open(dev, &self->qos, hwname);
1519
1520         self->RxLastCount = 0;
1521
1522         return 0;
1523 }
1524
1525 /*
1526  * Function via_ircc_net_close (dev)
1527  *
1528  *    Stop the device
1529  *
1530  */
1531 static int via_ircc_net_close(struct net_device *dev)
1532 {
1533         struct via_ircc_cb *self;
1534         int iobase;
1535
1536         IRDA_DEBUG(3, "%s()\n", __func__);
1537
1538         IRDA_ASSERT(dev != NULL, return -1;);
1539         self = netdev_priv(dev);
1540         IRDA_ASSERT(self != NULL, return 0;);
1541
1542         /* Stop device */
1543         netif_stop_queue(dev);
1544         /* Stop and remove instance of IrLAP */
1545         if (self->irlap)
1546                 irlap_close(self->irlap);
1547         self->irlap = NULL;
1548         iobase = self->io.fir_base;
1549         EnTXDMA(iobase, OFF);
1550         EnRXDMA(iobase, OFF);
1551         DisableDmaChannel(self->io.dma);
1552
1553         /* Disable interrupts */
1554         EnAllInt(iobase, OFF);
1555         free_irq(self->io.irq, dev);
1556         free_dma(self->io.dma);
1557         if (self->io.dma2 != self->io.dma)
1558                 free_dma(self->io.dma2);
1559
1560         return 0;
1561 }
1562
1563 /*
1564  * Function via_ircc_net_ioctl (dev, rq, cmd)
1565  *
1566  *    Process IOCTL commands for this device
1567  *
1568  */
1569 static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1570                               int cmd)
1571 {
1572         struct if_irda_req *irq = (struct if_irda_req *) rq;
1573         struct via_ircc_cb *self;
1574         unsigned long flags;
1575         int ret = 0;
1576
1577         IRDA_ASSERT(dev != NULL, return -1;);
1578         self = netdev_priv(dev);
1579         IRDA_ASSERT(self != NULL, return -1;);
1580         IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __func__, dev->name,
1581                    cmd);
1582         /* Disable interrupts & save flags */
1583         spin_lock_irqsave(&self->lock, flags);
1584         switch (cmd) {
1585         case SIOCSBANDWIDTH:    /* Set bandwidth */
1586                 if (!capable(CAP_NET_ADMIN)) {
1587                         ret = -EPERM;
1588                         goto out;
1589                 }
1590                 via_ircc_change_speed(self, irq->ifr_baudrate);
1591                 break;
1592         case SIOCSMEDIABUSY:    /* Set media busy */
1593                 if (!capable(CAP_NET_ADMIN)) {
1594                         ret = -EPERM;
1595                         goto out;
1596                 }
1597                 irda_device_set_media_busy(self->netdev, TRUE);
1598                 break;
1599         case SIOCGRECEIVING:    /* Check if we are receiving right now */
1600                 irq->ifr_receiving = via_ircc_is_receiving(self);
1601                 break;
1602         default:
1603                 ret = -EOPNOTSUPP;
1604         }
1605       out:
1606         spin_unlock_irqrestore(&self->lock, flags);
1607         return ret;
1608 }
1609
1610 MODULE_AUTHOR("VIA Technologies,inc");
1611 MODULE_DESCRIPTION("VIA IrDA Device Driver");
1612 MODULE_LICENSE("GPL");
1613
1614 module_init(via_ircc_init);
1615 module_exit(via_ircc_cleanup);