2 * Copyright (c) 2012 Qualcomm Atheros, Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 * TX polling - checks if the TX engine is stuck somewhere
21 * and issues a chip reset if so.
23 void ath_tx_complete_poll_work(struct work_struct *work)
25 struct ath_softc *sc = container_of(work, struct ath_softc,
26 tx_complete_work.work);
29 bool needreset = false;
31 for (i = 0; i < IEEE80211_NUM_ACS; i++) {
32 txq = sc->tx.txq_map[i];
34 ath_txq_lock(sc, txq);
36 if (txq->axq_tx_inprogress) {
38 ath_txq_unlock(sc, txq);
41 txq->axq_tx_inprogress = true;
44 ath_txq_unlock_complete(sc, txq);
48 ath_dbg(ath9k_hw_common(sc->sc_ah), RESET,
49 "tx hung, resetting the chip\n");
50 ath9k_queue_reset(sc, RESET_TYPE_TX_HANG);
54 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
55 msecs_to_jiffies(ATH_TX_COMPLETE_POLL_INT));
59 * Checks if the BB/MAC is hung.
61 void ath_hw_check(struct work_struct *work)
63 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
64 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
67 u8 is_alive, nbeacon = 1;
68 enum ath_reset_type type;
71 is_alive = ath9k_hw_check_alive(sc->sc_ah);
73 if (is_alive && !AR_SREV_9300(sc->sc_ah))
75 else if (!is_alive && AR_SREV_9300(sc->sc_ah)) {
76 ath_dbg(common, RESET,
77 "DCU stuck is detected. Schedule chip reset\n");
78 type = RESET_TYPE_MAC_HANG;
82 spin_lock_irqsave(&common->cc_lock, flags);
83 busy = ath_update_survey_stats(sc);
84 spin_unlock_irqrestore(&common->cc_lock, flags);
86 ath_dbg(common, RESET, "Possible baseband hang, busy=%d (try %d)\n",
87 busy, sc->hw_busy_count + 1);
89 if (++sc->hw_busy_count >= 3) {
90 type = RESET_TYPE_BB_HANG;
93 } else if (busy >= 0) {
94 sc->hw_busy_count = 0;
98 ath_start_rx_poll(sc, nbeacon);
102 ath9k_queue_reset(sc, type);
104 ath9k_ps_restore(sc);
108 * PLL-WAR for AR9485/AR9340
110 static bool ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
113 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
115 if (pll_sqsum >= 0x40000) {
118 ath_dbg(common, RESET, "PLL WAR, resetting the chip\n");
119 ath9k_queue_reset(sc, RESET_TYPE_PLL_HANG);
130 void ath_hw_pll_work(struct work_struct *work)
133 struct ath_softc *sc = container_of(work, struct ath_softc,
136 * ensure that the PLL WAR is executed only
137 * after the STA is associated (or) if the
138 * beaconing had started in interfaces that
141 if (!test_bit(SC_OP_BEACONS, &sc->sc_flags))
145 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
146 ath9k_ps_restore(sc);
147 if (ath_hw_pll_rx_hang_check(sc, pll_sqsum))
150 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
151 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
155 * RX Polling - monitors baseband hangs.
157 void ath_start_rx_poll(struct ath_softc *sc, u8 nbeacon)
159 if (!AR_SREV_9300(sc->sc_ah))
162 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
165 mod_timer(&sc->rx_poll_timer, jiffies + msecs_to_jiffies
166 (nbeacon * sc->cur_beacon_conf.beacon_interval));
169 void ath_rx_poll(unsigned long data)
171 struct ath_softc *sc = (struct ath_softc *)data;
173 if (!test_bit(SC_OP_INVALID, &sc->sc_flags))
174 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
180 static void ath_paprd_activate(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 struct ath9k_hw_cal_data *caldata = ah->caldata;
187 if (!caldata || !caldata->paprd_done) {
188 ath_dbg(common, CALIBRATE, "Failed to activate PAPRD\n");
192 ar9003_paprd_enable(ah, false);
193 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
194 if (!(ah->txchainmask & BIT(chain)))
197 ar9003_paprd_populate_single_table(ah, caldata, chain);
200 ath_dbg(common, CALIBRATE, "Activating PAPRD\n");
201 ar9003_paprd_enable(ah, true);
204 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
206 struct ieee80211_hw *hw = sc->hw;
207 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
208 struct ath_hw *ah = sc->sc_ah;
209 struct ath_common *common = ath9k_hw_common(ah);
210 struct ath_tx_control txctl;
213 memset(&txctl, 0, sizeof(txctl));
214 txctl.txq = sc->tx.txq_map[IEEE80211_AC_BE];
216 memset(tx_info, 0, sizeof(*tx_info));
217 tx_info->band = hw->conf.channel->band;
218 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
219 tx_info->control.rates[0].idx = 0;
220 tx_info->control.rates[0].count = 1;
221 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
222 tx_info->control.rates[1].idx = -1;
224 init_completion(&sc->paprd_complete);
225 txctl.paprd = BIT(chain);
227 if (ath_tx_start(hw, skb, &txctl) != 0) {
228 ath_dbg(common, CALIBRATE, "PAPRD TX failed\n");
229 dev_kfree_skb_any(skb);
233 time_left = wait_for_completion_timeout(&sc->paprd_complete,
234 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
237 ath_dbg(common, CALIBRATE,
238 "Timeout waiting for paprd training on TX chain %d\n",
244 void ath_paprd_calibrate(struct work_struct *work)
246 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
247 struct ieee80211_hw *hw = sc->hw;
248 struct ath_hw *ah = sc->sc_ah;
249 struct ieee80211_hdr *hdr;
250 struct sk_buff *skb = NULL;
251 struct ath9k_hw_cal_data *caldata = ah->caldata;
252 struct ath_common *common = ath9k_hw_common(ah);
259 if (!caldata || !caldata->paprd_packet_sent || caldata->paprd_done) {
260 ath_dbg(common, CALIBRATE, "Skipping PAPRD calibration\n");
266 if (ar9003_paprd_init_table(ah) < 0)
269 skb = alloc_skb(len, GFP_KERNEL);
274 memset(skb->data, 0, len);
275 hdr = (struct ieee80211_hdr *)skb->data;
276 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
277 hdr->frame_control = cpu_to_le16(ftype);
278 hdr->duration_id = cpu_to_le16(10);
279 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
280 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
281 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
283 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
284 if (!(ah->txchainmask & BIT(chain)))
288 ar9003_paprd_setup_gain_table(ah, chain);
290 ath_dbg(common, CALIBRATE,
291 "Sending PAPRD training frame on chain %d\n", chain);
292 if (!ath_paprd_send_frame(sc, skb, chain))
295 if (!ar9003_paprd_is_done(ah)) {
296 ath_dbg(common, CALIBRATE,
297 "PAPRD not yet done on chain %d\n", chain);
301 ret = ar9003_paprd_create_curve(ah, caldata, chain);
302 if (ret == -EINPROGRESS) {
303 ath_dbg(common, CALIBRATE,
304 "PAPRD curve on chain %d needs to be re-trained\n",
308 ath_dbg(common, CALIBRATE,
309 "PAPRD create curve failed on chain %d\n",
319 caldata->paprd_done = true;
320 ath_paprd_activate(sc);
324 ath9k_ps_restore(sc);
328 * ANI performs periodic noise floor calibration
329 * that is used to adjust and optimize the chip performance. This
330 * takes environmental changes (location, temperature) into account.
331 * When the task is complete, it reschedules itself depending on the
332 * appropriate interval that was calculated.
334 void ath_ani_calibrate(unsigned long data)
336 struct ath_softc *sc = (struct ath_softc *)data;
337 struct ath_hw *ah = sc->sc_ah;
338 struct ath_common *common = ath9k_hw_common(ah);
339 bool longcal = false;
340 bool shortcal = false;
341 bool aniflag = false;
342 unsigned int timestamp = jiffies_to_msecs(jiffies);
343 u32 cal_interval, short_cal_interval, long_cal_interval;
346 if (ah->caldata && ah->caldata->nfcal_interference)
347 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
349 long_cal_interval = ATH_LONG_CALINTERVAL;
351 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
352 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
354 /* Only calibrate if awake */
355 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) {
356 if (++ah->ani_skip_count >= ATH_ANI_MAX_SKIP_COUNT) {
357 spin_lock_irqsave(&sc->sc_pm_lock, flags);
358 sc->ps_flags |= PS_WAIT_FOR_ANI;
359 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
363 ah->ani_skip_count = 0;
364 spin_lock_irqsave(&sc->sc_pm_lock, flags);
365 sc->ps_flags &= ~PS_WAIT_FOR_ANI;
366 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
370 /* Long calibration runs independently of short calibration. */
371 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
373 common->ani.longcal_timer = timestamp;
376 /* Short calibration applies only while caldone is false */
377 if (!common->ani.caldone) {
378 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
380 common->ani.shortcal_timer = timestamp;
381 common->ani.resetcal_timer = timestamp;
384 if ((timestamp - common->ani.resetcal_timer) >=
385 ATH_RESTART_CALINTERVAL) {
386 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
387 if (common->ani.caldone)
388 common->ani.resetcal_timer = timestamp;
392 /* Verify whether we must check ANI */
393 if (sc->sc_ah->config.enable_ani
394 && (timestamp - common->ani.checkani_timer) >=
395 ah->config.ani_poll_interval) {
397 common->ani.checkani_timer = timestamp;
400 /* Call ANI routine if necessary */
402 spin_lock_irqsave(&common->cc_lock, flags);
403 ath9k_hw_ani_monitor(ah, ah->curchan);
404 ath_update_survey_stats(sc);
405 spin_unlock_irqrestore(&common->cc_lock, flags);
408 /* Perform calibration if necessary */
409 if (longcal || shortcal) {
410 common->ani.caldone =
411 ath9k_hw_calibrate(ah, ah->curchan,
412 ah->rxchainmask, longcal);
416 "Calibration @%lu finished: %s %s %s, caldone: %s\n",
418 longcal ? "long" : "", shortcal ? "short" : "",
419 aniflag ? "ani" : "", common->ani.caldone ? "true" : "false");
421 ath9k_debug_samp_bb_mac(sc);
422 ath9k_ps_restore(sc);
426 * Set timer interval based on previous results.
427 * The interval must be the shortest necessary to satisfy ANI,
428 * short calibration and long calibration.
430 cal_interval = ATH_LONG_CALINTERVAL;
431 if (sc->sc_ah->config.enable_ani)
432 cal_interval = min(cal_interval,
433 (u32)ah->config.ani_poll_interval);
434 if (!common->ani.caldone)
435 cal_interval = min(cal_interval, (u32)short_cal_interval);
437 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
439 if (ar9003_is_paprd_enabled(ah) && ah->caldata) {
440 if (!ah->caldata->paprd_done) {
441 ieee80211_queue_work(sc->hw, &sc->paprd_work);
442 } else if (!ah->paprd_table_write_done) {
444 ath_paprd_activate(sc);
445 ath9k_ps_restore(sc);
450 void ath_start_ani(struct ath_softc *sc)
452 struct ath_hw *ah = sc->sc_ah;
453 struct ath_common *common = ath9k_hw_common(ah);
454 unsigned long timestamp = jiffies_to_msecs(jiffies);
456 if (common->disable_ani ||
457 !test_bit(SC_OP_ANI_RUN, &sc->sc_flags) ||
458 (sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
461 common->ani.longcal_timer = timestamp;
462 common->ani.shortcal_timer = timestamp;
463 common->ani.checkani_timer = timestamp;
465 ath_dbg(common, ANI, "Starting ANI\n");
466 mod_timer(&common->ani.timer,
467 jiffies + msecs_to_jiffies((u32)ah->config.ani_poll_interval));
470 void ath_stop_ani(struct ath_softc *sc)
472 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
474 ath_dbg(common, ANI, "Stopping ANI\n");
475 del_timer_sync(&common->ani.timer);
478 void ath_check_ani(struct ath_softc *sc)
480 struct ath_hw *ah = sc->sc_ah;
481 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
484 * Check for the various conditions in which ANI has to
487 if (ah->opmode == NL80211_IFTYPE_ADHOC) {
488 if (!cur_conf->enable_beacon)
490 } else if (ah->opmode == NL80211_IFTYPE_AP) {
491 if (!cur_conf->enable_beacon) {
493 * Disable ANI only when there are no
494 * associated stations.
496 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
499 } else if (ah->opmode == NL80211_IFTYPE_STATION) {
500 if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags))
504 if (!test_bit(SC_OP_ANI_RUN, &sc->sc_flags)) {
505 set_bit(SC_OP_ANI_RUN, &sc->sc_flags);
512 clear_bit(SC_OP_ANI_RUN, &sc->sc_flags);
516 void ath_update_survey_nf(struct ath_softc *sc, int channel)
518 struct ath_hw *ah = sc->sc_ah;
519 struct ath9k_channel *chan = &ah->channels[channel];
520 struct survey_info *survey = &sc->survey[channel];
522 if (chan->noisefloor) {
523 survey->filled |= SURVEY_INFO_NOISE_DBM;
524 survey->noise = ath9k_hw_getchan_noise(ah, chan);
529 * Updates the survey statistics and returns the busy time since last
530 * update in %, if the measurement duration was long enough for the
531 * result to be useful, -1 otherwise.
533 int ath_update_survey_stats(struct ath_softc *sc)
535 struct ath_hw *ah = sc->sc_ah;
536 struct ath_common *common = ath9k_hw_common(ah);
537 int pos = ah->curchan - &ah->channels[0];
538 struct survey_info *survey = &sc->survey[pos];
539 struct ath_cycle_counters *cc = &common->cc_survey;
540 unsigned int div = common->clockrate * 1000;
546 if (ah->power_mode == ATH9K_PM_AWAKE)
547 ath_hw_cycle_counters_update(common);
549 if (cc->cycles > 0) {
550 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
551 SURVEY_INFO_CHANNEL_TIME_BUSY |
552 SURVEY_INFO_CHANNEL_TIME_RX |
553 SURVEY_INFO_CHANNEL_TIME_TX;
554 survey->channel_time += cc->cycles / div;
555 survey->channel_time_busy += cc->rx_busy / div;
556 survey->channel_time_rx += cc->rx_frame / div;
557 survey->channel_time_tx += cc->tx_frame / div;
560 if (cc->cycles < div)
564 ret = cc->rx_busy * 100 / cc->cycles;
566 memset(cc, 0, sizeof(*cc));
568 ath_update_survey_nf(sc, pos);