2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
61 spin_lock_bh(&txq->axq_lock);
68 if (txq->mac80211_qnum >= 0) {
69 struct list_head *list;
71 list = &sc->cur_chan->acq[txq->mac80211_qnum];
72 if (!list_empty(list))
76 spin_unlock_bh(&txq->axq_lock);
80 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath_ps_full_sleep(unsigned long data)
94 struct ath_softc *sc = (struct ath_softc *) data;
95 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
98 spin_lock(&common->cc_lock);
99 ath_hw_cycle_counters_update(common);
100 spin_unlock(&common->cc_lock);
102 ath9k_hw_setrxabort(sc->sc_ah, 1);
103 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
105 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
108 void ath9k_ps_wakeup(struct ath_softc *sc)
110 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
112 enum ath9k_power_mode power_mode;
114 spin_lock_irqsave(&sc->sc_pm_lock, flags);
115 if (++sc->ps_usecount != 1)
118 del_timer_sync(&sc->sleep_timer);
119 power_mode = sc->sc_ah->power_mode;
120 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
123 * While the hardware is asleep, the cycle counters contain no
124 * useful data. Better clear them now so that they don't mess up
125 * survey data results.
127 if (power_mode != ATH9K_PM_AWAKE) {
128 spin_lock(&common->cc_lock);
129 ath_hw_cycle_counters_update(common);
130 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
131 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
132 spin_unlock(&common->cc_lock);
136 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
139 void ath9k_ps_restore(struct ath_softc *sc)
141 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
142 enum ath9k_power_mode mode;
145 spin_lock_irqsave(&sc->sc_pm_lock, flags);
146 if (--sc->ps_usecount != 0)
150 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
154 if (sc->ps_enabled &&
155 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
157 PS_WAIT_FOR_PSPOLL_DATA |
160 mode = ATH9K_PM_NETWORK_SLEEP;
161 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
162 ath9k_btcoex_stop_gen_timer(sc);
167 spin_lock(&common->cc_lock);
168 ath_hw_cycle_counters_update(common);
169 spin_unlock(&common->cc_lock);
171 ath9k_hw_setpower(sc->sc_ah, mode);
174 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
177 static void __ath_cancel_work(struct ath_softc *sc)
179 cancel_work_sync(&sc->paprd_work);
180 cancel_delayed_work_sync(&sc->tx_complete_work);
181 cancel_delayed_work_sync(&sc->hw_pll_work);
183 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
184 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
185 cancel_work_sync(&sc->mci_work);
189 void ath_cancel_work(struct ath_softc *sc)
191 __ath_cancel_work(sc);
192 cancel_work_sync(&sc->hw_reset_work);
195 void ath_restart_work(struct ath_softc *sc)
197 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
199 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
200 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
201 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
206 static bool ath_prepare_reset(struct ath_softc *sc)
208 struct ath_hw *ah = sc->sc_ah;
211 ieee80211_stop_queues(sc->hw);
213 ath9k_hw_disable_interrupts(ah);
215 if (!ath_drain_all_txq(sc))
218 if (!ath_stoprecv(sc))
224 static bool ath_complete_reset(struct ath_softc *sc, bool start)
226 struct ath_hw *ah = sc->sc_ah;
227 struct ath_common *common = ath9k_hw_common(ah);
230 ath9k_calculate_summary_state(sc, sc->cur_chan);
232 ath9k_cmn_update_txpow(ah, sc->curtxpow,
233 sc->cur_chan->txpower, &sc->curtxpow);
234 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
236 if (!sc->cur_chan->offchannel && start) {
237 /* restore per chanctx TSF timer */
238 if (sc->cur_chan->tsf_val) {
241 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
243 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
247 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
250 if (ah->opmode == NL80211_IFTYPE_STATION &&
251 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
252 spin_lock_irqsave(&sc->sc_pm_lock, flags);
253 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
254 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
256 ath9k_set_beacon(sc);
259 ath_restart_work(sc);
260 ath_txq_schedule_all(sc);
265 ath9k_hw_set_interrupts(ah);
266 ath9k_hw_enable_interrupts(ah);
267 ieee80211_wake_queues(sc->hw);
268 ath9k_p2p_ps_timer(sc);
273 int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
275 struct ath_hw *ah = sc->sc_ah;
276 struct ath_common *common = ath9k_hw_common(ah);
277 struct ath9k_hw_cal_data *caldata = NULL;
281 __ath_cancel_work(sc);
283 tasklet_disable(&sc->intr_tq);
284 spin_lock_bh(&sc->sc_pcu_lock);
286 if (!sc->cur_chan->offchannel) {
288 caldata = &sc->cur_chan->caldata;
296 if (!ath_prepare_reset(sc))
299 if (ath9k_is_chanctx_enabled())
302 spin_lock_bh(&sc->chan_lock);
303 sc->cur_chandef = sc->cur_chan->chandef;
304 spin_unlock_bh(&sc->chan_lock);
306 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
307 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
309 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
312 "Unable to reset channel, reset status %d\n", r);
314 ath9k_hw_enable_interrupts(ah);
315 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
320 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
321 sc->cur_chan->offchannel)
322 ath9k_mci_set_txpower(sc, true, false);
324 if (!ath_complete_reset(sc, true))
328 spin_unlock_bh(&sc->sc_pcu_lock);
329 tasklet_enable(&sc->intr_tq);
334 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
335 struct ieee80211_vif *vif)
338 an = (struct ath_node *)sta->drv_priv;
343 memset(&an->key_idx, 0, sizeof(an->key_idx));
345 ath_tx_node_init(sc, an);
347 ath_dynack_node_init(sc->sc_ah, an);
350 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
352 struct ath_node *an = (struct ath_node *)sta->drv_priv;
353 ath_tx_node_cleanup(sc, an);
355 ath_dynack_node_deinit(sc->sc_ah, an);
358 void ath9k_tasklet(unsigned long data)
360 struct ath_softc *sc = (struct ath_softc *)data;
361 struct ath_hw *ah = sc->sc_ah;
362 struct ath_common *common = ath9k_hw_common(ah);
363 enum ath_reset_type type;
365 u32 status = sc->intrstatus;
369 spin_lock(&sc->sc_pcu_lock);
371 if (status & ATH9K_INT_FATAL) {
372 type = RESET_TYPE_FATAL_INT;
373 ath9k_queue_reset(sc, type);
376 * Increment the ref. counter here so that
377 * interrupts are enabled in the reset routine.
379 atomic_inc(&ah->intr_ref_cnt);
380 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
384 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
385 (status & ATH9K_INT_BB_WATCHDOG)) {
386 spin_lock(&common->cc_lock);
387 ath_hw_cycle_counters_update(common);
388 ar9003_hw_bb_watchdog_dbg_info(ah);
389 spin_unlock(&common->cc_lock);
391 if (ar9003_hw_bb_watchdog_check(ah)) {
392 type = RESET_TYPE_BB_WATCHDOG;
393 ath9k_queue_reset(sc, type);
396 * Increment the ref. counter here so that
397 * interrupts are enabled in the reset routine.
399 atomic_inc(&ah->intr_ref_cnt);
400 ath_dbg(common, RESET,
401 "BB_WATCHDOG: Skipping interrupts\n");
406 if (status & ATH9K_INT_GTT) {
409 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
410 type = RESET_TYPE_TX_GTT;
411 ath9k_queue_reset(sc, type);
412 atomic_inc(&ah->intr_ref_cnt);
413 ath_dbg(common, RESET,
414 "GTT: Skipping interrupts\n");
419 spin_lock_irqsave(&sc->sc_pm_lock, flags);
420 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
422 * TSF sync does not look correct; remain awake to sync with
425 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
426 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
428 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
430 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
431 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
434 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
436 if (status & rxmask) {
437 /* Check for high priority Rx first */
438 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
439 (status & ATH9K_INT_RXHP))
440 ath_rx_tasklet(sc, 0, true);
442 ath_rx_tasklet(sc, 0, false);
445 if (status & ATH9K_INT_TX) {
446 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
448 * For EDMA chips, TX completion is enabled for the
449 * beacon queue, so if a beacon has been transmitted
450 * successfully after a GTT interrupt, the GTT counter
451 * gets reset to zero here.
455 ath_tx_edma_tasklet(sc);
460 wake_up(&sc->tx_wait);
463 if (status & ATH9K_INT_GENTIMER)
464 ath_gen_timer_isr(sc->sc_ah);
466 ath9k_btcoex_handle_interrupt(sc, status);
468 /* re-enable hardware interrupt */
469 ath9k_hw_enable_interrupts(ah);
471 spin_unlock(&sc->sc_pcu_lock);
472 ath9k_ps_restore(sc);
475 irqreturn_t ath_isr(int irq, void *dev)
477 #define SCHED_INTR ( \
479 ATH9K_INT_BB_WATCHDOG | \
490 ATH9K_INT_GENTIMER | \
493 struct ath_softc *sc = dev;
494 struct ath_hw *ah = sc->sc_ah;
495 struct ath_common *common = ath9k_hw_common(ah);
496 enum ath9k_int status;
501 * The hardware is not ready/present, don't
502 * touch anything. Note this can happen early
503 * on if the IRQ is shared.
505 if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
508 /* shared irq, not for us */
510 if (!ath9k_hw_intrpend(ah))
513 if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
514 ath9k_hw_kill_interrupts(ah);
519 * Figure out the reason(s) for the interrupt. Note
520 * that the hal returns a pseudo-ISR that may include
521 * bits we haven't explicitly enabled so we mask the
522 * value to insure we only process bits we requested.
524 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
525 ath9k_debug_sync_cause(sc, sync_cause);
526 status &= ah->imask; /* discard unasked-for bits */
529 * If there are no status bits set, then this interrupt was not
530 * for me (should have been caught above).
535 /* Cache the status */
536 sc->intrstatus = status;
538 if (status & SCHED_INTR)
542 * If a FATAL or RXORN interrupt is received, we have to reset the
545 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
546 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
549 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
550 (status & ATH9K_INT_BB_WATCHDOG))
553 #ifdef CONFIG_ATH9K_WOW
554 if (status & ATH9K_INT_BMISS) {
555 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
556 atomic_inc(&sc->wow_got_bmiss_intr);
557 atomic_dec(&sc->wow_sleep_proc_intr);
562 if (status & ATH9K_INT_SWBA)
563 tasklet_schedule(&sc->bcon_tasklet);
565 if (status & ATH9K_INT_TXURN)
566 ath9k_hw_updatetxtriglevel(ah, true);
568 if (status & ATH9K_INT_RXEOL) {
569 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
570 ath9k_hw_set_interrupts(ah);
573 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
574 if (status & ATH9K_INT_TIM_TIMER) {
575 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
577 /* Clear RxAbort bit so that we can
579 ath9k_setpower(sc, ATH9K_PM_AWAKE);
580 spin_lock(&sc->sc_pm_lock);
581 ath9k_hw_setrxabort(sc->sc_ah, 0);
582 sc->ps_flags |= PS_WAIT_FOR_BEACON;
583 spin_unlock(&sc->sc_pm_lock);
588 ath_debug_stat_interrupt(sc, status);
591 /* turn off every interrupt */
592 ath9k_hw_disable_interrupts(ah);
593 tasklet_schedule(&sc->intr_tq);
601 int ath_reset(struct ath_softc *sc)
606 r = ath_reset_internal(sc, NULL);
607 ath9k_ps_restore(sc);
612 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
614 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
615 #ifdef CONFIG_ATH9K_DEBUGFS
616 RESET_STAT_INC(sc, type);
618 set_bit(ATH_OP_HW_RESET, &common->op_flags);
619 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
622 void ath_reset_work(struct work_struct *work)
624 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
629 /**********************/
630 /* mac80211 callbacks */
631 /**********************/
633 static int ath9k_start(struct ieee80211_hw *hw)
635 struct ath_softc *sc = hw->priv;
636 struct ath_hw *ah = sc->sc_ah;
637 struct ath_common *common = ath9k_hw_common(ah);
638 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
639 struct ath_chanctx *ctx = sc->cur_chan;
640 struct ath9k_channel *init_channel;
643 ath_dbg(common, CONFIG,
644 "Starting driver with initial channel: %d MHz\n",
645 curchan->center_freq);
648 mutex_lock(&sc->mutex);
650 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
651 sc->cur_chandef = hw->conf.chandef;
653 /* Reset SERDES registers */
654 ath9k_hw_configpcipowersave(ah, false);
657 * The basic interface to setting the hardware in a good
658 * state is ``reset''. On return the hardware is known to
659 * be powered up and with interrupts disabled. This must
660 * be followed by initialization of the appropriate bits
661 * and then setup of the interrupt mask.
663 spin_lock_bh(&sc->sc_pcu_lock);
665 atomic_set(&ah->intr_ref_cnt, -1);
667 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
670 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
671 r, curchan->center_freq);
672 ah->reset_power_on = false;
675 /* Setup our intr mask. */
676 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
677 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
680 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
681 ah->imask |= ATH9K_INT_RXHP |
684 ah->imask |= ATH9K_INT_RX;
686 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
687 ah->imask |= ATH9K_INT_BB_WATCHDOG;
690 * Enable GTT interrupts only for AR9003/AR9004 chips
693 if (AR_SREV_9300_20_OR_LATER(ah))
694 ah->imask |= ATH9K_INT_GTT;
696 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
697 ah->imask |= ATH9K_INT_CST;
701 clear_bit(ATH_OP_INVALID, &common->op_flags);
702 sc->sc_ah->is_monitoring = false;
704 if (!ath_complete_reset(sc, false))
705 ah->reset_power_on = false;
707 if (ah->led_pin >= 0) {
708 ath9k_hw_cfg_output(ah, ah->led_pin,
709 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
710 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
714 * Reset key cache to sane defaults (all entries cleared) instead of
715 * semi-random values after suspend/resume.
717 ath9k_cmn_init_crypto(sc->sc_ah);
719 ath9k_hw_reset_tsf(ah);
721 spin_unlock_bh(&sc->sc_pcu_lock);
723 mutex_unlock(&sc->mutex);
725 ath9k_ps_restore(sc);
730 static void ath9k_tx(struct ieee80211_hw *hw,
731 struct ieee80211_tx_control *control,
734 struct ath_softc *sc = hw->priv;
735 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
736 struct ath_tx_control txctl;
737 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
740 if (sc->ps_enabled) {
742 * mac80211 does not set PM field for normal data frames, so we
743 * need to update that based on the current PS mode.
745 if (ieee80211_is_data(hdr->frame_control) &&
746 !ieee80211_is_nullfunc(hdr->frame_control) &&
747 !ieee80211_has_pm(hdr->frame_control)) {
749 "Add PM=1 for a TX frame while in PS mode\n");
750 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
754 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
756 * We are using PS-Poll and mac80211 can request TX while in
757 * power save mode. Need to wake up hardware for the TX to be
758 * completed and if needed, also for RX of buffered frames.
761 spin_lock_irqsave(&sc->sc_pm_lock, flags);
762 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
763 ath9k_hw_setrxabort(sc->sc_ah, 0);
764 if (ieee80211_is_pspoll(hdr->frame_control)) {
766 "Sending PS-Poll to pick a buffered frame\n");
767 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
769 ath_dbg(common, PS, "Wake up to complete TX\n");
770 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
773 * The actual restore operation will happen only after
774 * the ps_flags bit is cleared. We are just dropping
775 * the ps_usecount here.
777 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
778 ath9k_ps_restore(sc);
782 * Cannot tx while the hardware is in full sleep, it first needs a full
783 * chip reset to recover from that
785 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
786 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
790 memset(&txctl, 0, sizeof(struct ath_tx_control));
791 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
792 txctl.sta = control->sta;
794 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
796 if (ath_tx_start(hw, skb, &txctl) != 0) {
797 ath_dbg(common, XMIT, "TX failed\n");
798 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
804 ieee80211_free_txskb(hw, skb);
807 static void ath9k_stop(struct ieee80211_hw *hw)
809 struct ath_softc *sc = hw->priv;
810 struct ath_hw *ah = sc->sc_ah;
811 struct ath_common *common = ath9k_hw_common(ah);
814 ath9k_deinit_channel_context(sc);
816 mutex_lock(&sc->mutex);
820 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
821 ath_dbg(common, ANY, "Device not present\n");
822 mutex_unlock(&sc->mutex);
826 /* Ensure HW is awake when we try to shut it down. */
829 spin_lock_bh(&sc->sc_pcu_lock);
831 /* prevent tasklets to enable interrupts once we disable them */
832 ah->imask &= ~ATH9K_INT_GLOBAL;
834 /* make sure h/w will not generate any interrupt
835 * before setting the invalid flag. */
836 ath9k_hw_disable_interrupts(ah);
838 spin_unlock_bh(&sc->sc_pcu_lock);
840 /* we can now sync irq and kill any running tasklets, since we already
841 * disabled interrupts and not holding a spin lock */
842 synchronize_irq(sc->irq);
843 tasklet_kill(&sc->intr_tq);
844 tasklet_kill(&sc->bcon_tasklet);
846 prev_idle = sc->ps_idle;
849 spin_lock_bh(&sc->sc_pcu_lock);
851 if (ah->led_pin >= 0) {
852 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
853 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
856 ath_prepare_reset(sc);
859 dev_kfree_skb_any(sc->rx.frag);
864 ah->curchan = ath9k_cmn_get_channel(hw, ah,
865 &sc->cur_chan->chandef);
867 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
868 ath9k_hw_phy_disable(ah);
870 ath9k_hw_configpcipowersave(ah, true);
872 spin_unlock_bh(&sc->sc_pcu_lock);
874 ath9k_ps_restore(sc);
876 set_bit(ATH_OP_INVALID, &common->op_flags);
877 sc->ps_idle = prev_idle;
879 mutex_unlock(&sc->mutex);
881 ath_dbg(common, CONFIG, "Driver halt\n");
884 static bool ath9k_uses_beacons(int type)
887 case NL80211_IFTYPE_AP:
888 case NL80211_IFTYPE_ADHOC:
889 case NL80211_IFTYPE_MESH_POINT:
896 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
897 u8 *mac, struct ieee80211_vif *vif)
899 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
902 if (iter_data->has_hw_macaddr) {
903 for (i = 0; i < ETH_ALEN; i++)
904 iter_data->mask[i] &=
905 ~(iter_data->hw_macaddr[i] ^ mac[i]);
907 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
908 iter_data->has_hw_macaddr = true;
911 if (!vif->bss_conf.use_short_slot)
912 iter_data->slottime = ATH9K_SLOT_TIME_20;
915 case NL80211_IFTYPE_AP:
918 case NL80211_IFTYPE_STATION:
919 iter_data->nstations++;
920 if (avp->assoc && !iter_data->primary_sta)
921 iter_data->primary_sta = vif;
923 case NL80211_IFTYPE_ADHOC:
924 iter_data->nadhocs++;
925 if (vif->bss_conf.enable_beacon)
926 iter_data->beacons = true;
928 case NL80211_IFTYPE_MESH_POINT:
929 iter_data->nmeshes++;
930 if (vif->bss_conf.enable_beacon)
931 iter_data->beacons = true;
933 case NL80211_IFTYPE_WDS:
941 static void ath9k_update_bssid_mask(struct ath_softc *sc,
942 struct ath_chanctx *ctx,
943 struct ath9k_vif_iter_data *iter_data)
945 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
949 if (!ath9k_is_chanctx_enabled())
952 list_for_each_entry(avp, &ctx->vifs, list) {
953 if (ctx->nvifs_assigned != 1)
956 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
959 ether_addr_copy(common->curbssid, avp->bssid);
961 /* perm_addr will be used as the p2p device address. */
962 for (i = 0; i < ETH_ALEN; i++)
963 iter_data->mask[i] &=
964 ~(iter_data->hw_macaddr[i] ^
965 sc->hw->wiphy->perm_addr[i]);
969 /* Called with sc->mutex held. */
970 void ath9k_calculate_iter_data(struct ath_softc *sc,
971 struct ath_chanctx *ctx,
972 struct ath9k_vif_iter_data *iter_data)
977 * Pick the MAC address of the first interface as the new hardware
978 * MAC address. The hardware will use it together with the BSSID mask
979 * when matching addresses.
981 memset(iter_data, 0, sizeof(*iter_data));
982 memset(&iter_data->mask, 0xff, ETH_ALEN);
983 iter_data->slottime = ATH9K_SLOT_TIME_9;
985 list_for_each_entry(avp, &ctx->vifs, list)
986 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
988 ath9k_update_bssid_mask(sc, ctx, iter_data);
991 static void ath9k_set_assoc_state(struct ath_softc *sc,
992 struct ieee80211_vif *vif, bool changed)
994 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
995 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
998 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1000 ether_addr_copy(common->curbssid, avp->bssid);
1001 common->curaid = avp->aid;
1002 ath9k_hw_write_associd(sc->sc_ah);
1005 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1006 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1008 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1009 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1010 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1013 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1014 ath9k_mci_update_wlan_channels(sc, false);
1016 ath_dbg(common, CONFIG,
1017 "Primary Station interface: %pM, BSSID: %pM\n",
1018 vif->addr, common->curbssid);
1021 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1022 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1024 struct ath_hw *ah = sc->sc_ah;
1025 struct ath_common *common = ath9k_hw_common(ah);
1026 struct ieee80211_vif *vif = NULL;
1028 ath9k_ps_wakeup(sc);
1030 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1031 vif = sc->offchannel.scan_vif;
1033 vif = sc->offchannel.roc_vif;
1038 eth_zero_addr(common->curbssid);
1039 eth_broadcast_addr(common->bssidmask);
1040 ether_addr_copy(common->macaddr, vif->addr);
1042 ah->opmode = vif->type;
1043 ah->imask &= ~ATH9K_INT_SWBA;
1044 ah->imask &= ~ATH9K_INT_TSFOOR;
1045 ah->slottime = ATH9K_SLOT_TIME_9;
1047 ath_hw_setbssidmask(common);
1048 ath9k_hw_setopmode(ah);
1049 ath9k_hw_write_associd(sc->sc_ah);
1050 ath9k_hw_set_interrupts(ah);
1051 ath9k_hw_init_global_settings(ah);
1054 ath9k_ps_restore(sc);
1058 /* Called with sc->mutex held. */
1059 void ath9k_calculate_summary_state(struct ath_softc *sc,
1060 struct ath_chanctx *ctx)
1062 struct ath_hw *ah = sc->sc_ah;
1063 struct ath_common *common = ath9k_hw_common(ah);
1064 struct ath9k_vif_iter_data iter_data;
1065 struct ath_beacon_config *cur_conf;
1067 ath_chanctx_check_active(sc, ctx);
1069 if (ctx != sc->cur_chan)
1072 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1073 if (ctx == &sc->offchannel.chan)
1074 return ath9k_set_offchannel_state(sc);
1077 ath9k_ps_wakeup(sc);
1078 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1080 if (iter_data.has_hw_macaddr)
1081 ether_addr_copy(common->macaddr, iter_data.hw_macaddr);
1083 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1084 ath_hw_setbssidmask(common);
1086 if (iter_data.naps > 0) {
1087 cur_conf = &ctx->beacon;
1088 ath9k_hw_set_tsfadjust(ah, true);
1089 ah->opmode = NL80211_IFTYPE_AP;
1090 if (cur_conf->enable_beacon)
1091 iter_data.beacons = true;
1093 ath9k_hw_set_tsfadjust(ah, false);
1095 if (iter_data.nmeshes)
1096 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1097 else if (iter_data.nwds)
1098 ah->opmode = NL80211_IFTYPE_AP;
1099 else if (iter_data.nadhocs)
1100 ah->opmode = NL80211_IFTYPE_ADHOC;
1102 ah->opmode = NL80211_IFTYPE_STATION;
1105 ath9k_hw_setopmode(ah);
1107 ctx->switch_after_beacon = false;
1108 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1109 ah->imask |= ATH9K_INT_TSFOOR;
1111 ah->imask &= ~ATH9K_INT_TSFOOR;
1112 if (iter_data.naps == 1 && iter_data.beacons)
1113 ctx->switch_after_beacon = true;
1116 ah->imask &= ~ATH9K_INT_SWBA;
1117 if (ah->opmode == NL80211_IFTYPE_STATION) {
1118 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1120 if (iter_data.primary_sta) {
1121 iter_data.beacons = true;
1122 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1124 ctx->primary_sta = iter_data.primary_sta;
1126 ctx->primary_sta = NULL;
1127 memset(common->curbssid, 0, ETH_ALEN);
1129 ath9k_hw_write_associd(sc->sc_ah);
1130 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1131 ath9k_mci_update_wlan_channels(sc, true);
1133 } else if (iter_data.beacons) {
1134 ah->imask |= ATH9K_INT_SWBA;
1136 ath9k_hw_set_interrupts(ah);
1138 if (iter_data.beacons)
1139 set_bit(ATH_OP_BEACONS, &common->op_flags);
1141 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1143 if (ah->slottime != iter_data.slottime) {
1144 ah->slottime = iter_data.slottime;
1145 ath9k_hw_init_global_settings(ah);
1148 if (iter_data.primary_sta)
1149 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1151 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1153 ath_dbg(common, CONFIG,
1154 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1155 common->macaddr, common->curbssid, common->bssidmask);
1157 ath9k_ps_restore(sc);
1160 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1161 struct ieee80211_vif *vif)
1165 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1166 vif->hw_queue[i] = i;
1168 if (vif->type == NL80211_IFTYPE_AP)
1169 vif->cab_queue = hw->queues - 2;
1171 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1174 static int ath9k_add_interface(struct ieee80211_hw *hw,
1175 struct ieee80211_vif *vif)
1177 struct ath_softc *sc = hw->priv;
1178 struct ath_hw *ah = sc->sc_ah;
1179 struct ath_common *common = ath9k_hw_common(ah);
1180 struct ath_vif *avp = (void *)vif->drv_priv;
1181 struct ath_node *an = &avp->mcast_node;
1183 mutex_lock(&sc->mutex);
1185 if (config_enabled(CONFIG_ATH9K_TX99)) {
1186 if (sc->cur_chan->nvifs >= 1) {
1187 mutex_unlock(&sc->mutex);
1193 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1194 sc->cur_chan->nvifs++;
1196 if (ath9k_uses_beacons(vif->type))
1197 ath9k_beacon_assign_slot(sc, vif);
1200 if (!ath9k_is_chanctx_enabled()) {
1201 avp->chanctx = sc->cur_chan;
1202 list_add_tail(&avp->list, &avp->chanctx->vifs);
1205 ath9k_assign_hw_queues(hw, vif);
1210 an->no_ps_filter = true;
1211 ath_tx_node_init(sc, an);
1213 mutex_unlock(&sc->mutex);
1217 static int ath9k_change_interface(struct ieee80211_hw *hw,
1218 struct ieee80211_vif *vif,
1219 enum nl80211_iftype new_type,
1222 struct ath_softc *sc = hw->priv;
1223 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1224 struct ath_vif *avp = (void *)vif->drv_priv;
1226 mutex_lock(&sc->mutex);
1228 if (config_enabled(CONFIG_ATH9K_TX99)) {
1229 mutex_unlock(&sc->mutex);
1233 ath_dbg(common, CONFIG, "Change Interface\n");
1235 if (ath9k_uses_beacons(vif->type))
1236 ath9k_beacon_remove_slot(sc, vif);
1238 vif->type = new_type;
1241 if (ath9k_uses_beacons(vif->type))
1242 ath9k_beacon_assign_slot(sc, vif);
1244 ath9k_assign_hw_queues(hw, vif);
1245 ath9k_calculate_summary_state(sc, avp->chanctx);
1247 mutex_unlock(&sc->mutex);
1251 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1252 struct ieee80211_vif *vif)
1254 struct ath_softc *sc = hw->priv;
1255 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1256 struct ath_vif *avp = (void *)vif->drv_priv;
1258 ath_dbg(common, CONFIG, "Detach Interface\n");
1260 mutex_lock(&sc->mutex);
1262 ath9k_p2p_remove_vif(sc, vif);
1264 sc->cur_chan->nvifs--;
1265 sc->tx99_vif = NULL;
1266 if (!ath9k_is_chanctx_enabled())
1267 list_del(&avp->list);
1269 if (ath9k_uses_beacons(vif->type))
1270 ath9k_beacon_remove_slot(sc, vif);
1272 ath_tx_node_cleanup(sc, &avp->mcast_node);
1274 mutex_unlock(&sc->mutex);
1277 static void ath9k_enable_ps(struct ath_softc *sc)
1279 struct ath_hw *ah = sc->sc_ah;
1280 struct ath_common *common = ath9k_hw_common(ah);
1282 if (config_enabled(CONFIG_ATH9K_TX99))
1285 sc->ps_enabled = true;
1286 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1287 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1288 ah->imask |= ATH9K_INT_TIM_TIMER;
1289 ath9k_hw_set_interrupts(ah);
1291 ath9k_hw_setrxabort(ah, 1);
1293 ath_dbg(common, PS, "PowerSave enabled\n");
1296 static void ath9k_disable_ps(struct ath_softc *sc)
1298 struct ath_hw *ah = sc->sc_ah;
1299 struct ath_common *common = ath9k_hw_common(ah);
1301 if (config_enabled(CONFIG_ATH9K_TX99))
1304 sc->ps_enabled = false;
1305 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1306 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1307 ath9k_hw_setrxabort(ah, 0);
1308 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1310 PS_WAIT_FOR_PSPOLL_DATA |
1311 PS_WAIT_FOR_TX_ACK);
1312 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1313 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1314 ath9k_hw_set_interrupts(ah);
1317 ath_dbg(common, PS, "PowerSave disabled\n");
1320 void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
1322 struct ath_softc *sc = hw->priv;
1323 struct ath_hw *ah = sc->sc_ah;
1324 struct ath_common *common = ath9k_hw_common(ah);
1327 if (config_enabled(CONFIG_ATH9K_TX99))
1330 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1331 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1335 ath9k_ps_wakeup(sc);
1336 rxfilter = ath9k_hw_getrxfilter(ah);
1337 ath9k_hw_setrxfilter(ah, rxfilter |
1338 ATH9K_RX_FILTER_PHYRADAR |
1339 ATH9K_RX_FILTER_PHYERR);
1341 /* TODO: usually this should not be neccesary, but for some reason
1342 * (or in some mode?) the trigger must be called after the
1343 * configuration, otherwise the register will have its values reset
1344 * (on my ar9220 to value 0x01002310)
1346 ath9k_spectral_scan_config(hw, sc->spectral_mode);
1347 ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
1348 ath9k_ps_restore(sc);
1351 int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
1352 enum spectral_mode spectral_mode)
1354 struct ath_softc *sc = hw->priv;
1355 struct ath_hw *ah = sc->sc_ah;
1356 struct ath_common *common = ath9k_hw_common(ah);
1358 if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
1359 ath_err(common, "spectrum analyzer not implemented on this hardware\n");
1363 switch (spectral_mode) {
1364 case SPECTRAL_DISABLED:
1365 sc->spec_config.enabled = 0;
1367 case SPECTRAL_BACKGROUND:
1368 /* send endless samples.
1369 * TODO: is this really useful for "background"?
1371 sc->spec_config.endless = 1;
1372 sc->spec_config.enabled = 1;
1374 case SPECTRAL_CHANSCAN:
1375 case SPECTRAL_MANUAL:
1376 sc->spec_config.endless = 0;
1377 sc->spec_config.enabled = 1;
1383 ath9k_ps_wakeup(sc);
1384 ath9k_hw_ops(ah)->spectral_scan_config(ah, &sc->spec_config);
1385 ath9k_ps_restore(sc);
1387 sc->spectral_mode = spectral_mode;
1392 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1394 struct ath_softc *sc = hw->priv;
1395 struct ath_hw *ah = sc->sc_ah;
1396 struct ath_common *common = ath9k_hw_common(ah);
1397 struct ieee80211_conf *conf = &hw->conf;
1398 struct ath_chanctx *ctx = sc->cur_chan;
1400 ath9k_ps_wakeup(sc);
1401 mutex_lock(&sc->mutex);
1403 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1404 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1406 ath_cancel_work(sc);
1407 ath9k_stop_btcoex(sc);
1409 ath9k_start_btcoex(sc);
1411 * The chip needs a reset to properly wake up from
1414 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1419 * We just prepare to enable PS. We have to wait until our AP has
1420 * ACK'd our null data frame to disable RX otherwise we'll ignore
1421 * those ACKs and end up retransmitting the same null data frames.
1422 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1424 if (changed & IEEE80211_CONF_CHANGE_PS) {
1425 unsigned long flags;
1426 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1427 if (conf->flags & IEEE80211_CONF_PS)
1428 ath9k_enable_ps(sc);
1430 ath9k_disable_ps(sc);
1431 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1434 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1435 if (conf->flags & IEEE80211_CONF_MONITOR) {
1436 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1437 sc->sc_ah->is_monitoring = true;
1439 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1440 sc->sc_ah->is_monitoring = false;
1444 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1445 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1446 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1449 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1450 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1451 sc->cur_chan->txpower = 2 * conf->power_level;
1452 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1453 sc->cur_chan->txpower, &sc->curtxpow);
1456 mutex_unlock(&sc->mutex);
1457 ath9k_ps_restore(sc);
1462 #define SUPPORTED_FILTERS \
1463 (FIF_PROMISC_IN_BSS | \
1468 FIF_BCN_PRBRESP_PROMISC | \
1472 /* FIXME: sc->sc_full_reset ? */
1473 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1474 unsigned int changed_flags,
1475 unsigned int *total_flags,
1478 struct ath_softc *sc = hw->priv;
1481 changed_flags &= SUPPORTED_FILTERS;
1482 *total_flags &= SUPPORTED_FILTERS;
1484 spin_lock_bh(&sc->chan_lock);
1485 sc->cur_chan->rxfilter = *total_flags;
1486 spin_unlock_bh(&sc->chan_lock);
1488 ath9k_ps_wakeup(sc);
1489 rfilt = ath_calcrxfilter(sc);
1490 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1491 ath9k_ps_restore(sc);
1493 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1497 static int ath9k_sta_add(struct ieee80211_hw *hw,
1498 struct ieee80211_vif *vif,
1499 struct ieee80211_sta *sta)
1501 struct ath_softc *sc = hw->priv;
1502 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1503 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1504 struct ieee80211_key_conf ps_key = { };
1507 ath_node_attach(sc, sta, vif);
1509 if (vif->type != NL80211_IFTYPE_AP &&
1510 vif->type != NL80211_IFTYPE_AP_VLAN)
1513 key = ath_key_config(common, vif, sta, &ps_key);
1516 an->key_idx[0] = key;
1522 static void ath9k_del_ps_key(struct ath_softc *sc,
1523 struct ieee80211_vif *vif,
1524 struct ieee80211_sta *sta)
1526 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1527 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1528 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1533 ath_key_delete(common, &ps_key);
1538 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1539 struct ieee80211_vif *vif,
1540 struct ieee80211_sta *sta)
1542 struct ath_softc *sc = hw->priv;
1544 ath9k_del_ps_key(sc, vif, sta);
1545 ath_node_detach(sc, sta);
1550 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1551 struct ath_node *an,
1556 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1557 if (!an->key_idx[i])
1559 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1563 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1564 struct ieee80211_vif *vif,
1565 enum sta_notify_cmd cmd,
1566 struct ieee80211_sta *sta)
1568 struct ath_softc *sc = hw->priv;
1569 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1572 case STA_NOTIFY_SLEEP:
1573 an->sleeping = true;
1574 ath_tx_aggr_sleep(sta, sc, an);
1575 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1577 case STA_NOTIFY_AWAKE:
1578 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1579 an->sleeping = false;
1580 ath_tx_aggr_wakeup(sc, an);
1585 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1586 struct ieee80211_vif *vif, u16 queue,
1587 const struct ieee80211_tx_queue_params *params)
1589 struct ath_softc *sc = hw->priv;
1590 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1591 struct ath_txq *txq;
1592 struct ath9k_tx_queue_info qi;
1595 if (queue >= IEEE80211_NUM_ACS)
1598 txq = sc->tx.txq_map[queue];
1600 ath9k_ps_wakeup(sc);
1601 mutex_lock(&sc->mutex);
1603 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1605 qi.tqi_aifs = params->aifs;
1606 qi.tqi_cwmin = params->cw_min;
1607 qi.tqi_cwmax = params->cw_max;
1608 qi.tqi_burstTime = params->txop * 32;
1610 ath_dbg(common, CONFIG,
1611 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1612 queue, txq->axq_qnum, params->aifs, params->cw_min,
1613 params->cw_max, params->txop);
1615 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1616 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1618 ath_err(common, "TXQ Update failed\n");
1620 mutex_unlock(&sc->mutex);
1621 ath9k_ps_restore(sc);
1626 static int ath9k_set_key(struct ieee80211_hw *hw,
1627 enum set_key_cmd cmd,
1628 struct ieee80211_vif *vif,
1629 struct ieee80211_sta *sta,
1630 struct ieee80211_key_conf *key)
1632 struct ath_softc *sc = hw->priv;
1633 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1634 struct ath_node *an = NULL;
1637 if (ath9k_modparam_nohwcrypt)
1640 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1641 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1642 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1643 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1644 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1646 * For now, disable hw crypto for the RSN IBSS group keys. This
1647 * could be optimized in the future to use a modified key cache
1648 * design to support per-STA RX GTK, but until that gets
1649 * implemented, use of software crypto for group addressed
1650 * frames is a acceptable to allow RSN IBSS to be used.
1655 mutex_lock(&sc->mutex);
1656 ath9k_ps_wakeup(sc);
1657 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1659 an = (struct ath_node *)sta->drv_priv;
1664 ath9k_del_ps_key(sc, vif, sta);
1666 key->hw_key_idx = 0;
1667 ret = ath_key_config(common, vif, sta, key);
1669 key->hw_key_idx = ret;
1670 /* push IV and Michael MIC generation to stack */
1671 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1672 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1673 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1674 if (sc->sc_ah->sw_mgmt_crypto &&
1675 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1676 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1679 if (an && key->hw_key_idx) {
1680 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1683 an->key_idx[i] = key->hw_key_idx;
1686 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1690 ath_key_delete(common, key);
1692 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1693 if (an->key_idx[i] != key->hw_key_idx)
1699 key->hw_key_idx = 0;
1705 ath9k_ps_restore(sc);
1706 mutex_unlock(&sc->mutex);
1711 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1712 struct ieee80211_vif *vif,
1713 struct ieee80211_bss_conf *bss_conf,
1717 (BSS_CHANGED_ASSOC | \
1718 BSS_CHANGED_IBSS | \
1719 BSS_CHANGED_BEACON_ENABLED)
1721 struct ath_softc *sc = hw->priv;
1722 struct ath_hw *ah = sc->sc_ah;
1723 struct ath_common *common = ath9k_hw_common(ah);
1724 struct ath_vif *avp = (void *)vif->drv_priv;
1727 ath9k_ps_wakeup(sc);
1728 mutex_lock(&sc->mutex);
1730 if (changed & BSS_CHANGED_ASSOC) {
1731 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1732 bss_conf->bssid, bss_conf->assoc);
1734 ether_addr_copy(avp->bssid, bss_conf->bssid);
1735 avp->aid = bss_conf->aid;
1736 avp->assoc = bss_conf->assoc;
1738 ath9k_calculate_summary_state(sc, avp->chanctx);
1740 if (ath9k_is_chanctx_enabled()) {
1741 if (bss_conf->assoc)
1742 ath_chanctx_event(sc, vif,
1743 ATH_CHANCTX_EVENT_ASSOC);
1747 if (changed & BSS_CHANGED_IBSS) {
1748 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1749 common->curaid = bss_conf->aid;
1750 ath9k_hw_write_associd(sc->sc_ah);
1753 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1754 (changed & BSS_CHANGED_BEACON_INT) ||
1755 (changed & BSS_CHANGED_BEACON_INFO)) {
1756 ath9k_beacon_config(sc, vif, changed);
1757 if (changed & BSS_CHANGED_BEACON_ENABLED)
1758 ath9k_calculate_summary_state(sc, avp->chanctx);
1761 if ((avp->chanctx == sc->cur_chan) &&
1762 (changed & BSS_CHANGED_ERP_SLOT)) {
1763 if (bss_conf->use_short_slot)
1767 if (vif->type == NL80211_IFTYPE_AP) {
1769 * Defer update, so that connected stations can adjust
1770 * their settings at the same time.
1771 * See beacon.c for more details
1773 sc->beacon.slottime = slottime;
1774 sc->beacon.updateslot = UPDATE;
1776 ah->slottime = slottime;
1777 ath9k_hw_init_global_settings(ah);
1781 if (changed & BSS_CHANGED_P2P_PS)
1782 ath9k_p2p_bss_info_changed(sc, vif);
1784 if (changed & CHECK_ANI)
1787 mutex_unlock(&sc->mutex);
1788 ath9k_ps_restore(sc);
1793 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1795 struct ath_softc *sc = hw->priv;
1798 mutex_lock(&sc->mutex);
1799 ath9k_ps_wakeup(sc);
1800 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1801 ath9k_ps_restore(sc);
1802 mutex_unlock(&sc->mutex);
1807 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1808 struct ieee80211_vif *vif,
1811 struct ath_softc *sc = hw->priv;
1813 mutex_lock(&sc->mutex);
1814 ath9k_ps_wakeup(sc);
1815 ath9k_hw_settsf64(sc->sc_ah, tsf);
1816 ath9k_ps_restore(sc);
1817 mutex_unlock(&sc->mutex);
1820 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1822 struct ath_softc *sc = hw->priv;
1824 mutex_lock(&sc->mutex);
1826 ath9k_ps_wakeup(sc);
1827 ath9k_hw_reset_tsf(sc->sc_ah);
1828 ath9k_ps_restore(sc);
1830 mutex_unlock(&sc->mutex);
1833 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1834 struct ieee80211_vif *vif,
1835 enum ieee80211_ampdu_mlme_action action,
1836 struct ieee80211_sta *sta,
1837 u16 tid, u16 *ssn, u8 buf_size)
1839 struct ath_softc *sc = hw->priv;
1843 mutex_lock(&sc->mutex);
1846 case IEEE80211_AMPDU_RX_START:
1848 case IEEE80211_AMPDU_RX_STOP:
1850 case IEEE80211_AMPDU_TX_START:
1851 ath9k_ps_wakeup(sc);
1852 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1854 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1855 ath9k_ps_restore(sc);
1857 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1858 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1860 case IEEE80211_AMPDU_TX_STOP_CONT:
1861 ath9k_ps_wakeup(sc);
1862 ath_tx_aggr_stop(sc, sta, tid);
1864 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1865 ath9k_ps_restore(sc);
1867 case IEEE80211_AMPDU_TX_OPERATIONAL:
1868 ath9k_ps_wakeup(sc);
1869 ath_tx_aggr_resume(sc, sta, tid);
1870 ath9k_ps_restore(sc);
1873 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1876 mutex_unlock(&sc->mutex);
1881 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1882 struct survey_info *survey)
1884 struct ath_softc *sc = hw->priv;
1885 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1886 struct ieee80211_supported_band *sband;
1887 struct ieee80211_channel *chan;
1890 if (config_enabled(CONFIG_ATH9K_TX99))
1893 spin_lock_bh(&common->cc_lock);
1895 ath_update_survey_stats(sc);
1897 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1898 if (sband && idx >= sband->n_channels) {
1899 idx -= sband->n_channels;
1904 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1906 if (!sband || idx >= sband->n_channels) {
1907 spin_unlock_bh(&common->cc_lock);
1911 chan = &sband->channels[idx];
1912 pos = chan->hw_value;
1913 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1914 survey->channel = chan;
1915 spin_unlock_bh(&common->cc_lock);
1920 static void ath9k_enable_dynack(struct ath_softc *sc)
1922 #ifdef CONFIG_ATH9K_DYNACK
1924 struct ath_hw *ah = sc->sc_ah;
1926 ath_dynack_reset(ah);
1928 ah->dynack.enabled = true;
1929 rfilt = ath_calcrxfilter(sc);
1930 ath9k_hw_setrxfilter(ah, rfilt);
1934 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1937 struct ath_softc *sc = hw->priv;
1938 struct ath_hw *ah = sc->sc_ah;
1940 if (config_enabled(CONFIG_ATH9K_TX99))
1943 mutex_lock(&sc->mutex);
1945 if (coverage_class >= 0) {
1946 ah->coverage_class = coverage_class;
1947 if (ah->dynack.enabled) {
1950 ah->dynack.enabled = false;
1951 rfilt = ath_calcrxfilter(sc);
1952 ath9k_hw_setrxfilter(ah, rfilt);
1954 ath9k_ps_wakeup(sc);
1955 ath9k_hw_init_global_settings(ah);
1956 ath9k_ps_restore(sc);
1957 } else if (!ah->dynack.enabled) {
1958 ath9k_enable_dynack(sc);
1961 mutex_unlock(&sc->mutex);
1964 static bool ath9k_has_tx_pending(struct ath_softc *sc)
1968 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1969 if (!ATH_TXQ_SETUP(sc, i))
1972 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1980 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1981 u32 queues, bool drop)
1983 struct ath_softc *sc = hw->priv;
1985 mutex_lock(&sc->mutex);
1986 __ath9k_flush(hw, queues, drop);
1987 mutex_unlock(&sc->mutex);
1990 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1992 struct ath_softc *sc = hw->priv;
1993 struct ath_hw *ah = sc->sc_ah;
1994 struct ath_common *common = ath9k_hw_common(ah);
1995 int timeout = HZ / 5; /* 200 ms */
1998 cancel_delayed_work_sync(&sc->tx_complete_work);
2000 if (ah->ah_flags & AH_UNPLUGGED) {
2001 ath_dbg(common, ANY, "Device has been unplugged!\n");
2005 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2006 ath_dbg(common, ANY, "Device not present\n");
2010 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
2015 ath9k_ps_wakeup(sc);
2016 spin_lock_bh(&sc->sc_pcu_lock);
2017 drain_txq = ath_drain_all_txq(sc);
2018 spin_unlock_bh(&sc->sc_pcu_lock);
2023 ath9k_ps_restore(sc);
2026 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2029 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2031 struct ath_softc *sc = hw->priv;
2033 return ath9k_has_tx_pending(sc);
2036 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2038 struct ath_softc *sc = hw->priv;
2039 struct ath_hw *ah = sc->sc_ah;
2040 struct ieee80211_vif *vif;
2041 struct ath_vif *avp;
2043 struct ath_tx_status ts;
2044 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2047 vif = sc->beacon.bslot[0];
2051 if (!vif->bss_conf.enable_beacon)
2054 avp = (void *)vif->drv_priv;
2056 if (!sc->beacon.tx_processed && !edma) {
2057 tasklet_disable(&sc->bcon_tasklet);
2060 if (!bf || !bf->bf_mpdu)
2063 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2064 if (status == -EINPROGRESS)
2067 sc->beacon.tx_processed = true;
2068 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2071 tasklet_enable(&sc->bcon_tasklet);
2074 return sc->beacon.tx_last;
2077 static int ath9k_get_stats(struct ieee80211_hw *hw,
2078 struct ieee80211_low_level_stats *stats)
2080 struct ath_softc *sc = hw->priv;
2081 struct ath_hw *ah = sc->sc_ah;
2082 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2084 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2085 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2086 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2087 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2091 static u32 fill_chainmask(u32 cap, u32 new)
2096 for (i = 0; cap && new; i++, cap >>= 1) {
2097 if (!(cap & BIT(0)))
2109 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2111 if (AR_SREV_9300_20_OR_LATER(ah))
2114 switch (val & 0x7) {
2120 return (ah->caps.rx_chainmask == 1);
2126 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2128 struct ath_softc *sc = hw->priv;
2129 struct ath_hw *ah = sc->sc_ah;
2131 if (ah->caps.rx_chainmask != 1)
2134 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2137 sc->ant_rx = rx_ant;
2138 sc->ant_tx = tx_ant;
2140 if (ah->caps.rx_chainmask == 1)
2143 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2144 if (AR_SREV_9100(ah))
2145 ah->rxchainmask = 0x7;
2147 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2149 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2150 ath9k_cmn_reload_chainmask(ah);
2155 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2157 struct ath_softc *sc = hw->priv;
2159 *tx_ant = sc->ant_tx;
2160 *rx_ant = sc->ant_rx;
2164 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2166 struct ath_softc *sc = hw->priv;
2167 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2168 set_bit(ATH_OP_SCANNING, &common->op_flags);
2171 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2173 struct ath_softc *sc = hw->priv;
2174 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2175 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2178 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2180 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2181 struct ieee80211_scan_request *hw_req)
2183 struct cfg80211_scan_request *req = &hw_req->req;
2184 struct ath_softc *sc = hw->priv;
2185 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2188 mutex_lock(&sc->mutex);
2190 if (WARN_ON(sc->offchannel.scan_req)) {
2195 ath9k_ps_wakeup(sc);
2196 set_bit(ATH_OP_SCANNING, &common->op_flags);
2197 sc->offchannel.scan_vif = vif;
2198 sc->offchannel.scan_req = req;
2199 sc->offchannel.scan_idx = 0;
2201 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2204 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2205 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2206 ath_offchannel_next(sc);
2210 mutex_unlock(&sc->mutex);
2215 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2216 struct ieee80211_vif *vif)
2218 struct ath_softc *sc = hw->priv;
2219 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2221 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2223 mutex_lock(&sc->mutex);
2224 del_timer_sync(&sc->offchannel.timer);
2225 ath_scan_complete(sc, true);
2226 mutex_unlock(&sc->mutex);
2229 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2230 struct ieee80211_vif *vif,
2231 struct ieee80211_channel *chan, int duration,
2232 enum ieee80211_roc_type type)
2234 struct ath_softc *sc = hw->priv;
2235 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2238 mutex_lock(&sc->mutex);
2240 if (WARN_ON(sc->offchannel.roc_vif)) {
2245 ath9k_ps_wakeup(sc);
2246 sc->offchannel.roc_vif = vif;
2247 sc->offchannel.roc_chan = chan;
2248 sc->offchannel.roc_duration = duration;
2250 ath_dbg(common, CHAN_CTX,
2251 "RoC request on vif: %pM, type: %d duration: %d\n",
2252 vif->addr, type, duration);
2254 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2255 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2256 ath_offchannel_next(sc);
2260 mutex_unlock(&sc->mutex);
2265 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2267 struct ath_softc *sc = hw->priv;
2268 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2270 mutex_lock(&sc->mutex);
2272 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2273 del_timer_sync(&sc->offchannel.timer);
2275 if (sc->offchannel.roc_vif) {
2276 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2277 ath_roc_complete(sc, true);
2280 mutex_unlock(&sc->mutex);
2285 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2286 struct ieee80211_chanctx_conf *conf)
2288 struct ath_softc *sc = hw->priv;
2289 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2290 struct ath_chanctx *ctx, **ptr;
2293 mutex_lock(&sc->mutex);
2295 ath_for_each_chanctx(sc, ctx) {
2299 ptr = (void *) conf->drv_priv;
2301 ctx->assigned = true;
2302 pos = ctx - &sc->chanctx[0];
2303 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2305 ath_dbg(common, CHAN_CTX,
2306 "Add channel context: %d MHz\n",
2307 conf->def.chan->center_freq);
2309 ath_chanctx_set_channel(sc, ctx, &conf->def);
2310 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_ASSIGN);
2312 mutex_unlock(&sc->mutex);
2316 mutex_unlock(&sc->mutex);
2321 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2322 struct ieee80211_chanctx_conf *conf)
2324 struct ath_softc *sc = hw->priv;
2325 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2326 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2328 mutex_lock(&sc->mutex);
2330 ath_dbg(common, CHAN_CTX,
2331 "Remove channel context: %d MHz\n",
2332 conf->def.chan->center_freq);
2334 ctx->assigned = false;
2335 ctx->hw_queue_base = -1;
2336 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2338 mutex_unlock(&sc->mutex);
2341 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2342 struct ieee80211_chanctx_conf *conf,
2345 struct ath_softc *sc = hw->priv;
2346 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2347 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2349 mutex_lock(&sc->mutex);
2350 ath_dbg(common, CHAN_CTX,
2351 "Change channel context: %d MHz\n",
2352 conf->def.chan->center_freq);
2353 ath_chanctx_set_channel(sc, ctx, &conf->def);
2354 mutex_unlock(&sc->mutex);
2357 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2358 struct ieee80211_vif *vif,
2359 struct ieee80211_chanctx_conf *conf)
2361 struct ath_softc *sc = hw->priv;
2362 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2363 struct ath_vif *avp = (void *)vif->drv_priv;
2364 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2367 mutex_lock(&sc->mutex);
2369 ath_dbg(common, CHAN_CTX,
2370 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2371 vif->addr, vif->type, vif->p2p,
2372 conf->def.chan->center_freq);
2375 ctx->nvifs_assigned++;
2376 list_add_tail(&avp->list, &ctx->vifs);
2377 ath9k_calculate_summary_state(sc, ctx);
2378 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2379 vif->hw_queue[i] = ctx->hw_queue_base + i;
2381 mutex_unlock(&sc->mutex);
2386 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2387 struct ieee80211_vif *vif,
2388 struct ieee80211_chanctx_conf *conf)
2390 struct ath_softc *sc = hw->priv;
2391 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2392 struct ath_vif *avp = (void *)vif->drv_priv;
2393 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2396 mutex_lock(&sc->mutex);
2398 ath_dbg(common, CHAN_CTX,
2399 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2400 vif->addr, vif->type, vif->p2p,
2401 conf->def.chan->center_freq);
2403 avp->chanctx = NULL;
2404 ctx->nvifs_assigned--;
2405 list_del(&avp->list);
2406 ath9k_calculate_summary_state(sc, ctx);
2407 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2408 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2410 mutex_unlock(&sc->mutex);
2413 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2414 struct ieee80211_vif *vif)
2416 struct ath_softc *sc = hw->priv;
2417 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2418 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2419 bool changed = false;
2421 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2427 mutex_lock(&sc->mutex);
2429 spin_lock_bh(&sc->chan_lock);
2430 if (sc->next_chan || (sc->cur_chan != avp->chanctx)) {
2431 sc->next_chan = avp->chanctx;
2434 ath_dbg(common, CHAN_CTX,
2435 "%s: Set chanctx state to FORCE_ACTIVE, changed: %d\n",
2437 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2438 spin_unlock_bh(&sc->chan_lock);
2441 ath_chanctx_set_next(sc, true);
2443 mutex_unlock(&sc->mutex);
2446 void ath9k_fill_chanctx_ops(void)
2448 if (!ath9k_is_chanctx_enabled())
2451 ath9k_ops.hw_scan = ath9k_hw_scan;
2452 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2453 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2454 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2455 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2456 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2457 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2458 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2459 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2460 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2465 struct ieee80211_ops ath9k_ops = {
2467 .start = ath9k_start,
2469 .add_interface = ath9k_add_interface,
2470 .change_interface = ath9k_change_interface,
2471 .remove_interface = ath9k_remove_interface,
2472 .config = ath9k_config,
2473 .configure_filter = ath9k_configure_filter,
2474 .sta_add = ath9k_sta_add,
2475 .sta_remove = ath9k_sta_remove,
2476 .sta_notify = ath9k_sta_notify,
2477 .conf_tx = ath9k_conf_tx,
2478 .bss_info_changed = ath9k_bss_info_changed,
2479 .set_key = ath9k_set_key,
2480 .get_tsf = ath9k_get_tsf,
2481 .set_tsf = ath9k_set_tsf,
2482 .reset_tsf = ath9k_reset_tsf,
2483 .ampdu_action = ath9k_ampdu_action,
2484 .get_survey = ath9k_get_survey,
2485 .rfkill_poll = ath9k_rfkill_poll_state,
2486 .set_coverage_class = ath9k_set_coverage_class,
2487 .flush = ath9k_flush,
2488 .tx_frames_pending = ath9k_tx_frames_pending,
2489 .tx_last_beacon = ath9k_tx_last_beacon,
2490 .release_buffered_frames = ath9k_release_buffered_frames,
2491 .get_stats = ath9k_get_stats,
2492 .set_antenna = ath9k_set_antenna,
2493 .get_antenna = ath9k_get_antenna,
2495 #ifdef CONFIG_ATH9K_WOW
2496 .suspend = ath9k_suspend,
2497 .resume = ath9k_resume,
2498 .set_wakeup = ath9k_set_wakeup,
2501 #ifdef CONFIG_ATH9K_DEBUGFS
2502 .get_et_sset_count = ath9k_get_et_sset_count,
2503 .get_et_stats = ath9k_get_et_stats,
2504 .get_et_strings = ath9k_get_et_strings,
2507 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2508 .sta_add_debugfs = ath9k_sta_add_debugfs,
2510 .sw_scan_start = ath9k_sw_scan_start,
2511 .sw_scan_complete = ath9k_sw_scan_complete,