2 * Copyright (c) 2008-2009 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
21 static void ath_update_txpow(struct ath_softc *sc)
23 struct ath_hw *ah = sc->sc_ah;
25 if (sc->curtxpow != sc->config.txpowlimit) {
26 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
27 /* read back in case value is clamped */
28 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
32 static u8 parse_mpdudensity(u8 mpdudensity)
35 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
36 * 0 for no restriction
45 switch (mpdudensity) {
51 /* Our lower layer calculations limit our precision to
67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
68 struct ieee80211_hw *hw)
70 struct ieee80211_channel *curchan = hw->conf.channel;
71 struct ath9k_channel *channel;
74 chan_idx = curchan->hw_value;
75 channel = &sc->sc_ah->channels[chan_idx];
76 ath9k_cmn_update_ichannel(channel, curchan, hw->conf.channel_type);
80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
85 spin_lock_irqsave(&sc->sc_pm_lock, flags);
86 ret = ath9k_hw_setpower(sc->sc_ah, mode);
87 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
92 void ath9k_ps_wakeup(struct ath_softc *sc)
94 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
96 enum ath9k_power_mode power_mode;
98 spin_lock_irqsave(&sc->sc_pm_lock, flags);
99 if (++sc->ps_usecount != 1)
102 power_mode = sc->sc_ah->power_mode;
103 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
106 * While the hardware is asleep, the cycle counters contain no
107 * useful data. Better clear them now so that they don't mess up
108 * survey data results.
110 if (power_mode != ATH9K_PM_AWAKE) {
111 spin_lock(&common->cc_lock);
112 ath_hw_cycle_counters_update(common);
113 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
114 spin_unlock(&common->cc_lock);
118 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
121 void ath9k_ps_restore(struct ath_softc *sc)
123 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
126 spin_lock_irqsave(&sc->sc_pm_lock, flags);
127 if (--sc->ps_usecount != 0)
130 spin_lock(&common->cc_lock);
131 ath_hw_cycle_counters_update(common);
132 spin_unlock(&common->cc_lock);
135 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
136 else if (sc->ps_enabled &&
137 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
139 PS_WAIT_FOR_PSPOLL_DATA |
140 PS_WAIT_FOR_TX_ACK)))
141 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
144 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
147 static void ath_start_ani(struct ath_common *common)
149 struct ath_hw *ah = common->ah;
150 unsigned long timestamp = jiffies_to_msecs(jiffies);
151 struct ath_softc *sc = (struct ath_softc *) common->priv;
153 if (!(sc->sc_flags & SC_OP_ANI_RUN))
156 if (sc->sc_flags & SC_OP_OFFCHANNEL)
159 common->ani.longcal_timer = timestamp;
160 common->ani.shortcal_timer = timestamp;
161 common->ani.checkani_timer = timestamp;
163 mod_timer(&common->ani.timer,
165 msecs_to_jiffies((u32)ah->config.ani_poll_interval));
168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
170 struct ath_hw *ah = sc->sc_ah;
171 struct ath9k_channel *chan = &ah->channels[channel];
172 struct survey_info *survey = &sc->survey[channel];
174 if (chan->noisefloor) {
175 survey->filled |= SURVEY_INFO_NOISE_DBM;
176 survey->noise = chan->noisefloor;
180 static void ath_update_survey_stats(struct ath_softc *sc)
182 struct ath_hw *ah = sc->sc_ah;
183 struct ath_common *common = ath9k_hw_common(ah);
184 int pos = ah->curchan - &ah->channels[0];
185 struct survey_info *survey = &sc->survey[pos];
186 struct ath_cycle_counters *cc = &common->cc_survey;
187 unsigned int div = common->clockrate * 1000;
192 if (ah->power_mode == ATH9K_PM_AWAKE)
193 ath_hw_cycle_counters_update(common);
195 if (cc->cycles > 0) {
196 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
197 SURVEY_INFO_CHANNEL_TIME_BUSY |
198 SURVEY_INFO_CHANNEL_TIME_RX |
199 SURVEY_INFO_CHANNEL_TIME_TX;
200 survey->channel_time += cc->cycles / div;
201 survey->channel_time_busy += cc->rx_busy / div;
202 survey->channel_time_rx += cc->rx_frame / div;
203 survey->channel_time_tx += cc->tx_frame / div;
205 memset(cc, 0, sizeof(*cc));
207 ath_update_survey_nf(sc, pos);
211 * Set/change channels. If the channel is really being changed, it's done
212 * by reseting the chip. To accomplish this we must first cleanup any pending
213 * DMA, then restart stuff.
215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
216 struct ath9k_channel *hchan)
218 struct ath_hw *ah = sc->sc_ah;
219 struct ath_common *common = ath9k_hw_common(ah);
220 struct ieee80211_conf *conf = &common->hw->conf;
221 bool fastcc = true, stopped;
222 struct ieee80211_channel *channel = hw->conf.channel;
223 struct ath9k_hw_cal_data *caldata = NULL;
226 if (sc->sc_flags & SC_OP_INVALID)
229 del_timer_sync(&common->ani.timer);
230 cancel_work_sync(&sc->paprd_work);
231 cancel_work_sync(&sc->hw_check_work);
232 cancel_delayed_work_sync(&sc->tx_complete_work);
233 cancel_delayed_work_sync(&sc->hw_pll_work);
237 spin_lock_bh(&sc->sc_pcu_lock);
240 * This is only performed if the channel settings have
243 * To switch channels clear any pending DMA operations;
244 * wait long enough for the RX fifo to drain, reset the
245 * hardware at the new frequency, and then re-enable
246 * the relevant bits of the h/w.
248 ath9k_hw_disable_interrupts(ah);
249 stopped = ath_drain_all_txq(sc, false);
251 if (!ath_stoprecv(sc))
254 if (!ath9k_hw_check_alive(ah))
257 /* XXX: do not flush receive queue here. We don't want
258 * to flush data frames already in queue because of
259 * changing channel. */
261 if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
264 if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
265 caldata = &sc->caldata;
267 ath_dbg(common, ATH_DBG_CONFIG,
268 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
269 sc->sc_ah->curchan->channel,
270 channel->center_freq, conf_is_ht40(conf),
273 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
276 "Unable to reset channel (%u MHz), reset status %d\n",
277 channel->center_freq, r);
281 if (ath_startrecv(sc) != 0) {
282 ath_err(common, "Unable to restart recv logic\n");
287 ath_update_txpow(sc);
288 ath9k_hw_set_interrupts(ah, ah->imask);
290 if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
291 if (sc->sc_flags & SC_OP_BEACONS)
292 ath_beacon_config(sc, NULL);
293 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
294 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
295 ath_start_ani(common);
299 ieee80211_wake_queues(hw);
301 spin_unlock_bh(&sc->sc_pcu_lock);
303 ath9k_ps_restore(sc);
307 static void ath_paprd_activate(struct ath_softc *sc)
309 struct ath_hw *ah = sc->sc_ah;
310 struct ath9k_hw_cal_data *caldata = ah->caldata;
311 struct ath_common *common = ath9k_hw_common(ah);
314 if (!caldata || !caldata->paprd_done)
318 ar9003_paprd_enable(ah, false);
319 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
320 if (!(common->tx_chainmask & BIT(chain)))
323 ar9003_paprd_populate_single_table(ah, caldata, chain);
326 ar9003_paprd_enable(ah, true);
327 ath9k_ps_restore(sc);
330 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
332 struct ieee80211_hw *hw = sc->hw;
333 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
334 struct ath_tx_control txctl;
337 memset(&txctl, 0, sizeof(txctl));
338 txctl.txq = sc->tx.txq_map[WME_AC_BE];
340 memset(tx_info, 0, sizeof(*tx_info));
341 tx_info->band = hw->conf.channel->band;
342 tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
343 tx_info->control.rates[0].idx = 0;
344 tx_info->control.rates[0].count = 1;
345 tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
346 tx_info->control.rates[1].idx = -1;
348 init_completion(&sc->paprd_complete);
349 sc->paprd_pending = true;
350 txctl.paprd = BIT(chain);
351 if (ath_tx_start(hw, skb, &txctl) != 0)
354 time_left = wait_for_completion_timeout(&sc->paprd_complete,
355 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
356 sc->paprd_pending = false;
359 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
360 "Timeout waiting for paprd training on TX chain %d\n",
366 void ath_paprd_calibrate(struct work_struct *work)
368 struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
369 struct ieee80211_hw *hw = sc->hw;
370 struct ath_hw *ah = sc->sc_ah;
371 struct ieee80211_hdr *hdr;
372 struct sk_buff *skb = NULL;
373 struct ath9k_hw_cal_data *caldata = ah->caldata;
374 struct ath_common *common = ath9k_hw_common(ah);
383 if (ar9003_paprd_init_table(ah) < 0)
386 skb = alloc_skb(len, GFP_KERNEL);
391 memset(skb->data, 0, len);
392 hdr = (struct ieee80211_hdr *)skb->data;
393 ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
394 hdr->frame_control = cpu_to_le16(ftype);
395 hdr->duration_id = cpu_to_le16(10);
396 memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
397 memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
398 memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
401 for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
402 if (!(common->tx_chainmask & BIT(chain)))
407 ath_dbg(common, ATH_DBG_CALIBRATE,
408 "Sending PAPRD frame for thermal measurement "
409 "on chain %d\n", chain);
410 if (!ath_paprd_send_frame(sc, skb, chain))
413 ar9003_paprd_setup_gain_table(ah, chain);
415 ath_dbg(common, ATH_DBG_CALIBRATE,
416 "Sending PAPRD training frame on chain %d\n", chain);
417 if (!ath_paprd_send_frame(sc, skb, chain))
420 if (!ar9003_paprd_is_done(ah))
423 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
431 caldata->paprd_done = true;
432 ath_paprd_activate(sc);
436 ath9k_ps_restore(sc);
440 * This routine performs the periodic noise floor calibration function
441 * that is used to adjust and optimize the chip performance. This
442 * takes environmental changes (location, temperature) into account.
443 * When the task is complete, it reschedules itself depending on the
444 * appropriate interval that was calculated.
446 void ath_ani_calibrate(unsigned long data)
448 struct ath_softc *sc = (struct ath_softc *)data;
449 struct ath_hw *ah = sc->sc_ah;
450 struct ath_common *common = ath9k_hw_common(ah);
451 bool longcal = false;
452 bool shortcal = false;
453 bool aniflag = false;
454 unsigned int timestamp = jiffies_to_msecs(jiffies);
455 u32 cal_interval, short_cal_interval, long_cal_interval;
458 if (ah->caldata && ah->caldata->nfcal_interference)
459 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
461 long_cal_interval = ATH_LONG_CALINTERVAL;
463 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
464 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
466 /* Only calibrate if awake */
467 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
472 /* Long calibration runs independently of short calibration. */
473 if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
475 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
476 common->ani.longcal_timer = timestamp;
479 /* Short calibration applies only while caldone is false */
480 if (!common->ani.caldone) {
481 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
483 ath_dbg(common, ATH_DBG_ANI,
484 "shortcal @%lu\n", jiffies);
485 common->ani.shortcal_timer = timestamp;
486 common->ani.resetcal_timer = timestamp;
489 if ((timestamp - common->ani.resetcal_timer) >=
490 ATH_RESTART_CALINTERVAL) {
491 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
492 if (common->ani.caldone)
493 common->ani.resetcal_timer = timestamp;
497 /* Verify whether we must check ANI */
498 if ((timestamp - common->ani.checkani_timer) >=
499 ah->config.ani_poll_interval) {
501 common->ani.checkani_timer = timestamp;
504 /* Skip all processing if there's nothing to do. */
505 if (longcal || shortcal || aniflag) {
506 /* Call ANI routine if necessary */
508 spin_lock_irqsave(&common->cc_lock, flags);
509 ath9k_hw_ani_monitor(ah, ah->curchan);
510 ath_update_survey_stats(sc);
511 spin_unlock_irqrestore(&common->cc_lock, flags);
514 /* Perform calibration if necessary */
515 if (longcal || shortcal) {
516 common->ani.caldone =
517 ath9k_hw_calibrate(ah,
519 common->rx_chainmask,
524 ath9k_ps_restore(sc);
528 * Set timer interval based on previous results.
529 * The interval must be the shortest necessary to satisfy ANI,
530 * short calibration and long calibration.
532 cal_interval = ATH_LONG_CALINTERVAL;
533 if (sc->sc_ah->config.enable_ani)
534 cal_interval = min(cal_interval,
535 (u32)ah->config.ani_poll_interval);
536 if (!common->ani.caldone)
537 cal_interval = min(cal_interval, (u32)short_cal_interval);
539 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
540 if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
541 if (!ah->caldata->paprd_done)
542 ieee80211_queue_work(sc->hw, &sc->paprd_work);
543 else if (!ah->paprd_table_write_done)
544 ath_paprd_activate(sc);
548 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
551 struct ath_hw *ah = sc->sc_ah;
552 an = (struct ath_node *)sta->drv_priv;
554 #ifdef CONFIG_ATH9K_DEBUGFS
555 spin_lock(&sc->nodes_lock);
556 list_add(&an->list, &sc->nodes);
557 spin_unlock(&sc->nodes_lock);
560 if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
561 sc->sc_flags |= SC_OP_ENABLE_APM;
563 if (sc->sc_flags & SC_OP_TXAGGR) {
564 ath_tx_node_init(sc, an);
565 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
566 sta->ht_cap.ampdu_factor);
567 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
571 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
573 struct ath_node *an = (struct ath_node *)sta->drv_priv;
575 #ifdef CONFIG_ATH9K_DEBUGFS
576 spin_lock(&sc->nodes_lock);
578 spin_unlock(&sc->nodes_lock);
582 if (sc->sc_flags & SC_OP_TXAGGR)
583 ath_tx_node_cleanup(sc, an);
586 void ath_hw_check(struct work_struct *work)
588 struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
593 for (i = 0; i < 3; i++) {
594 if (ath9k_hw_check_alive(sc->sc_ah))
602 ath9k_ps_restore(sc);
605 void ath9k_tasklet(unsigned long data)
607 struct ath_softc *sc = (struct ath_softc *)data;
608 struct ath_hw *ah = sc->sc_ah;
609 struct ath_common *common = ath9k_hw_common(ah);
611 u32 status = sc->intrstatus;
614 if (status & ATH9K_INT_FATAL) {
620 spin_lock(&sc->sc_pcu_lock);
623 * Only run the baseband hang check if beacons stop working in AP or
624 * IBSS mode, because it has a high false positive rate. For station
625 * mode it should not be necessary, since the upper layers will detect
626 * this through a beacon miss automatically and the following channel
627 * change will trigger a hardware reset anyway
629 if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
630 !ath9k_hw_check_alive(ah))
631 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
633 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
634 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
637 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
639 if (status & rxmask) {
640 /* Check for high priority Rx first */
641 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
642 (status & ATH9K_INT_RXHP))
643 ath_rx_tasklet(sc, 0, true);
645 ath_rx_tasklet(sc, 0, false);
648 if (status & ATH9K_INT_TX) {
649 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
650 ath_tx_edma_tasklet(sc);
655 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
657 * TSF sync does not look correct; remain awake to sync with
660 ath_dbg(common, ATH_DBG_PS,
661 "TSFOOR - Sync with next Beacon\n");
662 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
665 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
666 if (status & ATH9K_INT_GENTIMER)
667 ath_gen_timer_isr(sc->sc_ah);
669 /* re-enable hardware interrupt */
670 ath9k_hw_enable_interrupts(ah);
672 spin_unlock(&sc->sc_pcu_lock);
673 ath9k_ps_restore(sc);
676 irqreturn_t ath_isr(int irq, void *dev)
678 #define SCHED_INTR ( \
691 struct ath_softc *sc = dev;
692 struct ath_hw *ah = sc->sc_ah;
693 struct ath_common *common = ath9k_hw_common(ah);
694 enum ath9k_int status;
698 * The hardware is not ready/present, don't
699 * touch anything. Note this can happen early
700 * on if the IRQ is shared.
702 if (sc->sc_flags & SC_OP_INVALID)
706 /* shared irq, not for us */
708 if (!ath9k_hw_intrpend(ah))
712 * Figure out the reason(s) for the interrupt. Note
713 * that the hal returns a pseudo-ISR that may include
714 * bits we haven't explicitly enabled so we mask the
715 * value to insure we only process bits we requested.
717 ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
718 status &= ah->imask; /* discard unasked-for bits */
721 * If there are no status bits set, then this interrupt was not
722 * for me (should have been caught above).
727 /* Cache the status */
728 sc->intrstatus = status;
730 if (status & SCHED_INTR)
734 * If a FATAL or RXORN interrupt is received, we have to reset the
737 if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
738 !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
741 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
742 (status & ATH9K_INT_BB_WATCHDOG)) {
744 spin_lock(&common->cc_lock);
745 ath_hw_cycle_counters_update(common);
746 ar9003_hw_bb_watchdog_dbg_info(ah);
747 spin_unlock(&common->cc_lock);
752 if (status & ATH9K_INT_SWBA)
753 tasklet_schedule(&sc->bcon_tasklet);
755 if (status & ATH9K_INT_TXURN)
756 ath9k_hw_updatetxtriglevel(ah, true);
758 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
759 if (status & ATH9K_INT_RXEOL) {
760 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
761 ath9k_hw_set_interrupts(ah, ah->imask);
765 if (status & ATH9K_INT_MIB) {
767 * Disable interrupts until we service the MIB
768 * interrupt; otherwise it will continue to
771 ath9k_hw_disable_interrupts(ah);
773 * Let the hal handle the event. We assume
774 * it will clear whatever condition caused
777 spin_lock(&common->cc_lock);
778 ath9k_hw_proc_mib_event(ah);
779 spin_unlock(&common->cc_lock);
780 ath9k_hw_enable_interrupts(ah);
783 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
784 if (status & ATH9K_INT_TIM_TIMER) {
785 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
787 /* Clear RxAbort bit so that we can
789 ath9k_setpower(sc, ATH9K_PM_AWAKE);
790 ath9k_hw_setrxabort(sc->sc_ah, 0);
791 sc->ps_flags |= PS_WAIT_FOR_BEACON;
796 ath_debug_stat_interrupt(sc, status);
799 /* turn off every interrupt */
800 ath9k_hw_disable_interrupts(ah);
801 tasklet_schedule(&sc->intr_tq);
809 static void ath9k_bss_assoc_info(struct ath_softc *sc,
810 struct ieee80211_hw *hw,
811 struct ieee80211_vif *vif,
812 struct ieee80211_bss_conf *bss_conf)
814 struct ath_hw *ah = sc->sc_ah;
815 struct ath_common *common = ath9k_hw_common(ah);
817 if (bss_conf->assoc) {
818 ath_dbg(common, ATH_DBG_CONFIG,
819 "Bss Info ASSOC %d, bssid: %pM\n",
820 bss_conf->aid, common->curbssid);
822 /* New association, store aid */
823 common->curaid = bss_conf->aid;
824 ath9k_hw_write_associd(ah);
827 * Request a re-configuration of Beacon related timers
828 * on the receipt of the first Beacon frame (i.e.,
829 * after time sync with the AP).
831 sc->ps_flags |= PS_BEACON_SYNC;
833 /* Configure the beacon */
834 ath_beacon_config(sc, vif);
836 /* Reset rssi stats */
837 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
838 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
840 sc->sc_flags |= SC_OP_ANI_RUN;
841 ath_start_ani(common);
843 ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
846 sc->sc_flags &= ~SC_OP_ANI_RUN;
847 del_timer_sync(&common->ani.timer);
851 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
853 struct ath_hw *ah = sc->sc_ah;
854 struct ath_common *common = ath9k_hw_common(ah);
855 struct ieee80211_channel *channel = hw->conf.channel;
859 spin_lock_bh(&sc->sc_pcu_lock);
861 ath9k_hw_configpcipowersave(ah, 0, 0);
864 ah->curchan = ath_get_curchannel(sc, sc->hw);
866 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
869 "Unable to reset channel (%u MHz), reset status %d\n",
870 channel->center_freq, r);
873 ath_update_txpow(sc);
874 if (ath_startrecv(sc) != 0) {
875 ath_err(common, "Unable to restart recv logic\n");
878 if (sc->sc_flags & SC_OP_BEACONS)
879 ath_beacon_config(sc, NULL); /* restart beacons */
881 /* Re-Enable interrupts */
882 ath9k_hw_set_interrupts(ah, ah->imask);
885 ath9k_hw_cfg_output(ah, ah->led_pin,
886 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
887 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
889 ieee80211_wake_queues(hw);
891 spin_unlock_bh(&sc->sc_pcu_lock);
893 ath9k_ps_restore(sc);
896 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
898 struct ath_hw *ah = sc->sc_ah;
899 struct ieee80211_channel *channel = hw->conf.channel;
903 spin_lock_bh(&sc->sc_pcu_lock);
905 ieee80211_stop_queues(hw);
908 * Keep the LED on when the radio is disabled
909 * during idle unassociated state.
912 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
913 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
916 /* Disable interrupts */
917 ath9k_hw_disable_interrupts(ah);
919 ath_drain_all_txq(sc, false); /* clear pending tx frames */
921 ath_stoprecv(sc); /* turn off frame recv */
922 ath_flushrecv(sc); /* flush recv queue */
925 ah->curchan = ath_get_curchannel(sc, hw);
927 r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
929 ath_err(ath9k_hw_common(sc->sc_ah),
930 "Unable to reset channel (%u MHz), reset status %d\n",
931 channel->center_freq, r);
934 ath9k_hw_phy_disable(ah);
936 ath9k_hw_configpcipowersave(ah, 1, 1);
938 spin_unlock_bh(&sc->sc_pcu_lock);
939 ath9k_ps_restore(sc);
942 int ath_reset(struct ath_softc *sc, bool retry_tx)
944 struct ath_hw *ah = sc->sc_ah;
945 struct ath_common *common = ath9k_hw_common(ah);
946 struct ieee80211_hw *hw = sc->hw;
950 del_timer_sync(&common->ani.timer);
953 spin_lock_bh(&sc->sc_pcu_lock);
955 ieee80211_stop_queues(hw);
957 ath9k_hw_disable_interrupts(ah);
958 ath_drain_all_txq(sc, retry_tx);
963 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
966 "Unable to reset hardware; reset status %d\n", r);
968 if (ath_startrecv(sc) != 0)
969 ath_err(common, "Unable to start recv logic\n");
972 * We may be doing a reset in response to a request
973 * that changes the channel so update any state that
974 * might change as a result.
976 ath_update_txpow(sc);
978 if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
979 ath_beacon_config(sc, NULL); /* restart beacons */
981 ath9k_hw_set_interrupts(ah, ah->imask);
985 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
986 if (ATH_TXQ_SETUP(sc, i)) {
987 spin_lock_bh(&sc->tx.txq[i].axq_lock);
988 ath_txq_schedule(sc, &sc->tx.txq[i]);
989 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
994 ieee80211_wake_queues(hw);
995 spin_unlock_bh(&sc->sc_pcu_lock);
998 ath_start_ani(common);
999 ath9k_ps_restore(sc);
1004 /**********************/
1005 /* mac80211 callbacks */
1006 /**********************/
1008 static int ath9k_start(struct ieee80211_hw *hw)
1010 struct ath_softc *sc = hw->priv;
1011 struct ath_hw *ah = sc->sc_ah;
1012 struct ath_common *common = ath9k_hw_common(ah);
1013 struct ieee80211_channel *curchan = hw->conf.channel;
1014 struct ath9k_channel *init_channel;
1017 ath_dbg(common, ATH_DBG_CONFIG,
1018 "Starting driver with initial channel: %d MHz\n",
1019 curchan->center_freq);
1021 mutex_lock(&sc->mutex);
1023 /* setup initial channel */
1024 sc->chan_idx = curchan->hw_value;
1026 init_channel = ath_get_curchannel(sc, hw);
1028 /* Reset SERDES registers */
1029 ath9k_hw_configpcipowersave(ah, 0, 0);
1032 * The basic interface to setting the hardware in a good
1033 * state is ``reset''. On return the hardware is known to
1034 * be powered up and with interrupts disabled. This must
1035 * be followed by initialization of the appropriate bits
1036 * and then setup of the interrupt mask.
1038 spin_lock_bh(&sc->sc_pcu_lock);
1039 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1042 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1043 r, curchan->center_freq);
1044 spin_unlock_bh(&sc->sc_pcu_lock);
1049 * This is needed only to setup initial state
1050 * but it's best done after a reset.
1052 ath_update_txpow(sc);
1055 * Setup the hardware after reset:
1056 * The receive engine is set going.
1057 * Frame transmit is handled entirely
1058 * in the frame output path; there's nothing to do
1059 * here except setup the interrupt mask.
1061 if (ath_startrecv(sc) != 0) {
1062 ath_err(common, "Unable to start recv logic\n");
1064 spin_unlock_bh(&sc->sc_pcu_lock);
1067 spin_unlock_bh(&sc->sc_pcu_lock);
1069 /* Setup our intr mask. */
1070 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1071 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1074 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1075 ah->imask |= ATH9K_INT_RXHP |
1077 ATH9K_INT_BB_WATCHDOG;
1079 ah->imask |= ATH9K_INT_RX;
1081 ah->imask |= ATH9K_INT_GTT;
1083 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1084 ah->imask |= ATH9K_INT_CST;
1086 sc->sc_flags &= ~SC_OP_INVALID;
1087 sc->sc_ah->is_monitoring = false;
1089 /* Disable BMISS interrupt when we're not associated */
1090 ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1091 ath9k_hw_set_interrupts(ah, ah->imask);
1093 ieee80211_wake_queues(hw);
1095 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1097 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1098 !ah->btcoex_hw.enabled) {
1099 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1100 AR_STOMP_LOW_WLAN_WGHT);
1101 ath9k_hw_btcoex_enable(ah);
1103 if (common->bus_ops->bt_coex_prep)
1104 common->bus_ops->bt_coex_prep(common);
1105 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1106 ath9k_btcoex_timer_resume(sc);
1109 /* User has the option to provide pm-qos value as a module
1110 * parameter rather than using the default value of
1111 * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
1113 pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
1115 if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1116 common->bus_ops->extn_synch_en(common);
1119 mutex_unlock(&sc->mutex);
1124 static int ath9k_tx(struct ieee80211_hw *hw,
1125 struct sk_buff *skb)
1127 struct ath_softc *sc = hw->priv;
1128 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1129 struct ath_tx_control txctl;
1130 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1132 if (sc->ps_enabled) {
1134 * mac80211 does not set PM field for normal data frames, so we
1135 * need to update that based on the current PS mode.
1137 if (ieee80211_is_data(hdr->frame_control) &&
1138 !ieee80211_is_nullfunc(hdr->frame_control) &&
1139 !ieee80211_has_pm(hdr->frame_control)) {
1140 ath_dbg(common, ATH_DBG_PS,
1141 "Add PM=1 for a TX frame while in PS mode\n");
1142 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1146 if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1148 * We are using PS-Poll and mac80211 can request TX while in
1149 * power save mode. Need to wake up hardware for the TX to be
1150 * completed and if needed, also for RX of buffered frames.
1152 ath9k_ps_wakeup(sc);
1153 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1154 ath9k_hw_setrxabort(sc->sc_ah, 0);
1155 if (ieee80211_is_pspoll(hdr->frame_control)) {
1156 ath_dbg(common, ATH_DBG_PS,
1157 "Sending PS-Poll to pick a buffered frame\n");
1158 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1160 ath_dbg(common, ATH_DBG_PS,
1161 "Wake up to complete TX\n");
1162 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1165 * The actual restore operation will happen only after
1166 * the sc_flags bit is cleared. We are just dropping
1167 * the ps_usecount here.
1169 ath9k_ps_restore(sc);
1172 memset(&txctl, 0, sizeof(struct ath_tx_control));
1173 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1175 ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1177 if (ath_tx_start(hw, skb, &txctl) != 0) {
1178 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1184 dev_kfree_skb_any(skb);
1188 static void ath9k_stop(struct ieee80211_hw *hw)
1190 struct ath_softc *sc = hw->priv;
1191 struct ath_hw *ah = sc->sc_ah;
1192 struct ath_common *common = ath9k_hw_common(ah);
1194 mutex_lock(&sc->mutex);
1197 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1199 cancel_delayed_work_sync(&sc->tx_complete_work);
1200 cancel_delayed_work_sync(&sc->hw_pll_work);
1201 cancel_work_sync(&sc->paprd_work);
1202 cancel_work_sync(&sc->hw_check_work);
1204 if (sc->sc_flags & SC_OP_INVALID) {
1205 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1206 mutex_unlock(&sc->mutex);
1210 /* Ensure HW is awake when we try to shut it down. */
1211 ath9k_ps_wakeup(sc);
1213 if (ah->btcoex_hw.enabled) {
1214 ath9k_hw_btcoex_disable(ah);
1215 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1216 ath9k_btcoex_timer_pause(sc);
1219 spin_lock_bh(&sc->sc_pcu_lock);
1221 /* prevent tasklets to enable interrupts once we disable them */
1222 ah->imask &= ~ATH9K_INT_GLOBAL;
1224 /* make sure h/w will not generate any interrupt
1225 * before setting the invalid flag. */
1226 ath9k_hw_disable_interrupts(ah);
1228 if (!(sc->sc_flags & SC_OP_INVALID)) {
1229 ath_drain_all_txq(sc, false);
1231 ath9k_hw_phy_disable(ah);
1233 sc->rx.rxlink = NULL;
1236 dev_kfree_skb_any(sc->rx.frag);
1240 /* disable HAL and put h/w to sleep */
1241 ath9k_hw_disable(ah);
1242 ath9k_hw_configpcipowersave(ah, 1, 1);
1244 spin_unlock_bh(&sc->sc_pcu_lock);
1246 /* we can now sync irq and kill any running tasklets, since we already
1247 * disabled interrupts and not holding a spin lock */
1248 synchronize_irq(sc->irq);
1249 tasklet_kill(&sc->intr_tq);
1250 tasklet_kill(&sc->bcon_tasklet);
1252 ath9k_ps_restore(sc);
1255 ath_radio_disable(sc, hw);
1257 sc->sc_flags |= SC_OP_INVALID;
1259 pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1261 mutex_unlock(&sc->mutex);
1263 ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1266 bool ath9k_uses_beacons(int type)
1269 case NL80211_IFTYPE_AP:
1270 case NL80211_IFTYPE_ADHOC:
1271 case NL80211_IFTYPE_MESH_POINT:
1278 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1279 struct ieee80211_vif *vif)
1281 struct ath_vif *avp = (void *)vif->drv_priv;
1283 /* Disable SWBA interrupt */
1284 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1285 ath9k_ps_wakeup(sc);
1286 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1287 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1288 tasklet_kill(&sc->bcon_tasklet);
1289 ath9k_ps_restore(sc);
1291 ath_beacon_return(sc, avp);
1292 sc->sc_flags &= ~SC_OP_BEACONS;
1294 if (sc->nbcnvifs > 0) {
1295 /* Re-enable beaconing */
1296 sc->sc_ah->imask |= ATH9K_INT_SWBA;
1297 ath9k_ps_wakeup(sc);
1298 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1299 ath9k_ps_restore(sc);
1303 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1305 struct ath9k_vif_iter_data *iter_data = data;
1308 if (iter_data->hw_macaddr)
1309 for (i = 0; i < ETH_ALEN; i++)
1310 iter_data->mask[i] &=
1311 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1313 switch (vif->type) {
1314 case NL80211_IFTYPE_AP:
1317 case NL80211_IFTYPE_STATION:
1318 iter_data->nstations++;
1320 case NL80211_IFTYPE_ADHOC:
1321 iter_data->nadhocs++;
1323 case NL80211_IFTYPE_MESH_POINT:
1324 iter_data->nmeshes++;
1326 case NL80211_IFTYPE_WDS:
1330 iter_data->nothers++;
1335 /* Called with sc->mutex held. */
1336 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1337 struct ieee80211_vif *vif,
1338 struct ath9k_vif_iter_data *iter_data)
1340 struct ath_softc *sc = hw->priv;
1341 struct ath_hw *ah = sc->sc_ah;
1342 struct ath_common *common = ath9k_hw_common(ah);
1345 * Use the hardware MAC address as reference, the hardware uses it
1346 * together with the BSSID mask when matching addresses.
1348 memset(iter_data, 0, sizeof(*iter_data));
1349 iter_data->hw_macaddr = common->macaddr;
1350 memset(&iter_data->mask, 0xff, ETH_ALEN);
1353 ath9k_vif_iter(iter_data, vif->addr, vif);
1355 /* Get list of all active MAC addresses */
1356 ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1360 /* Called with sc->mutex held. */
1361 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1362 struct ieee80211_vif *vif)
1364 struct ath_softc *sc = hw->priv;
1365 struct ath_hw *ah = sc->sc_ah;
1366 struct ath_common *common = ath9k_hw_common(ah);
1367 struct ath9k_vif_iter_data iter_data;
1369 ath9k_calculate_iter_data(hw, vif, &iter_data);
1371 /* Set BSSID mask. */
1372 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1373 ath_hw_setbssidmask(common);
1375 /* Set op-mode & TSF */
1376 if (iter_data.naps > 0) {
1377 ath9k_hw_set_tsfadjust(ah, 1);
1378 sc->sc_flags |= SC_OP_TSF_RESET;
1379 ah->opmode = NL80211_IFTYPE_AP;
1381 ath9k_hw_set_tsfadjust(ah, 0);
1382 sc->sc_flags &= ~SC_OP_TSF_RESET;
1384 if (iter_data.nwds + iter_data.nmeshes)
1385 ah->opmode = NL80211_IFTYPE_AP;
1386 else if (iter_data.nadhocs)
1387 ah->opmode = NL80211_IFTYPE_ADHOC;
1389 ah->opmode = NL80211_IFTYPE_STATION;
1393 * Enable MIB interrupts when there are hardware phy counters.
1395 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1396 if (ah->config.enable_ani)
1397 ah->imask |= ATH9K_INT_MIB;
1398 ah->imask |= ATH9K_INT_TSFOOR;
1400 ah->imask &= ~ATH9K_INT_MIB;
1401 ah->imask &= ~ATH9K_INT_TSFOOR;
1404 ath9k_hw_set_interrupts(ah, ah->imask);
1407 if ((iter_data.naps + iter_data.nadhocs) > 0) {
1408 sc->sc_flags |= SC_OP_ANI_RUN;
1409 ath_start_ani(common);
1411 sc->sc_flags &= ~SC_OP_ANI_RUN;
1412 del_timer_sync(&common->ani.timer);
1416 /* Called with sc->mutex held, vif counts set up properly. */
1417 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1418 struct ieee80211_vif *vif)
1420 struct ath_softc *sc = hw->priv;
1422 ath9k_calculate_summary_state(hw, vif);
1424 if (ath9k_uses_beacons(vif->type)) {
1426 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1427 /* This may fail because upper levels do not have beacons
1428 * properly configured yet. That's OK, we assume it
1429 * will be properly configured and then we will be notified
1430 * in the info_changed method and set up beacons properly
1433 error = ath_beacon_alloc(sc, vif);
1435 ath9k_reclaim_beacon(sc, vif);
1437 ath_beacon_config(sc, vif);
1442 static int ath9k_add_interface(struct ieee80211_hw *hw,
1443 struct ieee80211_vif *vif)
1445 struct ath_softc *sc = hw->priv;
1446 struct ath_hw *ah = sc->sc_ah;
1447 struct ath_common *common = ath9k_hw_common(ah);
1448 struct ath_vif *avp = (void *)vif->drv_priv;
1451 mutex_lock(&sc->mutex);
1453 switch (vif->type) {
1454 case NL80211_IFTYPE_STATION:
1455 case NL80211_IFTYPE_WDS:
1456 case NL80211_IFTYPE_ADHOC:
1457 case NL80211_IFTYPE_AP:
1458 case NL80211_IFTYPE_MESH_POINT:
1461 ath_err(common, "Interface type %d not yet supported\n",
1467 if (ath9k_uses_beacons(vif->type)) {
1468 if (sc->nbcnvifs >= ATH_BCBUF) {
1469 ath_err(common, "Not enough beacon buffers when adding"
1470 " new interface of type: %i\n",
1477 if ((vif->type == NL80211_IFTYPE_ADHOC) &&
1479 ath_err(common, "Cannot create ADHOC interface when other"
1480 " interfaces already exist.\n");
1485 ath_dbg(common, ATH_DBG_CONFIG,
1486 "Attach a VIF of type: %d\n", vif->type);
1488 /* Set the VIF opmode */
1489 avp->av_opmode = vif->type;
1494 ath9k_do_vif_add_setup(hw, vif);
1496 mutex_unlock(&sc->mutex);
1500 static int ath9k_change_interface(struct ieee80211_hw *hw,
1501 struct ieee80211_vif *vif,
1502 enum nl80211_iftype new_type,
1505 struct ath_softc *sc = hw->priv;
1506 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1509 ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1510 mutex_lock(&sc->mutex);
1512 /* See if new interface type is valid. */
1513 if ((new_type == NL80211_IFTYPE_ADHOC) &&
1515 ath_err(common, "When using ADHOC, it must be the only"
1521 if (ath9k_uses_beacons(new_type) &&
1522 !ath9k_uses_beacons(vif->type)) {
1523 if (sc->nbcnvifs >= ATH_BCBUF) {
1524 ath_err(common, "No beacon slot available\n");
1530 /* Clean up old vif stuff */
1531 if (ath9k_uses_beacons(vif->type))
1532 ath9k_reclaim_beacon(sc, vif);
1534 /* Add new settings */
1535 vif->type = new_type;
1538 ath9k_do_vif_add_setup(hw, vif);
1540 mutex_unlock(&sc->mutex);
1544 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1545 struct ieee80211_vif *vif)
1547 struct ath_softc *sc = hw->priv;
1548 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1550 ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1552 mutex_lock(&sc->mutex);
1556 /* Reclaim beacon resources */
1557 if (ath9k_uses_beacons(vif->type))
1558 ath9k_reclaim_beacon(sc, vif);
1560 ath9k_calculate_summary_state(hw, NULL);
1562 mutex_unlock(&sc->mutex);
1565 static void ath9k_enable_ps(struct ath_softc *sc)
1567 struct ath_hw *ah = sc->sc_ah;
1569 sc->ps_enabled = true;
1570 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1571 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1572 ah->imask |= ATH9K_INT_TIM_TIMER;
1573 ath9k_hw_set_interrupts(ah, ah->imask);
1575 ath9k_hw_setrxabort(ah, 1);
1579 static void ath9k_disable_ps(struct ath_softc *sc)
1581 struct ath_hw *ah = sc->sc_ah;
1583 sc->ps_enabled = false;
1584 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1585 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1586 ath9k_hw_setrxabort(ah, 0);
1587 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1589 PS_WAIT_FOR_PSPOLL_DATA |
1590 PS_WAIT_FOR_TX_ACK);
1591 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1592 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1593 ath9k_hw_set_interrupts(ah, ah->imask);
1599 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1601 struct ath_softc *sc = hw->priv;
1602 struct ath_hw *ah = sc->sc_ah;
1603 struct ath_common *common = ath9k_hw_common(ah);
1604 struct ieee80211_conf *conf = &hw->conf;
1605 bool disable_radio = false;
1607 mutex_lock(&sc->mutex);
1610 * Leave this as the first check because we need to turn on the
1611 * radio if it was disabled before prior to processing the rest
1612 * of the changes. Likewise we must only disable the radio towards
1615 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1616 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1618 ath_radio_enable(sc, hw);
1619 ath_dbg(common, ATH_DBG_CONFIG,
1620 "not-idle: enabling radio\n");
1622 disable_radio = true;
1627 * We just prepare to enable PS. We have to wait until our AP has
1628 * ACK'd our null data frame to disable RX otherwise we'll ignore
1629 * those ACKs and end up retransmitting the same null data frames.
1630 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1632 if (changed & IEEE80211_CONF_CHANGE_PS) {
1633 unsigned long flags;
1634 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1635 if (conf->flags & IEEE80211_CONF_PS)
1636 ath9k_enable_ps(sc);
1638 ath9k_disable_ps(sc);
1639 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1642 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1643 if (conf->flags & IEEE80211_CONF_MONITOR) {
1644 ath_dbg(common, ATH_DBG_CONFIG,
1645 "Monitor mode is enabled\n");
1646 sc->sc_ah->is_monitoring = true;
1648 ath_dbg(common, ATH_DBG_CONFIG,
1649 "Monitor mode is disabled\n");
1650 sc->sc_ah->is_monitoring = false;
1654 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1655 struct ieee80211_channel *curchan = hw->conf.channel;
1656 int pos = curchan->hw_value;
1658 unsigned long flags;
1661 old_pos = ah->curchan - &ah->channels[0];
1663 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1664 sc->sc_flags |= SC_OP_OFFCHANNEL;
1666 sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1668 ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1669 curchan->center_freq);
1671 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1672 curchan, conf->channel_type);
1674 /* update survey stats for the old channel before switching */
1675 spin_lock_irqsave(&common->cc_lock, flags);
1676 ath_update_survey_stats(sc);
1677 spin_unlock_irqrestore(&common->cc_lock, flags);
1680 * If the operating channel changes, change the survey in-use flags
1682 * Reset the survey data for the new channel, unless we're switching
1683 * back to the operating channel from an off-channel operation.
1685 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1686 sc->cur_survey != &sc->survey[pos]) {
1689 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1691 sc->cur_survey = &sc->survey[pos];
1693 memset(sc->cur_survey, 0, sizeof(struct survey_info));
1694 sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1695 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1696 memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1699 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1700 ath_err(common, "Unable to set channel\n");
1701 mutex_unlock(&sc->mutex);
1706 * The most recent snapshot of channel->noisefloor for the old
1707 * channel is only available after the hardware reset. Copy it to
1708 * the survey stats now.
1711 ath_update_survey_nf(sc, old_pos);
1714 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1715 sc->config.txpowlimit = 2 * conf->power_level;
1716 ath9k_ps_wakeup(sc);
1717 ath_update_txpow(sc);
1718 ath9k_ps_restore(sc);
1721 if (disable_radio) {
1722 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1723 ath_radio_disable(sc, hw);
1726 mutex_unlock(&sc->mutex);
1731 #define SUPPORTED_FILTERS \
1732 (FIF_PROMISC_IN_BSS | \
1737 FIF_BCN_PRBRESP_PROMISC | \
1741 /* FIXME: sc->sc_full_reset ? */
1742 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1743 unsigned int changed_flags,
1744 unsigned int *total_flags,
1747 struct ath_softc *sc = hw->priv;
1750 changed_flags &= SUPPORTED_FILTERS;
1751 *total_flags &= SUPPORTED_FILTERS;
1753 sc->rx.rxfilter = *total_flags;
1754 ath9k_ps_wakeup(sc);
1755 rfilt = ath_calcrxfilter(sc);
1756 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1757 ath9k_ps_restore(sc);
1759 ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1760 "Set HW RX filter: 0x%x\n", rfilt);
1763 static int ath9k_sta_add(struct ieee80211_hw *hw,
1764 struct ieee80211_vif *vif,
1765 struct ieee80211_sta *sta)
1767 struct ath_softc *sc = hw->priv;
1769 ath_node_attach(sc, sta);
1774 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1775 struct ieee80211_vif *vif,
1776 struct ieee80211_sta *sta)
1778 struct ath_softc *sc = hw->priv;
1780 ath_node_detach(sc, sta);
1785 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1786 const struct ieee80211_tx_queue_params *params)
1788 struct ath_softc *sc = hw->priv;
1789 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1790 struct ath_txq *txq;
1791 struct ath9k_tx_queue_info qi;
1794 if (queue >= WME_NUM_AC)
1797 txq = sc->tx.txq_map[queue];
1799 mutex_lock(&sc->mutex);
1801 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1803 qi.tqi_aifs = params->aifs;
1804 qi.tqi_cwmin = params->cw_min;
1805 qi.tqi_cwmax = params->cw_max;
1806 qi.tqi_burstTime = params->txop;
1808 ath_dbg(common, ATH_DBG_CONFIG,
1809 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1810 queue, txq->axq_qnum, params->aifs, params->cw_min,
1811 params->cw_max, params->txop);
1813 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1815 ath_err(common, "TXQ Update failed\n");
1817 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1818 if (queue == WME_AC_BE && !ret)
1819 ath_beaconq_config(sc);
1821 mutex_unlock(&sc->mutex);
1826 static int ath9k_set_key(struct ieee80211_hw *hw,
1827 enum set_key_cmd cmd,
1828 struct ieee80211_vif *vif,
1829 struct ieee80211_sta *sta,
1830 struct ieee80211_key_conf *key)
1832 struct ath_softc *sc = hw->priv;
1833 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1836 if (ath9k_modparam_nohwcrypt)
1839 mutex_lock(&sc->mutex);
1840 ath9k_ps_wakeup(sc);
1841 ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1845 ret = ath_key_config(common, vif, sta, key);
1847 key->hw_key_idx = ret;
1848 /* push IV and Michael MIC generation to stack */
1849 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1850 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1851 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1852 if (sc->sc_ah->sw_mgmt_crypto &&
1853 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1854 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1859 ath_key_delete(common, key);
1865 ath9k_ps_restore(sc);
1866 mutex_unlock(&sc->mutex);
1871 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1872 struct ieee80211_vif *vif,
1873 struct ieee80211_bss_conf *bss_conf,
1876 struct ath_softc *sc = hw->priv;
1877 struct ath_hw *ah = sc->sc_ah;
1878 struct ath_common *common = ath9k_hw_common(ah);
1879 struct ath_vif *avp = (void *)vif->drv_priv;
1883 mutex_lock(&sc->mutex);
1885 if (changed & BSS_CHANGED_BSSID) {
1887 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1888 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1890 ath9k_hw_write_associd(ah);
1892 /* Set aggregation protection mode parameters */
1893 sc->config.ath_aggr_prot = 0;
1895 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
1896 common->curbssid, common->curaid);
1898 /* need to reconfigure the beacon */
1899 sc->sc_flags &= ~SC_OP_BEACONS ;
1902 /* Enable transmission of beacons (AP, IBSS, MESH) */
1903 if ((changed & BSS_CHANGED_BEACON) ||
1904 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1905 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1906 error = ath_beacon_alloc(sc, vif);
1908 ath_beacon_config(sc, vif);
1911 if (changed & BSS_CHANGED_ERP_SLOT) {
1912 if (bss_conf->use_short_slot)
1916 if (vif->type == NL80211_IFTYPE_AP) {
1918 * Defer update, so that connected stations can adjust
1919 * their settings at the same time.
1920 * See beacon.c for more details
1922 sc->beacon.slottime = slottime;
1923 sc->beacon.updateslot = UPDATE;
1925 ah->slottime = slottime;
1926 ath9k_hw_init_global_settings(ah);
1930 /* Disable transmission of beacons */
1931 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1932 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1934 if (changed & BSS_CHANGED_BEACON_INT) {
1935 sc->beacon_interval = bss_conf->beacon_int;
1937 * In case of AP mode, the HW TSF has to be reset
1938 * when the beacon interval changes.
1940 if (vif->type == NL80211_IFTYPE_AP) {
1941 sc->sc_flags |= SC_OP_TSF_RESET;
1942 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1943 error = ath_beacon_alloc(sc, vif);
1945 ath_beacon_config(sc, vif);
1947 ath_beacon_config(sc, vif);
1951 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1952 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1953 bss_conf->use_short_preamble);
1954 if (bss_conf->use_short_preamble)
1955 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1957 sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1960 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1961 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1962 bss_conf->use_cts_prot);
1963 if (bss_conf->use_cts_prot &&
1964 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1965 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1967 sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1970 if (changed & BSS_CHANGED_ASSOC) {
1971 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1973 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1976 mutex_unlock(&sc->mutex);
1979 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1981 struct ath_softc *sc = hw->priv;
1984 mutex_lock(&sc->mutex);
1985 ath9k_ps_wakeup(sc);
1986 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1987 ath9k_ps_restore(sc);
1988 mutex_unlock(&sc->mutex);
1993 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1995 struct ath_softc *sc = hw->priv;
1997 mutex_lock(&sc->mutex);
1998 ath9k_ps_wakeup(sc);
1999 ath9k_hw_settsf64(sc->sc_ah, tsf);
2000 ath9k_ps_restore(sc);
2001 mutex_unlock(&sc->mutex);
2004 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2006 struct ath_softc *sc = hw->priv;
2008 mutex_lock(&sc->mutex);
2010 ath9k_ps_wakeup(sc);
2011 ath9k_hw_reset_tsf(sc->sc_ah);
2012 ath9k_ps_restore(sc);
2014 mutex_unlock(&sc->mutex);
2017 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2018 struct ieee80211_vif *vif,
2019 enum ieee80211_ampdu_mlme_action action,
2020 struct ieee80211_sta *sta,
2021 u16 tid, u16 *ssn, u8 buf_size)
2023 struct ath_softc *sc = hw->priv;
2029 case IEEE80211_AMPDU_RX_START:
2030 if (!(sc->sc_flags & SC_OP_RXAGGR))
2033 case IEEE80211_AMPDU_RX_STOP:
2035 case IEEE80211_AMPDU_TX_START:
2036 if (!(sc->sc_flags & SC_OP_TXAGGR))
2039 ath9k_ps_wakeup(sc);
2040 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2042 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2043 ath9k_ps_restore(sc);
2045 case IEEE80211_AMPDU_TX_STOP:
2046 ath9k_ps_wakeup(sc);
2047 ath_tx_aggr_stop(sc, sta, tid);
2048 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2049 ath9k_ps_restore(sc);
2051 case IEEE80211_AMPDU_TX_OPERATIONAL:
2052 ath9k_ps_wakeup(sc);
2053 ath_tx_aggr_resume(sc, sta, tid);
2054 ath9k_ps_restore(sc);
2057 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2065 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2066 struct survey_info *survey)
2068 struct ath_softc *sc = hw->priv;
2069 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2070 struct ieee80211_supported_band *sband;
2071 struct ieee80211_channel *chan;
2072 unsigned long flags;
2075 spin_lock_irqsave(&common->cc_lock, flags);
2077 ath_update_survey_stats(sc);
2079 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2080 if (sband && idx >= sband->n_channels) {
2081 idx -= sband->n_channels;
2086 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2088 if (!sband || idx >= sband->n_channels) {
2089 spin_unlock_irqrestore(&common->cc_lock, flags);
2093 chan = &sband->channels[idx];
2094 pos = chan->hw_value;
2095 memcpy(survey, &sc->survey[pos], sizeof(*survey));
2096 survey->channel = chan;
2097 spin_unlock_irqrestore(&common->cc_lock, flags);
2102 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2104 struct ath_softc *sc = hw->priv;
2105 struct ath_hw *ah = sc->sc_ah;
2107 mutex_lock(&sc->mutex);
2108 ah->coverage_class = coverage_class;
2109 ath9k_hw_init_global_settings(ah);
2110 mutex_unlock(&sc->mutex);
2113 struct ieee80211_ops ath9k_ops = {
2115 .start = ath9k_start,
2117 .add_interface = ath9k_add_interface,
2118 .change_interface = ath9k_change_interface,
2119 .remove_interface = ath9k_remove_interface,
2120 .config = ath9k_config,
2121 .configure_filter = ath9k_configure_filter,
2122 .sta_add = ath9k_sta_add,
2123 .sta_remove = ath9k_sta_remove,
2124 .conf_tx = ath9k_conf_tx,
2125 .bss_info_changed = ath9k_bss_info_changed,
2126 .set_key = ath9k_set_key,
2127 .get_tsf = ath9k_get_tsf,
2128 .set_tsf = ath9k_set_tsf,
2129 .reset_tsf = ath9k_reset_tsf,
2130 .ampdu_action = ath9k_ampdu_action,
2131 .get_survey = ath9k_get_survey,
2132 .rfkill_poll = ath9k_rfkill_poll_state,
2133 .set_coverage_class = ath9k_set_coverage_class,