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1 /*
2  * Copyright (c) 2008-2011 Atheros Communications Inc.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
19 #include "ath9k.h"
20 #include "btcoex.h"
21
22 static u8 parse_mpdudensity(u8 mpdudensity)
23 {
24         /*
25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26          *   0 for no restriction
27          *   1 for 1/4 us
28          *   2 for 1/2 us
29          *   3 for 1 us
30          *   4 for 2 us
31          *   5 for 4 us
32          *   6 for 8 us
33          *   7 for 16 us
34          */
35         switch (mpdudensity) {
36         case 0:
37                 return 0;
38         case 1:
39         case 2:
40         case 3:
41                 /* Our lower layer calculations limit our precision to
42                    1 microsecond */
43                 return 1;
44         case 4:
45                 return 2;
46         case 5:
47                 return 4;
48         case 6:
49                 return 8;
50         case 7:
51                 return 16;
52         default:
53                 return 0;
54         }
55 }
56
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
58 {
59         bool pending = false;
60
61         spin_lock_bh(&txq->axq_lock);
62
63         if (txq->axq_depth || !list_empty(&txq->axq_acq))
64                 pending = true;
65
66         spin_unlock_bh(&txq->axq_lock);
67         return pending;
68 }
69
70 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
71 {
72         unsigned long flags;
73         bool ret;
74
75         spin_lock_irqsave(&sc->sc_pm_lock, flags);
76         ret = ath9k_hw_setpower(sc->sc_ah, mode);
77         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
78
79         return ret;
80 }
81
82 void ath9k_ps_wakeup(struct ath_softc *sc)
83 {
84         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
85         unsigned long flags;
86         enum ath9k_power_mode power_mode;
87
88         spin_lock_irqsave(&sc->sc_pm_lock, flags);
89         if (++sc->ps_usecount != 1)
90                 goto unlock;
91
92         power_mode = sc->sc_ah->power_mode;
93         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
94
95         /*
96          * While the hardware is asleep, the cycle counters contain no
97          * useful data. Better clear them now so that they don't mess up
98          * survey data results.
99          */
100         if (power_mode != ATH9K_PM_AWAKE) {
101                 spin_lock(&common->cc_lock);
102                 ath_hw_cycle_counters_update(common);
103                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
104                 spin_unlock(&common->cc_lock);
105         }
106
107  unlock:
108         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
109 }
110
111 void ath9k_ps_restore(struct ath_softc *sc)
112 {
113         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
114         unsigned long flags;
115
116         spin_lock_irqsave(&sc->sc_pm_lock, flags);
117         if (--sc->ps_usecount != 0)
118                 goto unlock;
119
120         spin_lock(&common->cc_lock);
121         ath_hw_cycle_counters_update(common);
122         spin_unlock(&common->cc_lock);
123
124         if (sc->ps_idle)
125                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
126         else if (sc->ps_enabled &&
127                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
128                               PS_WAIT_FOR_CAB |
129                               PS_WAIT_FOR_PSPOLL_DATA |
130                               PS_WAIT_FOR_TX_ACK)))
131                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
132
133  unlock:
134         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
135 }
136
137 void ath_start_ani(struct ath_common *common)
138 {
139         struct ath_hw *ah = common->ah;
140         unsigned long timestamp = jiffies_to_msecs(jiffies);
141         struct ath_softc *sc = (struct ath_softc *) common->priv;
142
143         if (!(sc->sc_flags & SC_OP_ANI_RUN))
144                 return;
145
146         if (sc->sc_flags & SC_OP_OFFCHANNEL)
147                 return;
148
149         common->ani.longcal_timer = timestamp;
150         common->ani.shortcal_timer = timestamp;
151         common->ani.checkani_timer = timestamp;
152
153         mod_timer(&common->ani.timer,
154                   jiffies +
155                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
156 }
157
158 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
159 {
160         struct ath_hw *ah = sc->sc_ah;
161         struct ath9k_channel *chan = &ah->channels[channel];
162         struct survey_info *survey = &sc->survey[channel];
163
164         if (chan->noisefloor) {
165                 survey->filled |= SURVEY_INFO_NOISE_DBM;
166                 survey->noise = ath9k_hw_getchan_noise(ah, chan);
167         }
168 }
169
170 /*
171  * Updates the survey statistics and returns the busy time since last
172  * update in %, if the measurement duration was long enough for the
173  * result to be useful, -1 otherwise.
174  */
175 static int ath_update_survey_stats(struct ath_softc *sc)
176 {
177         struct ath_hw *ah = sc->sc_ah;
178         struct ath_common *common = ath9k_hw_common(ah);
179         int pos = ah->curchan - &ah->channels[0];
180         struct survey_info *survey = &sc->survey[pos];
181         struct ath_cycle_counters *cc = &common->cc_survey;
182         unsigned int div = common->clockrate * 1000;
183         int ret = 0;
184
185         if (!ah->curchan)
186                 return -1;
187
188         if (ah->power_mode == ATH9K_PM_AWAKE)
189                 ath_hw_cycle_counters_update(common);
190
191         if (cc->cycles > 0) {
192                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
193                         SURVEY_INFO_CHANNEL_TIME_BUSY |
194                         SURVEY_INFO_CHANNEL_TIME_RX |
195                         SURVEY_INFO_CHANNEL_TIME_TX;
196                 survey->channel_time += cc->cycles / div;
197                 survey->channel_time_busy += cc->rx_busy / div;
198                 survey->channel_time_rx += cc->rx_frame / div;
199                 survey->channel_time_tx += cc->tx_frame / div;
200         }
201
202         if (cc->cycles < div)
203                 return -1;
204
205         if (cc->cycles > 0)
206                 ret = cc->rx_busy * 100 / cc->cycles;
207
208         memset(cc, 0, sizeof(*cc));
209
210         ath_update_survey_nf(sc, pos);
211
212         return ret;
213 }
214
215 /*
216  * Set/change channels.  If the channel is really being changed, it's done
217  * by reseting the chip.  To accomplish this we must first cleanup any pending
218  * DMA, then restart stuff.
219 */
220 static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
221                     struct ath9k_channel *hchan)
222 {
223         struct ath_hw *ah = sc->sc_ah;
224         struct ath_common *common = ath9k_hw_common(ah);
225         struct ieee80211_conf *conf = &common->hw->conf;
226         bool fastcc = true, stopped;
227         struct ieee80211_channel *channel = hw->conf.channel;
228         struct ath9k_hw_cal_data *caldata = NULL;
229         int r;
230
231         if (sc->sc_flags & SC_OP_INVALID)
232                 return -EIO;
233
234         sc->hw_busy_count = 0;
235
236         del_timer_sync(&common->ani.timer);
237         cancel_work_sync(&sc->paprd_work);
238         cancel_work_sync(&sc->hw_check_work);
239         cancel_delayed_work_sync(&sc->tx_complete_work);
240         cancel_delayed_work_sync(&sc->hw_pll_work);
241
242         ath9k_ps_wakeup(sc);
243
244         spin_lock_bh(&sc->sc_pcu_lock);
245
246         /*
247          * This is only performed if the channel settings have
248          * actually changed.
249          *
250          * To switch channels clear any pending DMA operations;
251          * wait long enough for the RX fifo to drain, reset the
252          * hardware at the new frequency, and then re-enable
253          * the relevant bits of the h/w.
254          */
255         ath9k_hw_disable_interrupts(ah);
256         stopped = ath_drain_all_txq(sc, false);
257
258         if (!ath_stoprecv(sc))
259                 stopped = false;
260
261         if (!ath9k_hw_check_alive(ah))
262                 stopped = false;
263
264         /* XXX: do not flush receive queue here. We don't want
265          * to flush data frames already in queue because of
266          * changing channel. */
267
268         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
269                 fastcc = false;
270
271         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
272                 caldata = &sc->caldata;
273
274         ath_dbg(common, ATH_DBG_CONFIG,
275                 "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
276                 sc->sc_ah->curchan->channel,
277                 channel->center_freq, conf_is_ht40(conf),
278                 fastcc);
279
280         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
281         if (r) {
282                 ath_err(common,
283                         "Unable to reset channel (%u MHz), reset status %d\n",
284                         channel->center_freq, r);
285                 goto ps_restore;
286         }
287
288         if (ath_startrecv(sc) != 0) {
289                 ath_err(common, "Unable to restart recv logic\n");
290                 r = -EIO;
291                 goto ps_restore;
292         }
293
294         ath9k_cmn_update_txpow(ah, sc->curtxpow,
295                                sc->config.txpowlimit, &sc->curtxpow);
296         ath9k_hw_set_interrupts(ah, ah->imask);
297         ath9k_hw_enable_interrupts(ah);
298
299         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
300                 if (sc->sc_flags & SC_OP_BEACONS)
301                         ath_set_beacon(sc);
302                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
303                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
304                 if (!common->disable_ani)
305                         ath_start_ani(common);
306         }
307
308  ps_restore:
309         ieee80211_wake_queues(hw);
310
311         spin_unlock_bh(&sc->sc_pcu_lock);
312
313         ath9k_ps_restore(sc);
314         return r;
315 }
316
317 static void ath_paprd_activate(struct ath_softc *sc)
318 {
319         struct ath_hw *ah = sc->sc_ah;
320         struct ath9k_hw_cal_data *caldata = ah->caldata;
321         struct ath_common *common = ath9k_hw_common(ah);
322         int chain;
323
324         if (!caldata || !caldata->paprd_done)
325                 return;
326
327         ath9k_ps_wakeup(sc);
328         ar9003_paprd_enable(ah, false);
329         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
330                 if (!(common->tx_chainmask & BIT(chain)))
331                         continue;
332
333                 ar9003_paprd_populate_single_table(ah, caldata, chain);
334         }
335
336         ar9003_paprd_enable(ah, true);
337         ath9k_ps_restore(sc);
338 }
339
340 static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
341 {
342         struct ieee80211_hw *hw = sc->hw;
343         struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
344         struct ath_hw *ah = sc->sc_ah;
345         struct ath_common *common = ath9k_hw_common(ah);
346         struct ath_tx_control txctl;
347         int time_left;
348
349         memset(&txctl, 0, sizeof(txctl));
350         txctl.txq = sc->tx.txq_map[WME_AC_BE];
351
352         memset(tx_info, 0, sizeof(*tx_info));
353         tx_info->band = hw->conf.channel->band;
354         tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
355         tx_info->control.rates[0].idx = 0;
356         tx_info->control.rates[0].count = 1;
357         tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
358         tx_info->control.rates[1].idx = -1;
359
360         init_completion(&sc->paprd_complete);
361         txctl.paprd = BIT(chain);
362
363         if (ath_tx_start(hw, skb, &txctl) != 0) {
364                 ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
365                 dev_kfree_skb_any(skb);
366                 return false;
367         }
368
369         time_left = wait_for_completion_timeout(&sc->paprd_complete,
370                         msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
371
372         if (!time_left)
373                 ath_dbg(common, ATH_DBG_CALIBRATE,
374                         "Timeout waiting for paprd training on TX chain %d\n",
375                         chain);
376
377         return !!time_left;
378 }
379
380 void ath_paprd_calibrate(struct work_struct *work)
381 {
382         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
383         struct ieee80211_hw *hw = sc->hw;
384         struct ath_hw *ah = sc->sc_ah;
385         struct ieee80211_hdr *hdr;
386         struct sk_buff *skb = NULL;
387         struct ath9k_hw_cal_data *caldata = ah->caldata;
388         struct ath_common *common = ath9k_hw_common(ah);
389         int ftype;
390         int chain_ok = 0;
391         int chain;
392         int len = 1800;
393
394         if (!caldata)
395                 return;
396
397         ath9k_ps_wakeup(sc);
398
399         if (ar9003_paprd_init_table(ah) < 0)
400                 goto fail_paprd;
401
402         skb = alloc_skb(len, GFP_KERNEL);
403         if (!skb)
404                 goto fail_paprd;
405
406         skb_put(skb, len);
407         memset(skb->data, 0, len);
408         hdr = (struct ieee80211_hdr *)skb->data;
409         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
410         hdr->frame_control = cpu_to_le16(ftype);
411         hdr->duration_id = cpu_to_le16(10);
412         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
413         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
414         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
415
416         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
417                 if (!(common->tx_chainmask & BIT(chain)))
418                         continue;
419
420                 chain_ok = 0;
421
422                 ath_dbg(common, ATH_DBG_CALIBRATE,
423                         "Sending PAPRD frame for thermal measurement "
424                         "on chain %d\n", chain);
425                 if (!ath_paprd_send_frame(sc, skb, chain))
426                         goto fail_paprd;
427
428                 ar9003_paprd_setup_gain_table(ah, chain);
429
430                 ath_dbg(common, ATH_DBG_CALIBRATE,
431                         "Sending PAPRD training frame on chain %d\n", chain);
432                 if (!ath_paprd_send_frame(sc, skb, chain))
433                         goto fail_paprd;
434
435                 if (!ar9003_paprd_is_done(ah)) {
436                         ath_dbg(common, ATH_DBG_CALIBRATE,
437                                 "PAPRD not yet done on chain %d\n", chain);
438                         break;
439                 }
440
441                 if (ar9003_paprd_create_curve(ah, caldata, chain)) {
442                         ath_dbg(common, ATH_DBG_CALIBRATE,
443                                 "PAPRD create curve failed on chain %d\n",
444                                                                    chain);
445                         break;
446                 }
447
448                 chain_ok = 1;
449         }
450         kfree_skb(skb);
451
452         if (chain_ok) {
453                 caldata->paprd_done = true;
454                 ath_paprd_activate(sc);
455         }
456
457 fail_paprd:
458         ath9k_ps_restore(sc);
459 }
460
461 /*
462  *  This routine performs the periodic noise floor calibration function
463  *  that is used to adjust and optimize the chip performance.  This
464  *  takes environmental changes (location, temperature) into account.
465  *  When the task is complete, it reschedules itself depending on the
466  *  appropriate interval that was calculated.
467  */
468 void ath_ani_calibrate(unsigned long data)
469 {
470         struct ath_softc *sc = (struct ath_softc *)data;
471         struct ath_hw *ah = sc->sc_ah;
472         struct ath_common *common = ath9k_hw_common(ah);
473         bool longcal = false;
474         bool shortcal = false;
475         bool aniflag = false;
476         unsigned int timestamp = jiffies_to_msecs(jiffies);
477         u32 cal_interval, short_cal_interval, long_cal_interval;
478         unsigned long flags;
479
480         if (ah->caldata && ah->caldata->nfcal_interference)
481                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
482         else
483                 long_cal_interval = ATH_LONG_CALINTERVAL;
484
485         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
486                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
487
488         /* Only calibrate if awake */
489         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
490                 goto set_timer;
491
492         ath9k_ps_wakeup(sc);
493
494         /* Long calibration runs independently of short calibration. */
495         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
496                 longcal = true;
497                 ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
498                 common->ani.longcal_timer = timestamp;
499         }
500
501         /* Short calibration applies only while caldone is false */
502         if (!common->ani.caldone) {
503                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
504                         shortcal = true;
505                         ath_dbg(common, ATH_DBG_ANI,
506                                 "shortcal @%lu\n", jiffies);
507                         common->ani.shortcal_timer = timestamp;
508                         common->ani.resetcal_timer = timestamp;
509                 }
510         } else {
511                 if ((timestamp - common->ani.resetcal_timer) >=
512                     ATH_RESTART_CALINTERVAL) {
513                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
514                         if (common->ani.caldone)
515                                 common->ani.resetcal_timer = timestamp;
516                 }
517         }
518
519         /* Verify whether we must check ANI */
520         if ((timestamp - common->ani.checkani_timer) >=
521              ah->config.ani_poll_interval) {
522                 aniflag = true;
523                 common->ani.checkani_timer = timestamp;
524         }
525
526         /* Call ANI routine if necessary */
527         if (aniflag) {
528                 spin_lock_irqsave(&common->cc_lock, flags);
529                 ath9k_hw_ani_monitor(ah, ah->curchan);
530                 ath_update_survey_stats(sc);
531                 spin_unlock_irqrestore(&common->cc_lock, flags);
532         }
533
534         /* Perform calibration if necessary */
535         if (longcal || shortcal) {
536                 common->ani.caldone =
537                         ath9k_hw_calibrate(ah, ah->curchan,
538                                                 common->rx_chainmask, longcal);
539         }
540
541         ath9k_ps_restore(sc);
542
543 set_timer:
544         /*
545         * Set timer interval based on previous results.
546         * The interval must be the shortest necessary to satisfy ANI,
547         * short calibration and long calibration.
548         */
549         cal_interval = ATH_LONG_CALINTERVAL;
550         if (sc->sc_ah->config.enable_ani)
551                 cal_interval = min(cal_interval,
552                                    (u32)ah->config.ani_poll_interval);
553         if (!common->ani.caldone)
554                 cal_interval = min(cal_interval, (u32)short_cal_interval);
555
556         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
557         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
558                 if (!ah->caldata->paprd_done)
559                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
560                 else if (!ah->paprd_table_write_done)
561                         ath_paprd_activate(sc);
562         }
563 }
564
565 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
566 {
567         struct ath_node *an;
568         an = (struct ath_node *)sta->drv_priv;
569
570 #ifdef CONFIG_ATH9K_DEBUGFS
571         spin_lock(&sc->nodes_lock);
572         list_add(&an->list, &sc->nodes);
573         spin_unlock(&sc->nodes_lock);
574         an->sta = sta;
575 #endif
576         if (sc->sc_flags & SC_OP_TXAGGR) {
577                 ath_tx_node_init(sc, an);
578                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
579                                      sta->ht_cap.ampdu_factor);
580                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
581         }
582 }
583
584 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
585 {
586         struct ath_node *an = (struct ath_node *)sta->drv_priv;
587
588 #ifdef CONFIG_ATH9K_DEBUGFS
589         spin_lock(&sc->nodes_lock);
590         list_del(&an->list);
591         spin_unlock(&sc->nodes_lock);
592         an->sta = NULL;
593 #endif
594
595         if (sc->sc_flags & SC_OP_TXAGGR)
596                 ath_tx_node_cleanup(sc, an);
597 }
598
599 void ath_hw_check(struct work_struct *work)
600 {
601         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
602         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
603         unsigned long flags;
604         int busy;
605
606         ath9k_ps_wakeup(sc);
607         if (ath9k_hw_check_alive(sc->sc_ah))
608                 goto out;
609
610         spin_lock_irqsave(&common->cc_lock, flags);
611         busy = ath_update_survey_stats(sc);
612         spin_unlock_irqrestore(&common->cc_lock, flags);
613
614         ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
615                 "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
616         if (busy >= 99) {
617                 if (++sc->hw_busy_count >= 3) {
618                         spin_lock_bh(&sc->sc_pcu_lock);
619                         ath_reset(sc, true);
620                         spin_unlock_bh(&sc->sc_pcu_lock);
621                 }
622         } else if (busy >= 0)
623                 sc->hw_busy_count = 0;
624
625 out:
626         ath9k_ps_restore(sc);
627 }
628
629 static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
630 {
631         static int count;
632         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
633
634         if (pll_sqsum >= 0x40000) {
635                 count++;
636                 if (count == 3) {
637                         /* Rx is hung for more than 500ms. Reset it */
638                         ath_dbg(common, ATH_DBG_RESET,
639                                 "Possible RX hang, resetting");
640                         spin_lock_bh(&sc->sc_pcu_lock);
641                         ath_reset(sc, true);
642                         spin_unlock_bh(&sc->sc_pcu_lock);
643                         count = 0;
644                 }
645         } else
646                 count = 0;
647 }
648
649 void ath_hw_pll_work(struct work_struct *work)
650 {
651         struct ath_softc *sc = container_of(work, struct ath_softc,
652                                             hw_pll_work.work);
653         u32 pll_sqsum;
654
655         if (AR_SREV_9485(sc->sc_ah)) {
656
657                 ath9k_ps_wakeup(sc);
658                 pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
659                 ath9k_ps_restore(sc);
660
661                 ath_hw_pll_rx_hang_check(sc, pll_sqsum);
662
663                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
664         }
665 }
666
667
668 void ath9k_tasklet(unsigned long data)
669 {
670         struct ath_softc *sc = (struct ath_softc *)data;
671         struct ath_hw *ah = sc->sc_ah;
672         struct ath_common *common = ath9k_hw_common(ah);
673
674         u32 status = sc->intrstatus;
675         u32 rxmask;
676
677         if ((status & ATH9K_INT_FATAL) ||
678             (status & ATH9K_INT_BB_WATCHDOG)) {
679                 spin_lock(&sc->sc_pcu_lock);
680                 ath_reset(sc, true);
681                 spin_unlock(&sc->sc_pcu_lock);
682                 return;
683         }
684
685         ath9k_ps_wakeup(sc);
686         spin_lock(&sc->sc_pcu_lock);
687
688         /*
689          * Only run the baseband hang check if beacons stop working in AP or
690          * IBSS mode, because it has a high false positive rate. For station
691          * mode it should not be necessary, since the upper layers will detect
692          * this through a beacon miss automatically and the following channel
693          * change will trigger a hardware reset anyway
694          */
695         if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
696             !ath9k_hw_check_alive(ah))
697                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
698
699         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
700                 /*
701                  * TSF sync does not look correct; remain awake to sync with
702                  * the next Beacon.
703                  */
704                 ath_dbg(common, ATH_DBG_PS,
705                         "TSFOOR - Sync with next Beacon\n");
706                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
707         }
708
709         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
710                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
711                           ATH9K_INT_RXORN);
712         else
713                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
714
715         if (status & rxmask) {
716                 /* Check for high priority Rx first */
717                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
718                     (status & ATH9K_INT_RXHP))
719                         ath_rx_tasklet(sc, 0, true);
720
721                 ath_rx_tasklet(sc, 0, false);
722         }
723
724         if (status & ATH9K_INT_TX) {
725                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
726                         ath_tx_edma_tasklet(sc);
727                 else
728                         ath_tx_tasklet(sc);
729         }
730
731         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
732                 if (status & ATH9K_INT_GENTIMER)
733                         ath_gen_timer_isr(sc->sc_ah);
734
735         /* re-enable hardware interrupt */
736         ath9k_hw_enable_interrupts(ah);
737
738         spin_unlock(&sc->sc_pcu_lock);
739         ath9k_ps_restore(sc);
740 }
741
742 irqreturn_t ath_isr(int irq, void *dev)
743 {
744 #define SCHED_INTR (                            \
745                 ATH9K_INT_FATAL |               \
746                 ATH9K_INT_BB_WATCHDOG |         \
747                 ATH9K_INT_RXORN |               \
748                 ATH9K_INT_RXEOL |               \
749                 ATH9K_INT_RX |                  \
750                 ATH9K_INT_RXLP |                \
751                 ATH9K_INT_RXHP |                \
752                 ATH9K_INT_TX |                  \
753                 ATH9K_INT_BMISS |               \
754                 ATH9K_INT_CST |                 \
755                 ATH9K_INT_TSFOOR |              \
756                 ATH9K_INT_GENTIMER)
757
758         struct ath_softc *sc = dev;
759         struct ath_hw *ah = sc->sc_ah;
760         struct ath_common *common = ath9k_hw_common(ah);
761         enum ath9k_int status;
762         bool sched = false;
763
764         /*
765          * The hardware is not ready/present, don't
766          * touch anything. Note this can happen early
767          * on if the IRQ is shared.
768          */
769         if (sc->sc_flags & SC_OP_INVALID)
770                 return IRQ_NONE;
771
772
773         /* shared irq, not for us */
774
775         if (!ath9k_hw_intrpend(ah))
776                 return IRQ_NONE;
777
778         /*
779          * Figure out the reason(s) for the interrupt.  Note
780          * that the hal returns a pseudo-ISR that may include
781          * bits we haven't explicitly enabled so we mask the
782          * value to insure we only process bits we requested.
783          */
784         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
785         status &= ah->imask;    /* discard unasked-for bits */
786
787         /*
788          * If there are no status bits set, then this interrupt was not
789          * for me (should have been caught above).
790          */
791         if (!status)
792                 return IRQ_NONE;
793
794         /* Cache the status */
795         sc->intrstatus = status;
796
797         if (status & SCHED_INTR)
798                 sched = true;
799
800         /*
801          * If a FATAL or RXORN interrupt is received, we have to reset the
802          * chip immediately.
803          */
804         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
805             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
806                 goto chip_reset;
807
808         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
809             (status & ATH9K_INT_BB_WATCHDOG)) {
810
811                 spin_lock(&common->cc_lock);
812                 ath_hw_cycle_counters_update(common);
813                 ar9003_hw_bb_watchdog_dbg_info(ah);
814                 spin_unlock(&common->cc_lock);
815
816                 goto chip_reset;
817         }
818
819         if (status & ATH9K_INT_SWBA)
820                 tasklet_schedule(&sc->bcon_tasklet);
821
822         if (status & ATH9K_INT_TXURN)
823                 ath9k_hw_updatetxtriglevel(ah, true);
824
825         if (status & ATH9K_INT_RXEOL) {
826                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
827                 ath9k_hw_set_interrupts(ah, ah->imask);
828         }
829
830         if (status & ATH9K_INT_MIB) {
831                 /*
832                  * Disable interrupts until we service the MIB
833                  * interrupt; otherwise it will continue to
834                  * fire.
835                  */
836                 ath9k_hw_disable_interrupts(ah);
837                 /*
838                  * Let the hal handle the event. We assume
839                  * it will clear whatever condition caused
840                  * the interrupt.
841                  */
842                 spin_lock(&common->cc_lock);
843                 ath9k_hw_proc_mib_event(ah);
844                 spin_unlock(&common->cc_lock);
845                 ath9k_hw_enable_interrupts(ah);
846         }
847
848         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
849                 if (status & ATH9K_INT_TIM_TIMER) {
850                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
851                                 goto chip_reset;
852                         /* Clear RxAbort bit so that we can
853                          * receive frames */
854                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
855                         ath9k_hw_setrxabort(sc->sc_ah, 0);
856                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
857                 }
858
859 chip_reset:
860
861         ath_debug_stat_interrupt(sc, status);
862
863         if (sched) {
864                 /* turn off every interrupt */
865                 ath9k_hw_disable_interrupts(ah);
866                 tasklet_schedule(&sc->intr_tq);
867         }
868
869         return IRQ_HANDLED;
870
871 #undef SCHED_INTR
872 }
873
874 static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
875 {
876         struct ath_hw *ah = sc->sc_ah;
877         struct ath_common *common = ath9k_hw_common(ah);
878         struct ieee80211_channel *channel = hw->conf.channel;
879         int r;
880
881         ath9k_ps_wakeup(sc);
882         spin_lock_bh(&sc->sc_pcu_lock);
883         atomic_set(&ah->intr_ref_cnt, -1);
884
885         ath9k_hw_configpcipowersave(ah, false);
886
887         if (!ah->curchan)
888                 ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
889
890         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
891         if (r) {
892                 ath_err(common,
893                         "Unable to reset channel (%u MHz), reset status %d\n",
894                         channel->center_freq, r);
895         }
896
897         ath9k_cmn_update_txpow(ah, sc->curtxpow,
898                                sc->config.txpowlimit, &sc->curtxpow);
899         if (ath_startrecv(sc) != 0) {
900                 ath_err(common, "Unable to restart recv logic\n");
901                 goto out;
902         }
903         if (sc->sc_flags & SC_OP_BEACONS)
904                 ath_set_beacon(sc);     /* restart beacons */
905
906         /* Re-Enable  interrupts */
907         ath9k_hw_set_interrupts(ah, ah->imask);
908         ath9k_hw_enable_interrupts(ah);
909
910         /* Enable LED */
911         ath9k_hw_cfg_output(ah, ah->led_pin,
912                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
913         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
914
915         ieee80211_wake_queues(hw);
916         ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
917
918 out:
919         spin_unlock_bh(&sc->sc_pcu_lock);
920
921         ath9k_ps_restore(sc);
922 }
923
924 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
925 {
926         struct ath_hw *ah = sc->sc_ah;
927         struct ieee80211_channel *channel = hw->conf.channel;
928         int r;
929
930         ath9k_ps_wakeup(sc);
931         cancel_delayed_work_sync(&sc->hw_pll_work);
932
933         spin_lock_bh(&sc->sc_pcu_lock);
934
935         ieee80211_stop_queues(hw);
936
937         /*
938          * Keep the LED on when the radio is disabled
939          * during idle unassociated state.
940          */
941         if (!sc->ps_idle) {
942                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
943                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
944         }
945
946         /* Disable interrupts */
947         ath9k_hw_disable_interrupts(ah);
948
949         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
950
951         ath_stoprecv(sc);               /* turn off frame recv */
952         ath_flushrecv(sc);              /* flush recv queue */
953
954         if (!ah->curchan)
955                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
956
957         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
958         if (r) {
959                 ath_err(ath9k_hw_common(sc->sc_ah),
960                         "Unable to reset channel (%u MHz), reset status %d\n",
961                         channel->center_freq, r);
962         }
963
964         ath9k_hw_phy_disable(ah);
965
966         ath9k_hw_configpcipowersave(ah, true);
967
968         spin_unlock_bh(&sc->sc_pcu_lock);
969         ath9k_ps_restore(sc);
970 }
971
972 int ath_reset(struct ath_softc *sc, bool retry_tx)
973 {
974         struct ath_hw *ah = sc->sc_ah;
975         struct ath_common *common = ath9k_hw_common(ah);
976         struct ieee80211_hw *hw = sc->hw;
977         int r;
978
979         sc->hw_busy_count = 0;
980
981         /* Stop ANI */
982
983         del_timer_sync(&common->ani.timer);
984
985         ath9k_ps_wakeup(sc);
986
987         ieee80211_stop_queues(hw);
988
989         ath9k_hw_disable_interrupts(ah);
990         ath_drain_all_txq(sc, retry_tx);
991
992         ath_stoprecv(sc);
993         ath_flushrecv(sc);
994
995         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
996         if (r)
997                 ath_err(common,
998                         "Unable to reset hardware; reset status %d\n", r);
999
1000         if (ath_startrecv(sc) != 0)
1001                 ath_err(common, "Unable to start recv logic\n");
1002
1003         /*
1004          * We may be doing a reset in response to a request
1005          * that changes the channel so update any state that
1006          * might change as a result.
1007          */
1008         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1009                                sc->config.txpowlimit, &sc->curtxpow);
1010
1011         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1012                 ath_set_beacon(sc);     /* restart beacons */
1013
1014         ath9k_hw_set_interrupts(ah, ah->imask);
1015         ath9k_hw_enable_interrupts(ah);
1016
1017         if (retry_tx) {
1018                 int i;
1019                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1020                         if (ATH_TXQ_SETUP(sc, i)) {
1021                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1022                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1023                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1024                         }
1025                 }
1026         }
1027
1028         ieee80211_wake_queues(hw);
1029
1030         /* Start ANI */
1031         if (!common->disable_ani)
1032                 ath_start_ani(common);
1033
1034         ath9k_ps_restore(sc);
1035
1036         return r;
1037 }
1038
1039 /**********************/
1040 /* mac80211 callbacks */
1041 /**********************/
1042
1043 static int ath9k_start(struct ieee80211_hw *hw)
1044 {
1045         struct ath_softc *sc = hw->priv;
1046         struct ath_hw *ah = sc->sc_ah;
1047         struct ath_common *common = ath9k_hw_common(ah);
1048         struct ieee80211_channel *curchan = hw->conf.channel;
1049         struct ath9k_channel *init_channel;
1050         int r;
1051
1052         ath_dbg(common, ATH_DBG_CONFIG,
1053                 "Starting driver with initial channel: %d MHz\n",
1054                 curchan->center_freq);
1055
1056         ath9k_ps_wakeup(sc);
1057
1058         mutex_lock(&sc->mutex);
1059
1060         /* setup initial channel */
1061         sc->chan_idx = curchan->hw_value;
1062
1063         init_channel = ath9k_cmn_get_curchannel(hw, ah);
1064
1065         /* Reset SERDES registers */
1066         ath9k_hw_configpcipowersave(ah, false);
1067
1068         /*
1069          * The basic interface to setting the hardware in a good
1070          * state is ``reset''.  On return the hardware is known to
1071          * be powered up and with interrupts disabled.  This must
1072          * be followed by initialization of the appropriate bits
1073          * and then setup of the interrupt mask.
1074          */
1075         spin_lock_bh(&sc->sc_pcu_lock);
1076         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1077         if (r) {
1078                 ath_err(common,
1079                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
1080                         r, curchan->center_freq);
1081                 spin_unlock_bh(&sc->sc_pcu_lock);
1082                 goto mutex_unlock;
1083         }
1084
1085         /*
1086          * This is needed only to setup initial state
1087          * but it's best done after a reset.
1088          */
1089         ath9k_cmn_update_txpow(ah, sc->curtxpow,
1090                         sc->config.txpowlimit, &sc->curtxpow);
1091
1092         /*
1093          * Setup the hardware after reset:
1094          * The receive engine is set going.
1095          * Frame transmit is handled entirely
1096          * in the frame output path; there's nothing to do
1097          * here except setup the interrupt mask.
1098          */
1099         if (ath_startrecv(sc) != 0) {
1100                 ath_err(common, "Unable to start recv logic\n");
1101                 r = -EIO;
1102                 spin_unlock_bh(&sc->sc_pcu_lock);
1103                 goto mutex_unlock;
1104         }
1105         spin_unlock_bh(&sc->sc_pcu_lock);
1106
1107         /* Setup our intr mask. */
1108         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1109                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1110                     ATH9K_INT_GLOBAL;
1111
1112         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1113                 ah->imask |= ATH9K_INT_RXHP |
1114                              ATH9K_INT_RXLP |
1115                              ATH9K_INT_BB_WATCHDOG;
1116         else
1117                 ah->imask |= ATH9K_INT_RX;
1118
1119         ah->imask |= ATH9K_INT_GTT;
1120
1121         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1122                 ah->imask |= ATH9K_INT_CST;
1123
1124         sc->sc_flags &= ~SC_OP_INVALID;
1125         sc->sc_ah->is_monitoring = false;
1126
1127         /* Disable BMISS interrupt when we're not associated */
1128         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1129         ath9k_hw_set_interrupts(ah, ah->imask);
1130         ath9k_hw_enable_interrupts(ah);
1131
1132         ieee80211_wake_queues(hw);
1133
1134         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1135
1136         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1137             !ah->btcoex_hw.enabled) {
1138                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1139                                            AR_STOMP_LOW_WLAN_WGHT);
1140                 ath9k_hw_btcoex_enable(ah);
1141
1142                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1143                         ath9k_btcoex_timer_resume(sc);
1144         }
1145
1146         if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
1147                 common->bus_ops->extn_synch_en(common);
1148
1149 mutex_unlock:
1150         mutex_unlock(&sc->mutex);
1151
1152         ath9k_ps_restore(sc);
1153
1154         return r;
1155 }
1156
1157 static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1158 {
1159         struct ath_softc *sc = hw->priv;
1160         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1161         struct ath_tx_control txctl;
1162         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1163
1164         if (sc->ps_enabled) {
1165                 /*
1166                  * mac80211 does not set PM field for normal data frames, so we
1167                  * need to update that based on the current PS mode.
1168                  */
1169                 if (ieee80211_is_data(hdr->frame_control) &&
1170                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1171                     !ieee80211_has_pm(hdr->frame_control)) {
1172                         ath_dbg(common, ATH_DBG_PS,
1173                                 "Add PM=1 for a TX frame while in PS mode\n");
1174                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1175                 }
1176         }
1177
1178         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1179                 /*
1180                  * We are using PS-Poll and mac80211 can request TX while in
1181                  * power save mode. Need to wake up hardware for the TX to be
1182                  * completed and if needed, also for RX of buffered frames.
1183                  */
1184                 ath9k_ps_wakeup(sc);
1185                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1186                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1187                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1188                         ath_dbg(common, ATH_DBG_PS,
1189                                 "Sending PS-Poll to pick a buffered frame\n");
1190                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1191                 } else {
1192                         ath_dbg(common, ATH_DBG_PS,
1193                                 "Wake up to complete TX\n");
1194                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1195                 }
1196                 /*
1197                  * The actual restore operation will happen only after
1198                  * the sc_flags bit is cleared. We are just dropping
1199                  * the ps_usecount here.
1200                  */
1201                 ath9k_ps_restore(sc);
1202         }
1203
1204         memset(&txctl, 0, sizeof(struct ath_tx_control));
1205         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1206
1207         ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1208
1209         if (ath_tx_start(hw, skb, &txctl) != 0) {
1210                 ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
1211                 goto exit;
1212         }
1213
1214         return;
1215 exit:
1216         dev_kfree_skb_any(skb);
1217 }
1218
1219 static void ath9k_stop(struct ieee80211_hw *hw)
1220 {
1221         struct ath_softc *sc = hw->priv;
1222         struct ath_hw *ah = sc->sc_ah;
1223         struct ath_common *common = ath9k_hw_common(ah);
1224
1225         mutex_lock(&sc->mutex);
1226
1227         cancel_delayed_work_sync(&sc->tx_complete_work);
1228         cancel_delayed_work_sync(&sc->hw_pll_work);
1229         cancel_work_sync(&sc->paprd_work);
1230         cancel_work_sync(&sc->hw_check_work);
1231
1232         if (sc->sc_flags & SC_OP_INVALID) {
1233                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
1234                 mutex_unlock(&sc->mutex);
1235                 return;
1236         }
1237
1238         /* Ensure HW is awake when we try to shut it down. */
1239         ath9k_ps_wakeup(sc);
1240
1241         if (ah->btcoex_hw.enabled) {
1242                 ath9k_hw_btcoex_disable(ah);
1243                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1244                         ath9k_btcoex_timer_pause(sc);
1245         }
1246
1247         spin_lock_bh(&sc->sc_pcu_lock);
1248
1249         /* prevent tasklets to enable interrupts once we disable them */
1250         ah->imask &= ~ATH9K_INT_GLOBAL;
1251
1252         /* make sure h/w will not generate any interrupt
1253          * before setting the invalid flag. */
1254         ath9k_hw_disable_interrupts(ah);
1255
1256         if (!(sc->sc_flags & SC_OP_INVALID)) {
1257                 ath_drain_all_txq(sc, false);
1258                 ath_stoprecv(sc);
1259                 ath9k_hw_phy_disable(ah);
1260         } else
1261                 sc->rx.rxlink = NULL;
1262
1263         if (sc->rx.frag) {
1264                 dev_kfree_skb_any(sc->rx.frag);
1265                 sc->rx.frag = NULL;
1266         }
1267
1268         /* disable HAL and put h/w to sleep */
1269         ath9k_hw_disable(ah);
1270
1271         spin_unlock_bh(&sc->sc_pcu_lock);
1272
1273         /* we can now sync irq and kill any running tasklets, since we already
1274          * disabled interrupts and not holding a spin lock */
1275         synchronize_irq(sc->irq);
1276         tasklet_kill(&sc->intr_tq);
1277         tasklet_kill(&sc->bcon_tasklet);
1278
1279         ath9k_ps_restore(sc);
1280
1281         sc->ps_idle = true;
1282         ath_radio_disable(sc, hw);
1283
1284         sc->sc_flags |= SC_OP_INVALID;
1285
1286         mutex_unlock(&sc->mutex);
1287
1288         ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
1289 }
1290
1291 bool ath9k_uses_beacons(int type)
1292 {
1293         switch (type) {
1294         case NL80211_IFTYPE_AP:
1295         case NL80211_IFTYPE_ADHOC:
1296         case NL80211_IFTYPE_MESH_POINT:
1297                 return true;
1298         default:
1299                 return false;
1300         }
1301 }
1302
1303 static void ath9k_reclaim_beacon(struct ath_softc *sc,
1304                                  struct ieee80211_vif *vif)
1305 {
1306         struct ath_vif *avp = (void *)vif->drv_priv;
1307
1308         ath9k_set_beaconing_status(sc, false);
1309         ath_beacon_return(sc, avp);
1310         ath9k_set_beaconing_status(sc, true);
1311         sc->sc_flags &= ~SC_OP_BEACONS;
1312 }
1313
1314 static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1315 {
1316         struct ath9k_vif_iter_data *iter_data = data;
1317         int i;
1318
1319         if (iter_data->hw_macaddr)
1320                 for (i = 0; i < ETH_ALEN; i++)
1321                         iter_data->mask[i] &=
1322                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
1323
1324         switch (vif->type) {
1325         case NL80211_IFTYPE_AP:
1326                 iter_data->naps++;
1327                 break;
1328         case NL80211_IFTYPE_STATION:
1329                 iter_data->nstations++;
1330                 break;
1331         case NL80211_IFTYPE_ADHOC:
1332                 iter_data->nadhocs++;
1333                 break;
1334         case NL80211_IFTYPE_MESH_POINT:
1335                 iter_data->nmeshes++;
1336                 break;
1337         case NL80211_IFTYPE_WDS:
1338                 iter_data->nwds++;
1339                 break;
1340         default:
1341                 iter_data->nothers++;
1342                 break;
1343         }
1344 }
1345
1346 /* Called with sc->mutex held. */
1347 void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
1348                                struct ieee80211_vif *vif,
1349                                struct ath9k_vif_iter_data *iter_data)
1350 {
1351         struct ath_softc *sc = hw->priv;
1352         struct ath_hw *ah = sc->sc_ah;
1353         struct ath_common *common = ath9k_hw_common(ah);
1354
1355         /*
1356          * Use the hardware MAC address as reference, the hardware uses it
1357          * together with the BSSID mask when matching addresses.
1358          */
1359         memset(iter_data, 0, sizeof(*iter_data));
1360         iter_data->hw_macaddr = common->macaddr;
1361         memset(&iter_data->mask, 0xff, ETH_ALEN);
1362
1363         if (vif)
1364                 ath9k_vif_iter(iter_data, vif->addr, vif);
1365
1366         /* Get list of all active MAC addresses */
1367         ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
1368                                                    iter_data);
1369 }
1370
1371 /* Called with sc->mutex held. */
1372 static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
1373                                           struct ieee80211_vif *vif)
1374 {
1375         struct ath_softc *sc = hw->priv;
1376         struct ath_hw *ah = sc->sc_ah;
1377         struct ath_common *common = ath9k_hw_common(ah);
1378         struct ath9k_vif_iter_data iter_data;
1379
1380         ath9k_calculate_iter_data(hw, vif, &iter_data);
1381
1382         /* Set BSSID mask. */
1383         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1384         ath_hw_setbssidmask(common);
1385
1386         /* Set op-mode & TSF */
1387         if (iter_data.naps > 0) {
1388                 ath9k_hw_set_tsfadjust(ah, 1);
1389                 sc->sc_flags |= SC_OP_TSF_RESET;
1390                 ah->opmode = NL80211_IFTYPE_AP;
1391         } else {
1392                 ath9k_hw_set_tsfadjust(ah, 0);
1393                 sc->sc_flags &= ~SC_OP_TSF_RESET;
1394
1395                 if (iter_data.nmeshes)
1396                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1397                 else if (iter_data.nwds)
1398                         ah->opmode = NL80211_IFTYPE_AP;
1399                 else if (iter_data.nadhocs)
1400                         ah->opmode = NL80211_IFTYPE_ADHOC;
1401                 else
1402                         ah->opmode = NL80211_IFTYPE_STATION;
1403         }
1404
1405         /*
1406          * Enable MIB interrupts when there are hardware phy counters.
1407          */
1408         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
1409                 if (ah->config.enable_ani)
1410                         ah->imask |= ATH9K_INT_MIB;
1411                 ah->imask |= ATH9K_INT_TSFOOR;
1412         } else {
1413                 ah->imask &= ~ATH9K_INT_MIB;
1414                 ah->imask &= ~ATH9K_INT_TSFOOR;
1415         }
1416
1417         ath9k_hw_set_interrupts(ah, ah->imask);
1418
1419         /* Set up ANI */
1420         if (iter_data.naps > 0) {
1421                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1422
1423                 if (!common->disable_ani) {
1424                         sc->sc_flags |= SC_OP_ANI_RUN;
1425                         ath_start_ani(common);
1426                 }
1427
1428         } else {
1429                 sc->sc_flags &= ~SC_OP_ANI_RUN;
1430                 del_timer_sync(&common->ani.timer);
1431         }
1432 }
1433
1434 /* Called with sc->mutex held, vif counts set up properly. */
1435 static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
1436                                    struct ieee80211_vif *vif)
1437 {
1438         struct ath_softc *sc = hw->priv;
1439
1440         ath9k_calculate_summary_state(hw, vif);
1441
1442         if (ath9k_uses_beacons(vif->type)) {
1443                 int error;
1444                 /* This may fail because upper levels do not have beacons
1445                  * properly configured yet.  That's OK, we assume it
1446                  * will be properly configured and then we will be notified
1447                  * in the info_changed method and set up beacons properly
1448                  * there.
1449                  */
1450                 ath9k_set_beaconing_status(sc, false);
1451                 error = ath_beacon_alloc(sc, vif);
1452                 if (!error)
1453                         ath_beacon_config(sc, vif);
1454                 ath9k_set_beaconing_status(sc, true);
1455         }
1456 }
1457
1458
1459 static int ath9k_add_interface(struct ieee80211_hw *hw,
1460                                struct ieee80211_vif *vif)
1461 {
1462         struct ath_softc *sc = hw->priv;
1463         struct ath_hw *ah = sc->sc_ah;
1464         struct ath_common *common = ath9k_hw_common(ah);
1465         int ret = 0;
1466
1467         ath9k_ps_wakeup(sc);
1468         mutex_lock(&sc->mutex);
1469
1470         switch (vif->type) {
1471         case NL80211_IFTYPE_STATION:
1472         case NL80211_IFTYPE_WDS:
1473         case NL80211_IFTYPE_ADHOC:
1474         case NL80211_IFTYPE_AP:
1475         case NL80211_IFTYPE_MESH_POINT:
1476                 break;
1477         default:
1478                 ath_err(common, "Interface type %d not yet supported\n",
1479                         vif->type);
1480                 ret = -EOPNOTSUPP;
1481                 goto out;
1482         }
1483
1484         if (ath9k_uses_beacons(vif->type)) {
1485                 if (sc->nbcnvifs >= ATH_BCBUF) {
1486                         ath_err(common, "Not enough beacon buffers when adding"
1487                                 " new interface of type: %i\n",
1488                                 vif->type);
1489                         ret = -ENOBUFS;
1490                         goto out;
1491                 }
1492         }
1493
1494         if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
1495             ((vif->type == NL80211_IFTYPE_ADHOC) &&
1496              sc->nvifs > 0)) {
1497                 ath_err(common, "Cannot create ADHOC interface when other"
1498                         " interfaces already exist.\n");
1499                 ret = -EINVAL;
1500                 goto out;
1501         }
1502
1503         ath_dbg(common, ATH_DBG_CONFIG,
1504                 "Attach a VIF of type: %d\n", vif->type);
1505
1506         sc->nvifs++;
1507
1508         ath9k_do_vif_add_setup(hw, vif);
1509 out:
1510         mutex_unlock(&sc->mutex);
1511         ath9k_ps_restore(sc);
1512         return ret;
1513 }
1514
1515 static int ath9k_change_interface(struct ieee80211_hw *hw,
1516                                   struct ieee80211_vif *vif,
1517                                   enum nl80211_iftype new_type,
1518                                   bool p2p)
1519 {
1520         struct ath_softc *sc = hw->priv;
1521         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1522         int ret = 0;
1523
1524         ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
1525         mutex_lock(&sc->mutex);
1526         ath9k_ps_wakeup(sc);
1527
1528         /* See if new interface type is valid. */
1529         if ((new_type == NL80211_IFTYPE_ADHOC) &&
1530             (sc->nvifs > 1)) {
1531                 ath_err(common, "When using ADHOC, it must be the only"
1532                         " interface.\n");
1533                 ret = -EINVAL;
1534                 goto out;
1535         }
1536
1537         if (ath9k_uses_beacons(new_type) &&
1538             !ath9k_uses_beacons(vif->type)) {
1539                 if (sc->nbcnvifs >= ATH_BCBUF) {
1540                         ath_err(common, "No beacon slot available\n");
1541                         ret = -ENOBUFS;
1542                         goto out;
1543                 }
1544         }
1545
1546         /* Clean up old vif stuff */
1547         if (ath9k_uses_beacons(vif->type))
1548                 ath9k_reclaim_beacon(sc, vif);
1549
1550         /* Add new settings */
1551         vif->type = new_type;
1552         vif->p2p = p2p;
1553
1554         ath9k_do_vif_add_setup(hw, vif);
1555 out:
1556         ath9k_ps_restore(sc);
1557         mutex_unlock(&sc->mutex);
1558         return ret;
1559 }
1560
1561 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1562                                    struct ieee80211_vif *vif)
1563 {
1564         struct ath_softc *sc = hw->priv;
1565         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1566
1567         ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
1568
1569         ath9k_ps_wakeup(sc);
1570         mutex_lock(&sc->mutex);
1571
1572         sc->nvifs--;
1573
1574         /* Reclaim beacon resources */
1575         if (ath9k_uses_beacons(vif->type))
1576                 ath9k_reclaim_beacon(sc, vif);
1577
1578         ath9k_calculate_summary_state(hw, NULL);
1579
1580         mutex_unlock(&sc->mutex);
1581         ath9k_ps_restore(sc);
1582 }
1583
1584 static void ath9k_enable_ps(struct ath_softc *sc)
1585 {
1586         struct ath_hw *ah = sc->sc_ah;
1587
1588         sc->ps_enabled = true;
1589         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1590                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1591                         ah->imask |= ATH9K_INT_TIM_TIMER;
1592                         ath9k_hw_set_interrupts(ah, ah->imask);
1593                 }
1594                 ath9k_hw_setrxabort(ah, 1);
1595         }
1596 }
1597
1598 static void ath9k_disable_ps(struct ath_softc *sc)
1599 {
1600         struct ath_hw *ah = sc->sc_ah;
1601
1602         sc->ps_enabled = false;
1603         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1604         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1605                 ath9k_hw_setrxabort(ah, 0);
1606                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1607                                   PS_WAIT_FOR_CAB |
1608                                   PS_WAIT_FOR_PSPOLL_DATA |
1609                                   PS_WAIT_FOR_TX_ACK);
1610                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1611                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1612                         ath9k_hw_set_interrupts(ah, ah->imask);
1613                 }
1614         }
1615
1616 }
1617
1618 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1619 {
1620         struct ath_softc *sc = hw->priv;
1621         struct ath_hw *ah = sc->sc_ah;
1622         struct ath_common *common = ath9k_hw_common(ah);
1623         struct ieee80211_conf *conf = &hw->conf;
1624         bool disable_radio = false;
1625
1626         mutex_lock(&sc->mutex);
1627
1628         /*
1629          * Leave this as the first check because we need to turn on the
1630          * radio if it was disabled before prior to processing the rest
1631          * of the changes. Likewise we must only disable the radio towards
1632          * the end.
1633          */
1634         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1635                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1636                 if (!sc->ps_idle) {
1637                         ath_radio_enable(sc, hw);
1638                         ath_dbg(common, ATH_DBG_CONFIG,
1639                                 "not-idle: enabling radio\n");
1640                 } else {
1641                         disable_radio = true;
1642                 }
1643         }
1644
1645         /*
1646          * We just prepare to enable PS. We have to wait until our AP has
1647          * ACK'd our null data frame to disable RX otherwise we'll ignore
1648          * those ACKs and end up retransmitting the same null data frames.
1649          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1650          */
1651         if (changed & IEEE80211_CONF_CHANGE_PS) {
1652                 unsigned long flags;
1653                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1654                 if (conf->flags & IEEE80211_CONF_PS)
1655                         ath9k_enable_ps(sc);
1656                 else
1657                         ath9k_disable_ps(sc);
1658                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1659         }
1660
1661         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1662                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1663                         ath_dbg(common, ATH_DBG_CONFIG,
1664                                 "Monitor mode is enabled\n");
1665                         sc->sc_ah->is_monitoring = true;
1666                 } else {
1667                         ath_dbg(common, ATH_DBG_CONFIG,
1668                                 "Monitor mode is disabled\n");
1669                         sc->sc_ah->is_monitoring = false;
1670                 }
1671         }
1672
1673         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1674                 struct ieee80211_channel *curchan = hw->conf.channel;
1675                 struct ath9k_channel old_chan;
1676                 int pos = curchan->hw_value;
1677                 int old_pos = -1;
1678                 unsigned long flags;
1679
1680                 if (ah->curchan)
1681                         old_pos = ah->curchan - &ah->channels[0];
1682
1683                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1684                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1685                 else
1686                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1687
1688                 ath_dbg(common, ATH_DBG_CONFIG,
1689                         "Set channel: %d MHz type: %d\n",
1690                         curchan->center_freq, conf->channel_type);
1691
1692                 /* update survey stats for the old channel before switching */
1693                 spin_lock_irqsave(&common->cc_lock, flags);
1694                 ath_update_survey_stats(sc);
1695                 spin_unlock_irqrestore(&common->cc_lock, flags);
1696
1697                 /*
1698                  * Preserve the current channel values, before updating
1699                  * the same channel
1700                  */
1701                 if (old_pos == pos) {
1702                         memcpy(&old_chan, &sc->sc_ah->channels[pos],
1703                                 sizeof(struct ath9k_channel));
1704                         ah->curchan = &old_chan;
1705                 }
1706
1707                 ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
1708                                           curchan, conf->channel_type);
1709
1710                 /*
1711                  * If the operating channel changes, change the survey in-use flags
1712                  * along with it.
1713                  * Reset the survey data for the new channel, unless we're switching
1714                  * back to the operating channel from an off-channel operation.
1715                  */
1716                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1717                     sc->cur_survey != &sc->survey[pos]) {
1718
1719                         if (sc->cur_survey)
1720                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1721
1722                         sc->cur_survey = &sc->survey[pos];
1723
1724                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1725                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1726                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1727                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1728                 }
1729
1730                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1731                         ath_err(common, "Unable to set channel\n");
1732                         mutex_unlock(&sc->mutex);
1733                         return -EINVAL;
1734                 }
1735
1736                 /*
1737                  * The most recent snapshot of channel->noisefloor for the old
1738                  * channel is only available after the hardware reset. Copy it to
1739                  * the survey stats now.
1740                  */
1741                 if (old_pos >= 0)
1742                         ath_update_survey_nf(sc, old_pos);
1743         }
1744
1745         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1746                 ath_dbg(common, ATH_DBG_CONFIG,
1747                         "Set power: %d\n", conf->power_level);
1748                 sc->config.txpowlimit = 2 * conf->power_level;
1749                 ath9k_ps_wakeup(sc);
1750                 ath9k_cmn_update_txpow(ah, sc->curtxpow,
1751                                        sc->config.txpowlimit, &sc->curtxpow);
1752                 ath9k_ps_restore(sc);
1753         }
1754
1755         if (disable_radio) {
1756                 ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1757                 ath_radio_disable(sc, hw);
1758         }
1759
1760         mutex_unlock(&sc->mutex);
1761
1762         return 0;
1763 }
1764
1765 #define SUPPORTED_FILTERS                       \
1766         (FIF_PROMISC_IN_BSS |                   \
1767         FIF_ALLMULTI |                          \
1768         FIF_CONTROL |                           \
1769         FIF_PSPOLL |                            \
1770         FIF_OTHER_BSS |                         \
1771         FIF_BCN_PRBRESP_PROMISC |               \
1772         FIF_PROBE_REQ |                         \
1773         FIF_FCSFAIL)
1774
1775 /* FIXME: sc->sc_full_reset ? */
1776 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1777                                    unsigned int changed_flags,
1778                                    unsigned int *total_flags,
1779                                    u64 multicast)
1780 {
1781         struct ath_softc *sc = hw->priv;
1782         u32 rfilt;
1783
1784         changed_flags &= SUPPORTED_FILTERS;
1785         *total_flags &= SUPPORTED_FILTERS;
1786
1787         sc->rx.rxfilter = *total_flags;
1788         ath9k_ps_wakeup(sc);
1789         rfilt = ath_calcrxfilter(sc);
1790         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1791         ath9k_ps_restore(sc);
1792
1793         ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1794                 "Set HW RX filter: 0x%x\n", rfilt);
1795 }
1796
1797 static int ath9k_sta_add(struct ieee80211_hw *hw,
1798                          struct ieee80211_vif *vif,
1799                          struct ieee80211_sta *sta)
1800 {
1801         struct ath_softc *sc = hw->priv;
1802         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1803         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1804         struct ieee80211_key_conf ps_key = { };
1805
1806         ath_node_attach(sc, sta);
1807
1808         if (vif->type != NL80211_IFTYPE_AP &&
1809             vif->type != NL80211_IFTYPE_AP_VLAN)
1810                 return 0;
1811
1812         an->ps_key = ath_key_config(common, vif, sta, &ps_key);
1813
1814         return 0;
1815 }
1816
1817 static void ath9k_del_ps_key(struct ath_softc *sc,
1818                              struct ieee80211_vif *vif,
1819                              struct ieee80211_sta *sta)
1820 {
1821         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1822         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1823         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1824
1825         if (!an->ps_key)
1826             return;
1827
1828         ath_key_delete(common, &ps_key);
1829 }
1830
1831 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1832                             struct ieee80211_vif *vif,
1833                             struct ieee80211_sta *sta)
1834 {
1835         struct ath_softc *sc = hw->priv;
1836
1837         ath9k_del_ps_key(sc, vif, sta);
1838         ath_node_detach(sc, sta);
1839
1840         return 0;
1841 }
1842
1843 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1844                          struct ieee80211_vif *vif,
1845                          enum sta_notify_cmd cmd,
1846                          struct ieee80211_sta *sta)
1847 {
1848         struct ath_softc *sc = hw->priv;
1849         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1850
1851         switch (cmd) {
1852         case STA_NOTIFY_SLEEP:
1853                 an->sleeping = true;
1854                 if (ath_tx_aggr_sleep(sc, an))
1855                         ieee80211_sta_set_tim(sta);
1856                 break;
1857         case STA_NOTIFY_AWAKE:
1858                 an->sleeping = false;
1859                 ath_tx_aggr_wakeup(sc, an);
1860                 break;
1861         }
1862 }
1863
1864 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1865                          const struct ieee80211_tx_queue_params *params)
1866 {
1867         struct ath_softc *sc = hw->priv;
1868         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1869         struct ath_txq *txq;
1870         struct ath9k_tx_queue_info qi;
1871         int ret = 0;
1872
1873         if (queue >= WME_NUM_AC)
1874                 return 0;
1875
1876         txq = sc->tx.txq_map[queue];
1877
1878         ath9k_ps_wakeup(sc);
1879         mutex_lock(&sc->mutex);
1880
1881         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1882
1883         qi.tqi_aifs = params->aifs;
1884         qi.tqi_cwmin = params->cw_min;
1885         qi.tqi_cwmax = params->cw_max;
1886         qi.tqi_burstTime = params->txop;
1887
1888         ath_dbg(common, ATH_DBG_CONFIG,
1889                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1890                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1891                 params->cw_max, params->txop);
1892
1893         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1894         if (ret)
1895                 ath_err(common, "TXQ Update failed\n");
1896
1897         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1898                 if (queue == WME_AC_BE && !ret)
1899                         ath_beaconq_config(sc);
1900
1901         mutex_unlock(&sc->mutex);
1902         ath9k_ps_restore(sc);
1903
1904         return ret;
1905 }
1906
1907 static int ath9k_set_key(struct ieee80211_hw *hw,
1908                          enum set_key_cmd cmd,
1909                          struct ieee80211_vif *vif,
1910                          struct ieee80211_sta *sta,
1911                          struct ieee80211_key_conf *key)
1912 {
1913         struct ath_softc *sc = hw->priv;
1914         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1915         int ret = 0;
1916
1917         if (ath9k_modparam_nohwcrypt)
1918                 return -ENOSPC;
1919
1920         if (vif->type == NL80211_IFTYPE_ADHOC &&
1921             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1922              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1923             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1924                 /*
1925                  * For now, disable hw crypto for the RSN IBSS group keys. This
1926                  * could be optimized in the future to use a modified key cache
1927                  * design to support per-STA RX GTK, but until that gets
1928                  * implemented, use of software crypto for group addressed
1929                  * frames is a acceptable to allow RSN IBSS to be used.
1930                  */
1931                 return -EOPNOTSUPP;
1932         }
1933
1934         mutex_lock(&sc->mutex);
1935         ath9k_ps_wakeup(sc);
1936         ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
1937
1938         switch (cmd) {
1939         case SET_KEY:
1940                 if (sta)
1941                         ath9k_del_ps_key(sc, vif, sta);
1942
1943                 ret = ath_key_config(common, vif, sta, key);
1944                 if (ret >= 0) {
1945                         key->hw_key_idx = ret;
1946                         /* push IV and Michael MIC generation to stack */
1947                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1948                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1949                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1950                         if (sc->sc_ah->sw_mgmt_crypto &&
1951                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1952                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1953                         ret = 0;
1954                 }
1955                 break;
1956         case DISABLE_KEY:
1957                 ath_key_delete(common, key);
1958                 break;
1959         default:
1960                 ret = -EINVAL;
1961         }
1962
1963         ath9k_ps_restore(sc);
1964         mutex_unlock(&sc->mutex);
1965
1966         return ret;
1967 }
1968 static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1969 {
1970         struct ath_softc *sc = data;
1971         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1972         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
1973         struct ath_vif *avp = (void *)vif->drv_priv;
1974
1975         /*
1976          * Skip iteration if primary station vif's bss info
1977          * was not changed
1978          */
1979         if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
1980                 return;
1981
1982         if (bss_conf->assoc) {
1983                 sc->sc_flags |= SC_OP_PRIM_STA_VIF;
1984                 avp->primary_sta_vif = true;
1985                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1986                 common->curaid = bss_conf->aid;
1987                 ath9k_hw_write_associd(sc->sc_ah);
1988                 ath_dbg(common, ATH_DBG_CONFIG,
1989                                 "Bss Info ASSOC %d, bssid: %pM\n",
1990                                 bss_conf->aid, common->curbssid);
1991                 ath_beacon_config(sc, vif);
1992                 /*
1993                  * Request a re-configuration of Beacon related timers
1994                  * on the receipt of the first Beacon frame (i.e.,
1995                  * after time sync with the AP).
1996                  */
1997                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1998                 /* Reset rssi stats */
1999                 sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
2000                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2001
2002                 if (!common->disable_ani) {
2003                         sc->sc_flags |= SC_OP_ANI_RUN;
2004                         ath_start_ani(common);
2005                 }
2006
2007         }
2008 }
2009
2010 static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
2011 {
2012         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2013         struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
2014         struct ath_vif *avp = (void *)vif->drv_priv;
2015
2016         if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
2017                 return;
2018
2019         /* Reconfigure bss info */
2020         if (avp->primary_sta_vif && !bss_conf->assoc) {
2021                 ath_dbg(common, ATH_DBG_CONFIG,
2022                         "Bss Info DISASSOC %d, bssid %pM\n",
2023                         common->curaid, common->curbssid);
2024                 sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
2025                 avp->primary_sta_vif = false;
2026                 memset(common->curbssid, 0, ETH_ALEN);
2027                 common->curaid = 0;
2028         }
2029
2030         ieee80211_iterate_active_interfaces_atomic(
2031                         sc->hw, ath9k_bss_iter, sc);
2032
2033         /*
2034          * None of station vifs are associated.
2035          * Clear bssid & aid
2036          */
2037         if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
2038                 ath9k_hw_write_associd(sc->sc_ah);
2039                 /* Stop ANI */
2040                 sc->sc_flags &= ~SC_OP_ANI_RUN;
2041                 del_timer_sync(&common->ani.timer);
2042         }
2043 }
2044
2045 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2046                                    struct ieee80211_vif *vif,
2047                                    struct ieee80211_bss_conf *bss_conf,
2048                                    u32 changed)
2049 {
2050         struct ath_softc *sc = hw->priv;
2051         struct ath_hw *ah = sc->sc_ah;
2052         struct ath_common *common = ath9k_hw_common(ah);
2053         struct ath_vif *avp = (void *)vif->drv_priv;
2054         int slottime;
2055         int error;
2056
2057         ath9k_ps_wakeup(sc);
2058         mutex_lock(&sc->mutex);
2059
2060         if (changed & BSS_CHANGED_BSSID) {
2061                 ath9k_config_bss(sc, vif);
2062
2063                 ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
2064                         common->curbssid, common->curaid);
2065         }
2066
2067         if (changed & BSS_CHANGED_IBSS) {
2068                 /* There can be only one vif available */
2069                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2070                 common->curaid = bss_conf->aid;
2071                 ath9k_hw_write_associd(sc->sc_ah);
2072
2073                 if (bss_conf->ibss_joined) {
2074                         sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
2075
2076                         if (!common->disable_ani) {
2077                                 sc->sc_flags |= SC_OP_ANI_RUN;
2078                                 ath_start_ani(common);
2079                         }
2080
2081                 } else {
2082                         sc->sc_flags &= ~SC_OP_ANI_RUN;
2083                         del_timer_sync(&common->ani.timer);
2084                 }
2085         }
2086
2087         /* Enable transmission of beacons (AP, IBSS, MESH) */
2088         if ((changed & BSS_CHANGED_BEACON) ||
2089             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2090                 ath9k_set_beaconing_status(sc, false);
2091                 error = ath_beacon_alloc(sc, vif);
2092                 if (!error)
2093                         ath_beacon_config(sc, vif);
2094                 ath9k_set_beaconing_status(sc, true);
2095         }
2096
2097         if (changed & BSS_CHANGED_ERP_SLOT) {
2098                 if (bss_conf->use_short_slot)
2099                         slottime = 9;
2100                 else
2101                         slottime = 20;
2102                 if (vif->type == NL80211_IFTYPE_AP) {
2103                         /*
2104                          * Defer update, so that connected stations can adjust
2105                          * their settings at the same time.
2106                          * See beacon.c for more details
2107                          */
2108                         sc->beacon.slottime = slottime;
2109                         sc->beacon.updateslot = UPDATE;
2110                 } else {
2111                         ah->slottime = slottime;
2112                         ath9k_hw_init_global_settings(ah);
2113                 }
2114         }
2115
2116         /* Disable transmission of beacons */
2117         if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
2118             !bss_conf->enable_beacon) {
2119                 ath9k_set_beaconing_status(sc, false);
2120                 avp->is_bslot_active = false;
2121                 ath9k_set_beaconing_status(sc, true);
2122         }
2123
2124         if (changed & BSS_CHANGED_BEACON_INT) {
2125                 /*
2126                  * In case of AP mode, the HW TSF has to be reset
2127                  * when the beacon interval changes.
2128                  */
2129                 if (vif->type == NL80211_IFTYPE_AP) {
2130                         sc->sc_flags |= SC_OP_TSF_RESET;
2131                         ath9k_set_beaconing_status(sc, false);
2132                         error = ath_beacon_alloc(sc, vif);
2133                         if (!error)
2134                                 ath_beacon_config(sc, vif);
2135                         ath9k_set_beaconing_status(sc, true);
2136                 } else
2137                         ath_beacon_config(sc, vif);
2138         }
2139
2140         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2141                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2142                         bss_conf->use_short_preamble);
2143                 if (bss_conf->use_short_preamble)
2144                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2145                 else
2146                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
2147         }
2148
2149         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2150                 ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2151                         bss_conf->use_cts_prot);
2152                 if (bss_conf->use_cts_prot &&
2153                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2154                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
2155                 else
2156                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
2157         }
2158
2159         mutex_unlock(&sc->mutex);
2160         ath9k_ps_restore(sc);
2161 }
2162
2163 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
2164 {
2165         struct ath_softc *sc = hw->priv;
2166         u64 tsf;
2167
2168         mutex_lock(&sc->mutex);
2169         ath9k_ps_wakeup(sc);
2170         tsf = ath9k_hw_gettsf64(sc->sc_ah);
2171         ath9k_ps_restore(sc);
2172         mutex_unlock(&sc->mutex);
2173
2174         return tsf;
2175 }
2176
2177 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
2178 {
2179         struct ath_softc *sc = hw->priv;
2180
2181         mutex_lock(&sc->mutex);
2182         ath9k_ps_wakeup(sc);
2183         ath9k_hw_settsf64(sc->sc_ah, tsf);
2184         ath9k_ps_restore(sc);
2185         mutex_unlock(&sc->mutex);
2186 }
2187
2188 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2189 {
2190         struct ath_softc *sc = hw->priv;
2191
2192         mutex_lock(&sc->mutex);
2193
2194         ath9k_ps_wakeup(sc);
2195         ath9k_hw_reset_tsf(sc->sc_ah);
2196         ath9k_ps_restore(sc);
2197
2198         mutex_unlock(&sc->mutex);
2199 }
2200
2201 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2202                               struct ieee80211_vif *vif,
2203                               enum ieee80211_ampdu_mlme_action action,
2204                               struct ieee80211_sta *sta,
2205                               u16 tid, u16 *ssn, u8 buf_size)
2206 {
2207         struct ath_softc *sc = hw->priv;
2208         int ret = 0;
2209
2210         local_bh_disable();
2211
2212         switch (action) {
2213         case IEEE80211_AMPDU_RX_START:
2214                 if (!(sc->sc_flags & SC_OP_RXAGGR))
2215                         ret = -ENOTSUPP;
2216                 break;
2217         case IEEE80211_AMPDU_RX_STOP:
2218                 break;
2219         case IEEE80211_AMPDU_TX_START:
2220                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2221                         return -EOPNOTSUPP;
2222
2223                 ath9k_ps_wakeup(sc);
2224                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2225                 if (!ret)
2226                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2227                 ath9k_ps_restore(sc);
2228                 break;
2229         case IEEE80211_AMPDU_TX_STOP:
2230                 ath9k_ps_wakeup(sc);
2231                 ath_tx_aggr_stop(sc, sta, tid);
2232                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2233                 ath9k_ps_restore(sc);
2234                 break;
2235         case IEEE80211_AMPDU_TX_OPERATIONAL:
2236                 ath9k_ps_wakeup(sc);
2237                 ath_tx_aggr_resume(sc, sta, tid);
2238                 ath9k_ps_restore(sc);
2239                 break;
2240         default:
2241                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
2242         }
2243
2244         local_bh_enable();
2245
2246         return ret;
2247 }
2248
2249 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2250                              struct survey_info *survey)
2251 {
2252         struct ath_softc *sc = hw->priv;
2253         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2254         struct ieee80211_supported_band *sband;
2255         struct ieee80211_channel *chan;
2256         unsigned long flags;
2257         int pos;
2258
2259         spin_lock_irqsave(&common->cc_lock, flags);
2260         if (idx == 0)
2261                 ath_update_survey_stats(sc);
2262
2263         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2264         if (sband && idx >= sband->n_channels) {
2265                 idx -= sband->n_channels;
2266                 sband = NULL;
2267         }
2268
2269         if (!sband)
2270                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2271
2272         if (!sband || idx >= sband->n_channels) {
2273                 spin_unlock_irqrestore(&common->cc_lock, flags);
2274                 return -ENOENT;
2275         }
2276
2277         chan = &sband->channels[idx];
2278         pos = chan->hw_value;
2279         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2280         survey->channel = chan;
2281         spin_unlock_irqrestore(&common->cc_lock, flags);
2282
2283         return 0;
2284 }
2285
2286 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2287 {
2288         struct ath_softc *sc = hw->priv;
2289         struct ath_hw *ah = sc->sc_ah;
2290
2291         mutex_lock(&sc->mutex);
2292         ah->coverage_class = coverage_class;
2293
2294         ath9k_ps_wakeup(sc);
2295         ath9k_hw_init_global_settings(ah);
2296         ath9k_ps_restore(sc);
2297
2298         mutex_unlock(&sc->mutex);
2299 }
2300
2301 static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
2302 {
2303         struct ath_softc *sc = hw->priv;
2304         struct ath_hw *ah = sc->sc_ah;
2305         struct ath_common *common = ath9k_hw_common(ah);
2306         int timeout = 200; /* ms */
2307         int i, j;
2308         bool drain_txq;
2309
2310         mutex_lock(&sc->mutex);
2311         cancel_delayed_work_sync(&sc->tx_complete_work);
2312
2313         if (sc->sc_flags & SC_OP_INVALID) {
2314                 ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
2315                 mutex_unlock(&sc->mutex);
2316                 return;
2317         }
2318
2319         if (drop)
2320                 timeout = 1;
2321
2322         for (j = 0; j < timeout; j++) {
2323                 bool npend = false;
2324
2325                 if (j)
2326                         usleep_range(1000, 2000);
2327
2328                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2329                         if (!ATH_TXQ_SETUP(sc, i))
2330                                 continue;
2331
2332                         npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
2333
2334                         if (npend)
2335                                 break;
2336                 }
2337
2338                 if (!npend)
2339                     goto out;
2340         }
2341
2342         ath9k_ps_wakeup(sc);
2343         spin_lock_bh(&sc->sc_pcu_lock);
2344         drain_txq = ath_drain_all_txq(sc, false);
2345         if (!drain_txq)
2346                 ath_reset(sc, false);
2347         spin_unlock_bh(&sc->sc_pcu_lock);
2348         ath9k_ps_restore(sc);
2349         ieee80211_wake_queues(hw);
2350
2351 out:
2352         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2353         mutex_unlock(&sc->mutex);
2354 }
2355
2356 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2357 {
2358         struct ath_softc *sc = hw->priv;
2359         int i;
2360
2361         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2362                 if (!ATH_TXQ_SETUP(sc, i))
2363                         continue;
2364
2365                 if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
2366                         return true;
2367         }
2368         return false;
2369 }
2370
2371 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2372 {
2373         struct ath_softc *sc = hw->priv;
2374         struct ath_hw *ah = sc->sc_ah;
2375         struct ieee80211_vif *vif;
2376         struct ath_vif *avp;
2377         struct ath_buf *bf;
2378         struct ath_tx_status ts;
2379         int status;
2380
2381         vif = sc->beacon.bslot[0];
2382         if (!vif)
2383                 return 0;
2384
2385         avp = (void *)vif->drv_priv;
2386         if (!avp->is_bslot_active)
2387                 return 0;
2388
2389         if (!sc->beacon.tx_processed) {
2390                 tasklet_disable(&sc->bcon_tasklet);
2391
2392                 bf = avp->av_bcbuf;
2393                 if (!bf || !bf->bf_mpdu)
2394                         goto skip;
2395
2396                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2397                 if (status == -EINPROGRESS)
2398                         goto skip;
2399
2400                 sc->beacon.tx_processed = true;
2401                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2402
2403 skip:
2404                 tasklet_enable(&sc->bcon_tasklet);
2405         }
2406
2407         return sc->beacon.tx_last;
2408 }
2409
2410 static int ath9k_get_stats(struct ieee80211_hw *hw,
2411                            struct ieee80211_low_level_stats *stats)
2412 {
2413         struct ath_softc *sc = hw->priv;
2414         struct ath_hw *ah = sc->sc_ah;
2415         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2416
2417         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2418         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2419         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2420         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2421         return 0;
2422 }
2423
2424 struct ieee80211_ops ath9k_ops = {
2425         .tx                 = ath9k_tx,
2426         .start              = ath9k_start,
2427         .stop               = ath9k_stop,
2428         .add_interface      = ath9k_add_interface,
2429         .change_interface   = ath9k_change_interface,
2430         .remove_interface   = ath9k_remove_interface,
2431         .config             = ath9k_config,
2432         .configure_filter   = ath9k_configure_filter,
2433         .sta_add            = ath9k_sta_add,
2434         .sta_remove         = ath9k_sta_remove,
2435         .sta_notify         = ath9k_sta_notify,
2436         .conf_tx            = ath9k_conf_tx,
2437         .bss_info_changed   = ath9k_bss_info_changed,
2438         .set_key            = ath9k_set_key,
2439         .get_tsf            = ath9k_get_tsf,
2440         .set_tsf            = ath9k_set_tsf,
2441         .reset_tsf          = ath9k_reset_tsf,
2442         .ampdu_action       = ath9k_ampdu_action,
2443         .get_survey         = ath9k_get_survey,
2444         .rfkill_poll        = ath9k_rfkill_poll_state,
2445         .set_coverage_class = ath9k_set_coverage_class,
2446         .flush              = ath9k_flush,
2447         .tx_frames_pending  = ath9k_tx_frames_pending,
2448         .tx_last_beacon     = ath9k_tx_last_beacon,
2449         .get_stats          = ath9k_get_stats,
2450 };