drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_cache_conf_rate(struct ath_softc *sc,
  22                                 struct ieee80211_conf *conf)
  23 {
  24         switch (conf->channel->band) {
  25         case IEEE80211_BAND_2GHZ:
  26                 if (conf_is_ht20(conf))
  27                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  28                 else if (conf_is_ht40_minus(conf))
  29                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  30                 else if (conf_is_ht40_plus(conf))
  31                         sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  32                 else
  33                         sc->cur_rate_mode = ATH9K_MODE_11G;
  34                 break;
  35         case IEEE80211_BAND_5GHZ:
  36                 if (conf_is_ht20(conf))
  37                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  38                 else if (conf_is_ht40_minus(conf))
  39                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  40                 else if (conf_is_ht40_plus(conf))
  41                         sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  42                 else
  43                         sc->cur_rate_mode = ATH9K_MODE_11A;
  44                 break;
  45         default:
  46                 BUG_ON(1);
  47                 break;
  48         }
  49 }
  50
  51 static void ath_update_txpow(struct ath_softc *sc)
  52 {
  53         struct ath_hw *ah = sc->sc_ah;
  54
  55         if (sc->curtxpow != sc->config.txpowlimit) {
  56                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  57                 /* read back in case value is clamped */
  58                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  59         }
  60 }
  61
  62 static u8 parse_mpdudensity(u8 mpdudensity)
  63 {
  64         /*
  65          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  66          *   0 for no restriction
  67          *   1 for 1/4 us
  68          *   2 for 1/2 us
  69          *   3 for 1 us
  70          *   4 for 2 us
  71          *   5 for 4 us
  72          *   6 for 8 us
  73          *   7 for 16 us
  74          */
  75         switch (mpdudensity) {
  76         case 0:
  77                 return 0;
  78         case 1:
  79         case 2:
  80         case 3:
  81                 /* Our lower layer calculations limit our precision to
  82                    1 microsecond */
  83                 return 1;
  84         case 4:
  85                 return 2;
  86         case 5:
  87                 return 4;
  88         case 6:
  89                 return 8;
  90         case 7:
  91                 return 16;
  92         default:
  93                 return 0;
  94         }
  95 }
  96
  97 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  98                                                 struct ieee80211_hw *hw)
  99 {
 100         struct ieee80211_channel *curchan = hw->conf.channel;
 101         struct ath9k_channel *channel;
 102         u8 chan_idx;
 103
 104         chan_idx = curchan->hw_value;
 105         channel = &sc->sc_ah->channels[chan_idx];
 106         ath9k_update_ichannel(sc, hw, channel);
 107         return channel;
 108 }
 109
 110 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
 111 {
 112         unsigned long flags;
 113         bool ret;
 114
 115         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 116         ret = ath9k_hw_setpower(sc->sc_ah, mode);
 117         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 118
 119         return ret;
 120 }
 121
 122 void ath9k_ps_wakeup(struct ath_softc *sc)
 123 {
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (++sc->ps_usecount != 1)
 128                 goto unlock;
 129
 130         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 131
 132  unlock:
 133         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 134 }
 135
 136 void ath9k_ps_restore(struct ath_softc *sc)
 137 {
 138         unsigned long flags;
 139
 140         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 141         if (--sc->ps_usecount != 0)
 142                 goto unlock;
 143
 144         if (sc->ps_idle)
 145                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 146         else if (sc->ps_enabled &&
 147                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 148                               PS_WAIT_FOR_CAB |
 149                               PS_WAIT_FOR_PSPOLL_DATA |
 150                               PS_WAIT_FOR_TX_ACK)))
 151                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 152
 153  unlock:
 154         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 155 }
 156
 157 static void ath_start_ani(struct ath_common *common)
 158 {
 159         struct ath_hw *ah = common->ah;
 160         unsigned long timestamp = jiffies_to_msecs(jiffies);
 161         struct ath_softc *sc = (struct ath_softc *) common->priv;
 162
 163         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 164                 return;
 165
 166         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 167                 return;
 168
 169         common->ani.longcal_timer = timestamp;
 170         common->ani.shortcal_timer = timestamp;
 171         common->ani.checkani_timer = timestamp;
 172
 173         mod_timer(&common->ani.timer,
 174                   jiffies +
 175                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 176 }
 177
 178 /*
 179  * Set/change channels.  If the channel is really being changed, it's done
 180  * by reseting the chip.  To accomplish this we must first cleanup any pending
 181  * DMA, then restart stuff.
 182 */
 183 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 184                     struct ath9k_channel *hchan)
 185 {
 186         struct ath_hw *ah = sc->sc_ah;
 187         struct ath_common *common = ath9k_hw_common(ah);
 188         struct ieee80211_conf *conf = &common->hw->conf;
 189         bool fastcc = true, stopped;
 190         struct ieee80211_channel *channel = hw->conf.channel;
 191         int r;
 192
 193         if (sc->sc_flags & SC_OP_INVALID)
 194                 return -EIO;
 195
 196         del_timer_sync(&common->ani.timer);
 197         cancel_work_sync(&sc->paprd_work);
 198         cancel_work_sync(&sc->hw_check_work);
 199         cancel_delayed_work_sync(&sc->tx_complete_work);
 200
 201         ath9k_ps_wakeup(sc);
 202
 203         /*
 204          * This is only performed if the channel settings have
 205          * actually changed.
 206          *
 207          * To switch channels clear any pending DMA operations;
 208          * wait long enough for the RX fifo to drain, reset the
 209          * hardware at the new frequency, and then re-enable
 210          * the relevant bits of the h/w.
 211          */
 212         ath9k_hw_set_interrupts(ah, 0);
 213         ath_drain_all_txq(sc, false);
 214         stopped = ath_stoprecv(sc);
 215
 216         /* XXX: do not flush receive queue here. We don't want
 217          * to flush data frames already in queue because of
 218          * changing channel. */
 219
 220         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 221                 fastcc = false;
 222
 223         ath_print(common, ATH_DBG_CONFIG,
 224                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
 225                   sc->sc_ah->curchan->channel,
 226                   channel->center_freq, conf_is_ht40(conf));
 227
 228         spin_lock_bh(&sc->sc_resetlock);
 229
 230         r = ath9k_hw_reset(ah, hchan, fastcc);
 231         if (r) {
 232                 ath_print(common, ATH_DBG_FATAL,
 233                           "Unable to reset channel (%u MHz), "
 234                           "reset status %d\n",
 235                           channel->center_freq, r);
 236                 spin_unlock_bh(&sc->sc_resetlock);
 237                 goto ps_restore;
 238         }
 239         spin_unlock_bh(&sc->sc_resetlock);
 240
 241         if (ath_startrecv(sc) != 0) {
 242                 ath_print(common, ATH_DBG_FATAL,
 243                           "Unable to restart recv logic\n");
 244                 r = -EIO;
 245                 goto ps_restore;
 246         }
 247
 248         ath_cache_conf_rate(sc, &hw->conf);
 249         ath_update_txpow(sc);
 250         ath9k_hw_set_interrupts(ah, ah->imask);
 251
 252         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL | SC_OP_SCANNING))) {
 253                 ath_start_ani(common);
 254                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 255                 ath_beacon_config(sc, NULL);
 256         }
 257
 258  ps_restore:
 259         ath9k_ps_restore(sc);
 260         return r;
 261 }
 262
 263 static void ath_paprd_activate(struct ath_softc *sc)
 264 {
 265         struct ath_hw *ah = sc->sc_ah;
 266         int chain;
 267
 268         if (!ah->curchan->paprd_done)
 269                 return;
 270
 271         ath9k_ps_wakeup(sc);
 272         ar9003_paprd_enable(ah, false);
 273         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 274                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 275                         continue;
 276
 277                 ar9003_paprd_populate_single_table(ah, ah->curchan, chain);
 278         }
 279
 280         ar9003_paprd_enable(ah, true);
 281         ath9k_ps_restore(sc);
 282 }
 283
 284 void ath_paprd_calibrate(struct work_struct *work)
 285 {
 286         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 287         struct ieee80211_hw *hw = sc->hw;
 288         struct ath_hw *ah = sc->sc_ah;
 289         struct ieee80211_hdr *hdr;
 290         struct sk_buff *skb = NULL;
 291         struct ieee80211_tx_info *tx_info;
 292         int band = hw->conf.channel->band;
 293         struct ieee80211_supported_band *sband = &sc->sbands[band];
 294         struct ath_tx_control txctl;
 295         int qnum, ftype;
 296         int chain_ok = 0;
 297         int chain;
 298         int len = 1800;
 299         int time_left;
 300         int i;
 301
 302         skb = alloc_skb(len, GFP_KERNEL);
 303         if (!skb)
 304                 return;
 305
 306         tx_info = IEEE80211_SKB_CB(skb);
 307
 308         skb_put(skb, len);
 309         memset(skb->data, 0, len);
 310         hdr = (struct ieee80211_hdr *)skb->data;
 311         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 312         hdr->frame_control = cpu_to_le16(ftype);
 313         hdr->duration_id = cpu_to_le16(10);
 314         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 315         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 316         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 317
 318         memset(&txctl, 0, sizeof(txctl));
 319         qnum = sc->tx.hwq_map[WME_AC_BE];
 320         txctl.txq = &sc->tx.txq[qnum];
 321
 322         ath9k_ps_wakeup(sc);
 323         ar9003_paprd_init_table(ah);
 324         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 325                 if (!(ah->caps.tx_chainmask & BIT(chain)))
 326                         continue;
 327
 328                 chain_ok = 0;
 329                 memset(tx_info, 0, sizeof(*tx_info));
 330                 tx_info->band = band;
 331
 332                 for (i = 0; i < 4; i++) {
 333                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 334                         tx_info->control.rates[i].count = 6;
 335                 }
 336
 337                 init_completion(&sc->paprd_complete);
 338                 ar9003_paprd_setup_gain_table(ah, chain);
 339                 txctl.paprd = BIT(chain);
 340                 if (ath_tx_start(hw, skb, &txctl) != 0)
 341                         break;
 342
 343                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 344                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 345                 if (!time_left) {
 346                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 347                                   "Timeout waiting for paprd training on "
 348                                   "TX chain %d\n",
 349                                   chain);
 350                         goto fail_paprd;
 351                 }
 352
 353                 if (!ar9003_paprd_is_done(ah))
 354                         break;
 355
 356                 if (ar9003_paprd_create_curve(ah, ah->curchan, chain) != 0)
 357                         break;
 358
 359                 chain_ok = 1;
 360         }
 361         kfree_skb(skb);
 362
 363         if (chain_ok) {
 364                 ah->curchan->paprd_done = true;
 365                 ath_paprd_activate(sc);
 366         }
 367
 368 fail_paprd:
 369         ath9k_ps_restore(sc);
 370 }
 371
 372 /*
 373  *  This routine performs the periodic noise floor calibration function
 374  *  that is used to adjust and optimize the chip performance.  This
 375  *  takes environmental changes (location, temperature) into account.
 376  *  When the task is complete, it reschedules itself depending on the
 377  *  appropriate interval that was calculated.
 378  */
 379 void ath_ani_calibrate(unsigned long data)
 380 {
 381         struct ath_softc *sc = (struct ath_softc *)data;
 382         struct ath_hw *ah = sc->sc_ah;
 383         struct ath_common *common = ath9k_hw_common(ah);
 384         bool longcal = false;
 385         bool shortcal = false;
 386         bool aniflag = false;
 387         unsigned int timestamp = jiffies_to_msecs(jiffies);
 388         u32 cal_interval, short_cal_interval;
 389
 390         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 391                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 392
 393         /* Only calibrate if awake */
 394         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 395                 goto set_timer;
 396
 397         ath9k_ps_wakeup(sc);
 398
 399         /* Long calibration runs independently of short calibration. */
 400         if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
 401                 longcal = true;
 402                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 403                 common->ani.longcal_timer = timestamp;
 404         }
 405
 406         /* Short calibration applies only while caldone is false */
 407         if (!common->ani.caldone) {
 408                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 409                         shortcal = true;
 410                         ath_print(common, ATH_DBG_ANI,
 411                                   "shortcal @%lu\n", jiffies);
 412                         common->ani.shortcal_timer = timestamp;
 413                         common->ani.resetcal_timer = timestamp;
 414                 }
 415         } else {
 416                 if ((timestamp - common->ani.resetcal_timer) >=
 417                     ATH_RESTART_CALINTERVAL) {
 418                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 419                         if (common->ani.caldone)
 420                                 common->ani.resetcal_timer = timestamp;
 421                 }
 422         }
 423
 424         /* Verify whether we must check ANI */
 425         if ((timestamp - common->ani.checkani_timer) >=
 426              ah->config.ani_poll_interval) {
 427                 aniflag = true;
 428                 common->ani.checkani_timer = timestamp;
 429         }
 430
 431         /* Skip all processing if there's nothing to do. */
 432         if (longcal || shortcal || aniflag) {
 433                 /* Call ANI routine if necessary */
 434                 if (aniflag)
 435                         ath9k_hw_ani_monitor(ah, ah->curchan);
 436
 437                 /* Perform calibration if necessary */
 438                 if (longcal || shortcal) {
 439                         common->ani.caldone =
 440                                 ath9k_hw_calibrate(ah,
 441                                                    ah->curchan,
 442                                                    common->rx_chainmask,
 443                                                    longcal);
 444
 445                         if (longcal)
 446                                 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
 447                                                                      ah->curchan);
 448
 449                         ath_print(common, ATH_DBG_ANI,
 450                                   " calibrate chan %u/%x nf: %d\n",
 451                                   ah->curchan->channel,
 452                                   ah->curchan->channelFlags,
 453                                   common->ani.noise_floor);
 454                 }
 455         }
 456
 457         ath9k_ps_restore(sc);
 458
 459 set_timer:
 460         /*
 461         * Set timer interval based on previous results.
 462         * The interval must be the shortest necessary to satisfy ANI,
 463         * short calibration and long calibration.
 464         */
 465         cal_interval = ATH_LONG_CALINTERVAL;
 466         if (sc->sc_ah->config.enable_ani)
 467                 cal_interval = min(cal_interval,
 468                                    (u32)ah->config.ani_poll_interval);
 469         if (!common->ani.caldone)
 470                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 471
 472         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 473         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) {
 474                 if (!sc->sc_ah->curchan->paprd_done)
 475                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 476                 else
 477                         ath_paprd_activate(sc);
 478         }
 479 }
 480
 481 /*
 482  * Update tx/rx chainmask. For legacy association,
 483  * hard code chainmask to 1x1, for 11n association, use
 484  * the chainmask configuration, for bt coexistence, use
 485  * the chainmask configuration even in legacy mode.
 486  */
 487 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 488 {
 489         struct ath_hw *ah = sc->sc_ah;
 490         struct ath_common *common = ath9k_hw_common(ah);
 491
 492         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 493             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 494                 common->tx_chainmask = ah->caps.tx_chainmask;
 495                 common->rx_chainmask = ah->caps.rx_chainmask;
 496         } else {
 497                 common->tx_chainmask = 1;
 498                 common->rx_chainmask = 1;
 499         }
 500
 501         ath_print(common, ATH_DBG_CONFIG,
 502                   "tx chmask: %d, rx chmask: %d\n",
 503                   common->tx_chainmask,
 504                   common->rx_chainmask);
 505 }
 506
 507 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 508 {
 509         struct ath_node *an;
 510
 511         an = (struct ath_node *)sta->drv_priv;
 512
 513         if (sc->sc_flags & SC_OP_TXAGGR) {
 514                 ath_tx_node_init(sc, an);
 515                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 516                                      sta->ht_cap.ampdu_factor);
 517                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 518                 an->last_rssi = ATH_RSSI_DUMMY_MARKER;
 519         }
 520 }
 521
 522 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 523 {
 524         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 525
 526         if (sc->sc_flags & SC_OP_TXAGGR)
 527                 ath_tx_node_cleanup(sc, an);
 528 }
 529
 530 void ath_hw_check(struct work_struct *work)
 531 {
 532         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 533         int i;
 534
 535         ath9k_ps_wakeup(sc);
 536
 537         for (i = 0; i < 3; i++) {
 538                 if (ath9k_hw_check_alive(sc->sc_ah))
 539                         goto out;
 540
 541                 msleep(1);
 542         }
 543         ath_reset(sc, false);
 544
 545 out:
 546         ath9k_ps_restore(sc);
 547 }
 548
 549 void ath9k_tasklet(unsigned long data)
 550 {
 551         struct ath_softc *sc = (struct ath_softc *)data;
 552         struct ath_hw *ah = sc->sc_ah;
 553         struct ath_common *common = ath9k_hw_common(ah);
 554
 555         u32 status = sc->intrstatus;
 556         u32 rxmask;
 557
 558         ath9k_ps_wakeup(sc);
 559
 560         if (status & ATH9K_INT_FATAL) {
 561                 ath_reset(sc, false);
 562                 ath9k_ps_restore(sc);
 563                 return;
 564         }
 565
 566         if (!ath9k_hw_check_alive(ah))
 567                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 568
 569         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 570                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 571                           ATH9K_INT_RXORN);
 572         else
 573                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 574
 575         if (status & rxmask) {
 576                 spin_lock_bh(&sc->rx.rxflushlock);
 577
 578                 /* Check for high priority Rx first */
 579                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 580                     (status & ATH9K_INT_RXHP))
 581                         ath_rx_tasklet(sc, 0, true);
 582
 583                 ath_rx_tasklet(sc, 0, false);
 584                 spin_unlock_bh(&sc->rx.rxflushlock);
 585         }
 586
 587         if (status & ATH9K_INT_TX) {
 588                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 589                         ath_tx_edma_tasklet(sc);
 590                 else
 591                         ath_tx_tasklet(sc);
 592         }
 593
 594         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 595                 /*
 596                  * TSF sync does not look correct; remain awake to sync with
 597                  * the next Beacon.
 598                  */
 599                 ath_print(common, ATH_DBG_PS,
 600                           "TSFOOR - Sync with next Beacon\n");
 601                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 602         }
 603
 604         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 605                 if (status & ATH9K_INT_GENTIMER)
 606                         ath_gen_timer_isr(sc->sc_ah);
 607
 608         /* re-enable hardware interrupt */
 609         ath9k_hw_set_interrupts(ah, ah->imask);
 610         ath9k_ps_restore(sc);
 611 }
 612
 613 irqreturn_t ath_isr(int irq, void *dev)
 614 {
 615 #define SCHED_INTR (                            \
 616                 ATH9K_INT_FATAL |               \
 617                 ATH9K_INT_RXORN |               \
 618                 ATH9K_INT_RXEOL |               \
 619                 ATH9K_INT_RX |                  \
 620                 ATH9K_INT_RXLP |                \
 621                 ATH9K_INT_RXHP |                \
 622                 ATH9K_INT_TX |                  \
 623                 ATH9K_INT_BMISS |               \
 624                 ATH9K_INT_CST |                 \
 625                 ATH9K_INT_TSFOOR |              \
 626                 ATH9K_INT_GENTIMER)
 627
 628         struct ath_softc *sc = dev;
 629         struct ath_hw *ah = sc->sc_ah;
 630         enum ath9k_int status;
 631         bool sched = false;
 632
 633         /*
 634          * The hardware is not ready/present, don't
 635          * touch anything. Note this can happen early
 636          * on if the IRQ is shared.
 637          */
 638         if (sc->sc_flags & SC_OP_INVALID)
 639                 return IRQ_NONE;
 640
 641
 642         /* shared irq, not for us */
 643
 644         if (!ath9k_hw_intrpend(ah))
 645                 return IRQ_NONE;
 646
 647         /*
 648          * Figure out the reason(s) for the interrupt.  Note
 649          * that the hal returns a pseudo-ISR that may include
 650          * bits we haven't explicitly enabled so we mask the
 651          * value to insure we only process bits we requested.
 652          */
 653         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 654         status &= ah->imask;    /* discard unasked-for bits */
 655
 656         /*
 657          * If there are no status bits set, then this interrupt was not
 658          * for me (should have been caught above).
 659          */
 660         if (!status)
 661                 return IRQ_NONE;
 662
 663         /* Cache the status */
 664         sc->intrstatus = status;
 665
 666         if (status & SCHED_INTR)
 667                 sched = true;
 668
 669         /*
 670          * If a FATAL or RXORN interrupt is received, we have to reset the
 671          * chip immediately.
 672          */
 673         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 674             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 675                 goto chip_reset;
 676
 677         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 678             (status & ATH9K_INT_BB_WATCHDOG)) {
 679                 ar9003_hw_bb_watchdog_dbg_info(ah);
 680                 goto chip_reset;
 681         }
 682
 683         if (status & ATH9K_INT_SWBA)
 684                 tasklet_schedule(&sc->bcon_tasklet);
 685
 686         if (status & ATH9K_INT_TXURN)
 687                 ath9k_hw_updatetxtriglevel(ah, true);
 688
 689         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 690                 if (status & ATH9K_INT_RXEOL) {
 691                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 692                         ath9k_hw_set_interrupts(ah, ah->imask);
 693                 }
 694         }
 695
 696         if (status & ATH9K_INT_MIB) {
 697                 /*
 698                  * Disable interrupts until we service the MIB
 699                  * interrupt; otherwise it will continue to
 700                  * fire.
 701                  */
 702                 ath9k_hw_set_interrupts(ah, 0);
 703                 /*
 704                  * Let the hal handle the event. We assume
 705                  * it will clear whatever condition caused
 706                  * the interrupt.
 707                  */
 708                 ath9k_hw_procmibevent(ah);
 709                 ath9k_hw_set_interrupts(ah, ah->imask);
 710         }
 711
 712         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 713                 if (status & ATH9K_INT_TIM_TIMER) {
 714                         /* Clear RxAbort bit so that we can
 715                          * receive frames */
 716                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 717                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 718                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 719                 }
 720
 721 chip_reset:
 722
 723         ath_debug_stat_interrupt(sc, status);
 724
 725         if (sched) {
 726                 /* turn off every interrupt except SWBA */
 727                 ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
 728                 tasklet_schedule(&sc->intr_tq);
 729         }
 730
 731         return IRQ_HANDLED;
 732
 733 #undef SCHED_INTR
 734 }
 735
 736 static u32 ath_get_extchanmode(struct ath_softc *sc,
 737                                struct ieee80211_channel *chan,
 738                                enum nl80211_channel_type channel_type)
 739 {
 740         u32 chanmode = 0;
 741
 742         switch (chan->band) {
 743         case IEEE80211_BAND_2GHZ:
 744                 switch(channel_type) {
 745                 case NL80211_CHAN_NO_HT:
 746                 case NL80211_CHAN_HT20:
 747                         chanmode = CHANNEL_G_HT20;
 748                         break;
 749                 case NL80211_CHAN_HT40PLUS:
 750                         chanmode = CHANNEL_G_HT40PLUS;
 751                         break;
 752                 case NL80211_CHAN_HT40MINUS:
 753                         chanmode = CHANNEL_G_HT40MINUS;
 754                         break;
 755                 }
 756                 break;
 757         case IEEE80211_BAND_5GHZ:
 758                 switch(channel_type) {
 759                 case NL80211_CHAN_NO_HT:
 760                 case NL80211_CHAN_HT20:
 761                         chanmode = CHANNEL_A_HT20;
 762                         break;
 763                 case NL80211_CHAN_HT40PLUS:
 764                         chanmode = CHANNEL_A_HT40PLUS;
 765                         break;
 766                 case NL80211_CHAN_HT40MINUS:
 767                         chanmode = CHANNEL_A_HT40MINUS;
 768                         break;
 769                 }
 770                 break;
 771         default:
 772                 break;
 773         }
 774
 775         return chanmode;
 776 }
 777
 778 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 779                                  struct ieee80211_vif *vif,
 780                                  struct ieee80211_bss_conf *bss_conf)
 781 {
 782         struct ath_hw *ah = sc->sc_ah;
 783         struct ath_common *common = ath9k_hw_common(ah);
 784
 785         if (bss_conf->assoc) {
 786                 ath_print(common, ATH_DBG_CONFIG,
 787                           "Bss Info ASSOC %d, bssid: %pM\n",
 788                            bss_conf->aid, common->curbssid);
 789
 790                 /* New association, store aid */
 791                 common->curaid = bss_conf->aid;
 792                 ath9k_hw_write_associd(ah);
 793
 794                 /*
 795                  * Request a re-configuration of Beacon related timers
 796                  * on the receipt of the first Beacon frame (i.e.,
 797                  * after time sync with the AP).
 798                  */
 799                 sc->ps_flags |= PS_BEACON_SYNC;
 800
 801                 /* Configure the beacon */
 802                 ath_beacon_config(sc, vif);
 803
 804                 /* Reset rssi stats */
 805                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 806
 807                 sc->sc_flags |= SC_OP_ANI_RUN;
 808                 ath_start_ani(common);
 809         } else {
 810                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 811                 common->curaid = 0;
 812                 /* Stop ANI */
 813                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 814                 del_timer_sync(&common->ani.timer);
 815         }
 816 }
 817
 818 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 819 {
 820         struct ath_hw *ah = sc->sc_ah;
 821         struct ath_common *common = ath9k_hw_common(ah);
 822         struct ieee80211_channel *channel = hw->conf.channel;
 823         int r;
 824
 825         ath9k_ps_wakeup(sc);
 826         ath9k_hw_configpcipowersave(ah, 0, 0);
 827
 828         if (!ah->curchan)
 829                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 830
 831         spin_lock_bh(&sc->sc_resetlock);
 832         r = ath9k_hw_reset(ah, ah->curchan, false);
 833         if (r) {
 834                 ath_print(common, ATH_DBG_FATAL,
 835                           "Unable to reset channel (%u MHz), "
 836                           "reset status %d\n",
 837                           channel->center_freq, r);
 838         }
 839         spin_unlock_bh(&sc->sc_resetlock);
 840
 841         ath_update_txpow(sc);
 842         if (ath_startrecv(sc) != 0) {
 843                 ath_print(common, ATH_DBG_FATAL,
 844                           "Unable to restart recv logic\n");
 845                 return;
 846         }
 847
 848         if (sc->sc_flags & SC_OP_BEACONS)
 849                 ath_beacon_config(sc, NULL);    /* restart beacons */
 850
 851         /* Re-Enable  interrupts */
 852         ath9k_hw_set_interrupts(ah, ah->imask);
 853
 854         /* Enable LED */
 855         ath9k_hw_cfg_output(ah, ah->led_pin,
 856                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 857         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 858
 859         ieee80211_wake_queues(hw);
 860         ath9k_ps_restore(sc);
 861 }
 862
 863 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 864 {
 865         struct ath_hw *ah = sc->sc_ah;
 866         struct ieee80211_channel *channel = hw->conf.channel;
 867         int r;
 868
 869         ath9k_ps_wakeup(sc);
 870         ieee80211_stop_queues(hw);
 871
 872         /*
 873          * Keep the LED on when the radio is disabled
 874          * during idle unassociated state.
 875          */
 876         if (!sc->ps_idle) {
 877                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 878                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 879         }
 880
 881         /* Disable interrupts */
 882         ath9k_hw_set_interrupts(ah, 0);
 883
 884         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 885         ath_stoprecv(sc);               /* turn off frame recv */
 886         ath_flushrecv(sc);              /* flush recv queue */
 887
 888         if (!ah->curchan)
 889                 ah->curchan = ath_get_curchannel(sc, hw);
 890
 891         spin_lock_bh(&sc->sc_resetlock);
 892         r = ath9k_hw_reset(ah, ah->curchan, false);
 893         if (r) {
 894                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 895                           "Unable to reset channel (%u MHz), "
 896                           "reset status %d\n",
 897                           channel->center_freq, r);
 898         }
 899         spin_unlock_bh(&sc->sc_resetlock);
 900
 901         ath9k_hw_phy_disable(ah);
 902         ath9k_hw_configpcipowersave(ah, 1, 1);
 903         ath9k_ps_restore(sc);
 904         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 905 }
 906
 907 int ath_reset(struct ath_softc *sc, bool retry_tx)
 908 {
 909         struct ath_hw *ah = sc->sc_ah;
 910         struct ath_common *common = ath9k_hw_common(ah);
 911         struct ieee80211_hw *hw = sc->hw;
 912         int r;
 913
 914         /* Stop ANI */
 915         del_timer_sync(&common->ani.timer);
 916
 917         ieee80211_stop_queues(hw);
 918
 919         ath9k_hw_set_interrupts(ah, 0);
 920         ath_drain_all_txq(sc, retry_tx);
 921         ath_stoprecv(sc);
 922         ath_flushrecv(sc);
 923
 924         spin_lock_bh(&sc->sc_resetlock);
 925         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
 926         if (r)
 927                 ath_print(common, ATH_DBG_FATAL,
 928                           "Unable to reset hardware; reset status %d\n", r);
 929         spin_unlock_bh(&sc->sc_resetlock);
 930
 931         if (ath_startrecv(sc) != 0)
 932                 ath_print(common, ATH_DBG_FATAL,
 933                           "Unable to start recv logic\n");
 934
 935         /*
 936          * We may be doing a reset in response to a request
 937          * that changes the channel so update any state that
 938          * might change as a result.
 939          */
 940         ath_cache_conf_rate(sc, &hw->conf);
 941
 942         ath_update_txpow(sc);
 943
 944         if (sc->sc_flags & SC_OP_BEACONS)
 945                 ath_beacon_config(sc, NULL);    /* restart beacons */
 946
 947         ath9k_hw_set_interrupts(ah, ah->imask);
 948
 949         if (retry_tx) {
 950                 int i;
 951                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
 952                         if (ATH_TXQ_SETUP(sc, i)) {
 953                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
 954                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
 955                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
 956                         }
 957                 }
 958         }
 959
 960         ieee80211_wake_queues(hw);
 961
 962         /* Start ANI */
 963         ath_start_ani(common);
 964
 965         return r;
 966 }
 967
 968 static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
 969 {
 970         int qnum;
 971
 972         switch (queue) {
 973         case 0:
 974                 qnum = sc->tx.hwq_map[WME_AC_VO];
 975                 break;
 976         case 1:
 977                 qnum = sc->tx.hwq_map[WME_AC_VI];
 978                 break;
 979         case 2:
 980                 qnum = sc->tx.hwq_map[WME_AC_BE];
 981                 break;
 982         case 3:
 983                 qnum = sc->tx.hwq_map[WME_AC_BK];
 984                 break;
 985         default:
 986                 qnum = sc->tx.hwq_map[WME_AC_BE];
 987                 break;
 988         }
 989
 990         return qnum;
 991 }
 992
 993 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
 994 {
 995         int qnum;
 996
 997         switch (queue) {
 998         case WME_AC_VO:
 999                 qnum = 0;
1000                 break;
1001         case WME_AC_VI:
1002                 qnum = 1;
1003                 break;
1004         case WME_AC_BE:
1005                 qnum = 2;
1006                 break;
1007         case WME_AC_BK:
1008                 qnum = 3;
1009                 break;
1010         default:
1011                 qnum = -1;
1012                 break;
1013         }
1014
1015         return qnum;
1016 }
1017
1018 /* XXX: Remove me once we don't depend on ath9k_channel for all
1019  * this redundant data */
1020 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1021                            struct ath9k_channel *ichan)
1022 {
1023         struct ieee80211_channel *chan = hw->conf.channel;
1024         struct ieee80211_conf *conf = &hw->conf;
1025
1026         ichan->channel = chan->center_freq;
1027         ichan->chan = chan;
1028
1029         if (chan->band == IEEE80211_BAND_2GHZ) {
1030                 ichan->chanmode = CHANNEL_G;
1031                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1032         } else {
1033                 ichan->chanmode = CHANNEL_A;
1034                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1035         }
1036
1037         if (conf_is_ht(conf))
1038                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1039                                             conf->channel_type);
1040 }
1041
1042 /**********************/
1043 /* mac80211 callbacks */
1044 /**********************/
1045
1046 static int ath9k_start(struct ieee80211_hw *hw)
1047 {
1048         struct ath_wiphy *aphy = hw->priv;
1049         struct ath_softc *sc = aphy->sc;
1050         struct ath_hw *ah = sc->sc_ah;
1051         struct ath_common *common = ath9k_hw_common(ah);
1052         struct ieee80211_channel *curchan = hw->conf.channel;
1053         struct ath9k_channel *init_channel;
1054         int r;
1055
1056         ath_print(common, ATH_DBG_CONFIG,
1057                   "Starting driver with initial channel: %d MHz\n",
1058                   curchan->center_freq);
1059
1060         mutex_lock(&sc->mutex);
1061
1062         if (ath9k_wiphy_started(sc)) {
1063                 if (sc->chan_idx == curchan->hw_value) {
1064                         /*
1065                          * Already on the operational channel, the new wiphy
1066                          * can be marked active.
1067                          */
1068                         aphy->state = ATH_WIPHY_ACTIVE;
1069                         ieee80211_wake_queues(hw);
1070                 } else {
1071                         /*
1072                          * Another wiphy is on another channel, start the new
1073                          * wiphy in paused state.
1074                          */
1075                         aphy->state = ATH_WIPHY_PAUSED;
1076                         ieee80211_stop_queues(hw);
1077                 }
1078                 mutex_unlock(&sc->mutex);
1079                 return 0;
1080         }
1081         aphy->state = ATH_WIPHY_ACTIVE;
1082
1083         /* setup initial channel */
1084
1085         sc->chan_idx = curchan->hw_value;
1086
1087         init_channel = ath_get_curchannel(sc, hw);
1088
1089         /* Reset SERDES registers */
1090         ath9k_hw_configpcipowersave(ah, 0, 0);
1091
1092         /*
1093          * The basic interface to setting the hardware in a good
1094          * state is ``reset''.  On return the hardware is known to
1095          * be powered up and with interrupts disabled.  This must
1096          * be followed by initialization of the appropriate bits
1097          * and then setup of the interrupt mask.
1098          */
1099         spin_lock_bh(&sc->sc_resetlock);
1100         r = ath9k_hw_reset(ah, init_channel, false);
1101         if (r) {
1102                 ath_print(common, ATH_DBG_FATAL,
1103                           "Unable to reset hardware; reset status %d "
1104                           "(freq %u MHz)\n", r,
1105                           curchan->center_freq);
1106                 spin_unlock_bh(&sc->sc_resetlock);
1107                 goto mutex_unlock;
1108         }
1109         spin_unlock_bh(&sc->sc_resetlock);
1110
1111         /*
1112          * This is needed only to setup initial state
1113          * but it's best done after a reset.
1114          */
1115         ath_update_txpow(sc);
1116
1117         /*
1118          * Setup the hardware after reset:
1119          * The receive engine is set going.
1120          * Frame transmit is handled entirely
1121          * in the frame output path; there's nothing to do
1122          * here except setup the interrupt mask.
1123          */
1124         if (ath_startrecv(sc) != 0) {
1125                 ath_print(common, ATH_DBG_FATAL,
1126                           "Unable to start recv logic\n");
1127                 r = -EIO;
1128                 goto mutex_unlock;
1129         }
1130
1131         /* Setup our intr mask. */
1132         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1133                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1134                     ATH9K_INT_GLOBAL;
1135
1136         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1137                 ah->imask |= ATH9K_INT_RXHP |
1138                              ATH9K_INT_RXLP |
1139                              ATH9K_INT_BB_WATCHDOG;
1140         else
1141                 ah->imask |= ATH9K_INT_RX;
1142
1143         if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1144                 ah->imask |= ATH9K_INT_GTT;
1145
1146         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1147                 ah->imask |= ATH9K_INT_CST;
1148
1149         ath_cache_conf_rate(sc, &hw->conf);
1150
1151         sc->sc_flags &= ~SC_OP_INVALID;
1152
1153         /* Disable BMISS interrupt when we're not associated */
1154         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1155         ath9k_hw_set_interrupts(ah, ah->imask);
1156
1157         ieee80211_wake_queues(hw);
1158
1159         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1160
1161         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1162             !ah->btcoex_hw.enabled) {
1163                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1164                                            AR_STOMP_LOW_WLAN_WGHT);
1165                 ath9k_hw_btcoex_enable(ah);
1166
1167                 if (common->bus_ops->bt_coex_prep)
1168                         common->bus_ops->bt_coex_prep(common);
1169                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1170                         ath9k_btcoex_timer_resume(sc);
1171         }
1172
1173 mutex_unlock:
1174         mutex_unlock(&sc->mutex);
1175
1176         return r;
1177 }
1178
1179 static int ath9k_tx(struct ieee80211_hw *hw,
1180                     struct sk_buff *skb)
1181 {
1182         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1183         struct ath_wiphy *aphy = hw->priv;
1184         struct ath_softc *sc = aphy->sc;
1185         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1186         struct ath_tx_control txctl;
1187         int padpos, padsize;
1188         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1189         int qnum;
1190
1191         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1192                 ath_print(common, ATH_DBG_XMIT,
1193                           "ath9k: %s: TX in unexpected wiphy state "
1194                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1195                 goto exit;
1196         }
1197
1198         if (sc->ps_enabled) {
1199                 /*
1200                  * mac80211 does not set PM field for normal data frames, so we
1201                  * need to update that based on the current PS mode.
1202                  */
1203                 if (ieee80211_is_data(hdr->frame_control) &&
1204                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1205                     !ieee80211_has_pm(hdr->frame_control)) {
1206                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1207                                   "while in PS mode\n");
1208                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1209                 }
1210         }
1211
1212         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1213                 /*
1214                  * We are using PS-Poll and mac80211 can request TX while in
1215                  * power save mode. Need to wake up hardware for the TX to be
1216                  * completed and if needed, also for RX of buffered frames.
1217                  */
1218                 ath9k_ps_wakeup(sc);
1219                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1220                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1221                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1222                         ath_print(common, ATH_DBG_PS,
1223                                   "Sending PS-Poll to pick a buffered frame\n");
1224                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1225                 } else {
1226                         ath_print(common, ATH_DBG_PS,
1227                                   "Wake up to complete TX\n");
1228                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1229                 }
1230                 /*
1231                  * The actual restore operation will happen only after
1232                  * the sc_flags bit is cleared. We are just dropping
1233                  * the ps_usecount here.
1234                  */
1235                 ath9k_ps_restore(sc);
1236         }
1237
1238         memset(&txctl, 0, sizeof(struct ath_tx_control));
1239
1240         /*
1241          * As a temporary workaround, assign seq# here; this will likely need
1242          * to be cleaned up to work better with Beacon transmission and virtual
1243          * BSSes.
1244          */
1245         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1246                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1247                         sc->tx.seq_no += 0x10;
1248                 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1249                 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1250         }
1251
1252         /* Add the padding after the header if this is not already done */
1253         padpos = ath9k_cmn_padpos(hdr->frame_control);
1254         padsize = padpos & 3;
1255         if (padsize && skb->len>padpos) {
1256                 if (skb_headroom(skb) < padsize)
1257                         return -1;
1258                 skb_push(skb, padsize);
1259                 memmove(skb->data, skb->data + padsize, padpos);
1260         }
1261
1262         qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
1263         txctl.txq = &sc->tx.txq[qnum];
1264
1265         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1266
1267         if (ath_tx_start(hw, skb, &txctl) != 0) {
1268                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1269                 goto exit;
1270         }
1271
1272         return 0;
1273 exit:
1274         dev_kfree_skb_any(skb);
1275         return 0;
1276 }
1277
1278 static void ath9k_stop(struct ieee80211_hw *hw)
1279 {
1280         struct ath_wiphy *aphy = hw->priv;
1281         struct ath_softc *sc = aphy->sc;
1282         struct ath_hw *ah = sc->sc_ah;
1283         struct ath_common *common = ath9k_hw_common(ah);
1284         int i;
1285
1286         mutex_lock(&sc->mutex);
1287
1288         aphy->state = ATH_WIPHY_INACTIVE;
1289
1290         if (led_blink)
1291                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1292
1293         cancel_delayed_work_sync(&sc->tx_complete_work);
1294         cancel_work_sync(&sc->paprd_work);
1295         cancel_work_sync(&sc->hw_check_work);
1296
1297         for (i = 0; i < sc->num_sec_wiphy; i++) {
1298                 if (sc->sec_wiphy[i])
1299                         break;
1300         }
1301
1302         if (i == sc->num_sec_wiphy) {
1303                 cancel_delayed_work_sync(&sc->wiphy_work);
1304                 cancel_work_sync(&sc->chan_work);
1305         }
1306
1307         if (sc->sc_flags & SC_OP_INVALID) {
1308                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1309                 mutex_unlock(&sc->mutex);
1310                 return;
1311         }
1312
1313         if (ath9k_wiphy_started(sc)) {
1314                 mutex_unlock(&sc->mutex);
1315                 return; /* another wiphy still in use */
1316         }
1317
1318         /* Ensure HW is awake when we try to shut it down. */
1319         ath9k_ps_wakeup(sc);
1320
1321         if (ah->btcoex_hw.enabled) {
1322                 ath9k_hw_btcoex_disable(ah);
1323                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1324                         ath9k_btcoex_timer_pause(sc);
1325         }
1326
1327         /* make sure h/w will not generate any interrupt
1328          * before setting the invalid flag. */
1329         ath9k_hw_set_interrupts(ah, 0);
1330
1331         if (!(sc->sc_flags & SC_OP_INVALID)) {
1332                 ath_drain_all_txq(sc, false);
1333                 ath_stoprecv(sc);
1334                 ath9k_hw_phy_disable(ah);
1335         } else
1336                 sc->rx.rxlink = NULL;
1337
1338         /* disable HAL and put h/w to sleep */
1339         ath9k_hw_disable(ah);
1340         ath9k_hw_configpcipowersave(ah, 1, 1);
1341         ath9k_ps_restore(sc);
1342
1343         /* Finally, put the chip in FULL SLEEP mode */
1344         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1345
1346         sc->sc_flags |= SC_OP_INVALID;
1347
1348         mutex_unlock(&sc->mutex);
1349
1350         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1351 }
1352
1353 static int ath9k_add_interface(struct ieee80211_hw *hw,
1354                                struct ieee80211_vif *vif)
1355 {
1356         struct ath_wiphy *aphy = hw->priv;
1357         struct ath_softc *sc = aphy->sc;
1358         struct ath_hw *ah = sc->sc_ah;
1359         struct ath_common *common = ath9k_hw_common(ah);
1360         struct ath_vif *avp = (void *)vif->drv_priv;
1361         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1362         int ret = 0;
1363
1364         mutex_lock(&sc->mutex);
1365
1366         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) &&
1367             sc->nvifs > 0) {
1368                 ret = -ENOBUFS;
1369                 goto out;
1370         }
1371
1372         switch (vif->type) {
1373         case NL80211_IFTYPE_STATION:
1374                 ic_opmode = NL80211_IFTYPE_STATION;
1375                 break;
1376         case NL80211_IFTYPE_ADHOC:
1377         case NL80211_IFTYPE_AP:
1378         case NL80211_IFTYPE_MESH_POINT:
1379                 if (sc->nbcnvifs >= ATH_BCBUF) {
1380                         ret = -ENOBUFS;
1381                         goto out;
1382                 }
1383                 ic_opmode = vif->type;
1384                 break;
1385         default:
1386                 ath_print(common, ATH_DBG_FATAL,
1387                         "Interface type %d not yet supported\n", vif->type);
1388                 ret = -EOPNOTSUPP;
1389                 goto out;
1390         }
1391
1392         ath_print(common, ATH_DBG_CONFIG,
1393                   "Attach a VIF of type: %d\n", ic_opmode);
1394
1395         /* Set the VIF opmode */
1396         avp->av_opmode = ic_opmode;
1397         avp->av_bslot = -1;
1398
1399         sc->nvifs++;
1400
1401         if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1402                 ath9k_set_bssid_mask(hw);
1403
1404         if (sc->nvifs > 1)
1405                 goto out; /* skip global settings for secondary vif */
1406
1407         if (ic_opmode == NL80211_IFTYPE_AP) {
1408                 ath9k_hw_set_tsfadjust(ah, 1);
1409                 sc->sc_flags |= SC_OP_TSF_RESET;
1410         }
1411
1412         /* Set the device opmode */
1413         ah->opmode = ic_opmode;
1414
1415         /*
1416          * Enable MIB interrupts when there are hardware phy counters.
1417          * Note we only do this (at the moment) for station mode.
1418          */
1419         if ((vif->type == NL80211_IFTYPE_STATION) ||
1420             (vif->type == NL80211_IFTYPE_ADHOC) ||
1421             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1422                 if (ah->config.enable_ani)
1423                         ah->imask |= ATH9K_INT_MIB;
1424                 ah->imask |= ATH9K_INT_TSFOOR;
1425         }
1426
1427         ath9k_hw_set_interrupts(ah, ah->imask);
1428
1429         if (vif->type == NL80211_IFTYPE_AP    ||
1430             vif->type == NL80211_IFTYPE_ADHOC ||
1431             vif->type == NL80211_IFTYPE_MONITOR) {
1432                 sc->sc_flags |= SC_OP_ANI_RUN;
1433                 ath_start_ani(common);
1434         }
1435
1436 out:
1437         mutex_unlock(&sc->mutex);
1438         return ret;
1439 }
1440
1441 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1442                                    struct ieee80211_vif *vif)
1443 {
1444         struct ath_wiphy *aphy = hw->priv;
1445         struct ath_softc *sc = aphy->sc;
1446         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1447         struct ath_vif *avp = (void *)vif->drv_priv;
1448         int i;
1449
1450         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1451
1452         mutex_lock(&sc->mutex);
1453
1454         /* Stop ANI */
1455         sc->sc_flags &= ~SC_OP_ANI_RUN;
1456         del_timer_sync(&common->ani.timer);
1457
1458         /* Reclaim beacon resources */
1459         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1460             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1461             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1462                 ath9k_ps_wakeup(sc);
1463                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1464                 ath9k_ps_restore(sc);
1465         }
1466
1467         ath_beacon_return(sc, avp);
1468         sc->sc_flags &= ~SC_OP_BEACONS;
1469
1470         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1471                 if (sc->beacon.bslot[i] == vif) {
1472                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1473                                "slot\n", __func__);
1474                         sc->beacon.bslot[i] = NULL;
1475                         sc->beacon.bslot_aphy[i] = NULL;
1476                 }
1477         }
1478
1479         sc->nvifs--;
1480
1481         mutex_unlock(&sc->mutex);
1482 }
1483
1484 void ath9k_enable_ps(struct ath_softc *sc)
1485 {
1486         struct ath_hw *ah = sc->sc_ah;
1487
1488         sc->ps_enabled = true;
1489         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1490                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1491                         ah->imask |= ATH9K_INT_TIM_TIMER;
1492                         ath9k_hw_set_interrupts(ah, ah->imask);
1493                 }
1494                 ath9k_hw_setrxabort(ah, 1);
1495         }
1496 }
1497
1498 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1499 {
1500         struct ath_wiphy *aphy = hw->priv;
1501         struct ath_softc *sc = aphy->sc;
1502         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1503         struct ieee80211_conf *conf = &hw->conf;
1504         struct ath_hw *ah = sc->sc_ah;
1505         bool disable_radio;
1506
1507         mutex_lock(&sc->mutex);
1508
1509         /*
1510          * Leave this as the first check because we need to turn on the
1511          * radio if it was disabled before prior to processing the rest
1512          * of the changes. Likewise we must only disable the radio towards
1513          * the end.
1514          */
1515         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1516                 bool enable_radio;
1517                 bool all_wiphys_idle;
1518                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1519
1520                 spin_lock_bh(&sc->wiphy_lock);
1521                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1522                 ath9k_set_wiphy_idle(aphy, idle);
1523
1524                 enable_radio = (!idle && all_wiphys_idle);
1525
1526                 /*
1527                  * After we unlock here its possible another wiphy
1528                  * can be re-renabled so to account for that we will
1529                  * only disable the radio toward the end of this routine
1530                  * if by then all wiphys are still idle.
1531                  */
1532                 spin_unlock_bh(&sc->wiphy_lock);
1533
1534                 if (enable_radio) {
1535                         sc->ps_idle = false;
1536                         ath_radio_enable(sc, hw);
1537                         ath_print(common, ATH_DBG_CONFIG,
1538                                   "not-idle: enabling radio\n");
1539                 }
1540         }
1541
1542         /*
1543          * We just prepare to enable PS. We have to wait until our AP has
1544          * ACK'd our null data frame to disable RX otherwise we'll ignore
1545          * those ACKs and end up retransmitting the same null data frames.
1546          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1547          */
1548         if (changed & IEEE80211_CONF_CHANGE_PS) {
1549                 if (conf->flags & IEEE80211_CONF_PS) {
1550                         sc->ps_flags |= PS_ENABLED;
1551                         /*
1552                          * At this point we know hardware has received an ACK
1553                          * of a previously sent null data frame.
1554                          */
1555                         if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
1556                                 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1557                                 ath9k_enable_ps(sc);
1558                         }
1559                 } else {
1560                         sc->ps_enabled = false;
1561                         sc->ps_flags &= ~(PS_ENABLED |
1562                                           PS_NULLFUNC_COMPLETED);
1563                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
1564                         if (!(ah->caps.hw_caps &
1565                               ATH9K_HW_CAP_AUTOSLEEP)) {
1566                                 ath9k_hw_setrxabort(sc->sc_ah, 0);
1567                                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1568                                                   PS_WAIT_FOR_CAB |
1569                                                   PS_WAIT_FOR_PSPOLL_DATA |
1570                                                   PS_WAIT_FOR_TX_ACK);
1571                                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1572                                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1573                                         ath9k_hw_set_interrupts(sc->sc_ah,
1574                                                         ah->imask);
1575                                 }
1576                         }
1577                 }
1578         }
1579
1580         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1581                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1582                         ath_print(common, ATH_DBG_CONFIG,
1583                                   "HW opmode set to Monitor mode\n");
1584                         sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1585                 }
1586         }
1587
1588         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1589                 struct ieee80211_channel *curchan = hw->conf.channel;
1590                 int pos = curchan->hw_value;
1591
1592                 aphy->chan_idx = pos;
1593                 aphy->chan_is_ht = conf_is_ht(conf);
1594                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1595                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1596                 else
1597                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1598
1599                 if (aphy->state == ATH_WIPHY_SCAN ||
1600                     aphy->state == ATH_WIPHY_ACTIVE)
1601                         ath9k_wiphy_pause_all_forced(sc, aphy);
1602                 else {
1603                         /*
1604                          * Do not change operational channel based on a paused
1605                          * wiphy changes.
1606                          */
1607                         goto skip_chan_change;
1608                 }
1609
1610                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1611                           curchan->center_freq);
1612
1613                 /* XXX: remove me eventualy */
1614                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1615
1616                 ath_update_chainmask(sc, conf_is_ht(conf));
1617
1618                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1619                         ath_print(common, ATH_DBG_FATAL,
1620                                   "Unable to set channel\n");
1621                         mutex_unlock(&sc->mutex);
1622                         return -EINVAL;
1623                 }
1624         }
1625
1626 skip_chan_change:
1627         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1628                 sc->config.txpowlimit = 2 * conf->power_level;
1629                 ath_update_txpow(sc);
1630         }
1631
1632         spin_lock_bh(&sc->wiphy_lock);
1633         disable_radio = ath9k_all_wiphys_idle(sc);
1634         spin_unlock_bh(&sc->wiphy_lock);
1635
1636         if (disable_radio) {
1637                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1638                 sc->ps_idle = true;
1639                 ath_radio_disable(sc, hw);
1640         }
1641
1642         mutex_unlock(&sc->mutex);
1643
1644         return 0;
1645 }
1646
1647 #define SUPPORTED_FILTERS                       \
1648         (FIF_PROMISC_IN_BSS |                   \
1649         FIF_ALLMULTI |                          \
1650         FIF_CONTROL |                           \
1651         FIF_PSPOLL |                            \
1652         FIF_OTHER_BSS |                         \
1653         FIF_BCN_PRBRESP_PROMISC |               \
1654         FIF_FCSFAIL)
1655
1656 /* FIXME: sc->sc_full_reset ? */
1657 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1658                                    unsigned int changed_flags,
1659                                    unsigned int *total_flags,
1660                                    u64 multicast)
1661 {
1662         struct ath_wiphy *aphy = hw->priv;
1663         struct ath_softc *sc = aphy->sc;
1664         u32 rfilt;
1665
1666         changed_flags &= SUPPORTED_FILTERS;
1667         *total_flags &= SUPPORTED_FILTERS;
1668
1669         sc->rx.rxfilter = *total_flags;
1670         ath9k_ps_wakeup(sc);
1671         rfilt = ath_calcrxfilter(sc);
1672         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1673         ath9k_ps_restore(sc);
1674
1675         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1676                   "Set HW RX filter: 0x%x\n", rfilt);
1677 }
1678
1679 static int ath9k_sta_add(struct ieee80211_hw *hw,
1680                          struct ieee80211_vif *vif,
1681                          struct ieee80211_sta *sta)
1682 {
1683         struct ath_wiphy *aphy = hw->priv;
1684         struct ath_softc *sc = aphy->sc;
1685
1686         ath_node_attach(sc, sta);
1687
1688         return 0;
1689 }
1690
1691 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1692                             struct ieee80211_vif *vif,
1693                             struct ieee80211_sta *sta)
1694 {
1695         struct ath_wiphy *aphy = hw->priv;
1696         struct ath_softc *sc = aphy->sc;
1697
1698         ath_node_detach(sc, sta);
1699
1700         return 0;
1701 }
1702
1703 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1704                          const struct ieee80211_tx_queue_params *params)
1705 {
1706         struct ath_wiphy *aphy = hw->priv;
1707         struct ath_softc *sc = aphy->sc;
1708         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1709         struct ath9k_tx_queue_info qi;
1710         int ret = 0, qnum;
1711
1712         if (queue >= WME_NUM_AC)
1713                 return 0;
1714
1715         mutex_lock(&sc->mutex);
1716
1717         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1718
1719         qi.tqi_aifs = params->aifs;
1720         qi.tqi_cwmin = params->cw_min;
1721         qi.tqi_cwmax = params->cw_max;
1722         qi.tqi_burstTime = params->txop;
1723         qnum = ath_get_hal_qnum(queue, sc);
1724
1725         ath_print(common, ATH_DBG_CONFIG,
1726                   "Configure tx [queue/halq] [%d/%d],  "
1727                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1728                   queue, qnum, params->aifs, params->cw_min,
1729                   params->cw_max, params->txop);
1730
1731         ret = ath_txq_update(sc, qnum, &qi);
1732         if (ret)
1733                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1734
1735         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1736                 if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
1737                         ath_beaconq_config(sc);
1738
1739         mutex_unlock(&sc->mutex);
1740
1741         return ret;
1742 }
1743
1744 static int ath9k_set_key(struct ieee80211_hw *hw,
1745                          enum set_key_cmd cmd,
1746                          struct ieee80211_vif *vif,
1747                          struct ieee80211_sta *sta,
1748                          struct ieee80211_key_conf *key)
1749 {
1750         struct ath_wiphy *aphy = hw->priv;
1751         struct ath_softc *sc = aphy->sc;
1752         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1753         int ret = 0;
1754
1755         if (modparam_nohwcrypt)
1756                 return -ENOSPC;
1757
1758         mutex_lock(&sc->mutex);
1759         ath9k_ps_wakeup(sc);
1760         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1761
1762         switch (cmd) {
1763         case SET_KEY:
1764                 ret = ath9k_cmn_key_config(common, vif, sta, key);
1765                 if (ret >= 0) {
1766                         key->hw_key_idx = ret;
1767                         /* push IV and Michael MIC generation to stack */
1768                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1769                         if (key->alg == ALG_TKIP)
1770                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1771                         if (sc->sc_ah->sw_mgmt_crypto && key->alg == ALG_CCMP)
1772                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1773                         ret = 0;
1774                 }
1775                 break;
1776         case DISABLE_KEY:
1777                 ath9k_cmn_key_delete(common, key);
1778                 break;
1779         default:
1780                 ret = -EINVAL;
1781         }
1782
1783         ath9k_ps_restore(sc);
1784         mutex_unlock(&sc->mutex);
1785
1786         return ret;
1787 }
1788
1789 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1790                                    struct ieee80211_vif *vif,
1791                                    struct ieee80211_bss_conf *bss_conf,
1792                                    u32 changed)
1793 {
1794         struct ath_wiphy *aphy = hw->priv;
1795         struct ath_softc *sc = aphy->sc;
1796         struct ath_hw *ah = sc->sc_ah;
1797         struct ath_common *common = ath9k_hw_common(ah);
1798         struct ath_vif *avp = (void *)vif->drv_priv;
1799         int slottime;
1800         int error;
1801
1802         mutex_lock(&sc->mutex);
1803
1804         if (changed & BSS_CHANGED_BSSID) {
1805                 /* Set BSSID */
1806                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1807                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1808                 common->curaid = 0;
1809                 ath9k_hw_write_associd(ah);
1810
1811                 /* Set aggregation protection mode parameters */
1812                 sc->config.ath_aggr_prot = 0;
1813
1814                 /* Only legacy IBSS for now */
1815                 if (vif->type == NL80211_IFTYPE_ADHOC)
1816                         ath_update_chainmask(sc, 0);
1817
1818                 ath_print(common, ATH_DBG_CONFIG,
1819                           "BSSID: %pM aid: 0x%x\n",
1820                           common->curbssid, common->curaid);
1821
1822                 /* need to reconfigure the beacon */
1823                 sc->sc_flags &= ~SC_OP_BEACONS ;
1824         }
1825
1826         /* Enable transmission of beacons (AP, IBSS, MESH) */
1827         if ((changed & BSS_CHANGED_BEACON) ||
1828             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1829                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1830                 error = ath_beacon_alloc(aphy, vif);
1831                 if (!error)
1832                         ath_beacon_config(sc, vif);
1833         }
1834
1835         if (changed & BSS_CHANGED_ERP_SLOT) {
1836                 if (bss_conf->use_short_slot)
1837                         slottime = 9;
1838                 else
1839                         slottime = 20;
1840                 if (vif->type == NL80211_IFTYPE_AP) {
1841                         /*
1842                          * Defer update, so that connected stations can adjust
1843                          * their settings at the same time.
1844                          * See beacon.c for more details
1845                          */
1846                         sc->beacon.slottime = slottime;
1847                         sc->beacon.updateslot = UPDATE;
1848                 } else {
1849                         ah->slottime = slottime;
1850                         ath9k_hw_init_global_settings(ah);
1851                 }
1852         }
1853
1854         /* Disable transmission of beacons */
1855         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1856                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1857
1858         if (changed & BSS_CHANGED_BEACON_INT) {
1859                 sc->beacon_interval = bss_conf->beacon_int;
1860                 /*
1861                  * In case of AP mode, the HW TSF has to be reset
1862                  * when the beacon interval changes.
1863                  */
1864                 if (vif->type == NL80211_IFTYPE_AP) {
1865                         sc->sc_flags |= SC_OP_TSF_RESET;
1866                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1867                         error = ath_beacon_alloc(aphy, vif);
1868                         if (!error)
1869                                 ath_beacon_config(sc, vif);
1870                 } else {
1871                         ath_beacon_config(sc, vif);
1872                 }
1873         }
1874
1875         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1876                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1877                           bss_conf->use_short_preamble);
1878                 if (bss_conf->use_short_preamble)
1879                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1880                 else
1881                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1882         }
1883
1884         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1885                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1886                           bss_conf->use_cts_prot);
1887                 if (bss_conf->use_cts_prot &&
1888                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1889                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1890                 else
1891                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1892         }
1893
1894         if (changed & BSS_CHANGED_ASSOC) {
1895                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1896                         bss_conf->assoc);
1897                 ath9k_bss_assoc_info(sc, vif, bss_conf);
1898         }
1899
1900         mutex_unlock(&sc->mutex);
1901 }
1902
1903 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1904 {
1905         u64 tsf;
1906         struct ath_wiphy *aphy = hw->priv;
1907         struct ath_softc *sc = aphy->sc;
1908
1909         mutex_lock(&sc->mutex);
1910         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1911         mutex_unlock(&sc->mutex);
1912
1913         return tsf;
1914 }
1915
1916 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1917 {
1918         struct ath_wiphy *aphy = hw->priv;
1919         struct ath_softc *sc = aphy->sc;
1920
1921         mutex_lock(&sc->mutex);
1922         ath9k_hw_settsf64(sc->sc_ah, tsf);
1923         mutex_unlock(&sc->mutex);
1924 }
1925
1926 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1927 {
1928         struct ath_wiphy *aphy = hw->priv;
1929         struct ath_softc *sc = aphy->sc;
1930
1931         mutex_lock(&sc->mutex);
1932
1933         ath9k_ps_wakeup(sc);
1934         ath9k_hw_reset_tsf(sc->sc_ah);
1935         ath9k_ps_restore(sc);
1936
1937         mutex_unlock(&sc->mutex);
1938 }
1939
1940 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1941                               struct ieee80211_vif *vif,
1942                               enum ieee80211_ampdu_mlme_action action,
1943                               struct ieee80211_sta *sta,
1944                               u16 tid, u16 *ssn)
1945 {
1946         struct ath_wiphy *aphy = hw->priv;
1947         struct ath_softc *sc = aphy->sc;
1948         int ret = 0;
1949
1950         local_bh_disable();
1951
1952         switch (action) {
1953         case IEEE80211_AMPDU_RX_START:
1954                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1955                         ret = -ENOTSUPP;
1956                 break;
1957         case IEEE80211_AMPDU_RX_STOP:
1958                 break;
1959         case IEEE80211_AMPDU_TX_START:
1960                 ath9k_ps_wakeup(sc);
1961                 ath_tx_aggr_start(sc, sta, tid, ssn);
1962                 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1963                 ath9k_ps_restore(sc);
1964                 break;
1965         case IEEE80211_AMPDU_TX_STOP:
1966                 ath9k_ps_wakeup(sc);
1967                 ath_tx_aggr_stop(sc, sta, tid);
1968                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1969                 ath9k_ps_restore(sc);
1970                 break;
1971         case IEEE80211_AMPDU_TX_OPERATIONAL:
1972                 ath9k_ps_wakeup(sc);
1973                 ath_tx_aggr_resume(sc, sta, tid);
1974                 ath9k_ps_restore(sc);
1975                 break;
1976         default:
1977                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1978                           "Unknown AMPDU action\n");
1979         }
1980
1981         local_bh_enable();
1982
1983         return ret;
1984 }
1985
1986 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1987                              struct survey_info *survey)
1988 {
1989         struct ath_wiphy *aphy = hw->priv;
1990         struct ath_softc *sc = aphy->sc;
1991         struct ath_hw *ah = sc->sc_ah;
1992         struct ath_common *common = ath9k_hw_common(ah);
1993         struct ieee80211_conf *conf = &hw->conf;
1994
1995          if (idx != 0)
1996                 return -ENOENT;
1997
1998         survey->channel = conf->channel;
1999         survey->filled = SURVEY_INFO_NOISE_DBM;
2000         survey->noise = common->ani.noise_floor;
2001
2002         return 0;
2003 }
2004
2005 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2006 {
2007         struct ath_wiphy *aphy = hw->priv;
2008         struct ath_softc *sc = aphy->sc;
2009
2010         mutex_lock(&sc->mutex);
2011         if (ath9k_wiphy_scanning(sc)) {
2012                 /*
2013                  * There is a race here in mac80211 but fixing it requires
2014                  * we revisit how we handle the scan complete callback.
2015                  * After mac80211 fixes we will not have configured hardware
2016                  * to the home channel nor would we have configured the RX
2017                  * filter yet.
2018                  */
2019                 mutex_unlock(&sc->mutex);
2020                 return;
2021         }
2022
2023         aphy->state = ATH_WIPHY_SCAN;
2024         ath9k_wiphy_pause_all_forced(sc, aphy);
2025         sc->sc_flags |= SC_OP_SCANNING;
2026         mutex_unlock(&sc->mutex);
2027 }
2028
2029 /*
2030  * XXX: this requires a revisit after the driver
2031  * scan_complete gets moved to another place/removed in mac80211.
2032  */
2033 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2034 {
2035         struct ath_wiphy *aphy = hw->priv;
2036         struct ath_softc *sc = aphy->sc;
2037
2038         mutex_lock(&sc->mutex);
2039         aphy->state = ATH_WIPHY_ACTIVE;
2040         sc->sc_flags &= ~SC_OP_SCANNING;
2041         mutex_unlock(&sc->mutex);
2042 }
2043
2044 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2045 {
2046         struct ath_wiphy *aphy = hw->priv;
2047         struct ath_softc *sc = aphy->sc;
2048         struct ath_hw *ah = sc->sc_ah;
2049
2050         mutex_lock(&sc->mutex);
2051         ah->coverage_class = coverage_class;
2052         ath9k_hw_init_global_settings(ah);
2053         mutex_unlock(&sc->mutex);
2054 }
2055
2056 struct ieee80211_ops ath9k_ops = {
2057         .tx                 = ath9k_tx,
2058         .start              = ath9k_start,
2059         .stop               = ath9k_stop,
2060         .add_interface      = ath9k_add_interface,
2061         .remove_interface   = ath9k_remove_interface,
2062         .config             = ath9k_config,
2063         .configure_filter   = ath9k_configure_filter,
2064         .sta_add            = ath9k_sta_add,
2065         .sta_remove         = ath9k_sta_remove,
2066         .conf_tx            = ath9k_conf_tx,
2067         .bss_info_changed   = ath9k_bss_info_changed,
2068         .set_key            = ath9k_set_key,
2069         .get_tsf            = ath9k_get_tsf,
2070         .set_tsf            = ath9k_set_tsf,
2071         .reset_tsf          = ath9k_reset_tsf,
2072         .ampdu_action       = ath9k_ampdu_action,
2073         .get_survey         = ath9k_get_survey,
2074         .sw_scan_start      = ath9k_sw_scan_start,
2075         .sw_scan_complete   = ath9k_sw_scan_complete,
2076         .rfkill_poll        = ath9k_rfkill_poll_state,
2077         .set_coverage_class = ath9k_set_coverage_class,
2078 };