2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/nl80211.h>
18 #include <linux/delay.h>
22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
25 * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
26 * 0 for no restriction
35 switch (mpdudensity) {
41 /* Our lower layer calculations limit our precision to
57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
62 spin_lock_bh(&txq->axq_lock);
72 if (txq->mac80211_qnum >= 0) {
73 struct list_head *list;
75 list = &sc->cur_chan->acq[txq->mac80211_qnum];
76 if (!list_empty(list))
80 spin_unlock_bh(&txq->axq_lock);
84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
89 spin_lock_irqsave(&sc->sc_pm_lock, flags);
90 ret = ath9k_hw_setpower(sc->sc_ah, mode);
91 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
96 void ath_ps_full_sleep(unsigned long data)
98 struct ath_softc *sc = (struct ath_softc *) data;
99 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
102 spin_lock(&common->cc_lock);
103 ath_hw_cycle_counters_update(common);
104 spin_unlock(&common->cc_lock);
106 ath9k_hw_setrxabort(sc->sc_ah, 1);
107 ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
109 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
112 void ath9k_ps_wakeup(struct ath_softc *sc)
114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
116 enum ath9k_power_mode power_mode;
118 spin_lock_irqsave(&sc->sc_pm_lock, flags);
119 if (++sc->ps_usecount != 1)
122 del_timer_sync(&sc->sleep_timer);
123 power_mode = sc->sc_ah->power_mode;
124 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
127 * While the hardware is asleep, the cycle counters contain no
128 * useful data. Better clear them now so that they don't mess up
129 * survey data results.
131 if (power_mode != ATH9K_PM_AWAKE) {
132 spin_lock(&common->cc_lock);
133 ath_hw_cycle_counters_update(common);
134 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
135 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
136 spin_unlock(&common->cc_lock);
140 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
143 void ath9k_ps_restore(struct ath_softc *sc)
145 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
146 enum ath9k_power_mode mode;
149 spin_lock_irqsave(&sc->sc_pm_lock, flags);
150 if (--sc->ps_usecount != 0)
154 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
158 if (sc->ps_enabled &&
159 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
161 PS_WAIT_FOR_PSPOLL_DATA |
164 mode = ATH9K_PM_NETWORK_SLEEP;
165 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
166 ath9k_btcoex_stop_gen_timer(sc);
171 spin_lock(&common->cc_lock);
172 ath_hw_cycle_counters_update(common);
173 spin_unlock(&common->cc_lock);
175 ath9k_hw_setpower(sc->sc_ah, mode);
178 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
181 static void __ath_cancel_work(struct ath_softc *sc)
183 cancel_work_sync(&sc->paprd_work);
184 cancel_delayed_work_sync(&sc->tx_complete_work);
185 cancel_delayed_work_sync(&sc->hw_pll_work);
187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
188 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
189 cancel_work_sync(&sc->mci_work);
193 void ath_cancel_work(struct ath_softc *sc)
195 __ath_cancel_work(sc);
196 cancel_work_sync(&sc->hw_reset_work);
199 void ath_restart_work(struct ath_softc *sc)
201 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
203 if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
204 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
205 msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
210 static bool ath_prepare_reset(struct ath_softc *sc)
212 struct ath_hw *ah = sc->sc_ah;
215 ieee80211_stop_queues(sc->hw);
217 ath9k_hw_disable_interrupts(ah);
219 if (!ath_drain_all_txq(sc))
222 if (!ath_stoprecv(sc))
228 static bool ath_complete_reset(struct ath_softc *sc, bool start)
230 struct ath_hw *ah = sc->sc_ah;
231 struct ath_common *common = ath9k_hw_common(ah);
234 ath9k_calculate_summary_state(sc, sc->cur_chan);
236 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
237 sc->cur_chan->txpower,
238 &sc->cur_chan->cur_txpower);
239 clear_bit(ATH_OP_HW_RESET, &common->op_flags);
241 if (!sc->cur_chan->offchannel && start) {
242 /* restore per chanctx TSF timer */
243 if (sc->cur_chan->tsf_val) {
246 offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
248 ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
252 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
255 if (ah->opmode == NL80211_IFTYPE_STATION &&
256 test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
257 spin_lock_irqsave(&sc->sc_pm_lock, flags);
258 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
259 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
261 ath9k_set_beacon(sc);
264 ath_restart_work(sc);
265 ath_txq_schedule_all(sc);
270 ath9k_hw_set_interrupts(ah);
271 ath9k_hw_enable_interrupts(ah);
272 ieee80211_wake_queues(sc->hw);
273 ath9k_p2p_ps_timer(sc);
278 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
280 struct ath_hw *ah = sc->sc_ah;
281 struct ath_common *common = ath9k_hw_common(ah);
282 struct ath9k_hw_cal_data *caldata = NULL;
286 __ath_cancel_work(sc);
288 tasklet_disable(&sc->intr_tq);
289 tasklet_disable(&sc->bcon_tasklet);
290 spin_lock_bh(&sc->sc_pcu_lock);
292 if (!sc->cur_chan->offchannel) {
294 caldata = &sc->cur_chan->caldata;
302 if (!ath_prepare_reset(sc))
305 if (ath9k_is_chanctx_enabled())
308 spin_lock_bh(&sc->chan_lock);
309 sc->cur_chandef = sc->cur_chan->chandef;
310 spin_unlock_bh(&sc->chan_lock);
312 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
313 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
315 r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
318 "Unable to reset channel, reset status %d\n", r);
320 ath9k_hw_enable_interrupts(ah);
321 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
326 if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
327 sc->cur_chan->offchannel)
328 ath9k_mci_set_txpower(sc, true, false);
330 if (!ath_complete_reset(sc, true))
334 spin_unlock_bh(&sc->sc_pcu_lock);
335 tasklet_enable(&sc->bcon_tasklet);
336 tasklet_enable(&sc->intr_tq);
341 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
342 struct ieee80211_vif *vif)
345 an = (struct ath_node *)sta->drv_priv;
350 memset(&an->key_idx, 0, sizeof(an->key_idx));
352 ath_tx_node_init(sc, an);
354 ath_dynack_node_init(sc->sc_ah, an);
357 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
359 struct ath_node *an = (struct ath_node *)sta->drv_priv;
360 ath_tx_node_cleanup(sc, an);
362 ath_dynack_node_deinit(sc->sc_ah, an);
365 void ath9k_tasklet(unsigned long data)
367 struct ath_softc *sc = (struct ath_softc *)data;
368 struct ath_hw *ah = sc->sc_ah;
369 struct ath_common *common = ath9k_hw_common(ah);
370 enum ath_reset_type type;
372 u32 status = sc->intrstatus;
376 spin_lock(&sc->sc_pcu_lock);
378 if (status & ATH9K_INT_FATAL) {
379 type = RESET_TYPE_FATAL_INT;
380 ath9k_queue_reset(sc, type);
383 * Increment the ref. counter here so that
384 * interrupts are enabled in the reset routine.
386 atomic_inc(&ah->intr_ref_cnt);
387 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
391 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
392 (status & ATH9K_INT_BB_WATCHDOG)) {
393 spin_lock(&common->cc_lock);
394 ath_hw_cycle_counters_update(common);
395 ar9003_hw_bb_watchdog_dbg_info(ah);
396 spin_unlock(&common->cc_lock);
398 if (ar9003_hw_bb_watchdog_check(ah)) {
399 type = RESET_TYPE_BB_WATCHDOG;
400 ath9k_queue_reset(sc, type);
403 * Increment the ref. counter here so that
404 * interrupts are enabled in the reset routine.
406 atomic_inc(&ah->intr_ref_cnt);
407 ath_dbg(common, RESET,
408 "BB_WATCHDOG: Skipping interrupts\n");
413 if (status & ATH9K_INT_GTT) {
416 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
417 type = RESET_TYPE_TX_GTT;
418 ath9k_queue_reset(sc, type);
419 atomic_inc(&ah->intr_ref_cnt);
420 ath_dbg(common, RESET,
421 "GTT: Skipping interrupts\n");
426 spin_lock_irqsave(&sc->sc_pm_lock, flags);
427 if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
429 * TSF sync does not look correct; remain awake to sync with
432 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
433 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
435 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
437 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
438 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
441 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
443 if (status & rxmask) {
444 /* Check for high priority Rx first */
445 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
446 (status & ATH9K_INT_RXHP))
447 ath_rx_tasklet(sc, 0, true);
449 ath_rx_tasklet(sc, 0, false);
452 if (status & ATH9K_INT_TX) {
453 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
455 * For EDMA chips, TX completion is enabled for the
456 * beacon queue, so if a beacon has been transmitted
457 * successfully after a GTT interrupt, the GTT counter
458 * gets reset to zero here.
462 ath_tx_edma_tasklet(sc);
467 wake_up(&sc->tx_wait);
470 if (status & ATH9K_INT_GENTIMER)
471 ath_gen_timer_isr(sc->sc_ah);
473 ath9k_btcoex_handle_interrupt(sc, status);
475 /* re-enable hardware interrupt */
476 ath9k_hw_enable_interrupts(ah);
478 spin_unlock(&sc->sc_pcu_lock);
479 ath9k_ps_restore(sc);
482 irqreturn_t ath_isr(int irq, void *dev)
484 #define SCHED_INTR ( \
486 ATH9K_INT_BB_WATCHDOG | \
497 ATH9K_INT_GENTIMER | \
500 struct ath_softc *sc = dev;
501 struct ath_hw *ah = sc->sc_ah;
502 struct ath_common *common = ath9k_hw_common(ah);
503 enum ath9k_int status;
508 * The hardware is not ready/present, don't
509 * touch anything. Note this can happen early
510 * on if the IRQ is shared.
512 if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
515 /* shared irq, not for us */
517 if (!ath9k_hw_intrpend(ah))
520 if (test_bit(ATH_OP_HW_RESET, &common->op_flags)) {
521 ath9k_hw_kill_interrupts(ah);
526 * Figure out the reason(s) for the interrupt. Note
527 * that the hal returns a pseudo-ISR that may include
528 * bits we haven't explicitly enabled so we mask the
529 * value to insure we only process bits we requested.
531 ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
532 ath9k_debug_sync_cause(sc, sync_cause);
533 status &= ah->imask; /* discard unasked-for bits */
536 * If there are no status bits set, then this interrupt was not
537 * for me (should have been caught above).
542 /* Cache the status */
543 sc->intrstatus = status;
545 if (status & SCHED_INTR)
549 * If a FATAL interrupt is received, we have to reset the chip
552 if (status & ATH9K_INT_FATAL)
555 if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
556 (status & ATH9K_INT_BB_WATCHDOG))
559 #ifdef CONFIG_ATH9K_WOW
560 if (status & ATH9K_INT_BMISS) {
561 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
562 atomic_inc(&sc->wow_got_bmiss_intr);
563 atomic_dec(&sc->wow_sleep_proc_intr);
568 if (status & ATH9K_INT_SWBA)
569 tasklet_schedule(&sc->bcon_tasklet);
571 if (status & ATH9K_INT_TXURN)
572 ath9k_hw_updatetxtriglevel(ah, true);
574 if (status & ATH9K_INT_RXEOL) {
575 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
576 ath9k_hw_set_interrupts(ah);
579 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
580 if (status & ATH9K_INT_TIM_TIMER) {
581 if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
583 /* Clear RxAbort bit so that we can
585 ath9k_setpower(sc, ATH9K_PM_AWAKE);
586 spin_lock(&sc->sc_pm_lock);
587 ath9k_hw_setrxabort(sc->sc_ah, 0);
588 sc->ps_flags |= PS_WAIT_FOR_BEACON;
589 spin_unlock(&sc->sc_pm_lock);
594 ath_debug_stat_interrupt(sc, status);
597 /* turn off every interrupt */
598 ath9k_hw_disable_interrupts(ah);
599 tasklet_schedule(&sc->intr_tq);
608 * This function is called when a HW reset cannot be deferred
609 * and has to be immediate.
611 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
613 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
616 set_bit(ATH_OP_HW_RESET, &common->op_flags);
619 r = ath_reset_internal(sc, hchan);
620 ath9k_ps_restore(sc);
626 * When a HW reset can be deferred, it is added to the
627 * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
630 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
632 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
633 #ifdef CONFIG_ATH9K_DEBUGFS
634 RESET_STAT_INC(sc, type);
636 set_bit(ATH_OP_HW_RESET, &common->op_flags);
637 ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
640 void ath_reset_work(struct work_struct *work)
642 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
645 ath_reset_internal(sc, NULL);
646 ath9k_ps_restore(sc);
649 /**********************/
650 /* mac80211 callbacks */
651 /**********************/
653 static int ath9k_start(struct ieee80211_hw *hw)
655 struct ath_softc *sc = hw->priv;
656 struct ath_hw *ah = sc->sc_ah;
657 struct ath_common *common = ath9k_hw_common(ah);
658 struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
659 struct ath_chanctx *ctx = sc->cur_chan;
660 struct ath9k_channel *init_channel;
663 ath_dbg(common, CONFIG,
664 "Starting driver with initial channel: %d MHz\n",
665 curchan->center_freq);
668 mutex_lock(&sc->mutex);
670 init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
671 sc->cur_chandef = hw->conf.chandef;
673 /* Reset SERDES registers */
674 ath9k_hw_configpcipowersave(ah, false);
677 * The basic interface to setting the hardware in a good
678 * state is ``reset''. On return the hardware is known to
679 * be powered up and with interrupts disabled. This must
680 * be followed by initialization of the appropriate bits
681 * and then setup of the interrupt mask.
683 spin_lock_bh(&sc->sc_pcu_lock);
685 atomic_set(&ah->intr_ref_cnt, -1);
687 r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
690 "Unable to reset hardware; reset status %d (freq %u MHz)\n",
691 r, curchan->center_freq);
692 ah->reset_power_on = false;
695 /* Setup our intr mask. */
696 ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
697 ATH9K_INT_RXORN | ATH9K_INT_FATAL |
700 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
701 ah->imask |= ATH9K_INT_RXHP |
704 ah->imask |= ATH9K_INT_RX;
706 if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
707 ah->imask |= ATH9K_INT_BB_WATCHDOG;
710 * Enable GTT interrupts only for AR9003/AR9004 chips
713 if (AR_SREV_9300_20_OR_LATER(ah))
714 ah->imask |= ATH9K_INT_GTT;
716 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
717 ah->imask |= ATH9K_INT_CST;
721 clear_bit(ATH_OP_INVALID, &common->op_flags);
722 sc->sc_ah->is_monitoring = false;
724 if (!ath_complete_reset(sc, false))
725 ah->reset_power_on = false;
727 if (ah->led_pin >= 0) {
728 ath9k_hw_cfg_output(ah, ah->led_pin,
729 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
730 ath9k_hw_set_gpio(ah, ah->led_pin,
731 (ah->config.led_active_high) ? 1 : 0);
735 * Reset key cache to sane defaults (all entries cleared) instead of
736 * semi-random values after suspend/resume.
738 ath9k_cmn_init_crypto(sc->sc_ah);
740 ath9k_hw_reset_tsf(ah);
742 spin_unlock_bh(&sc->sc_pcu_lock);
744 mutex_unlock(&sc->mutex);
746 ath9k_ps_restore(sc);
751 static void ath9k_tx(struct ieee80211_hw *hw,
752 struct ieee80211_tx_control *control,
755 struct ath_softc *sc = hw->priv;
756 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
757 struct ath_tx_control txctl;
758 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
761 if (sc->ps_enabled) {
763 * mac80211 does not set PM field for normal data frames, so we
764 * need to update that based on the current PS mode.
766 if (ieee80211_is_data(hdr->frame_control) &&
767 !ieee80211_is_nullfunc(hdr->frame_control) &&
768 !ieee80211_has_pm(hdr->frame_control)) {
770 "Add PM=1 for a TX frame while in PS mode\n");
771 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
775 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
777 * We are using PS-Poll and mac80211 can request TX while in
778 * power save mode. Need to wake up hardware for the TX to be
779 * completed and if needed, also for RX of buffered frames.
782 spin_lock_irqsave(&sc->sc_pm_lock, flags);
783 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
784 ath9k_hw_setrxabort(sc->sc_ah, 0);
785 if (ieee80211_is_pspoll(hdr->frame_control)) {
787 "Sending PS-Poll to pick a buffered frame\n");
788 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
790 ath_dbg(common, PS, "Wake up to complete TX\n");
791 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
794 * The actual restore operation will happen only after
795 * the ps_flags bit is cleared. We are just dropping
796 * the ps_usecount here.
798 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
799 ath9k_ps_restore(sc);
803 * Cannot tx while the hardware is in full sleep, it first needs a full
804 * chip reset to recover from that
806 if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
807 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
811 memset(&txctl, 0, sizeof(struct ath_tx_control));
812 txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
813 txctl.sta = control->sta;
815 ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
817 if (ath_tx_start(hw, skb, &txctl) != 0) {
818 ath_dbg(common, XMIT, "TX failed\n");
819 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
825 ieee80211_free_txskb(hw, skb);
828 static void ath9k_stop(struct ieee80211_hw *hw)
830 struct ath_softc *sc = hw->priv;
831 struct ath_hw *ah = sc->sc_ah;
832 struct ath_common *common = ath9k_hw_common(ah);
835 ath9k_deinit_channel_context(sc);
837 mutex_lock(&sc->mutex);
841 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
842 ath_dbg(common, ANY, "Device not present\n");
843 mutex_unlock(&sc->mutex);
847 /* Ensure HW is awake when we try to shut it down. */
850 spin_lock_bh(&sc->sc_pcu_lock);
852 /* prevent tasklets to enable interrupts once we disable them */
853 ah->imask &= ~ATH9K_INT_GLOBAL;
855 /* make sure h/w will not generate any interrupt
856 * before setting the invalid flag. */
857 ath9k_hw_disable_interrupts(ah);
859 spin_unlock_bh(&sc->sc_pcu_lock);
861 /* we can now sync irq and kill any running tasklets, since we already
862 * disabled interrupts and not holding a spin lock */
863 synchronize_irq(sc->irq);
864 tasklet_kill(&sc->intr_tq);
865 tasklet_kill(&sc->bcon_tasklet);
867 prev_idle = sc->ps_idle;
870 spin_lock_bh(&sc->sc_pcu_lock);
872 if (ah->led_pin >= 0) {
873 ath9k_hw_set_gpio(ah, ah->led_pin,
874 (ah->config.led_active_high) ? 0 : 1);
875 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
878 ath_prepare_reset(sc);
881 dev_kfree_skb_any(sc->rx.frag);
886 ah->curchan = ath9k_cmn_get_channel(hw, ah,
887 &sc->cur_chan->chandef);
889 ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
890 ath9k_hw_phy_disable(ah);
892 ath9k_hw_configpcipowersave(ah, true);
894 spin_unlock_bh(&sc->sc_pcu_lock);
896 ath9k_ps_restore(sc);
898 set_bit(ATH_OP_INVALID, &common->op_flags);
899 sc->ps_idle = prev_idle;
901 mutex_unlock(&sc->mutex);
903 ath_dbg(common, CONFIG, "Driver halt\n");
906 static bool ath9k_uses_beacons(int type)
909 case NL80211_IFTYPE_AP:
910 case NL80211_IFTYPE_ADHOC:
911 case NL80211_IFTYPE_MESH_POINT:
918 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
919 u8 *mac, struct ieee80211_vif *vif)
921 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
924 if (iter_data->has_hw_macaddr) {
925 for (i = 0; i < ETH_ALEN; i++)
926 iter_data->mask[i] &=
927 ~(iter_data->hw_macaddr[i] ^ mac[i]);
929 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
930 iter_data->has_hw_macaddr = true;
933 if (!vif->bss_conf.use_short_slot)
934 iter_data->slottime = ATH9K_SLOT_TIME_20;
937 case NL80211_IFTYPE_AP:
940 case NL80211_IFTYPE_STATION:
941 iter_data->nstations++;
942 if (avp->assoc && !iter_data->primary_sta)
943 iter_data->primary_sta = vif;
945 case NL80211_IFTYPE_ADHOC:
946 iter_data->nadhocs++;
947 if (vif->bss_conf.enable_beacon)
948 iter_data->beacons = true;
950 case NL80211_IFTYPE_MESH_POINT:
951 iter_data->nmeshes++;
952 if (vif->bss_conf.enable_beacon)
953 iter_data->beacons = true;
955 case NL80211_IFTYPE_WDS:
963 static void ath9k_update_bssid_mask(struct ath_softc *sc,
964 struct ath_chanctx *ctx,
965 struct ath9k_vif_iter_data *iter_data)
967 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
971 if (!ath9k_is_chanctx_enabled())
974 list_for_each_entry(avp, &ctx->vifs, list) {
975 if (ctx->nvifs_assigned != 1)
978 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
981 ether_addr_copy(common->curbssid, avp->bssid);
983 /* perm_addr will be used as the p2p device address. */
984 for (i = 0; i < ETH_ALEN; i++)
985 iter_data->mask[i] &=
986 ~(iter_data->hw_macaddr[i] ^
987 sc->hw->wiphy->perm_addr[i]);
991 /* Called with sc->mutex held. */
992 void ath9k_calculate_iter_data(struct ath_softc *sc,
993 struct ath_chanctx *ctx,
994 struct ath9k_vif_iter_data *iter_data)
999 * The hardware will use primary station addr together with the
1000 * BSSID mask when matching addresses.
1002 memset(iter_data, 0, sizeof(*iter_data));
1003 memset(&iter_data->mask, 0xff, ETH_ALEN);
1004 iter_data->slottime = ATH9K_SLOT_TIME_9;
1006 list_for_each_entry(avp, &ctx->vifs, list)
1007 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1009 ath9k_update_bssid_mask(sc, ctx, iter_data);
1012 static void ath9k_set_assoc_state(struct ath_softc *sc,
1013 struct ieee80211_vif *vif, bool changed)
1015 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1016 struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1017 unsigned long flags;
1019 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1021 ether_addr_copy(common->curbssid, avp->bssid);
1022 common->curaid = avp->aid;
1023 ath9k_hw_write_associd(sc->sc_ah);
1026 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1027 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1029 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1030 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1031 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1034 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1035 ath9k_mci_update_wlan_channels(sc, false);
1037 ath_dbg(common, CONFIG,
1038 "Primary Station interface: %pM, BSSID: %pM\n",
1039 vif->addr, common->curbssid);
1042 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1043 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1045 struct ath_hw *ah = sc->sc_ah;
1046 struct ath_common *common = ath9k_hw_common(ah);
1047 struct ieee80211_vif *vif = NULL;
1049 ath9k_ps_wakeup(sc);
1051 if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1052 vif = sc->offchannel.scan_vif;
1054 vif = sc->offchannel.roc_vif;
1059 eth_zero_addr(common->curbssid);
1060 eth_broadcast_addr(common->bssidmask);
1061 memcpy(common->macaddr, vif->addr, ETH_ALEN);
1063 ah->opmode = vif->type;
1064 ah->imask &= ~ATH9K_INT_SWBA;
1065 ah->imask &= ~ATH9K_INT_TSFOOR;
1066 ah->slottime = ATH9K_SLOT_TIME_9;
1068 ath_hw_setbssidmask(common);
1069 ath9k_hw_setopmode(ah);
1070 ath9k_hw_write_associd(sc->sc_ah);
1071 ath9k_hw_set_interrupts(ah);
1072 ath9k_hw_init_global_settings(ah);
1075 ath9k_ps_restore(sc);
1079 /* Called with sc->mutex held. */
1080 void ath9k_calculate_summary_state(struct ath_softc *sc,
1081 struct ath_chanctx *ctx)
1083 struct ath_hw *ah = sc->sc_ah;
1084 struct ath_common *common = ath9k_hw_common(ah);
1085 struct ath9k_vif_iter_data iter_data;
1086 struct ath_beacon_config *cur_conf;
1088 ath_chanctx_check_active(sc, ctx);
1090 if (ctx != sc->cur_chan)
1093 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1094 if (ctx == &sc->offchannel.chan)
1095 return ath9k_set_offchannel_state(sc);
1098 ath9k_ps_wakeup(sc);
1099 ath9k_calculate_iter_data(sc, ctx, &iter_data);
1101 if (iter_data.has_hw_macaddr)
1102 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1104 memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1105 ath_hw_setbssidmask(common);
1107 if (iter_data.naps > 0) {
1108 cur_conf = &ctx->beacon;
1109 ath9k_hw_set_tsfadjust(ah, true);
1110 ah->opmode = NL80211_IFTYPE_AP;
1111 if (cur_conf->enable_beacon)
1112 iter_data.beacons = true;
1114 ath9k_hw_set_tsfadjust(ah, false);
1116 if (iter_data.nmeshes)
1117 ah->opmode = NL80211_IFTYPE_MESH_POINT;
1118 else if (iter_data.nwds)
1119 ah->opmode = NL80211_IFTYPE_AP;
1120 else if (iter_data.nadhocs)
1121 ah->opmode = NL80211_IFTYPE_ADHOC;
1123 ah->opmode = NL80211_IFTYPE_STATION;
1126 ath9k_hw_setopmode(ah);
1128 ctx->switch_after_beacon = false;
1129 if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1130 ah->imask |= ATH9K_INT_TSFOOR;
1132 ah->imask &= ~ATH9K_INT_TSFOOR;
1133 if (iter_data.naps == 1 && iter_data.beacons)
1134 ctx->switch_after_beacon = true;
1137 ah->imask &= ~ATH9K_INT_SWBA;
1138 if (ah->opmode == NL80211_IFTYPE_STATION) {
1139 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1141 if (iter_data.primary_sta) {
1142 iter_data.beacons = true;
1143 ath9k_set_assoc_state(sc, iter_data.primary_sta,
1145 ctx->primary_sta = iter_data.primary_sta;
1147 ctx->primary_sta = NULL;
1148 memset(common->curbssid, 0, ETH_ALEN);
1150 ath9k_hw_write_associd(sc->sc_ah);
1151 if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1152 ath9k_mci_update_wlan_channels(sc, true);
1154 } else if (iter_data.beacons) {
1155 ah->imask |= ATH9K_INT_SWBA;
1157 ath9k_hw_set_interrupts(ah);
1159 if (iter_data.beacons)
1160 set_bit(ATH_OP_BEACONS, &common->op_flags);
1162 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1164 if (ah->slottime != iter_data.slottime) {
1165 ah->slottime = iter_data.slottime;
1166 ath9k_hw_init_global_settings(ah);
1169 if (iter_data.primary_sta)
1170 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1172 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1174 ath_dbg(common, CONFIG,
1175 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1176 common->macaddr, common->curbssid, common->bssidmask);
1178 ath9k_ps_restore(sc);
1181 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1182 struct ieee80211_vif *vif)
1186 if (!ath9k_is_chanctx_enabled())
1189 for (i = 0; i < IEEE80211_NUM_ACS; i++)
1190 vif->hw_queue[i] = i;
1192 if (vif->type == NL80211_IFTYPE_AP ||
1193 vif->type == NL80211_IFTYPE_MESH_POINT)
1194 vif->cab_queue = hw->queues - 2;
1196 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1199 static int ath9k_add_interface(struct ieee80211_hw *hw,
1200 struct ieee80211_vif *vif)
1202 struct ath_softc *sc = hw->priv;
1203 struct ath_hw *ah = sc->sc_ah;
1204 struct ath_common *common = ath9k_hw_common(ah);
1205 struct ath_vif *avp = (void *)vif->drv_priv;
1206 struct ath_node *an = &avp->mcast_node;
1208 mutex_lock(&sc->mutex);
1210 if (config_enabled(CONFIG_ATH9K_TX99)) {
1211 if (sc->cur_chan->nvifs >= 1) {
1212 mutex_unlock(&sc->mutex);
1218 ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1219 sc->cur_chan->nvifs++;
1221 if (ath9k_uses_beacons(vif->type))
1222 ath9k_beacon_assign_slot(sc, vif);
1225 if (!ath9k_is_chanctx_enabled()) {
1226 avp->chanctx = sc->cur_chan;
1227 list_add_tail(&avp->list, &avp->chanctx->vifs);
1230 ath9k_calculate_summary_state(sc, avp->chanctx);
1232 ath9k_assign_hw_queues(hw, vif);
1237 an->no_ps_filter = true;
1238 ath_tx_node_init(sc, an);
1240 mutex_unlock(&sc->mutex);
1244 static int ath9k_change_interface(struct ieee80211_hw *hw,
1245 struct ieee80211_vif *vif,
1246 enum nl80211_iftype new_type,
1249 struct ath_softc *sc = hw->priv;
1250 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1251 struct ath_vif *avp = (void *)vif->drv_priv;
1253 mutex_lock(&sc->mutex);
1255 if (config_enabled(CONFIG_ATH9K_TX99)) {
1256 mutex_unlock(&sc->mutex);
1260 ath_dbg(common, CONFIG, "Change Interface\n");
1262 if (ath9k_uses_beacons(vif->type))
1263 ath9k_beacon_remove_slot(sc, vif);
1265 vif->type = new_type;
1268 if (ath9k_uses_beacons(vif->type))
1269 ath9k_beacon_assign_slot(sc, vif);
1271 ath9k_assign_hw_queues(hw, vif);
1272 ath9k_calculate_summary_state(sc, avp->chanctx);
1274 mutex_unlock(&sc->mutex);
1278 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1279 struct ieee80211_vif *vif)
1281 struct ath_softc *sc = hw->priv;
1282 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1283 struct ath_vif *avp = (void *)vif->drv_priv;
1285 ath_dbg(common, CONFIG, "Detach Interface\n");
1287 mutex_lock(&sc->mutex);
1289 ath9k_p2p_remove_vif(sc, vif);
1291 sc->cur_chan->nvifs--;
1292 sc->tx99_vif = NULL;
1293 if (!ath9k_is_chanctx_enabled())
1294 list_del(&avp->list);
1296 if (ath9k_uses_beacons(vif->type))
1297 ath9k_beacon_remove_slot(sc, vif);
1299 ath_tx_node_cleanup(sc, &avp->mcast_node);
1301 ath9k_calculate_summary_state(sc, avp->chanctx);
1303 mutex_unlock(&sc->mutex);
1306 static void ath9k_enable_ps(struct ath_softc *sc)
1308 struct ath_hw *ah = sc->sc_ah;
1309 struct ath_common *common = ath9k_hw_common(ah);
1311 if (config_enabled(CONFIG_ATH9K_TX99))
1314 sc->ps_enabled = true;
1315 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1316 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1317 ah->imask |= ATH9K_INT_TIM_TIMER;
1318 ath9k_hw_set_interrupts(ah);
1320 ath9k_hw_setrxabort(ah, 1);
1322 ath_dbg(common, PS, "PowerSave enabled\n");
1325 static void ath9k_disable_ps(struct ath_softc *sc)
1327 struct ath_hw *ah = sc->sc_ah;
1328 struct ath_common *common = ath9k_hw_common(ah);
1330 if (config_enabled(CONFIG_ATH9K_TX99))
1333 sc->ps_enabled = false;
1334 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1335 if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1336 ath9k_hw_setrxabort(ah, 0);
1337 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1339 PS_WAIT_FOR_PSPOLL_DATA |
1340 PS_WAIT_FOR_TX_ACK);
1341 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1342 ah->imask &= ~ATH9K_INT_TIM_TIMER;
1343 ath9k_hw_set_interrupts(ah);
1346 ath_dbg(common, PS, "PowerSave disabled\n");
1349 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1351 struct ath_softc *sc = hw->priv;
1352 struct ath_hw *ah = sc->sc_ah;
1353 struct ath_common *common = ath9k_hw_common(ah);
1354 struct ieee80211_conf *conf = &hw->conf;
1355 struct ath_chanctx *ctx = sc->cur_chan;
1357 ath9k_ps_wakeup(sc);
1358 mutex_lock(&sc->mutex);
1360 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1361 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1363 ath_cancel_work(sc);
1364 ath9k_stop_btcoex(sc);
1366 ath9k_start_btcoex(sc);
1368 * The chip needs a reset to properly wake up from
1371 ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1376 * We just prepare to enable PS. We have to wait until our AP has
1377 * ACK'd our null data frame to disable RX otherwise we'll ignore
1378 * those ACKs and end up retransmitting the same null data frames.
1379 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1381 if (changed & IEEE80211_CONF_CHANGE_PS) {
1382 unsigned long flags;
1383 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1384 if (conf->flags & IEEE80211_CONF_PS)
1385 ath9k_enable_ps(sc);
1387 ath9k_disable_ps(sc);
1388 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1391 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1392 if (conf->flags & IEEE80211_CONF_MONITOR) {
1393 ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1394 sc->sc_ah->is_monitoring = true;
1396 ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1397 sc->sc_ah->is_monitoring = false;
1401 if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1402 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1403 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1406 if (changed & IEEE80211_CONF_CHANGE_POWER) {
1407 ath_dbg(common, CONFIG, "Set power: %d\n", conf->power_level);
1408 sc->cur_chan->txpower = 2 * conf->power_level;
1409 ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
1410 sc->cur_chan->txpower,
1411 &sc->cur_chan->cur_txpower);
1414 mutex_unlock(&sc->mutex);
1415 ath9k_ps_restore(sc);
1420 #define SUPPORTED_FILTERS \
1421 (FIF_PROMISC_IN_BSS | \
1426 FIF_BCN_PRBRESP_PROMISC | \
1430 /* FIXME: sc->sc_full_reset ? */
1431 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1432 unsigned int changed_flags,
1433 unsigned int *total_flags,
1436 struct ath_softc *sc = hw->priv;
1439 changed_flags &= SUPPORTED_FILTERS;
1440 *total_flags &= SUPPORTED_FILTERS;
1442 spin_lock_bh(&sc->chan_lock);
1443 sc->cur_chan->rxfilter = *total_flags;
1444 spin_unlock_bh(&sc->chan_lock);
1446 ath9k_ps_wakeup(sc);
1447 rfilt = ath_calcrxfilter(sc);
1448 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1449 ath9k_ps_restore(sc);
1451 ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1455 static int ath9k_sta_add(struct ieee80211_hw *hw,
1456 struct ieee80211_vif *vif,
1457 struct ieee80211_sta *sta)
1459 struct ath_softc *sc = hw->priv;
1460 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1461 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1462 struct ieee80211_key_conf ps_key = { };
1465 ath_node_attach(sc, sta, vif);
1467 if (vif->type != NL80211_IFTYPE_AP &&
1468 vif->type != NL80211_IFTYPE_AP_VLAN)
1471 key = ath_key_config(common, vif, sta, &ps_key);
1474 an->key_idx[0] = key;
1480 static void ath9k_del_ps_key(struct ath_softc *sc,
1481 struct ieee80211_vif *vif,
1482 struct ieee80211_sta *sta)
1484 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1485 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1486 struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1491 ath_key_delete(common, &ps_key);
1496 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1497 struct ieee80211_vif *vif,
1498 struct ieee80211_sta *sta)
1500 struct ath_softc *sc = hw->priv;
1502 ath9k_del_ps_key(sc, vif, sta);
1503 ath_node_detach(sc, sta);
1508 static int ath9k_sta_state(struct ieee80211_hw *hw,
1509 struct ieee80211_vif *vif,
1510 struct ieee80211_sta *sta,
1511 enum ieee80211_sta_state old_state,
1512 enum ieee80211_sta_state new_state)
1514 struct ath_softc *sc = hw->priv;
1515 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1518 if (old_state == IEEE80211_STA_AUTH &&
1519 new_state == IEEE80211_STA_ASSOC) {
1520 ret = ath9k_sta_add(hw, vif, sta);
1521 ath_dbg(common, CONFIG,
1522 "Add station: %pM\n", sta->addr);
1523 } else if (old_state == IEEE80211_STA_ASSOC &&
1524 new_state == IEEE80211_STA_AUTH) {
1525 ret = ath9k_sta_remove(hw, vif, sta);
1526 ath_dbg(common, CONFIG,
1527 "Remove station: %pM\n", sta->addr);
1530 if (ath9k_is_chanctx_enabled()) {
1531 if (vif->type == NL80211_IFTYPE_STATION) {
1532 if (old_state == IEEE80211_STA_ASSOC &&
1533 new_state == IEEE80211_STA_AUTHORIZED)
1534 ath_chanctx_event(sc, vif,
1535 ATH_CHANCTX_EVENT_AUTHORIZED);
1542 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1543 struct ath_node *an,
1548 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1549 if (!an->key_idx[i])
1551 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1555 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1556 struct ieee80211_vif *vif,
1557 enum sta_notify_cmd cmd,
1558 struct ieee80211_sta *sta)
1560 struct ath_softc *sc = hw->priv;
1561 struct ath_node *an = (struct ath_node *) sta->drv_priv;
1564 case STA_NOTIFY_SLEEP:
1565 an->sleeping = true;
1566 ath_tx_aggr_sleep(sta, sc, an);
1567 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1569 case STA_NOTIFY_AWAKE:
1570 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1571 an->sleeping = false;
1572 ath_tx_aggr_wakeup(sc, an);
1577 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1578 struct ieee80211_vif *vif, u16 queue,
1579 const struct ieee80211_tx_queue_params *params)
1581 struct ath_softc *sc = hw->priv;
1582 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1583 struct ath_txq *txq;
1584 struct ath9k_tx_queue_info qi;
1587 if (queue >= IEEE80211_NUM_ACS)
1590 txq = sc->tx.txq_map[queue];
1592 ath9k_ps_wakeup(sc);
1593 mutex_lock(&sc->mutex);
1595 memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1597 qi.tqi_aifs = params->aifs;
1598 qi.tqi_cwmin = params->cw_min;
1599 qi.tqi_cwmax = params->cw_max;
1600 qi.tqi_burstTime = params->txop * 32;
1602 ath_dbg(common, CONFIG,
1603 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1604 queue, txq->axq_qnum, params->aifs, params->cw_min,
1605 params->cw_max, params->txop);
1607 ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1608 ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1610 ath_err(common, "TXQ Update failed\n");
1612 mutex_unlock(&sc->mutex);
1613 ath9k_ps_restore(sc);
1618 static int ath9k_set_key(struct ieee80211_hw *hw,
1619 enum set_key_cmd cmd,
1620 struct ieee80211_vif *vif,
1621 struct ieee80211_sta *sta,
1622 struct ieee80211_key_conf *key)
1624 struct ath_softc *sc = hw->priv;
1625 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1626 struct ath_node *an = NULL;
1629 if (ath9k_modparam_nohwcrypt)
1632 if ((vif->type == NL80211_IFTYPE_ADHOC ||
1633 vif->type == NL80211_IFTYPE_MESH_POINT) &&
1634 (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1635 key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1636 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1638 * For now, disable hw crypto for the RSN IBSS group keys. This
1639 * could be optimized in the future to use a modified key cache
1640 * design to support per-STA RX GTK, but until that gets
1641 * implemented, use of software crypto for group addressed
1642 * frames is a acceptable to allow RSN IBSS to be used.
1647 mutex_lock(&sc->mutex);
1648 ath9k_ps_wakeup(sc);
1649 ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1651 an = (struct ath_node *)sta->drv_priv;
1656 ath9k_del_ps_key(sc, vif, sta);
1658 key->hw_key_idx = 0;
1659 ret = ath_key_config(common, vif, sta, key);
1661 key->hw_key_idx = ret;
1662 /* push IV and Michael MIC generation to stack */
1663 key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1664 if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1665 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1666 if (sc->sc_ah->sw_mgmt_crypto_tx &&
1667 key->cipher == WLAN_CIPHER_SUITE_CCMP)
1668 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1671 if (an && key->hw_key_idx) {
1672 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1675 an->key_idx[i] = key->hw_key_idx;
1678 WARN_ON(i == ARRAY_SIZE(an->key_idx));
1682 ath_key_delete(common, key);
1684 for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1685 if (an->key_idx[i] != key->hw_key_idx)
1691 key->hw_key_idx = 0;
1697 ath9k_ps_restore(sc);
1698 mutex_unlock(&sc->mutex);
1703 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1704 struct ieee80211_vif *vif,
1705 struct ieee80211_bss_conf *bss_conf,
1709 (BSS_CHANGED_ASSOC | \
1710 BSS_CHANGED_IBSS | \
1711 BSS_CHANGED_BEACON_ENABLED)
1713 struct ath_softc *sc = hw->priv;
1714 struct ath_hw *ah = sc->sc_ah;
1715 struct ath_common *common = ath9k_hw_common(ah);
1716 struct ath_vif *avp = (void *)vif->drv_priv;
1719 ath9k_ps_wakeup(sc);
1720 mutex_lock(&sc->mutex);
1722 if (changed & BSS_CHANGED_ASSOC) {
1723 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1724 bss_conf->bssid, bss_conf->assoc);
1726 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1727 avp->aid = bss_conf->aid;
1728 avp->assoc = bss_conf->assoc;
1730 ath9k_calculate_summary_state(sc, avp->chanctx);
1733 if (changed & BSS_CHANGED_IBSS) {
1734 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1735 common->curaid = bss_conf->aid;
1736 ath9k_hw_write_associd(sc->sc_ah);
1739 if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1740 (changed & BSS_CHANGED_BEACON_INT) ||
1741 (changed & BSS_CHANGED_BEACON_INFO)) {
1742 ath9k_beacon_config(sc, vif, changed);
1743 if (changed & BSS_CHANGED_BEACON_ENABLED)
1744 ath9k_calculate_summary_state(sc, avp->chanctx);
1747 if ((avp->chanctx == sc->cur_chan) &&
1748 (changed & BSS_CHANGED_ERP_SLOT)) {
1749 if (bss_conf->use_short_slot)
1753 if (vif->type == NL80211_IFTYPE_AP) {
1755 * Defer update, so that connected stations can adjust
1756 * their settings at the same time.
1757 * See beacon.c for more details
1759 sc->beacon.slottime = slottime;
1760 sc->beacon.updateslot = UPDATE;
1762 ah->slottime = slottime;
1763 ath9k_hw_init_global_settings(ah);
1767 if (changed & BSS_CHANGED_P2P_PS)
1768 ath9k_p2p_bss_info_changed(sc, vif);
1770 if (changed & CHECK_ANI)
1773 mutex_unlock(&sc->mutex);
1774 ath9k_ps_restore(sc);
1779 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1781 struct ath_softc *sc = hw->priv;
1784 mutex_lock(&sc->mutex);
1785 ath9k_ps_wakeup(sc);
1786 tsf = ath9k_hw_gettsf64(sc->sc_ah);
1787 ath9k_ps_restore(sc);
1788 mutex_unlock(&sc->mutex);
1793 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1794 struct ieee80211_vif *vif,
1797 struct ath_softc *sc = hw->priv;
1799 mutex_lock(&sc->mutex);
1800 ath9k_ps_wakeup(sc);
1801 ath9k_hw_settsf64(sc->sc_ah, tsf);
1802 ath9k_ps_restore(sc);
1803 mutex_unlock(&sc->mutex);
1806 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1808 struct ath_softc *sc = hw->priv;
1810 mutex_lock(&sc->mutex);
1812 ath9k_ps_wakeup(sc);
1813 ath9k_hw_reset_tsf(sc->sc_ah);
1814 ath9k_ps_restore(sc);
1816 mutex_unlock(&sc->mutex);
1819 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1820 struct ieee80211_vif *vif,
1821 enum ieee80211_ampdu_mlme_action action,
1822 struct ieee80211_sta *sta,
1823 u16 tid, u16 *ssn, u8 buf_size)
1825 struct ath_softc *sc = hw->priv;
1826 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1830 mutex_lock(&sc->mutex);
1833 case IEEE80211_AMPDU_RX_START:
1835 case IEEE80211_AMPDU_RX_STOP:
1837 case IEEE80211_AMPDU_TX_START:
1838 if (ath9k_is_chanctx_enabled()) {
1839 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1844 ath9k_ps_wakeup(sc);
1845 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1847 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1848 ath9k_ps_restore(sc);
1850 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1851 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1853 case IEEE80211_AMPDU_TX_STOP_CONT:
1854 ath9k_ps_wakeup(sc);
1855 ath_tx_aggr_stop(sc, sta, tid);
1857 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1858 ath9k_ps_restore(sc);
1860 case IEEE80211_AMPDU_TX_OPERATIONAL:
1861 ath9k_ps_wakeup(sc);
1862 ath_tx_aggr_resume(sc, sta, tid);
1863 ath9k_ps_restore(sc);
1866 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1869 mutex_unlock(&sc->mutex);
1874 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1875 struct survey_info *survey)
1877 struct ath_softc *sc = hw->priv;
1878 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1879 struct ieee80211_supported_band *sband;
1880 struct ieee80211_channel *chan;
1883 if (config_enabled(CONFIG_ATH9K_TX99))
1886 spin_lock_bh(&common->cc_lock);
1888 ath_update_survey_stats(sc);
1890 sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1891 if (sband && idx >= sband->n_channels) {
1892 idx -= sband->n_channels;
1897 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1899 if (!sband || idx >= sband->n_channels) {
1900 spin_unlock_bh(&common->cc_lock);
1904 chan = &sband->channels[idx];
1905 pos = chan->hw_value;
1906 memcpy(survey, &sc->survey[pos], sizeof(*survey));
1907 survey->channel = chan;
1908 spin_unlock_bh(&common->cc_lock);
1913 static void ath9k_enable_dynack(struct ath_softc *sc)
1915 #ifdef CONFIG_ATH9K_DYNACK
1917 struct ath_hw *ah = sc->sc_ah;
1919 ath_dynack_reset(ah);
1921 ah->dynack.enabled = true;
1922 rfilt = ath_calcrxfilter(sc);
1923 ath9k_hw_setrxfilter(ah, rfilt);
1927 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1930 struct ath_softc *sc = hw->priv;
1931 struct ath_hw *ah = sc->sc_ah;
1933 if (config_enabled(CONFIG_ATH9K_TX99))
1936 mutex_lock(&sc->mutex);
1938 if (coverage_class >= 0) {
1939 ah->coverage_class = coverage_class;
1940 if (ah->dynack.enabled) {
1943 ah->dynack.enabled = false;
1944 rfilt = ath_calcrxfilter(sc);
1945 ath9k_hw_setrxfilter(ah, rfilt);
1947 ath9k_ps_wakeup(sc);
1948 ath9k_hw_init_global_settings(ah);
1949 ath9k_ps_restore(sc);
1950 } else if (!ah->dynack.enabled) {
1951 ath9k_enable_dynack(sc);
1954 mutex_unlock(&sc->mutex);
1957 static bool ath9k_has_tx_pending(struct ath_softc *sc,
1962 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1963 if (!ATH_TXQ_SETUP(sc, i))
1966 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
1975 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1976 u32 queues, bool drop)
1978 struct ath_softc *sc = hw->priv;
1979 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1981 if (ath9k_is_chanctx_enabled()) {
1982 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
1986 * If MCC is active, extend the flush timeout
1987 * and wait for the HW/SW queues to become
1988 * empty. This needs to be done outside the
1989 * sc->mutex lock to allow the channel scheduler
1990 * to switch channel contexts.
1992 * The vif queues have been stopped in mac80211,
1993 * so there won't be any incoming frames.
1995 __ath9k_flush(hw, queues, drop, true, true);
1999 mutex_lock(&sc->mutex);
2000 __ath9k_flush(hw, queues, drop, true, false);
2001 mutex_unlock(&sc->mutex);
2004 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2005 bool sw_pending, bool timeout_override)
2007 struct ath_softc *sc = hw->priv;
2008 struct ath_hw *ah = sc->sc_ah;
2009 struct ath_common *common = ath9k_hw_common(ah);
2013 cancel_delayed_work_sync(&sc->tx_complete_work);
2015 if (ah->ah_flags & AH_UNPLUGGED) {
2016 ath_dbg(common, ANY, "Device has been unplugged!\n");
2020 if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2021 ath_dbg(common, ANY, "Device not present\n");
2025 spin_lock_bh(&sc->chan_lock);
2026 if (timeout_override)
2029 timeout = sc->cur_chan->flush_timeout;
2030 spin_unlock_bh(&sc->chan_lock);
2032 ath_dbg(common, CHAN_CTX,
2033 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2035 if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2040 ath9k_ps_wakeup(sc);
2041 spin_lock_bh(&sc->sc_pcu_lock);
2042 drain_txq = ath_drain_all_txq(sc);
2043 spin_unlock_bh(&sc->sc_pcu_lock);
2046 ath_reset(sc, NULL);
2048 ath9k_ps_restore(sc);
2051 ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2054 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2056 struct ath_softc *sc = hw->priv;
2058 return ath9k_has_tx_pending(sc, true);
2061 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2063 struct ath_softc *sc = hw->priv;
2064 struct ath_hw *ah = sc->sc_ah;
2065 struct ieee80211_vif *vif;
2066 struct ath_vif *avp;
2068 struct ath_tx_status ts;
2069 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2072 vif = sc->beacon.bslot[0];
2076 if (!vif->bss_conf.enable_beacon)
2079 avp = (void *)vif->drv_priv;
2081 if (!sc->beacon.tx_processed && !edma) {
2082 tasklet_disable(&sc->bcon_tasklet);
2085 if (!bf || !bf->bf_mpdu)
2088 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2089 if (status == -EINPROGRESS)
2092 sc->beacon.tx_processed = true;
2093 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2096 tasklet_enable(&sc->bcon_tasklet);
2099 return sc->beacon.tx_last;
2102 static int ath9k_get_stats(struct ieee80211_hw *hw,
2103 struct ieee80211_low_level_stats *stats)
2105 struct ath_softc *sc = hw->priv;
2106 struct ath_hw *ah = sc->sc_ah;
2107 struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2109 stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2110 stats->dot11RTSFailureCount = mib_stats->rts_bad;
2111 stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2112 stats->dot11RTSSuccessCount = mib_stats->rts_good;
2116 static u32 fill_chainmask(u32 cap, u32 new)
2121 for (i = 0; cap && new; i++, cap >>= 1) {
2122 if (!(cap & BIT(0)))
2134 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2136 if (AR_SREV_9300_20_OR_LATER(ah))
2139 switch (val & 0x7) {
2145 return (ah->caps.rx_chainmask == 1);
2151 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2153 struct ath_softc *sc = hw->priv;
2154 struct ath_hw *ah = sc->sc_ah;
2156 if (ah->caps.rx_chainmask != 1)
2159 if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2162 sc->ant_rx = rx_ant;
2163 sc->ant_tx = tx_ant;
2165 if (ah->caps.rx_chainmask == 1)
2168 /* AR9100 runs into calibration issues if not all rx chains are enabled */
2169 if (AR_SREV_9100(ah))
2170 ah->rxchainmask = 0x7;
2172 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2174 ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2175 ath9k_cmn_reload_chainmask(ah);
2180 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2182 struct ath_softc *sc = hw->priv;
2184 *tx_ant = sc->ant_tx;
2185 *rx_ant = sc->ant_rx;
2189 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2190 struct ieee80211_vif *vif,
2193 struct ath_softc *sc = hw->priv;
2194 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2195 set_bit(ATH_OP_SCANNING, &common->op_flags);
2198 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2199 struct ieee80211_vif *vif)
2201 struct ath_softc *sc = hw->priv;
2202 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2203 clear_bit(ATH_OP_SCANNING, &common->op_flags);
2206 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2208 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2210 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2212 if (sc->offchannel.roc_vif) {
2213 ath_dbg(common, CHAN_CTX,
2214 "%s: Aborting RoC\n", __func__);
2216 del_timer_sync(&sc->offchannel.timer);
2217 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2218 ath_roc_complete(sc, true);
2221 if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2222 ath_dbg(common, CHAN_CTX,
2223 "%s: Aborting HW scan\n", __func__);
2225 del_timer_sync(&sc->offchannel.timer);
2226 ath_scan_complete(sc, true);
2230 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2231 struct ieee80211_scan_request *hw_req)
2233 struct cfg80211_scan_request *req = &hw_req->req;
2234 struct ath_softc *sc = hw->priv;
2235 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2238 mutex_lock(&sc->mutex);
2240 if (WARN_ON(sc->offchannel.scan_req)) {
2245 ath9k_ps_wakeup(sc);
2246 set_bit(ATH_OP_SCANNING, &common->op_flags);
2247 sc->offchannel.scan_vif = vif;
2248 sc->offchannel.scan_req = req;
2249 sc->offchannel.scan_idx = 0;
2251 ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2254 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2255 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2256 ath_offchannel_next(sc);
2260 mutex_unlock(&sc->mutex);
2265 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2266 struct ieee80211_vif *vif)
2268 struct ath_softc *sc = hw->priv;
2269 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2271 ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2273 mutex_lock(&sc->mutex);
2274 del_timer_sync(&sc->offchannel.timer);
2275 ath_scan_complete(sc, true);
2276 mutex_unlock(&sc->mutex);
2279 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2280 struct ieee80211_vif *vif,
2281 struct ieee80211_channel *chan, int duration,
2282 enum ieee80211_roc_type type)
2284 struct ath_softc *sc = hw->priv;
2285 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2288 mutex_lock(&sc->mutex);
2290 if (WARN_ON(sc->offchannel.roc_vif)) {
2295 ath9k_ps_wakeup(sc);
2296 sc->offchannel.roc_vif = vif;
2297 sc->offchannel.roc_chan = chan;
2298 sc->offchannel.roc_duration = duration;
2300 ath_dbg(common, CHAN_CTX,
2301 "RoC request on vif: %pM, type: %d duration: %d\n",
2302 vif->addr, type, duration);
2304 if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2305 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2306 ath_offchannel_next(sc);
2310 mutex_unlock(&sc->mutex);
2315 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2317 struct ath_softc *sc = hw->priv;
2318 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2320 mutex_lock(&sc->mutex);
2322 ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2323 del_timer_sync(&sc->offchannel.timer);
2325 if (sc->offchannel.roc_vif) {
2326 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2327 ath_roc_complete(sc, true);
2330 mutex_unlock(&sc->mutex);
2335 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2336 struct ieee80211_chanctx_conf *conf)
2338 struct ath_softc *sc = hw->priv;
2339 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2340 struct ath_chanctx *ctx, **ptr;
2343 mutex_lock(&sc->mutex);
2345 ath_for_each_chanctx(sc, ctx) {
2349 ptr = (void *) conf->drv_priv;
2351 ctx->assigned = true;
2352 pos = ctx - &sc->chanctx[0];
2353 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2355 ath_dbg(common, CHAN_CTX,
2356 "Add channel context: %d MHz\n",
2357 conf->def.chan->center_freq);
2359 ath_chanctx_set_channel(sc, ctx, &conf->def);
2361 mutex_unlock(&sc->mutex);
2365 mutex_unlock(&sc->mutex);
2370 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2371 struct ieee80211_chanctx_conf *conf)
2373 struct ath_softc *sc = hw->priv;
2374 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2375 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2377 mutex_lock(&sc->mutex);
2379 ath_dbg(common, CHAN_CTX,
2380 "Remove channel context: %d MHz\n",
2381 conf->def.chan->center_freq);
2383 ctx->assigned = false;
2384 ctx->hw_queue_base = 0;
2385 ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2387 mutex_unlock(&sc->mutex);
2390 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2391 struct ieee80211_chanctx_conf *conf,
2394 struct ath_softc *sc = hw->priv;
2395 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2396 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2398 mutex_lock(&sc->mutex);
2399 ath_dbg(common, CHAN_CTX,
2400 "Change channel context: %d MHz\n",
2401 conf->def.chan->center_freq);
2402 ath_chanctx_set_channel(sc, ctx, &conf->def);
2403 mutex_unlock(&sc->mutex);
2406 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2407 struct ieee80211_vif *vif,
2408 struct ieee80211_chanctx_conf *conf)
2410 struct ath_softc *sc = hw->priv;
2411 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2412 struct ath_vif *avp = (void *)vif->drv_priv;
2413 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2416 ath9k_cancel_pending_offchannel(sc);
2418 mutex_lock(&sc->mutex);
2420 ath_dbg(common, CHAN_CTX,
2421 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2422 vif->addr, vif->type, vif->p2p,
2423 conf->def.chan->center_freq);
2426 ctx->nvifs_assigned++;
2427 list_add_tail(&avp->list, &ctx->vifs);
2428 ath9k_calculate_summary_state(sc, ctx);
2429 for (i = 0; i < IEEE80211_NUM_ACS; i++)
2430 vif->hw_queue[i] = ctx->hw_queue_base + i;
2432 mutex_unlock(&sc->mutex);
2437 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2438 struct ieee80211_vif *vif,
2439 struct ieee80211_chanctx_conf *conf)
2441 struct ath_softc *sc = hw->priv;
2442 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2443 struct ath_vif *avp = (void *)vif->drv_priv;
2444 struct ath_chanctx *ctx = ath_chanctx_get(conf);
2447 ath9k_cancel_pending_offchannel(sc);
2449 mutex_lock(&sc->mutex);
2451 ath_dbg(common, CHAN_CTX,
2452 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2453 vif->addr, vif->type, vif->p2p,
2454 conf->def.chan->center_freq);
2456 avp->chanctx = NULL;
2457 ctx->nvifs_assigned--;
2458 list_del(&avp->list);
2459 ath9k_calculate_summary_state(sc, ctx);
2460 for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2461 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2463 mutex_unlock(&sc->mutex);
2466 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2467 struct ieee80211_vif *vif)
2469 struct ath_softc *sc = hw->priv;
2470 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2471 struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2472 struct ath_beacon_config *cur_conf;
2473 struct ath_chanctx *go_ctx;
2474 unsigned long timeout;
2475 bool changed = false;
2478 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2484 mutex_lock(&sc->mutex);
2486 spin_lock_bh(&sc->chan_lock);
2487 if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2489 spin_unlock_bh(&sc->chan_lock);
2494 ath9k_cancel_pending_offchannel(sc);
2496 go_ctx = ath_is_go_chanctx_present(sc);
2500 * Wait till the GO interface gets a chance
2501 * to send out an NoA.
2503 spin_lock_bh(&sc->chan_lock);
2504 sc->sched.mgd_prepare_tx = true;
2505 cur_conf = &go_ctx->beacon;
2506 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2507 spin_unlock_bh(&sc->chan_lock);
2509 timeout = usecs_to_jiffies(beacon_int * 2);
2510 init_completion(&sc->go_beacon);
2512 mutex_unlock(&sc->mutex);
2514 if (wait_for_completion_timeout(&sc->go_beacon,
2516 ath_dbg(common, CHAN_CTX,
2517 "Failed to send new NoA\n");
2519 spin_lock_bh(&sc->chan_lock);
2520 sc->sched.mgd_prepare_tx = false;
2521 spin_unlock_bh(&sc->chan_lock);
2524 mutex_lock(&sc->mutex);
2527 ath_dbg(common, CHAN_CTX,
2528 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2529 __func__, vif->addr);
2531 spin_lock_bh(&sc->chan_lock);
2532 sc->next_chan = avp->chanctx;
2533 sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2534 spin_unlock_bh(&sc->chan_lock);
2536 ath_chanctx_set_next(sc, true);
2538 mutex_unlock(&sc->mutex);
2541 void ath9k_fill_chanctx_ops(void)
2543 if (!ath9k_is_chanctx_enabled())
2546 ath9k_ops.hw_scan = ath9k_hw_scan;
2547 ath9k_ops.cancel_hw_scan = ath9k_cancel_hw_scan;
2548 ath9k_ops.remain_on_channel = ath9k_remain_on_channel;
2549 ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2550 ath9k_ops.add_chanctx = ath9k_add_chanctx;
2551 ath9k_ops.remove_chanctx = ath9k_remove_chanctx;
2552 ath9k_ops.change_chanctx = ath9k_change_chanctx;
2553 ath9k_ops.assign_vif_chanctx = ath9k_assign_vif_chanctx;
2554 ath9k_ops.unassign_vif_chanctx = ath9k_unassign_vif_chanctx;
2555 ath9k_ops.mgd_prepare_tx = ath9k_mgd_prepare_tx;
2560 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2563 struct ath_softc *sc = hw->priv;
2564 struct ath_vif *avp = (void *)vif->drv_priv;
2566 mutex_lock(&sc->mutex);
2568 *dbm = avp->chanctx->cur_txpower;
2570 *dbm = sc->cur_chan->cur_txpower;
2571 mutex_unlock(&sc->mutex);
2578 struct ieee80211_ops ath9k_ops = {
2580 .start = ath9k_start,
2582 .add_interface = ath9k_add_interface,
2583 .change_interface = ath9k_change_interface,
2584 .remove_interface = ath9k_remove_interface,
2585 .config = ath9k_config,
2586 .configure_filter = ath9k_configure_filter,
2587 .sta_state = ath9k_sta_state,
2588 .sta_notify = ath9k_sta_notify,
2589 .conf_tx = ath9k_conf_tx,
2590 .bss_info_changed = ath9k_bss_info_changed,
2591 .set_key = ath9k_set_key,
2592 .get_tsf = ath9k_get_tsf,
2593 .set_tsf = ath9k_set_tsf,
2594 .reset_tsf = ath9k_reset_tsf,
2595 .ampdu_action = ath9k_ampdu_action,
2596 .get_survey = ath9k_get_survey,
2597 .rfkill_poll = ath9k_rfkill_poll_state,
2598 .set_coverage_class = ath9k_set_coverage_class,
2599 .flush = ath9k_flush,
2600 .tx_frames_pending = ath9k_tx_frames_pending,
2601 .tx_last_beacon = ath9k_tx_last_beacon,
2602 .release_buffered_frames = ath9k_release_buffered_frames,
2603 .get_stats = ath9k_get_stats,
2604 .set_antenna = ath9k_set_antenna,
2605 .get_antenna = ath9k_get_antenna,
2607 #ifdef CONFIG_ATH9K_WOW
2608 .suspend = ath9k_suspend,
2609 .resume = ath9k_resume,
2610 .set_wakeup = ath9k_set_wakeup,
2613 #ifdef CONFIG_ATH9K_DEBUGFS
2614 .get_et_sset_count = ath9k_get_et_sset_count,
2615 .get_et_stats = ath9k_get_et_stats,
2616 .get_et_strings = ath9k_get_et_strings,
2619 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2620 .sta_add_debugfs = ath9k_sta_add_debugfs,
2622 .sw_scan_start = ath9k_sw_scan_start,
2623 .sw_scan_complete = ath9k_sw_scan_complete,
2624 .get_txpower = ath9k_get_txpower,