2 * Copyright (c) 2008-2011 Atheros Communications Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 #include "ar9003_mac.h"
20 #define SKB_CB_ATHBUF(__skb) (*((struct ath_buf **)__skb->cb))
22 static inline bool ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta,
23 int mindelta, int main_rssi_avg,
24 int alt_rssi_avg, int pkt_count)
26 return (((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
27 (alt_rssi_avg > main_rssi_avg + maxdelta)) ||
28 (alt_rssi_avg > main_rssi_avg + mindelta)) && (pkt_count > 50);
31 static inline bool ath_ant_div_comb_alt_check(u8 div_group, int alt_ratio,
32 int curr_main_set, int curr_alt_set,
33 int alt_rssi_avg, int main_rssi_avg)
38 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
43 if ((((curr_main_set == ATH_ANT_DIV_COMB_LNA2) &&
44 (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) &&
45 (alt_rssi_avg >= (main_rssi_avg - 5))) ||
46 ((curr_main_set == ATH_ANT_DIV_COMB_LNA1) &&
47 (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) &&
48 (alt_rssi_avg >= (main_rssi_avg - 2)))) &&
59 static inline bool ath9k_check_auto_sleep(struct ath_softc *sc)
61 return sc->ps_enabled &&
62 (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP);
66 * Setup and link descriptors.
68 * 11N: we can no longer afford to self link the last descriptor.
69 * MAC acknowledges BA status as long as it copies frames to host
70 * buffer (or rx fifo). This can incorrectly acknowledge packets
71 * to a sender if last desc is self-linked.
73 static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
75 struct ath_hw *ah = sc->sc_ah;
76 struct ath_common *common = ath9k_hw_common(ah);
83 ds->ds_link = 0; /* link to null */
84 ds->ds_data = bf->bf_buf_addr;
86 /* virtual addr of the beginning of the buffer. */
89 ds->ds_vdata = skb->data;
92 * setup rx descriptors. The rx_bufsize here tells the hardware
93 * how much data it can DMA to us and that we are prepared
96 ath9k_hw_setuprxdesc(ah, ds,
100 if (sc->rx.rxlink == NULL)
101 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
103 *sc->rx.rxlink = bf->bf_daddr;
105 sc->rx.rxlink = &ds->ds_link;
108 static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
110 /* XXX block beacon interrupts */
111 ath9k_hw_setantenna(sc->sc_ah, antenna);
112 sc->rx.defant = antenna;
113 sc->rx.rxotherant = 0;
116 static void ath_opmode_init(struct ath_softc *sc)
118 struct ath_hw *ah = sc->sc_ah;
119 struct ath_common *common = ath9k_hw_common(ah);
123 /* configure rx filter */
124 rfilt = ath_calcrxfilter(sc);
125 ath9k_hw_setrxfilter(ah, rfilt);
127 /* configure bssid mask */
128 ath_hw_setbssidmask(common);
130 /* configure operational mode */
131 ath9k_hw_setopmode(ah);
133 /* calculate and install multicast filter */
134 mfilt[0] = mfilt[1] = ~0;
135 ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
138 static bool ath_rx_edma_buf_link(struct ath_softc *sc,
139 enum ath9k_rx_qtype qtype)
141 struct ath_hw *ah = sc->sc_ah;
142 struct ath_rx_edma *rx_edma;
146 rx_edma = &sc->rx.rx_edma[qtype];
147 if (skb_queue_len(&rx_edma->rx_fifo) >= rx_edma->rx_fifo_hwsize)
150 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
151 list_del_init(&bf->list);
156 memset(skb->data, 0, ah->caps.rx_status_len);
157 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
158 ah->caps.rx_status_len, DMA_TO_DEVICE);
160 SKB_CB_ATHBUF(skb) = bf;
161 ath9k_hw_addrxbuf_edma(ah, bf->bf_buf_addr, qtype);
162 skb_queue_tail(&rx_edma->rx_fifo, skb);
167 static void ath_rx_addbuffer_edma(struct ath_softc *sc,
168 enum ath9k_rx_qtype qtype, int size)
170 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
173 if (list_empty(&sc->rx.rxbuf)) {
174 ath_dbg(common, ATH_DBG_QUEUE, "No free rx buf available\n");
178 while (!list_empty(&sc->rx.rxbuf)) {
181 if (!ath_rx_edma_buf_link(sc, qtype))
189 static void ath_rx_remove_buffer(struct ath_softc *sc,
190 enum ath9k_rx_qtype qtype)
193 struct ath_rx_edma *rx_edma;
196 rx_edma = &sc->rx.rx_edma[qtype];
198 while ((skb = skb_dequeue(&rx_edma->rx_fifo)) != NULL) {
199 bf = SKB_CB_ATHBUF(skb);
201 list_add_tail(&bf->list, &sc->rx.rxbuf);
205 static void ath_rx_edma_cleanup(struct ath_softc *sc)
209 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
210 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
212 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
214 dev_kfree_skb_any(bf->bf_mpdu);
217 INIT_LIST_HEAD(&sc->rx.rxbuf);
219 kfree(sc->rx.rx_bufptr);
220 sc->rx.rx_bufptr = NULL;
223 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
225 skb_queue_head_init(&rx_edma->rx_fifo);
226 skb_queue_head_init(&rx_edma->rx_buffers);
227 rx_edma->rx_fifo_hwsize = size;
230 static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
232 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
233 struct ath_hw *ah = sc->sc_ah;
239 ath9k_hw_set_rx_bufsize(ah, common->rx_bufsize -
240 ah->caps.rx_status_len);
242 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_LP],
243 ah->caps.rx_lp_qdepth);
244 ath_rx_edma_init_queue(&sc->rx.rx_edma[ATH9K_RX_QUEUE_HP],
245 ah->caps.rx_hp_qdepth);
247 size = sizeof(struct ath_buf) * nbufs;
248 bf = kzalloc(size, GFP_KERNEL);
252 INIT_LIST_HEAD(&sc->rx.rxbuf);
253 sc->rx.rx_bufptr = bf;
255 for (i = 0; i < nbufs; i++, bf++) {
256 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
262 memset(skb->data, 0, common->rx_bufsize);
265 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
268 if (unlikely(dma_mapping_error(sc->dev,
270 dev_kfree_skb_any(skb);
274 "dma_mapping_error() on RX init\n");
279 list_add_tail(&bf->list, &sc->rx.rxbuf);
285 ath_rx_edma_cleanup(sc);
289 static void ath_edma_start_recv(struct ath_softc *sc)
291 spin_lock_bh(&sc->rx.rxbuflock);
293 ath9k_hw_rxena(sc->sc_ah);
295 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
296 sc->rx.rx_edma[ATH9K_RX_QUEUE_HP].rx_fifo_hwsize);
298 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP,
299 sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize);
303 ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
305 spin_unlock_bh(&sc->rx.rxbuflock);
308 static void ath_edma_stop_recv(struct ath_softc *sc)
310 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP);
311 ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP);
314 int ath_rx_init(struct ath_softc *sc, int nbufs)
316 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
321 spin_lock_init(&sc->sc_pcu_lock);
322 sc->sc_flags &= ~SC_OP_RXFLUSH;
323 spin_lock_init(&sc->rx.rxbuflock);
325 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
326 sc->sc_ah->caps.rx_status_len;
328 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
329 return ath_rx_edma_init(sc, nbufs);
331 ath_dbg(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
332 common->cachelsz, common->rx_bufsize);
334 /* Initialize rx descriptors */
336 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
340 "failed to allocate rx descriptors: %d\n",
345 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
346 skb = ath_rxbuf_alloc(common, common->rx_bufsize,
354 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
357 if (unlikely(dma_mapping_error(sc->dev,
359 dev_kfree_skb_any(skb);
363 "dma_mapping_error() on RX init\n");
368 sc->rx.rxlink = NULL;
378 void ath_rx_cleanup(struct ath_softc *sc)
380 struct ath_hw *ah = sc->sc_ah;
381 struct ath_common *common = ath9k_hw_common(ah);
385 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
386 ath_rx_edma_cleanup(sc);
389 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
392 dma_unmap_single(sc->dev, bf->bf_buf_addr,
401 if (sc->rx.rxdma.dd_desc_len != 0)
402 ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
407 * Calculate the receive filter according to the
408 * operating mode and state:
410 * o always accept unicast, broadcast, and multicast traffic
411 * o maintain current state of phy error reception (the hal
412 * may enable phy error frames for noise immunity work)
413 * o probe request frames are accepted only when operating in
414 * hostap, adhoc, or monitor modes
415 * o enable promiscuous mode according to the interface state
417 * - when operating in adhoc mode so the 802.11 layer creates
418 * node table entries for peers,
419 * - when operating in station mode for collecting rssi data when
420 * the station is otherwise quiet, or
421 * - when operating as a repeater so we see repeater-sta beacons
425 u32 ath_calcrxfilter(struct ath_softc *sc)
427 #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
431 rfilt = (ath9k_hw_getrxfilter(sc->sc_ah) & RX_FILTER_PRESERVE)
432 | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
433 | ATH9K_RX_FILTER_MCAST;
435 if (sc->rx.rxfilter & FIF_PROBE_REQ)
436 rfilt |= ATH9K_RX_FILTER_PROBEREQ;
439 * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
440 * mode interface or when in monitor mode. AP mode does not need this
441 * since it receives all in-BSS frames anyway.
443 if (sc->sc_ah->is_monitoring)
444 rfilt |= ATH9K_RX_FILTER_PROM;
446 if (sc->rx.rxfilter & FIF_CONTROL)
447 rfilt |= ATH9K_RX_FILTER_CONTROL;
449 if ((sc->sc_ah->opmode == NL80211_IFTYPE_STATION) &&
451 !(sc->rx.rxfilter & FIF_BCN_PRBRESP_PROMISC))
452 rfilt |= ATH9K_RX_FILTER_MYBEACON;
454 rfilt |= ATH9K_RX_FILTER_BEACON;
456 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
457 (sc->rx.rxfilter & FIF_PSPOLL))
458 rfilt |= ATH9K_RX_FILTER_PSPOLL;
460 if (conf_is_ht(&sc->hw->conf))
461 rfilt |= ATH9K_RX_FILTER_COMP_BAR;
463 if (sc->nvifs > 1 || (sc->rx.rxfilter & FIF_OTHER_BSS)) {
464 /* The following may also be needed for other older chips */
465 if (sc->sc_ah->hw_version.macVersion == AR_SREV_VERSION_9160)
466 rfilt |= ATH9K_RX_FILTER_PROM;
467 rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
472 #undef RX_FILTER_PRESERVE
475 int ath_startrecv(struct ath_softc *sc)
477 struct ath_hw *ah = sc->sc_ah;
478 struct ath_buf *bf, *tbf;
480 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
481 ath_edma_start_recv(sc);
485 spin_lock_bh(&sc->rx.rxbuflock);
486 if (list_empty(&sc->rx.rxbuf))
489 sc->rx.rxlink = NULL;
490 list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) {
491 ath_rx_buf_link(sc, bf);
494 /* We could have deleted elements so the list may be empty now */
495 if (list_empty(&sc->rx.rxbuf))
498 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
499 ath9k_hw_putrxbuf(ah, bf->bf_daddr);
504 ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL));
506 spin_unlock_bh(&sc->rx.rxbuflock);
511 bool ath_stoprecv(struct ath_softc *sc)
513 struct ath_hw *ah = sc->sc_ah;
514 bool stopped, reset = false;
516 spin_lock_bh(&sc->rx.rxbuflock);
517 ath9k_hw_abortpcurecv(ah);
518 ath9k_hw_setrxfilter(ah, 0);
519 stopped = ath9k_hw_stopdmarecv(ah, &reset);
521 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
522 ath_edma_stop_recv(sc);
524 sc->rx.rxlink = NULL;
525 spin_unlock_bh(&sc->rx.rxbuflock);
527 if (!(ah->ah_flags & AH_UNPLUGGED) &&
528 unlikely(!stopped)) {
529 ath_err(ath9k_hw_common(sc->sc_ah),
530 "Could not stop RX, we could be "
531 "confusing the DMA engine when we start RX up\n");
532 ATH_DBG_WARN_ON_ONCE(!stopped);
534 return stopped && !reset;
537 void ath_flushrecv(struct ath_softc *sc)
539 sc->sc_flags |= SC_OP_RXFLUSH;
540 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
541 ath_rx_tasklet(sc, 1, true);
542 ath_rx_tasklet(sc, 1, false);
543 sc->sc_flags &= ~SC_OP_RXFLUSH;
546 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
548 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
549 struct ieee80211_mgmt *mgmt;
550 u8 *pos, *end, id, elen;
551 struct ieee80211_tim_ie *tim;
553 mgmt = (struct ieee80211_mgmt *)skb->data;
554 pos = mgmt->u.beacon.variable;
555 end = skb->data + skb->len;
557 while (pos + 2 < end) {
560 if (pos + elen > end)
563 if (id == WLAN_EID_TIM) {
564 if (elen < sizeof(*tim))
566 tim = (struct ieee80211_tim_ie *) pos;
567 if (tim->dtim_count != 0)
569 return tim->bitmap_ctrl & 0x01;
578 static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
580 struct ieee80211_mgmt *mgmt;
581 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
583 if (skb->len < 24 + 8 + 2 + 2)
586 mgmt = (struct ieee80211_mgmt *)skb->data;
587 if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0) {
588 /* TODO: This doesn't work well if you have stations
589 * associated to two different APs because curbssid
590 * is just the last AP that any of the stations associated
593 return; /* not from our current AP */
596 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
598 if (sc->ps_flags & PS_BEACON_SYNC) {
599 sc->ps_flags &= ~PS_BEACON_SYNC;
600 ath_dbg(common, ATH_DBG_PS,
601 "Reconfigure Beacon timers based on timestamp from the AP\n");
603 sc->ps_flags &= ~PS_TSFOOR_SYNC;
606 if (ath_beacon_dtim_pending_cab(skb)) {
608 * Remain awake waiting for buffered broadcast/multicast
609 * frames. If the last broadcast/multicast frame is not
610 * received properly, the next beacon frame will work as
611 * a backup trigger for returning into NETWORK SLEEP state,
612 * so we are waiting for it as well.
614 ath_dbg(common, ATH_DBG_PS,
615 "Received DTIM beacon indicating buffered broadcast/multicast frame(s)\n");
616 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
620 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
622 * This can happen if a broadcast frame is dropped or the AP
623 * fails to send a frame indicating that all CAB frames have
626 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
627 ath_dbg(common, ATH_DBG_PS,
628 "PS wait for CAB frames timed out\n");
632 static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
634 struct ieee80211_hdr *hdr;
635 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
637 hdr = (struct ieee80211_hdr *)skb->data;
639 /* Process Beacon and CAB receive in PS state */
640 if (((sc->ps_flags & PS_WAIT_FOR_BEACON) || ath9k_check_auto_sleep(sc))
641 && ieee80211_is_beacon(hdr->frame_control))
642 ath_rx_ps_beacon(sc, skb);
643 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
644 (ieee80211_is_data(hdr->frame_control) ||
645 ieee80211_is_action(hdr->frame_control)) &&
646 is_multicast_ether_addr(hdr->addr1) &&
647 !ieee80211_has_moredata(hdr->frame_control)) {
649 * No more broadcast/multicast frames to be received at this
652 sc->ps_flags &= ~(PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON);
653 ath_dbg(common, ATH_DBG_PS,
654 "All PS CAB frames received, back to sleep\n");
655 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
656 !is_multicast_ether_addr(hdr->addr1) &&
657 !ieee80211_has_morefrags(hdr->frame_control)) {
658 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
659 ath_dbg(common, ATH_DBG_PS,
660 "Going back to sleep after having received PS-Poll data (0x%lx)\n",
661 sc->ps_flags & (PS_WAIT_FOR_BEACON |
663 PS_WAIT_FOR_PSPOLL_DATA |
664 PS_WAIT_FOR_TX_ACK));
668 static bool ath_edma_get_buffers(struct ath_softc *sc,
669 enum ath9k_rx_qtype qtype)
671 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
672 struct ath_hw *ah = sc->sc_ah;
673 struct ath_common *common = ath9k_hw_common(ah);
678 skb = skb_peek(&rx_edma->rx_fifo);
682 bf = SKB_CB_ATHBUF(skb);
685 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
686 common->rx_bufsize, DMA_FROM_DEVICE);
688 ret = ath9k_hw_process_rxdesc_edma(ah, NULL, skb->data);
689 if (ret == -EINPROGRESS) {
690 /*let device gain the buffer again*/
691 dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
692 common->rx_bufsize, DMA_FROM_DEVICE);
696 __skb_unlink(skb, &rx_edma->rx_fifo);
697 if (ret == -EINVAL) {
698 /* corrupt descriptor, skip this one and the following one */
699 list_add_tail(&bf->list, &sc->rx.rxbuf);
700 ath_rx_edma_buf_link(sc, qtype);
701 skb = skb_peek(&rx_edma->rx_fifo);
705 bf = SKB_CB_ATHBUF(skb);
708 __skb_unlink(skb, &rx_edma->rx_fifo);
709 list_add_tail(&bf->list, &sc->rx.rxbuf);
710 ath_rx_edma_buf_link(sc, qtype);
713 skb_queue_tail(&rx_edma->rx_buffers, skb);
718 static struct ath_buf *ath_edma_get_next_rx_buf(struct ath_softc *sc,
719 struct ath_rx_status *rs,
720 enum ath9k_rx_qtype qtype)
722 struct ath_rx_edma *rx_edma = &sc->rx.rx_edma[qtype];
726 while (ath_edma_get_buffers(sc, qtype));
727 skb = __skb_dequeue(&rx_edma->rx_buffers);
731 bf = SKB_CB_ATHBUF(skb);
732 ath9k_hw_process_rxdesc_edma(sc->sc_ah, rs, skb->data);
736 static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
737 struct ath_rx_status *rs)
739 struct ath_hw *ah = sc->sc_ah;
740 struct ath_common *common = ath9k_hw_common(ah);
745 if (list_empty(&sc->rx.rxbuf)) {
746 sc->rx.rxlink = NULL;
750 bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list);
754 * Must provide the virtual address of the current
755 * descriptor, the physical address, and the virtual
756 * address of the next descriptor in the h/w chain.
757 * This allows the HAL to look ahead to see if the
758 * hardware is done with a descriptor by checking the
759 * done bit in the following descriptor and the address
760 * of the current descriptor the DMA engine is working
761 * on. All this is necessary because of our use of
762 * a self-linked list to avoid rx overruns.
764 ret = ath9k_hw_rxprocdesc(ah, ds, rs, 0);
765 if (ret == -EINPROGRESS) {
766 struct ath_rx_status trs;
768 struct ath_desc *tds;
770 memset(&trs, 0, sizeof(trs));
771 if (list_is_last(&bf->list, &sc->rx.rxbuf)) {
772 sc->rx.rxlink = NULL;
776 tbf = list_entry(bf->list.next, struct ath_buf, list);
779 * On some hardware the descriptor status words could
780 * get corrupted, including the done bit. Because of
781 * this, check if the next descriptor's done bit is
784 * If the next descriptor's done bit is set, the current
785 * descriptor has been corrupted. Force s/w to discard
786 * this descriptor and continue...
790 ret = ath9k_hw_rxprocdesc(ah, tds, &trs, 0);
791 if (ret == -EINPROGRESS)
799 * Synchronize the DMA transfer with CPU before
800 * 1. accessing the frame
801 * 2. requeueing the same buffer to h/w
803 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
810 /* Assumes you've already done the endian to CPU conversion */
811 static bool ath9k_rx_accept(struct ath_common *common,
812 struct ieee80211_hdr *hdr,
813 struct ieee80211_rx_status *rxs,
814 struct ath_rx_status *rx_stats,
817 #define is_mc_or_valid_tkip_keyix ((is_mc || \
818 (rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID && \
819 test_bit(rx_stats->rs_keyix, common->tkip_keymap))))
821 struct ath_hw *ah = common->ah;
823 u8 rx_status_len = ah->caps.rx_status_len;
825 fc = hdr->frame_control;
827 if (!rx_stats->rs_datalen)
830 * rs_status follows rs_datalen so if rs_datalen is too large
831 * we can take a hint that hardware corrupted it, so ignore
834 if (rx_stats->rs_datalen > (common->rx_bufsize - rx_status_len))
837 /* Only use error bits from the last fragment */
838 if (rx_stats->rs_more)
842 * The rx_stats->rs_status will not be set until the end of the
843 * chained descriptors so it can be ignored if rs_more is set. The
844 * rs_more will be false at the last element of the chained
847 if (rx_stats->rs_status != 0) {
848 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
849 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
850 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
853 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
854 *decrypt_error = true;
855 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
858 * The MIC error bit is only valid if the frame
859 * is not a control frame or fragment, and it was
860 * decrypted using a valid TKIP key.
862 is_mc = !!is_multicast_ether_addr(hdr->addr1);
864 if (!ieee80211_is_ctl(fc) &&
865 !ieee80211_has_morefrags(fc) &&
866 !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
867 is_mc_or_valid_tkip_keyix)
868 rxs->flag |= RX_FLAG_MMIC_ERROR;
870 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
873 * Reject error frames with the exception of
874 * decryption and MIC failures. For monitor mode,
875 * we also ignore the CRC error.
877 if (ah->is_monitoring) {
878 if (rx_stats->rs_status &
879 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
883 if (rx_stats->rs_status &
884 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
892 static int ath9k_process_rate(struct ath_common *common,
893 struct ieee80211_hw *hw,
894 struct ath_rx_status *rx_stats,
895 struct ieee80211_rx_status *rxs)
897 struct ieee80211_supported_band *sband;
898 enum ieee80211_band band;
901 band = hw->conf.channel->band;
902 sband = hw->wiphy->bands[band];
904 if (rx_stats->rs_rate & 0x80) {
906 rxs->flag |= RX_FLAG_HT;
907 if (rx_stats->rs_flags & ATH9K_RX_2040)
908 rxs->flag |= RX_FLAG_40MHZ;
909 if (rx_stats->rs_flags & ATH9K_RX_GI)
910 rxs->flag |= RX_FLAG_SHORT_GI;
911 rxs->rate_idx = rx_stats->rs_rate & 0x7f;
915 for (i = 0; i < sband->n_bitrates; i++) {
916 if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
920 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
921 rxs->flag |= RX_FLAG_SHORTPRE;
928 * No valid hardware bitrate found -- we should not get here
929 * because hardware has already validated this frame as OK.
931 ath_dbg(common, ATH_DBG_XMIT,
932 "unsupported hw bitrate detected 0x%02x using 1 Mbit\n",
938 static void ath9k_process_rssi(struct ath_common *common,
939 struct ieee80211_hw *hw,
940 struct ieee80211_hdr *hdr,
941 struct ath_rx_status *rx_stats)
943 struct ath_softc *sc = hw->priv;
944 struct ath_hw *ah = common->ah;
948 if ((ah->opmode != NL80211_IFTYPE_STATION) &&
949 (ah->opmode != NL80211_IFTYPE_ADHOC))
952 fc = hdr->frame_control;
953 if (!ieee80211_is_beacon(fc) ||
954 compare_ether_addr(hdr->addr3, common->curbssid)) {
955 /* TODO: This doesn't work well if you have stations
956 * associated to two different APs because curbssid
957 * is just the last AP that any of the stations associated
963 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD && !rx_stats->rs_moreaggr)
964 ATH_RSSI_LPF(sc->last_rssi, rx_stats->rs_rssi);
966 last_rssi = sc->last_rssi;
967 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
968 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
969 ATH_RSSI_EP_MULTIPLIER);
970 if (rx_stats->rs_rssi < 0)
971 rx_stats->rs_rssi = 0;
973 /* Update Beacon RSSI, this is used by ANI. */
974 ah->stats.avgbrssi = rx_stats->rs_rssi;
978 * For Decrypt or Demic errors, we only mark packet status here and always push
979 * up the frame up to let mac80211 handle the actual error case, be it no
980 * decryption key or real decryption error. This let us keep statistics there.
982 static int ath9k_rx_skb_preprocess(struct ath_common *common,
983 struct ieee80211_hw *hw,
984 struct ieee80211_hdr *hdr,
985 struct ath_rx_status *rx_stats,
986 struct ieee80211_rx_status *rx_status,
989 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
992 * everything but the rate is checked here, the rate check is done
993 * separately to avoid doing two lookups for a rate for each frame.
995 if (!ath9k_rx_accept(common, hdr, rx_status, rx_stats, decrypt_error))
998 /* Only use status info from the last fragment */
999 if (rx_stats->rs_more)
1002 ath9k_process_rssi(common, hw, hdr, rx_stats);
1004 if (ath9k_process_rate(common, hw, rx_stats, rx_status))
1007 rx_status->band = hw->conf.channel->band;
1008 rx_status->freq = hw->conf.channel->center_freq;
1009 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
1010 rx_status->antenna = rx_stats->rs_antenna;
1011 rx_status->flag |= RX_FLAG_MACTIME_MPDU;
1016 static void ath9k_rx_skb_postprocess(struct ath_common *common,
1017 struct sk_buff *skb,
1018 struct ath_rx_status *rx_stats,
1019 struct ieee80211_rx_status *rxs,
1022 struct ath_hw *ah = common->ah;
1023 struct ieee80211_hdr *hdr;
1024 int hdrlen, padpos, padsize;
1028 /* see if any padding is done by the hw and remove it */
1029 hdr = (struct ieee80211_hdr *) skb->data;
1030 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1031 fc = hdr->frame_control;
1032 padpos = ath9k_cmn_padpos(hdr->frame_control);
1034 /* The MAC header is padded to have 32-bit boundary if the
1035 * packet payload is non-zero. The general calculation for
1036 * padsize would take into account odd header lengths:
1037 * padsize = (4 - padpos % 4) % 4; However, since only
1038 * even-length headers are used, padding can only be 0 or 2
1039 * bytes and we can optimize this a bit. In addition, we must
1040 * not try to remove padding from short control frames that do
1041 * not have payload. */
1042 padsize = padpos & 3;
1043 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
1044 memmove(skb->data + padsize, skb->data, padpos);
1045 skb_pull(skb, padsize);
1048 keyix = rx_stats->rs_keyix;
1050 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
1051 ieee80211_has_protected(fc)) {
1052 rxs->flag |= RX_FLAG_DECRYPTED;
1053 } else if (ieee80211_has_protected(fc)
1054 && !decrypt_error && skb->len >= hdrlen + 4) {
1055 keyix = skb->data[hdrlen + 3] >> 6;
1057 if (test_bit(keyix, common->keymap))
1058 rxs->flag |= RX_FLAG_DECRYPTED;
1060 if (ah->sw_mgmt_crypto &&
1061 (rxs->flag & RX_FLAG_DECRYPTED) &&
1062 ieee80211_is_mgmt(fc))
1063 /* Use software decrypt for management frames. */
1064 rxs->flag &= ~RX_FLAG_DECRYPTED;
1067 static void ath_lnaconf_alt_good_scan(struct ath_ant_comb *antcomb,
1068 struct ath_hw_antcomb_conf ant_conf,
1071 antcomb->quick_scan_cnt = 0;
1073 if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA2)
1074 antcomb->rssi_lna2 = main_rssi_avg;
1075 else if (ant_conf.main_lna_conf == ATH_ANT_DIV_COMB_LNA1)
1076 antcomb->rssi_lna1 = main_rssi_avg;
1078 switch ((ant_conf.main_lna_conf << 4) | ant_conf.alt_lna_conf) {
1079 case (0x10): /* LNA2 A-B */
1080 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1081 antcomb->first_quick_scan_conf =
1082 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1083 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1085 case (0x20): /* LNA1 A-B */
1086 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1087 antcomb->first_quick_scan_conf =
1088 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1089 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1091 case (0x21): /* LNA1 LNA2 */
1092 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA2;
1093 antcomb->first_quick_scan_conf =
1094 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1095 antcomb->second_quick_scan_conf =
1096 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1098 case (0x12): /* LNA2 LNA1 */
1099 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1;
1100 antcomb->first_quick_scan_conf =
1101 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1102 antcomb->second_quick_scan_conf =
1103 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1105 case (0x13): /* LNA2 A+B */
1106 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1107 antcomb->first_quick_scan_conf =
1108 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1109 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA1;
1111 case (0x23): /* LNA1 A+B */
1112 antcomb->main_conf = ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1113 antcomb->first_quick_scan_conf =
1114 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1115 antcomb->second_quick_scan_conf = ATH_ANT_DIV_COMB_LNA2;
1122 static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
1123 struct ath_hw_antcomb_conf *div_ant_conf,
1124 int main_rssi_avg, int alt_rssi_avg,
1128 switch (antcomb->quick_scan_cnt) {
1130 /* set alt to main, and alt to first conf */
1131 div_ant_conf->main_lna_conf = antcomb->main_conf;
1132 div_ant_conf->alt_lna_conf = antcomb->first_quick_scan_conf;
1135 /* set alt to main, and alt to first conf */
1136 div_ant_conf->main_lna_conf = antcomb->main_conf;
1137 div_ant_conf->alt_lna_conf = antcomb->second_quick_scan_conf;
1138 antcomb->rssi_first = main_rssi_avg;
1139 antcomb->rssi_second = alt_rssi_avg;
1141 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1143 if (ath_is_alt_ant_ratio_better(alt_ratio,
1144 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1145 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1146 main_rssi_avg, alt_rssi_avg,
1147 antcomb->total_pkt_count))
1148 antcomb->first_ratio = true;
1150 antcomb->first_ratio = false;
1151 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1152 if (ath_is_alt_ant_ratio_better(alt_ratio,
1153 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1154 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1155 main_rssi_avg, alt_rssi_avg,
1156 antcomb->total_pkt_count))
1157 antcomb->first_ratio = true;
1159 antcomb->first_ratio = false;
1161 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1162 (alt_rssi_avg > main_rssi_avg +
1163 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1164 (alt_rssi_avg > main_rssi_avg)) &&
1165 (antcomb->total_pkt_count > 50))
1166 antcomb->first_ratio = true;
1168 antcomb->first_ratio = false;
1172 antcomb->alt_good = false;
1173 antcomb->scan_not_start = false;
1174 antcomb->scan = false;
1175 antcomb->rssi_first = main_rssi_avg;
1176 antcomb->rssi_third = alt_rssi_avg;
1178 if (antcomb->second_quick_scan_conf == ATH_ANT_DIV_COMB_LNA1)
1179 antcomb->rssi_lna1 = alt_rssi_avg;
1180 else if (antcomb->second_quick_scan_conf ==
1181 ATH_ANT_DIV_COMB_LNA2)
1182 antcomb->rssi_lna2 = alt_rssi_avg;
1183 else if (antcomb->second_quick_scan_conf ==
1184 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2) {
1185 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2)
1186 antcomb->rssi_lna2 = main_rssi_avg;
1187 else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1)
1188 antcomb->rssi_lna1 = main_rssi_avg;
1191 if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
1192 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
1193 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1195 div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
1197 if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) {
1198 if (ath_is_alt_ant_ratio_better(alt_ratio,
1199 ATH_ANT_DIV_COMB_LNA1_DELTA_HI,
1200 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1201 main_rssi_avg, alt_rssi_avg,
1202 antcomb->total_pkt_count))
1203 antcomb->second_ratio = true;
1205 antcomb->second_ratio = false;
1206 } else if (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2) {
1207 if (ath_is_alt_ant_ratio_better(alt_ratio,
1208 ATH_ANT_DIV_COMB_LNA1_DELTA_MID,
1209 ATH_ANT_DIV_COMB_LNA1_DELTA_LOW,
1210 main_rssi_avg, alt_rssi_avg,
1211 antcomb->total_pkt_count))
1212 antcomb->second_ratio = true;
1214 antcomb->second_ratio = false;
1216 if ((((alt_ratio >= ATH_ANT_DIV_COMB_ALT_ANT_RATIO2) &&
1217 (alt_rssi_avg > main_rssi_avg +
1218 ATH_ANT_DIV_COMB_LNA1_DELTA_HI)) ||
1219 (alt_rssi_avg > main_rssi_avg)) &&
1220 (antcomb->total_pkt_count > 50))
1221 antcomb->second_ratio = true;
1223 antcomb->second_ratio = false;
1226 /* set alt to the conf with maximun ratio */
1227 if (antcomb->first_ratio && antcomb->second_ratio) {
1228 if (antcomb->rssi_second > antcomb->rssi_third) {
1230 if ((antcomb->first_quick_scan_conf ==
1231 ATH_ANT_DIV_COMB_LNA1) ||
1232 (antcomb->first_quick_scan_conf ==
1233 ATH_ANT_DIV_COMB_LNA2))
1234 /* Set alt LNA1 or LNA2*/
1235 if (div_ant_conf->main_lna_conf ==
1236 ATH_ANT_DIV_COMB_LNA2)
1237 div_ant_conf->alt_lna_conf =
1238 ATH_ANT_DIV_COMB_LNA1;
1240 div_ant_conf->alt_lna_conf =
1241 ATH_ANT_DIV_COMB_LNA2;
1243 /* Set alt to A+B or A-B */
1244 div_ant_conf->alt_lna_conf =
1245 antcomb->first_quick_scan_conf;
1246 } else if ((antcomb->second_quick_scan_conf ==
1247 ATH_ANT_DIV_COMB_LNA1) ||
1248 (antcomb->second_quick_scan_conf ==
1249 ATH_ANT_DIV_COMB_LNA2)) {
1250 /* Set alt LNA1 or LNA2 */
1251 if (div_ant_conf->main_lna_conf ==
1252 ATH_ANT_DIV_COMB_LNA2)
1253 div_ant_conf->alt_lna_conf =
1254 ATH_ANT_DIV_COMB_LNA1;
1256 div_ant_conf->alt_lna_conf =
1257 ATH_ANT_DIV_COMB_LNA2;
1259 /* Set alt to A+B or A-B */
1260 div_ant_conf->alt_lna_conf =
1261 antcomb->second_quick_scan_conf;
1263 } else if (antcomb->first_ratio) {
1265 if ((antcomb->first_quick_scan_conf ==
1266 ATH_ANT_DIV_COMB_LNA1) ||
1267 (antcomb->first_quick_scan_conf ==
1268 ATH_ANT_DIV_COMB_LNA2))
1269 /* Set alt LNA1 or LNA2 */
1270 if (div_ant_conf->main_lna_conf ==
1271 ATH_ANT_DIV_COMB_LNA2)
1272 div_ant_conf->alt_lna_conf =
1273 ATH_ANT_DIV_COMB_LNA1;
1275 div_ant_conf->alt_lna_conf =
1276 ATH_ANT_DIV_COMB_LNA2;
1278 /* Set alt to A+B or A-B */
1279 div_ant_conf->alt_lna_conf =
1280 antcomb->first_quick_scan_conf;
1281 } else if (antcomb->second_ratio) {
1283 if ((antcomb->second_quick_scan_conf ==
1284 ATH_ANT_DIV_COMB_LNA1) ||
1285 (antcomb->second_quick_scan_conf ==
1286 ATH_ANT_DIV_COMB_LNA2))
1287 /* Set alt LNA1 or LNA2 */
1288 if (div_ant_conf->main_lna_conf ==
1289 ATH_ANT_DIV_COMB_LNA2)
1290 div_ant_conf->alt_lna_conf =
1291 ATH_ANT_DIV_COMB_LNA1;
1293 div_ant_conf->alt_lna_conf =
1294 ATH_ANT_DIV_COMB_LNA2;
1296 /* Set alt to A+B or A-B */
1297 div_ant_conf->alt_lna_conf =
1298 antcomb->second_quick_scan_conf;
1300 /* main is largest */
1301 if ((antcomb->main_conf == ATH_ANT_DIV_COMB_LNA1) ||
1302 (antcomb->main_conf == ATH_ANT_DIV_COMB_LNA2))
1303 /* Set alt LNA1 or LNA2 */
1304 if (div_ant_conf->main_lna_conf ==
1305 ATH_ANT_DIV_COMB_LNA2)
1306 div_ant_conf->alt_lna_conf =
1307 ATH_ANT_DIV_COMB_LNA1;
1309 div_ant_conf->alt_lna_conf =
1310 ATH_ANT_DIV_COMB_LNA2;
1312 /* Set alt to A+B or A-B */
1313 div_ant_conf->alt_lna_conf = antcomb->main_conf;
1321 static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
1322 struct ath_ant_comb *antcomb, int alt_ratio)
1324 if (ant_conf->div_group == 0) {
1325 /* Adjust the fast_div_bias based on main and alt lna conf */
1326 switch ((ant_conf->main_lna_conf << 4) |
1327 ant_conf->alt_lna_conf) {
1328 case (0x01): /* A-B LNA2 */
1329 ant_conf->fast_div_bias = 0x3b;
1331 case (0x02): /* A-B LNA1 */
1332 ant_conf->fast_div_bias = 0x3d;
1334 case (0x03): /* A-B A+B */
1335 ant_conf->fast_div_bias = 0x1;
1337 case (0x10): /* LNA2 A-B */
1338 ant_conf->fast_div_bias = 0x7;
1340 case (0x12): /* LNA2 LNA1 */
1341 ant_conf->fast_div_bias = 0x2;
1343 case (0x13): /* LNA2 A+B */
1344 ant_conf->fast_div_bias = 0x7;
1346 case (0x20): /* LNA1 A-B */
1347 ant_conf->fast_div_bias = 0x6;
1349 case (0x21): /* LNA1 LNA2 */
1350 ant_conf->fast_div_bias = 0x0;
1352 case (0x23): /* LNA1 A+B */
1353 ant_conf->fast_div_bias = 0x6;
1355 case (0x30): /* A+B A-B */
1356 ant_conf->fast_div_bias = 0x1;
1358 case (0x31): /* A+B LNA2 */
1359 ant_conf->fast_div_bias = 0x3b;
1361 case (0x32): /* A+B LNA1 */
1362 ant_conf->fast_div_bias = 0x3d;
1367 } else if (ant_conf->div_group == 2) {
1368 /* Adjust the fast_div_bias based on main and alt_lna_conf */
1369 switch ((ant_conf->main_lna_conf << 4) |
1370 ant_conf->alt_lna_conf) {
1371 case (0x01): /* A-B LNA2 */
1372 ant_conf->fast_div_bias = 0x1;
1373 ant_conf->main_gaintb = 0;
1374 ant_conf->alt_gaintb = 0;
1376 case (0x02): /* A-B LNA1 */
1377 ant_conf->fast_div_bias = 0x1;
1378 ant_conf->main_gaintb = 0;
1379 ant_conf->alt_gaintb = 0;
1381 case (0x03): /* A-B A+B */
1382 ant_conf->fast_div_bias = 0x1;
1383 ant_conf->main_gaintb = 0;
1384 ant_conf->alt_gaintb = 0;
1386 case (0x10): /* LNA2 A-B */
1387 if (!(antcomb->scan) &&
1388 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1389 ant_conf->fast_div_bias = 0x1;
1391 ant_conf->fast_div_bias = 0x2;
1392 ant_conf->main_gaintb = 0;
1393 ant_conf->alt_gaintb = 0;
1395 case (0x12): /* LNA2 LNA1 */
1396 ant_conf->fast_div_bias = 0x1;
1397 ant_conf->main_gaintb = 0;
1398 ant_conf->alt_gaintb = 0;
1400 case (0x13): /* LNA2 A+B */
1401 if (!(antcomb->scan) &&
1402 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1403 ant_conf->fast_div_bias = 0x1;
1405 ant_conf->fast_div_bias = 0x2;
1406 ant_conf->main_gaintb = 0;
1407 ant_conf->alt_gaintb = 0;
1409 case (0x20): /* LNA1 A-B */
1410 if (!(antcomb->scan) &&
1411 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1412 ant_conf->fast_div_bias = 0x1;
1414 ant_conf->fast_div_bias = 0x2;
1415 ant_conf->main_gaintb = 0;
1416 ant_conf->alt_gaintb = 0;
1418 case (0x21): /* LNA1 LNA2 */
1419 ant_conf->fast_div_bias = 0x1;
1420 ant_conf->main_gaintb = 0;
1421 ant_conf->alt_gaintb = 0;
1423 case (0x23): /* LNA1 A+B */
1424 if (!(antcomb->scan) &&
1425 (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO))
1426 ant_conf->fast_div_bias = 0x1;
1428 ant_conf->fast_div_bias = 0x2;
1429 ant_conf->main_gaintb = 0;
1430 ant_conf->alt_gaintb = 0;
1432 case (0x30): /* A+B A-B */
1433 ant_conf->fast_div_bias = 0x1;
1434 ant_conf->main_gaintb = 0;
1435 ant_conf->alt_gaintb = 0;
1437 case (0x31): /* A+B LNA2 */
1438 ant_conf->fast_div_bias = 0x1;
1439 ant_conf->main_gaintb = 0;
1440 ant_conf->alt_gaintb = 0;
1442 case (0x32): /* A+B LNA1 */
1443 ant_conf->fast_div_bias = 0x1;
1444 ant_conf->main_gaintb = 0;
1445 ant_conf->alt_gaintb = 0;
1455 /* Antenna diversity and combining */
1456 static void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs)
1458 struct ath_hw_antcomb_conf div_ant_conf;
1459 struct ath_ant_comb *antcomb = &sc->ant_comb;
1460 int alt_ratio = 0, alt_rssi_avg = 0, main_rssi_avg = 0, curr_alt_set;
1462 int main_rssi = rs->rs_rssi_ctl0;
1463 int alt_rssi = rs->rs_rssi_ctl1;
1464 int rx_ant_conf, main_ant_conf;
1465 bool short_scan = false;
1467 rx_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_CURRENT_SHIFT) &
1469 main_ant_conf = (rs->rs_rssi_ctl2 >> ATH_ANT_RX_MAIN_SHIFT) &
1472 /* Record packet only when both main_rssi and alt_rssi is positive */
1473 if (main_rssi > 0 && alt_rssi > 0) {
1474 antcomb->total_pkt_count++;
1475 antcomb->main_total_rssi += main_rssi;
1476 antcomb->alt_total_rssi += alt_rssi;
1477 if (main_ant_conf == rx_ant_conf)
1478 antcomb->main_recv_cnt++;
1480 antcomb->alt_recv_cnt++;
1483 /* Short scan check */
1484 if (antcomb->scan && antcomb->alt_good) {
1485 if (time_after(jiffies, antcomb->scan_start_time +
1486 msecs_to_jiffies(ATH_ANT_DIV_COMB_SHORT_SCAN_INTR)))
1489 if (antcomb->total_pkt_count ==
1490 ATH_ANT_DIV_COMB_SHORT_SCAN_PKTCOUNT) {
1491 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1492 antcomb->total_pkt_count);
1493 if (alt_ratio < ATH_ANT_DIV_COMB_ALT_ANT_RATIO)
1498 if (((antcomb->total_pkt_count < ATH_ANT_DIV_COMB_MAX_PKTCOUNT) ||
1499 rs->rs_moreaggr) && !short_scan)
1502 if (antcomb->total_pkt_count) {
1503 alt_ratio = ((antcomb->alt_recv_cnt * 100) /
1504 antcomb->total_pkt_count);
1505 main_rssi_avg = (antcomb->main_total_rssi /
1506 antcomb->total_pkt_count);
1507 alt_rssi_avg = (antcomb->alt_total_rssi /
1508 antcomb->total_pkt_count);
1512 ath9k_hw_antdiv_comb_conf_get(sc->sc_ah, &div_ant_conf);
1513 curr_alt_set = div_ant_conf.alt_lna_conf;
1514 curr_main_set = div_ant_conf.main_lna_conf;
1518 if (antcomb->count == ATH_ANT_DIV_COMB_MAX_COUNT) {
1519 if (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO) {
1520 ath_lnaconf_alt_good_scan(antcomb, div_ant_conf,
1522 antcomb->alt_good = true;
1524 antcomb->alt_good = false;
1528 antcomb->scan = true;
1529 antcomb->scan_not_start = true;
1532 if (!antcomb->scan) {
1533 if (ath_ant_div_comb_alt_check(div_ant_conf.div_group,
1534 alt_ratio, curr_main_set, curr_alt_set,
1535 alt_rssi_avg, main_rssi_avg)) {
1536 if (curr_alt_set == ATH_ANT_DIV_COMB_LNA2) {
1537 /* Switch main and alt LNA */
1538 div_ant_conf.main_lna_conf =
1539 ATH_ANT_DIV_COMB_LNA2;
1540 div_ant_conf.alt_lna_conf =
1541 ATH_ANT_DIV_COMB_LNA1;
1542 } else if (curr_alt_set == ATH_ANT_DIV_COMB_LNA1) {
1543 div_ant_conf.main_lna_conf =
1544 ATH_ANT_DIV_COMB_LNA1;
1545 div_ant_conf.alt_lna_conf =
1546 ATH_ANT_DIV_COMB_LNA2;
1550 } else if ((curr_alt_set != ATH_ANT_DIV_COMB_LNA1) &&
1551 (curr_alt_set != ATH_ANT_DIV_COMB_LNA2)) {
1552 /* Set alt to another LNA */
1553 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2)
1554 div_ant_conf.alt_lna_conf =
1555 ATH_ANT_DIV_COMB_LNA1;
1556 else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1)
1557 div_ant_conf.alt_lna_conf =
1558 ATH_ANT_DIV_COMB_LNA2;
1563 if ((alt_rssi_avg < (main_rssi_avg +
1564 div_ant_conf.lna1_lna2_delta)))
1568 if (!antcomb->scan_not_start) {
1569 switch (curr_alt_set) {
1570 case ATH_ANT_DIV_COMB_LNA2:
1571 antcomb->rssi_lna2 = alt_rssi_avg;
1572 antcomb->rssi_lna1 = main_rssi_avg;
1573 antcomb->scan = true;
1575 div_ant_conf.main_lna_conf =
1576 ATH_ANT_DIV_COMB_LNA1;
1577 div_ant_conf.alt_lna_conf =
1578 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1580 case ATH_ANT_DIV_COMB_LNA1:
1581 antcomb->rssi_lna1 = alt_rssi_avg;
1582 antcomb->rssi_lna2 = main_rssi_avg;
1583 antcomb->scan = true;
1585 div_ant_conf.main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
1586 div_ant_conf.alt_lna_conf =
1587 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1589 case ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2:
1590 antcomb->rssi_add = alt_rssi_avg;
1591 antcomb->scan = true;
1593 div_ant_conf.alt_lna_conf =
1594 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1596 case ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2:
1597 antcomb->rssi_sub = alt_rssi_avg;
1598 antcomb->scan = false;
1599 if (antcomb->rssi_lna2 >
1600 (antcomb->rssi_lna1 +
1601 ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
1602 /* use LNA2 as main LNA */
1603 if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
1604 (antcomb->rssi_add > antcomb->rssi_sub)) {
1606 div_ant_conf.main_lna_conf =
1607 ATH_ANT_DIV_COMB_LNA2;
1608 div_ant_conf.alt_lna_conf =
1609 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1610 } else if (antcomb->rssi_sub >
1611 antcomb->rssi_lna1) {
1613 div_ant_conf.main_lna_conf =
1614 ATH_ANT_DIV_COMB_LNA2;
1615 div_ant_conf.alt_lna_conf =
1616 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1619 div_ant_conf.main_lna_conf =
1620 ATH_ANT_DIV_COMB_LNA2;
1621 div_ant_conf.alt_lna_conf =
1622 ATH_ANT_DIV_COMB_LNA1;
1625 /* use LNA1 as main LNA */
1626 if ((antcomb->rssi_add > antcomb->rssi_lna2) &&
1627 (antcomb->rssi_add > antcomb->rssi_sub)) {
1629 div_ant_conf.main_lna_conf =
1630 ATH_ANT_DIV_COMB_LNA1;
1631 div_ant_conf.alt_lna_conf =
1632 ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2;
1633 } else if (antcomb->rssi_sub >
1634 antcomb->rssi_lna1) {
1636 div_ant_conf.main_lna_conf =
1637 ATH_ANT_DIV_COMB_LNA1;
1638 div_ant_conf.alt_lna_conf =
1639 ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2;
1642 div_ant_conf.main_lna_conf =
1643 ATH_ANT_DIV_COMB_LNA1;
1644 div_ant_conf.alt_lna_conf =
1645 ATH_ANT_DIV_COMB_LNA2;
1653 if (!antcomb->alt_good) {
1654 antcomb->scan_not_start = false;
1655 /* Set alt to another LNA */
1656 if (curr_main_set == ATH_ANT_DIV_COMB_LNA2) {
1657 div_ant_conf.main_lna_conf =
1658 ATH_ANT_DIV_COMB_LNA2;
1659 div_ant_conf.alt_lna_conf =
1660 ATH_ANT_DIV_COMB_LNA1;
1661 } else if (curr_main_set == ATH_ANT_DIV_COMB_LNA1) {
1662 div_ant_conf.main_lna_conf =
1663 ATH_ANT_DIV_COMB_LNA1;
1664 div_ant_conf.alt_lna_conf =
1665 ATH_ANT_DIV_COMB_LNA2;
1671 ath_select_ant_div_from_quick_scan(antcomb, &div_ant_conf,
1672 main_rssi_avg, alt_rssi_avg,
1675 antcomb->quick_scan_cnt++;
1678 ath_ant_div_conf_fast_divbias(&div_ant_conf, antcomb, alt_ratio);
1679 ath9k_hw_antdiv_comb_conf_set(sc->sc_ah, &div_ant_conf);
1681 antcomb->scan_start_time = jiffies;
1682 antcomb->total_pkt_count = 0;
1683 antcomb->main_total_rssi = 0;
1684 antcomb->alt_total_rssi = 0;
1685 antcomb->main_recv_cnt = 0;
1686 antcomb->alt_recv_cnt = 0;
1689 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
1692 struct sk_buff *skb = NULL, *requeue_skb, *hdr_skb;
1693 struct ieee80211_rx_status *rxs;
1694 struct ath_hw *ah = sc->sc_ah;
1695 struct ath_common *common = ath9k_hw_common(ah);
1697 * The hw can technically differ from common->hw when using ath9k
1698 * virtual wiphy so to account for that we iterate over the active
1699 * wiphys and find the appropriate wiphy and therefore hw.
1701 struct ieee80211_hw *hw = sc->hw;
1702 struct ieee80211_hdr *hdr;
1704 bool decrypt_error = false;
1705 struct ath_rx_status rs;
1706 enum ath9k_rx_qtype qtype;
1707 bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
1709 u8 rx_status_len = ah->caps.rx_status_len;
1712 unsigned long flags;
1715 dma_type = DMA_BIDIRECTIONAL;
1717 dma_type = DMA_FROM_DEVICE;
1719 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
1720 spin_lock_bh(&sc->rx.rxbuflock);
1722 tsf = ath9k_hw_gettsf64(ah);
1723 tsf_lower = tsf & 0xffffffff;
1726 /* If handling rx interrupt and flush is in progress => exit */
1727 if ((sc->sc_flags & SC_OP_RXFLUSH) && (flush == 0))
1730 memset(&rs, 0, sizeof(rs));
1732 bf = ath_edma_get_next_rx_buf(sc, &rs, qtype);
1734 bf = ath_get_next_rx_buf(sc, &rs);
1744 * Take frame header from the first fragment and RX status from
1748 hdr_skb = sc->rx.frag;
1752 hdr = (struct ieee80211_hdr *) (hdr_skb->data + rx_status_len);
1753 rxs = IEEE80211_SKB_RXCB(hdr_skb);
1755 ath_debug_stat_rx(sc, &rs);
1758 * If we're asked to flush receive queue, directly
1759 * chain it back at the queue without processing it.
1762 goto requeue_drop_frag;
1764 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
1765 rxs, &decrypt_error);
1767 goto requeue_drop_frag;
1769 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
1770 if (rs.rs_tstamp > tsf_lower &&
1771 unlikely(rs.rs_tstamp - tsf_lower > 0x10000000))
1772 rxs->mactime -= 0x100000000ULL;
1774 if (rs.rs_tstamp < tsf_lower &&
1775 unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
1776 rxs->mactime += 0x100000000ULL;
1778 /* Ensure we always have an skb to requeue once we are done
1779 * processing the current buffer's skb */
1780 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
1782 /* If there is no memory we ignore the current RX'd frame,
1783 * tell hardware it can give us a new frame using the old
1784 * skb and put it at the tail of the sc->rx.rxbuf list for
1787 goto requeue_drop_frag;
1789 /* Unmap the frame */
1790 dma_unmap_single(sc->dev, bf->bf_buf_addr,
1794 skb_put(skb, rs.rs_datalen + ah->caps.rx_status_len);
1795 if (ah->caps.rx_status_len)
1796 skb_pull(skb, ah->caps.rx_status_len);
1799 ath9k_rx_skb_postprocess(common, hdr_skb, &rs,
1800 rxs, decrypt_error);
1802 /* We will now give hardware our shiny new allocated skb */
1803 bf->bf_mpdu = requeue_skb;
1804 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
1807 if (unlikely(dma_mapping_error(sc->dev,
1808 bf->bf_buf_addr))) {
1809 dev_kfree_skb_any(requeue_skb);
1811 bf->bf_buf_addr = 0;
1812 ath_err(common, "dma_mapping_error() on RX\n");
1813 ieee80211_rx(hw, skb);
1819 * rs_more indicates chained descriptors which can be
1820 * used to link buffers together for a sort of
1821 * scatter-gather operation.
1824 /* too many fragments - cannot handle frame */
1825 dev_kfree_skb_any(sc->rx.frag);
1826 dev_kfree_skb_any(skb);
1834 int space = skb->len - skb_tailroom(hdr_skb);
1838 if (pskb_expand_head(hdr_skb, 0, space, GFP_ATOMIC) < 0) {
1840 goto requeue_drop_frag;
1843 skb_copy_from_linear_data(skb, skb_put(hdr_skb, skb->len),
1845 dev_kfree_skb_any(skb);
1850 * change the default rx antenna if rx diversity chooses the
1851 * other antenna 3 times in a row.
1853 if (sc->rx.defant != rs.rs_antenna) {
1854 if (++sc->rx.rxotherant >= 3)
1855 ath_setdefantenna(sc, rs.rs_antenna);
1857 sc->rx.rxotherant = 0;
1860 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1862 if ((sc->ps_flags & (PS_WAIT_FOR_BEACON |
1864 PS_WAIT_FOR_PSPOLL_DATA)) ||
1865 ath9k_check_auto_sleep(sc))
1867 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1869 if (ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB)
1870 ath_ant_comb_scan(sc, &rs);
1872 ieee80211_rx(hw, skb);
1876 dev_kfree_skb_any(sc->rx.frag);
1881 list_add_tail(&bf->list, &sc->rx.rxbuf);
1882 ath_rx_edma_buf_link(sc, qtype);
1884 list_move_tail(&bf->list, &sc->rx.rxbuf);
1885 ath_rx_buf_link(sc, bf);
1890 spin_unlock_bh(&sc->rx.rxbuflock);