1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/firmware.h>
44 #include <linux/etherdevice.h>
45 #include <linux/if_arp.h>
47 #include <net/mac80211.h>
49 #include <asm/div64.h>
51 #define DRV_NAME "iwl4965"
56 /******************************************************************************
60 ******************************************************************************/
63 * module name, copyright, version, etc.
65 #define DRV_DESCRIPTION "Intel(R) Wireless WiFi 4965 driver for Linux"
67 #ifdef CONFIG_IWLEGACY_DEBUG
73 #define DRV_VERSION IWLWIFI_VERSION VD
75 MODULE_DESCRIPTION(DRV_DESCRIPTION);
76 MODULE_VERSION(DRV_VERSION);
77 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
78 MODULE_LICENSE("GPL");
79 MODULE_ALIAS("iwl4965");
82 il4965_check_abort_status(struct il_priv *il, u8 frame_count, u32 status)
84 if (frame_count == 1 && status == TX_STATUS_FAIL_RFKILL_FLUSH) {
85 IL_ERR("Tx flush command to flush out all frames\n");
86 if (!test_bit(S_EXIT_PENDING, &il->status))
87 queue_work(il->workqueue, &il->tx_flush);
94 struct il_mod_params il4965_mod_params = {
97 /* the rest are 0 by default */
101 il4965_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
105 spin_lock_irqsave(&rxq->lock, flags);
106 INIT_LIST_HEAD(&rxq->rx_free);
107 INIT_LIST_HEAD(&rxq->rx_used);
108 /* Fill the rx_used queue with _all_ of the Rx buffers */
109 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
110 /* In the reset function, these buffers may have been allocated
111 * to an SKB, so we need to unmap and free potential storage */
112 if (rxq->pool[i].page != NULL) {
113 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
114 PAGE_SIZE << il->hw_params.rx_page_order,
116 __il_free_pages(il, rxq->pool[i].page);
117 rxq->pool[i].page = NULL;
119 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
122 for (i = 0; i < RX_QUEUE_SIZE; i++)
123 rxq->queue[i] = NULL;
125 /* Set us so that we have processed and used all buffers, but have
126 * not restocked the Rx queue with fresh buffers */
127 rxq->read = rxq->write = 0;
128 rxq->write_actual = 0;
130 spin_unlock_irqrestore(&rxq->lock, flags);
134 il4965_rx_init(struct il_priv *il, struct il_rx_queue *rxq)
137 const u32 rfdnlog = RX_QUEUE_SIZE_LOG; /* 256 RBDs */
140 if (il->cfg->mod_params->amsdu_size_8K)
141 rb_size = FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
143 rb_size = FH49_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
146 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0);
148 /* Reset driver's Rx queue write idx */
149 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
151 /* Tell device where to find RBD circular buffer in DRAM */
152 il_wr(il, FH49_RSCSR_CHNL0_RBDCB_BASE_REG, (u32) (rxq->bd_dma >> 8));
154 /* Tell device where in DRAM to update its Rx status */
155 il_wr(il, FH49_RSCSR_CHNL0_STTS_WPTR_REG, rxq->rb_stts_dma >> 4);
158 * Direct rx interrupts to hosts
159 * Rx buffer size 4 or 8k
163 il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG,
164 FH49_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
165 FH49_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
166 FH49_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MSK |
168 (rb_timeout << FH49_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS) |
169 (rfdnlog << FH49_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
171 /* Set interrupt coalescing timer to default (2048 usecs) */
172 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_TIMEOUT_DEF);
178 il4965_set_pwr_vmain(struct il_priv *il)
181 * (for documentation purposes)
182 * to set power to V_AUX, do:
184 if (pci_pme_capable(il->pci_dev, PCI_D3cold))
185 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
186 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
187 ~APMG_PS_CTRL_MSK_PWR_SRC);
190 il_set_bits_mask_prph(il, APMG_PS_CTRL_REG,
191 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
192 ~APMG_PS_CTRL_MSK_PWR_SRC);
196 il4965_hw_nic_init(struct il_priv *il)
199 struct il_rx_queue *rxq = &il->rxq;
202 spin_lock_irqsave(&il->lock, flags);
204 /* Set interrupt coalescing calibration timer to default (512 usecs) */
205 il_write8(il, CSR_INT_COALESCING, IL_HOST_INT_CALIB_TIMEOUT_DEF);
206 spin_unlock_irqrestore(&il->lock, flags);
208 il4965_set_pwr_vmain(il);
209 il4965_nic_config(il);
211 /* Allocate the RX queue, or reset if it is already allocated */
213 ret = il_rx_queue_alloc(il);
215 IL_ERR("Unable to initialize Rx queue\n");
219 il4965_rx_queue_reset(il, rxq);
221 il4965_rx_replenish(il);
223 il4965_rx_init(il, rxq);
225 spin_lock_irqsave(&il->lock, flags);
227 rxq->need_update = 1;
228 il_rx_queue_update_write_ptr(il, rxq);
230 spin_unlock_irqrestore(&il->lock, flags);
232 /* Allocate or reset and init all Tx and Command queues */
234 ret = il4965_txq_ctx_alloc(il);
238 il4965_txq_ctx_reset(il);
240 set_bit(S_INIT, &il->status);
246 * il4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
249 il4965_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
251 return cpu_to_le32((u32) (dma_addr >> 8));
255 * il4965_rx_queue_restock - refill RX queue from pre-allocated pool
257 * If there are slots in the RX queue that need to be restocked,
258 * and we have free pre-allocated buffers, fill the ranks as much
259 * as we can, pulling from rx_free.
261 * This moves the 'write' idx forward to catch up with 'processed', and
262 * also updates the memory address in the firmware to reference the new
266 il4965_rx_queue_restock(struct il_priv *il)
268 struct il_rx_queue *rxq = &il->rxq;
269 struct list_head *element;
270 struct il_rx_buf *rxb;
273 spin_lock_irqsave(&rxq->lock, flags);
274 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
275 /* The overwritten rxb must be a used one */
276 rxb = rxq->queue[rxq->write];
277 BUG_ON(rxb && rxb->page);
279 /* Get next free Rx buffer, remove from free list */
280 element = rxq->rx_free.next;
281 rxb = list_entry(element, struct il_rx_buf, list);
284 /* Point to Rx buffer via next RBD in circular buffer */
285 rxq->bd[rxq->write] =
286 il4965_dma_addr2rbd_ptr(il, rxb->page_dma);
287 rxq->queue[rxq->write] = rxb;
288 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
291 spin_unlock_irqrestore(&rxq->lock, flags);
292 /* If the pre-allocated buffer pool is dropping low, schedule to
294 if (rxq->free_count <= RX_LOW_WATERMARK)
295 queue_work(il->workqueue, &il->rx_replenish);
297 /* If we've added more space for the firmware to place data, tell it.
298 * Increment device's write pointer in multiples of 8. */
299 if (rxq->write_actual != (rxq->write & ~0x7)) {
300 spin_lock_irqsave(&rxq->lock, flags);
301 rxq->need_update = 1;
302 spin_unlock_irqrestore(&rxq->lock, flags);
303 il_rx_queue_update_write_ptr(il, rxq);
308 * il4965_rx_replenish - Move all used packet from rx_used to rx_free
310 * When moving to rx_free an SKB is allocated for the slot.
312 * Also restock the Rx queue via il_rx_queue_restock.
313 * This is called as a scheduled work item (except for during initialization)
316 il4965_rx_allocate(struct il_priv *il, gfp_t priority)
318 struct il_rx_queue *rxq = &il->rxq;
319 struct list_head *element;
320 struct il_rx_buf *rxb;
323 gfp_t gfp_mask = priority;
326 spin_lock_irqsave(&rxq->lock, flags);
327 if (list_empty(&rxq->rx_used)) {
328 spin_unlock_irqrestore(&rxq->lock, flags);
331 spin_unlock_irqrestore(&rxq->lock, flags);
333 if (rxq->free_count > RX_LOW_WATERMARK)
334 gfp_mask |= __GFP_NOWARN;
336 if (il->hw_params.rx_page_order > 0)
337 gfp_mask |= __GFP_COMP;
339 /* Alloc a new receive buffer */
340 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
343 D_INFO("alloc_pages failed, " "order: %d\n",
344 il->hw_params.rx_page_order);
346 if (rxq->free_count <= RX_LOW_WATERMARK &&
348 IL_ERR("Failed to alloc_pages with %s. "
349 "Only %u free buffers remaining.\n",
351 GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
353 /* We don't reschedule replenish work here -- we will
354 * call the restock method and if it still needs
355 * more buffers it will schedule replenish */
359 spin_lock_irqsave(&rxq->lock, flags);
361 if (list_empty(&rxq->rx_used)) {
362 spin_unlock_irqrestore(&rxq->lock, flags);
363 __free_pages(page, il->hw_params.rx_page_order);
366 element = rxq->rx_used.next;
367 rxb = list_entry(element, struct il_rx_buf, list);
370 spin_unlock_irqrestore(&rxq->lock, flags);
374 /* Get physical address of the RB */
376 pci_map_page(il->pci_dev, page, 0,
377 PAGE_SIZE << il->hw_params.rx_page_order,
379 /* dma address must be no more than 36 bits */
380 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
381 /* and also 256 byte aligned! */
382 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
384 spin_lock_irqsave(&rxq->lock, flags);
386 list_add_tail(&rxb->list, &rxq->rx_free);
388 il->alloc_rxb_page++;
390 spin_unlock_irqrestore(&rxq->lock, flags);
395 il4965_rx_replenish(struct il_priv *il)
399 il4965_rx_allocate(il, GFP_KERNEL);
401 spin_lock_irqsave(&il->lock, flags);
402 il4965_rx_queue_restock(il);
403 spin_unlock_irqrestore(&il->lock, flags);
407 il4965_rx_replenish_now(struct il_priv *il)
409 il4965_rx_allocate(il, GFP_ATOMIC);
411 il4965_rx_queue_restock(il);
414 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
415 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
416 * This free routine walks the list of POOL entries and if SKB is set to
417 * non NULL it is unmapped and freed
420 il4965_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
423 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
424 if (rxq->pool[i].page != NULL) {
425 pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
426 PAGE_SIZE << il->hw_params.rx_page_order,
428 __il_free_pages(il, rxq->pool[i].page);
429 rxq->pool[i].page = NULL;
433 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
435 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
436 rxq->rb_stts, rxq->rb_stts_dma);
442 il4965_rxq_stop(struct il_priv *il)
446 _il_wr(il, FH49_MEM_RCSR_CHNL0_CONFIG_REG, 0);
447 ret = _il_poll_bit(il, FH49_MEM_RSSR_RX_STATUS_REG,
448 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
449 FH49_RSSR_CHNL0_RX_STATUS_CHNL_IDLE,
452 IL_ERR("Can't stop Rx DMA.\n");
458 il4965_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
463 /* HT rate format: mac80211 wants an MCS number, which is just LSB */
464 if (rate_n_flags & RATE_MCS_HT_MSK) {
465 idx = (rate_n_flags & 0xff);
467 /* Legacy rate format, search for match in table */
469 if (band == IEEE80211_BAND_5GHZ)
470 band_offset = IL_FIRST_OFDM_RATE;
471 for (idx = band_offset; idx < RATE_COUNT_LEGACY; idx++)
472 if (il_rates[idx].plcp == (rate_n_flags & 0xFF))
473 return idx - band_offset;
480 il4965_calc_rssi(struct il_priv *il, struct il_rx_phy_res *rx_resp)
482 /* data from PHY/DSP regarding signal strength, etc.,
483 * contents are always there, not configurable by host. */
484 struct il4965_rx_non_cfg_phy *ncphy =
485 (struct il4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
487 (le16_to_cpu(ncphy->agc_info) & IL49_AGC_DB_MASK) >>
491 (le16_to_cpu(rx_resp->phy_flags) & IL49_RX_PHY_FLAGS_ANTENNAE_MASK)
492 >> IL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
496 /* Find max rssi among 3 possible receivers.
497 * These values are measured by the digital signal processor (DSP).
498 * They should stay fairly constant even as the signal strength varies,
499 * if the radio's automatic gain control (AGC) is working right.
500 * AGC value (see below) will provide the "interesting" info. */
501 for (i = 0; i < 3; i++)
502 if (valid_antennae & (1 << i))
503 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
505 D_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
506 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
509 /* dBm = max_rssi dB - agc dB - constant.
510 * Higher AGC (higher radio gain) means lower signal. */
511 return max_rssi - agc - IL4965_RSSI_OFFSET;
515 il4965_translate_rx_status(struct il_priv *il, u32 decrypt_in)
519 if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
520 RX_RES_STATUS_STATION_FOUND)
522 (RX_RES_STATUS_STATION_FOUND |
523 RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
525 decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
527 /* packet was not encrypted */
528 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
529 RX_RES_STATUS_SEC_TYPE_NONE)
532 /* packet was encrypted with unknown alg */
533 if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
534 RX_RES_STATUS_SEC_TYPE_ERR)
537 /* decryption was not done in HW */
538 if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
539 RX_MPDU_RES_STATUS_DEC_DONE_MSK)
542 switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
544 case RX_RES_STATUS_SEC_TYPE_CCMP:
545 /* alg is CCM: check MIC only */
546 if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
548 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
550 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
554 case RX_RES_STATUS_SEC_TYPE_TKIP:
555 if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
557 decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
560 /* fall through if TTAK OK */
562 if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
563 decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
565 decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
569 D_RX("decrypt_in:0x%x decrypt_out = 0x%x\n", decrypt_in, decrypt_out);
575 il4965_pass_packet_to_mac80211(struct il_priv *il, struct ieee80211_hdr *hdr,
576 u16 len, u32 ampdu_status, struct il_rx_buf *rxb,
577 struct ieee80211_rx_status *stats)
580 __le16 fc = hdr->frame_control;
582 /* We only process data packets if the interface is open */
583 if (unlikely(!il->is_open)) {
584 D_DROP("Dropping packet while interface is not open.\n");
588 /* In case of HW accelerated crypto and bad decryption, drop */
589 if (!il->cfg->mod_params->sw_crypto &&
590 il_set_decrypted_flag(il, hdr, ampdu_status, stats))
593 skb = dev_alloc_skb(128);
595 IL_ERR("dev_alloc_skb failed\n");
599 skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
601 il_update_stats(il, false, fc, len);
602 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
604 ieee80211_rx(il->hw, skb);
605 il->alloc_rxb_page--;
609 /* Called for N_RX (legacy ABG frames), or
610 * N_RX_MPDU (HT high-throughput N frames). */
612 il4965_hdl_rx(struct il_priv *il, struct il_rx_buf *rxb)
614 struct ieee80211_hdr *header;
615 struct ieee80211_rx_status rx_status;
616 struct il_rx_pkt *pkt = rxb_addr(rxb);
617 struct il_rx_phy_res *phy_res;
618 __le32 rx_pkt_status;
619 struct il_rx_mpdu_res_start *amsdu;
625 * N_RX and N_RX_MPDU are handled differently.
626 * N_RX: physical layer info is in this buffer
627 * N_RX_MPDU: physical layer info was sent in separate
628 * command and cached in il->last_phy_res
630 * Here we set up local variables depending on which command is
633 if (pkt->hdr.cmd == N_RX) {
634 phy_res = (struct il_rx_phy_res *)pkt->u.raw;
636 (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res) +
637 phy_res->cfg_phy_cnt);
639 len = le16_to_cpu(phy_res->byte_count);
641 *(__le32 *) (pkt->u.raw + sizeof(*phy_res) +
642 phy_res->cfg_phy_cnt + len);
643 ampdu_status = le32_to_cpu(rx_pkt_status);
645 if (!il->_4965.last_phy_res_valid) {
646 IL_ERR("MPDU frame without cached PHY data\n");
649 phy_res = &il->_4965.last_phy_res;
650 amsdu = (struct il_rx_mpdu_res_start *)pkt->u.raw;
651 header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
652 len = le16_to_cpu(amsdu->byte_count);
653 rx_pkt_status = *(__le32 *) (pkt->u.raw + sizeof(*amsdu) + len);
655 il4965_translate_rx_status(il, le32_to_cpu(rx_pkt_status));
658 if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
659 D_DROP("dsp size out of range [0,20]: %d/n",
660 phy_res->cfg_phy_cnt);
664 if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
665 !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
666 D_RX("Bad CRC or FIFO: 0x%08X.\n", le32_to_cpu(rx_pkt_status));
670 /* This will be used in several places later */
671 rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
673 /* rx_status carries information about the packet to mac80211 */
674 rx_status.mactime = le64_to_cpu(phy_res->timestamp);
677 phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ? IEEE80211_BAND_2GHZ :
680 ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel),
683 il4965_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
686 /* TSF isn't reliable. In order to allow smooth user experience,
687 * this W/A doesn't propagate it to the mac80211 */
688 /*rx_status.flag |= RX_FLAG_MACTIME_MPDU; */
690 il->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
692 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
693 rx_status.signal = il4965_calc_rssi(il, phy_res);
695 D_STATS("Rssi %d, TSF %llu\n", rx_status.signal,
696 (unsigned long long)rx_status.mactime);
701 * It seems that the antenna field in the phy flags value
702 * is actually a bit field. This is undefined by radiotap,
703 * it wants an actual antenna number but I always get "7"
704 * for most legacy frames I receive indicating that the
705 * same frame was received on all three RX chains.
707 * I think this field should be removed in favor of a
708 * new 802.11n radiotap field "RX chains" that is defined
712 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK) >>
713 RX_RES_PHY_FLAGS_ANTENNA_POS;
715 /* set the preamble flag if appropriate */
716 if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
717 rx_status.flag |= RX_FLAG_SHORTPRE;
719 /* Set up the HT phy flags */
720 if (rate_n_flags & RATE_MCS_HT_MSK)
721 rx_status.flag |= RX_FLAG_HT;
722 if (rate_n_flags & RATE_MCS_HT40_MSK)
723 rx_status.flag |= RX_FLAG_40MHZ;
724 if (rate_n_flags & RATE_MCS_SGI_MSK)
725 rx_status.flag |= RX_FLAG_SHORT_GI;
727 il4965_pass_packet_to_mac80211(il, header, len, ampdu_status, rxb,
731 /* Cache phy data (Rx signal strength, etc) for HT frame (N_RX_PHY).
732 * This will be used later in il_hdl_rx() for N_RX_MPDU. */
734 il4965_hdl_rx_phy(struct il_priv *il, struct il_rx_buf *rxb)
736 struct il_rx_pkt *pkt = rxb_addr(rxb);
737 il->_4965.last_phy_res_valid = true;
738 memcpy(&il->_4965.last_phy_res, pkt->u.raw,
739 sizeof(struct il_rx_phy_res));
743 il4965_get_channels_for_scan(struct il_priv *il, struct ieee80211_vif *vif,
744 enum ieee80211_band band, u8 is_active,
745 u8 n_probes, struct il_scan_channel *scan_ch)
747 struct ieee80211_channel *chan;
748 const struct ieee80211_supported_band *sband;
749 const struct il_channel_info *ch_info;
750 u16 passive_dwell = 0;
751 u16 active_dwell = 0;
755 sband = il_get_hw_mode(il, band);
759 active_dwell = il_get_active_dwell_time(il, band, n_probes);
760 passive_dwell = il_get_passive_dwell_time(il, band, vif);
762 if (passive_dwell <= active_dwell)
763 passive_dwell = active_dwell + 1;
765 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
766 chan = il->scan_request->channels[i];
768 if (chan->band != band)
771 channel = chan->hw_value;
772 scan_ch->channel = cpu_to_le16(channel);
774 ch_info = il_get_channel_info(il, band, channel);
775 if (!il_is_channel_valid(ch_info)) {
776 D_SCAN("Channel %d is INVALID for this band.\n",
781 if (!is_active || il_is_channel_passive(ch_info) ||
782 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
783 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
785 scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
788 scan_ch->type |= IL_SCAN_PROBE_MASK(n_probes);
790 scan_ch->active_dwell = cpu_to_le16(active_dwell);
791 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
793 /* Set txpower levels to defaults */
794 scan_ch->dsp_atten = 110;
796 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
798 * scan_ch->tx_gain = ((1 << 5) | (2 << 3)) | 3;
800 if (band == IEEE80211_BAND_5GHZ)
801 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
803 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
805 D_SCAN("Scanning ch=%d prob=0x%X [%s %d]\n", channel,
806 le32_to_cpu(scan_ch->type),
808 type & SCAN_CHANNEL_TYPE_ACTIVE) ? "ACTIVE" : "PASSIVE",
810 type & SCAN_CHANNEL_TYPE_ACTIVE) ? active_dwell :
817 D_SCAN("total channels to scan %d\n", added);
822 il4965_toggle_tx_ant(struct il_priv *il, u8 *ant, u8 valid)
827 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
828 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
829 if (valid & BIT(ind)) {
837 il4965_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
839 struct il_host_cmd cmd = {
841 .len = sizeof(struct il_scan_cmd),
842 .flags = CMD_SIZE_HUGE,
844 struct il_scan_cmd *scan;
848 enum ieee80211_band band;
850 u8 rx_ant = il->hw_params.valid_rx_ant;
852 bool is_active = false;
855 u8 scan_tx_antennas = il->hw_params.valid_tx_ant;
858 lockdep_assert_held(&il->mutex);
862 kmalloc(sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE,
865 D_SCAN("fail to allocate memory for scan\n");
870 memset(scan, 0, sizeof(struct il_scan_cmd) + IL_MAX_SCAN_SIZE);
872 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
873 scan->quiet_time = IL_ACTIVE_QUIET_TIME;
875 if (il_is_any_associated(il)) {
878 u32 suspend_time = 100;
879 u32 scan_suspend_time = 100;
881 D_INFO("Scanning while associated...\n");
882 interval = vif->bss_conf.beacon_int;
884 scan->suspend_time = 0;
885 scan->max_out_time = cpu_to_le32(200 * 1024);
887 interval = suspend_time;
889 extra = (suspend_time / interval) << 22;
891 (extra | ((suspend_time % interval) * 1024));
892 scan->suspend_time = cpu_to_le32(scan_suspend_time);
893 D_SCAN("suspend_time 0x%X beacon interval %d\n",
894 scan_suspend_time, interval);
897 if (il->scan_request->n_ssids) {
899 D_SCAN("Kicking off active scan\n");
900 for (i = 0; i < il->scan_request->n_ssids; i++) {
901 /* always does wildcard anyway */
902 if (!il->scan_request->ssids[i].ssid_len)
904 scan->direct_scan[p].id = WLAN_EID_SSID;
905 scan->direct_scan[p].len =
906 il->scan_request->ssids[i].ssid_len;
907 memcpy(scan->direct_scan[p].ssid,
908 il->scan_request->ssids[i].ssid,
909 il->scan_request->ssids[i].ssid_len);
915 D_SCAN("Start passive scan.\n");
917 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
918 scan->tx_cmd.sta_id = il->hw_params.bcast_id;
919 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
921 switch (il->scan_band) {
922 case IEEE80211_BAND_2GHZ:
923 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
925 le32_to_cpu(il->active.flags & RXON_FLG_CHANNEL_MODE_MSK) >>
926 RXON_FLG_CHANNEL_MODE_POS;
927 if (chan_mod == CHANNEL_MODE_PURE_40) {
931 rate_flags = RATE_MCS_CCK_MSK;
934 case IEEE80211_BAND_5GHZ:
938 IL_WARN("Invalid scan band\n");
943 * If active scanning is requested but a certain channel is
944 * marked passive, we can do active scanning if we detect
947 * There is an issue with some firmware versions that triggers
948 * a sysassert on a "good CRC threshold" of zero (== disabled),
949 * on a radar channel even though this means that we should NOT
952 * The "good CRC threshold" is the number of frames that we
953 * need to receive during our dwell time on a channel before
954 * sending out probes -- setting this to a huge value will
955 * mean we never reach it, but at the same time work around
956 * the aforementioned issue. Thus use IL_GOOD_CRC_TH_NEVER
957 * here instead of IL_GOOD_CRC_TH_DISABLED.
960 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER;
962 band = il->scan_band;
964 if (il->cfg->scan_rx_antennas[band])
965 rx_ant = il->cfg->scan_rx_antennas[band];
967 il4965_toggle_tx_ant(il, &il->scan_tx_ant[band], scan_tx_antennas);
968 rate_flags |= BIT(il->scan_tx_ant[band]) << RATE_MCS_ANT_POS;
969 scan->tx_cmd.rate_n_flags = cpu_to_le32(rate | rate_flags);
971 /* In power save mode use one chain, otherwise use all chains */
972 if (test_bit(S_POWER_PMI, &il->status)) {
973 /* rx_ant has been set to all valid chains previously */
975 rx_ant & ((u8) (il->chain_noise_data.active_chains));
977 active_chains = rx_ant;
979 D_SCAN("chain_noise_data.active_chains: %u\n",
980 il->chain_noise_data.active_chains);
982 rx_ant = il4965_first_antenna(active_chains);
985 /* MIMO is not used here, but value is required */
986 rx_chain |= il->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
987 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
988 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
989 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
990 scan->rx_chain = cpu_to_le16(rx_chain);
993 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
994 vif->addr, il->scan_request->ie,
995 il->scan_request->ie_len,
996 IL_MAX_SCAN_SIZE - sizeof(*scan));
997 scan->tx_cmd.len = cpu_to_le16(cmd_len);
999 scan->filter_flags |=
1000 (RXON_FILTER_ACCEPT_GRP_MSK | RXON_FILTER_BCON_AWARE_MSK);
1002 scan->channel_count =
1003 il4965_get_channels_for_scan(il, vif, band, is_active, n_probes,
1004 (void *)&scan->data[cmd_len]);
1005 if (scan->channel_count == 0) {
1006 D_SCAN("channel count %d\n", scan->channel_count);
1011 le16_to_cpu(scan->tx_cmd.len) +
1012 scan->channel_count * sizeof(struct il_scan_channel);
1014 scan->len = cpu_to_le16(cmd.len);
1016 set_bit(S_SCAN_HW, &il->status);
1018 ret = il_send_cmd_sync(il, &cmd);
1020 clear_bit(S_SCAN_HW, &il->status);
1026 il4965_manage_ibss_station(struct il_priv *il, struct ieee80211_vif *vif,
1029 struct il_vif_priv *vif_priv = (void *)vif->drv_priv;
1032 return il4965_add_bssid_station(il, vif->bss_conf.bssid,
1033 &vif_priv->ibss_bssid_sta_id);
1034 return il_remove_station(il, vif_priv->ibss_bssid_sta_id,
1035 vif->bss_conf.bssid);
1039 il4965_free_tfds_in_queue(struct il_priv *il, int sta_id, int tid, int freed)
1041 lockdep_assert_held(&il->sta_lock);
1043 if (il->stations[sta_id].tid[tid].tfds_in_queue >= freed)
1044 il->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1046 D_TX("free more than tfds_in_queue (%u:%d)\n",
1047 il->stations[sta_id].tid[tid].tfds_in_queue, freed);
1048 il->stations[sta_id].tid[tid].tfds_in_queue = 0;
1052 #define IL_TX_QUEUE_MSK 0xfffff
1055 il4965_is_single_rx_stream(struct il_priv *il)
1057 return il->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
1058 il->current_ht_config.single_chain_sufficient;
1061 #define IL_NUM_RX_CHAINS_MULTIPLE 3
1062 #define IL_NUM_RX_CHAINS_SINGLE 2
1063 #define IL_NUM_IDLE_CHAINS_DUAL 2
1064 #define IL_NUM_IDLE_CHAINS_SINGLE 1
1067 * Determine how many receiver/antenna chains to use.
1069 * More provides better reception via diversity. Fewer saves power
1070 * at the expense of throughput, but only when not in powersave to
1073 * MIMO (dual stream) requires at least 2, but works better with 3.
1074 * This does not determine *which* chains to use, just how many.
1077 il4965_get_active_rx_chain_count(struct il_priv *il)
1079 /* # of Rx chains to use when expecting MIMO. */
1080 if (il4965_is_single_rx_stream(il))
1081 return IL_NUM_RX_CHAINS_SINGLE;
1083 return IL_NUM_RX_CHAINS_MULTIPLE;
1087 * When we are in power saving mode, unless device support spatial
1088 * multiplexing power save, use the active count for rx chain count.
1091 il4965_get_idle_rx_chain_count(struct il_priv *il, int active_cnt)
1093 /* # Rx chains when idling, depending on SMPS mode */
1094 switch (il->current_ht_config.smps) {
1095 case IEEE80211_SMPS_STATIC:
1096 case IEEE80211_SMPS_DYNAMIC:
1097 return IL_NUM_IDLE_CHAINS_SINGLE;
1098 case IEEE80211_SMPS_OFF:
1101 WARN(1, "invalid SMPS mode %d", il->current_ht_config.smps);
1106 /* up to 4 chains */
1108 il4965_count_chain_bitmap(u32 chain_bitmap)
1111 res = (chain_bitmap & BIT(0)) >> 0;
1112 res += (chain_bitmap & BIT(1)) >> 1;
1113 res += (chain_bitmap & BIT(2)) >> 2;
1114 res += (chain_bitmap & BIT(3)) >> 3;
1119 * il4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
1121 * Selects how many and which Rx receivers/antennas/chains to use.
1122 * This should not be used for scan command ... it puts data in wrong place.
1125 il4965_set_rxon_chain(struct il_priv *il)
1127 bool is_single = il4965_is_single_rx_stream(il);
1128 bool is_cam = !test_bit(S_POWER_PMI, &il->status);
1129 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
1133 /* Tell uCode which antennas are actually connected.
1134 * Before first association, we assume all antennas are connected.
1135 * Just after first association, il4965_chain_noise_calibration()
1136 * checks which antennas actually *are* connected. */
1137 if (il->chain_noise_data.active_chains)
1138 active_chains = il->chain_noise_data.active_chains;
1140 active_chains = il->hw_params.valid_rx_ant;
1142 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
1144 /* How many receivers should we use? */
1145 active_rx_cnt = il4965_get_active_rx_chain_count(il);
1146 idle_rx_cnt = il4965_get_idle_rx_chain_count(il, active_rx_cnt);
1148 /* correct rx chain count according hw settings
1149 * and chain noise calibration
1151 valid_rx_cnt = il4965_count_chain_bitmap(active_chains);
1152 if (valid_rx_cnt < active_rx_cnt)
1153 active_rx_cnt = valid_rx_cnt;
1155 if (valid_rx_cnt < idle_rx_cnt)
1156 idle_rx_cnt = valid_rx_cnt;
1158 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
1159 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
1161 il->staging.rx_chain = cpu_to_le16(rx_chain);
1163 if (!is_single && active_rx_cnt >= IL_NUM_RX_CHAINS_SINGLE && is_cam)
1164 il->staging.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
1166 il->staging.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
1168 D_ASSOC("rx_chain=0x%X active=%d idle=%d\n", il->staging.rx_chain,
1169 active_rx_cnt, idle_rx_cnt);
1171 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
1172 active_rx_cnt < idle_rx_cnt);
1176 il4965_get_fh_string(int cmd)
1179 IL_CMD(FH49_RSCSR_CHNL0_STTS_WPTR_REG);
1180 IL_CMD(FH49_RSCSR_CHNL0_RBDCB_BASE_REG);
1181 IL_CMD(FH49_RSCSR_CHNL0_WPTR);
1182 IL_CMD(FH49_MEM_RCSR_CHNL0_CONFIG_REG);
1183 IL_CMD(FH49_MEM_RSSR_SHARED_CTRL_REG);
1184 IL_CMD(FH49_MEM_RSSR_RX_STATUS_REG);
1185 IL_CMD(FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
1186 IL_CMD(FH49_TSSR_TX_STATUS_REG);
1187 IL_CMD(FH49_TSSR_TX_ERROR_REG);
1194 il4965_dump_fh(struct il_priv *il, char **buf, bool display)
1197 #ifdef CONFIG_IWLEGACY_DEBUG
1201 static const u32 fh_tbl[] = {
1202 FH49_RSCSR_CHNL0_STTS_WPTR_REG,
1203 FH49_RSCSR_CHNL0_RBDCB_BASE_REG,
1204 FH49_RSCSR_CHNL0_WPTR,
1205 FH49_MEM_RCSR_CHNL0_CONFIG_REG,
1206 FH49_MEM_RSSR_SHARED_CTRL_REG,
1207 FH49_MEM_RSSR_RX_STATUS_REG,
1208 FH49_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
1209 FH49_TSSR_TX_STATUS_REG,
1210 FH49_TSSR_TX_ERROR_REG
1212 #ifdef CONFIG_IWLEGACY_DEBUG
1214 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
1215 *buf = kmalloc(bufsz, GFP_KERNEL);
1219 scnprintf(*buf + pos, bufsz - pos, "FH register values:\n");
1220 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1222 scnprintf(*buf + pos, bufsz - pos,
1224 il4965_get_fh_string(fh_tbl[i]),
1225 il_rd(il, fh_tbl[i]));
1230 IL_ERR("FH register values:\n");
1231 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
1232 IL_ERR(" %34s: 0X%08x\n", il4965_get_fh_string(fh_tbl[i]),
1233 il_rd(il, fh_tbl[i]));
1239 il4965_hdl_missed_beacon(struct il_priv *il, struct il_rx_buf *rxb)
1241 struct il_rx_pkt *pkt = rxb_addr(rxb);
1242 struct il_missed_beacon_notif *missed_beacon;
1244 missed_beacon = &pkt->u.missed_beacon;
1245 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
1246 il->missed_beacon_threshold) {
1247 D_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
1248 le32_to_cpu(missed_beacon->consecutive_missed_beacons),
1249 le32_to_cpu(missed_beacon->total_missed_becons),
1250 le32_to_cpu(missed_beacon->num_recvd_beacons),
1251 le32_to_cpu(missed_beacon->num_expected_beacons));
1252 if (!test_bit(S_SCANNING, &il->status))
1253 il4965_init_sensitivity(il);
1257 /* Calculate noise level, based on measurements during network silence just
1258 * before arriving beacon. This measurement can be done only if we know
1259 * exactly when to expect beacons, therefore only when we're associated. */
1261 il4965_rx_calc_noise(struct il_priv *il)
1263 struct stats_rx_non_phy *rx_info;
1264 int num_active_rx = 0;
1265 int total_silence = 0;
1266 int bcn_silence_a, bcn_silence_b, bcn_silence_c;
1269 rx_info = &(il->_4965.stats.rx.general);
1271 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
1273 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
1275 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
1277 if (bcn_silence_a) {
1278 total_silence += bcn_silence_a;
1281 if (bcn_silence_b) {
1282 total_silence += bcn_silence_b;
1285 if (bcn_silence_c) {
1286 total_silence += bcn_silence_c;
1290 /* Average among active antennas */
1292 last_rx_noise = (total_silence / num_active_rx) - 107;
1294 last_rx_noise = IL_NOISE_MEAS_NOT_AVAILABLE;
1296 D_CALIB("inband silence a %u, b %u, c %u, dBm %d\n", bcn_silence_a,
1297 bcn_silence_b, bcn_silence_c, last_rx_noise);
1300 #ifdef CONFIG_IWLEGACY_DEBUGFS
1302 * based on the assumption of all stats counter are in DWORD
1303 * FIXME: This function is for debugging, do not deal with
1304 * the case of counters roll-over.
1307 il4965_accumulative_stats(struct il_priv *il, __le32 * stats)
1312 u32 *delta, *max_delta;
1313 struct stats_general_common *general, *accum_general;
1314 struct stats_tx *tx, *accum_tx;
1316 prev_stats = (__le32 *) &il->_4965.stats;
1317 accum_stats = (u32 *) &il->_4965.accum_stats;
1318 size = sizeof(struct il_notif_stats);
1319 general = &il->_4965.stats.general.common;
1320 accum_general = &il->_4965.accum_stats.general.common;
1321 tx = &il->_4965.stats.tx;
1322 accum_tx = &il->_4965.accum_stats.tx;
1323 delta = (u32 *) &il->_4965.delta_stats;
1324 max_delta = (u32 *) &il->_4965.max_delta;
1326 for (i = sizeof(__le32); i < size;
1328 sizeof(__le32), stats++, prev_stats++, delta++, max_delta++,
1330 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
1332 (le32_to_cpu(*stats) - le32_to_cpu(*prev_stats));
1333 *accum_stats += *delta;
1334 if (*delta > *max_delta)
1335 *max_delta = *delta;
1339 /* reset accumulative stats for "no-counter" type stats */
1340 accum_general->temperature = general->temperature;
1341 accum_general->ttl_timestamp = general->ttl_timestamp;
1346 il4965_hdl_stats(struct il_priv *il, struct il_rx_buf *rxb)
1348 const int recalib_seconds = 60;
1350 struct il_rx_pkt *pkt = rxb_addr(rxb);
1352 D_RX("Statistics notification received (%d vs %d).\n",
1353 (int)sizeof(struct il_notif_stats),
1354 le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK);
1357 ((il->_4965.stats.general.common.temperature !=
1358 pkt->u.stats.general.common.temperature) ||
1359 ((il->_4965.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK) !=
1360 (pkt->u.stats.flag & STATS_REPLY_FLG_HT40_MODE_MSK)));
1361 #ifdef CONFIG_IWLEGACY_DEBUGFS
1362 il4965_accumulative_stats(il, (__le32 *) &pkt->u.stats);
1365 /* TODO: reading some of stats is unneeded */
1366 memcpy(&il->_4965.stats, &pkt->u.stats, sizeof(il->_4965.stats));
1368 set_bit(S_STATS, &il->status);
1371 * Reschedule the stats timer to occur in recalib_seconds to ensure
1372 * we get a thermal update even if the uCode doesn't give us one
1374 mod_timer(&il->stats_periodic,
1375 jiffies + msecs_to_jiffies(recalib_seconds * 1000));
1377 if (unlikely(!test_bit(S_SCANNING, &il->status)) &&
1378 (pkt->hdr.cmd == N_STATS)) {
1379 il4965_rx_calc_noise(il);
1380 queue_work(il->workqueue, &il->run_time_calib_work);
1384 il4965_temperature_calib(il);
1388 il4965_hdl_c_stats(struct il_priv *il, struct il_rx_buf *rxb)
1390 struct il_rx_pkt *pkt = rxb_addr(rxb);
1392 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATS_CLEAR_MSK) {
1393 #ifdef CONFIG_IWLEGACY_DEBUGFS
1394 memset(&il->_4965.accum_stats, 0,
1395 sizeof(struct il_notif_stats));
1396 memset(&il->_4965.delta_stats, 0,
1397 sizeof(struct il_notif_stats));
1398 memset(&il->_4965.max_delta, 0, sizeof(struct il_notif_stats));
1400 D_RX("Statistics have been cleared\n");
1402 il4965_hdl_stats(il, rxb);
1407 * mac80211 queues, ACs, hardware queues, FIFOs.
1409 * Cf. http://wireless.kernel.org/en/developers/Documentation/mac80211/queues
1411 * Mac80211 uses the following numbers, which we get as from it
1412 * by way of skb_get_queue_mapping(skb):
1420 * Regular (not A-MPDU) frames are put into hardware queues corresponding
1421 * to the FIFOs, see comments in iwl-prph.h. Aggregated frames get their
1422 * own queue per aggregation session (RA/TID combination), such queues are
1423 * set up to map into FIFOs too, for which we need an AC->FIFO mapping. In
1424 * order to map frames to the right queue, we also need an AC->hw queue
1425 * mapping. This is implemented here.
1427 * Due to the way hw queues are set up (by the hw specific modules like
1428 * 4965.c), the AC->hw queue mapping is the identity
1432 static const u8 tid_to_ac[] = {
1444 il4965_get_ac_from_tid(u16 tid)
1446 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
1447 return tid_to_ac[tid];
1449 /* no support for TIDs 8-15 yet */
1454 il4965_get_fifo_from_tid(u16 tid)
1456 const u8 ac_to_fifo[] = {
1463 if (likely(tid < ARRAY_SIZE(tid_to_ac)))
1464 return ac_to_fifo[tid_to_ac[tid]];
1466 /* no support for TIDs 8-15 yet */
1471 * handle build C_TX command notification.
1474 il4965_tx_cmd_build_basic(struct il_priv *il, struct sk_buff *skb,
1475 struct il_tx_cmd *tx_cmd,
1476 struct ieee80211_tx_info *info,
1477 struct ieee80211_hdr *hdr, u8 std_id)
1479 __le16 fc = hdr->frame_control;
1480 __le32 tx_flags = tx_cmd->tx_flags;
1482 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
1483 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
1484 tx_flags |= TX_CMD_FLG_ACK_MSK;
1485 if (ieee80211_is_mgmt(fc))
1486 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1487 if (ieee80211_is_probe_resp(fc) &&
1488 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
1489 tx_flags |= TX_CMD_FLG_TSF_MSK;
1491 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
1492 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1495 if (ieee80211_is_back_req(fc))
1496 tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
1498 tx_cmd->sta_id = std_id;
1499 if (ieee80211_has_morefrags(fc))
1500 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
1502 if (ieee80211_is_data_qos(fc)) {
1503 u8 *qc = ieee80211_get_qos_ctl(hdr);
1504 tx_cmd->tid_tspec = qc[0] & 0xf;
1505 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
1507 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
1510 il_tx_cmd_protection(il, info, fc, &tx_flags);
1512 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
1513 if (ieee80211_is_mgmt(fc)) {
1514 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
1515 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
1517 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
1519 tx_cmd->timeout.pm_frame_timeout = 0;
1522 tx_cmd->driver_txop = 0;
1523 tx_cmd->tx_flags = tx_flags;
1524 tx_cmd->next_frame_len = 0;
1528 il4965_tx_cmd_build_rate(struct il_priv *il, struct il_tx_cmd *tx_cmd,
1529 struct ieee80211_tx_info *info, __le16 fc)
1531 const u8 rts_retry_limit = 60;
1534 u8 data_retry_limit;
1537 /* Set retry limit on DATA packets and Probe Responses */
1538 if (ieee80211_is_probe_resp(fc))
1539 data_retry_limit = 3;
1541 data_retry_limit = IL4965_DEFAULT_TX_RETRY;
1542 tx_cmd->data_retry_limit = data_retry_limit;
1543 /* Set retry limit on RTS packets */
1544 tx_cmd->rts_retry_limit = min(data_retry_limit, rts_retry_limit);
1546 /* DATA packets will use the uCode station table for rate/antenna
1548 if (ieee80211_is_data(fc)) {
1549 tx_cmd->initial_rate_idx = 0;
1550 tx_cmd->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
1555 * If the current TX rate stored in mac80211 has the MCS bit set, it's
1556 * not really a TX rate. Thus, we use the lowest supported rate for
1557 * this band. Also use the lowest supported rate if the stored rate
1560 rate_idx = info->control.rates[0].idx;
1561 if ((info->control.rates[0].flags & IEEE80211_TX_RC_MCS) || rate_idx < 0
1562 || rate_idx > RATE_COUNT_LEGACY)
1564 rate_lowest_index(&il->bands[info->band],
1566 /* For 5 GHZ band, remap mac80211 rate indices into driver indices */
1567 if (info->band == IEEE80211_BAND_5GHZ)
1568 rate_idx += IL_FIRST_OFDM_RATE;
1569 /* Get PLCP rate for tx_cmd->rate_n_flags */
1570 rate_plcp = il_rates[rate_idx].plcp;
1571 /* Zero out flags for this packet */
1574 /* Set CCK flag as needed */
1575 if (rate_idx >= IL_FIRST_CCK_RATE && rate_idx <= IL_LAST_CCK_RATE)
1576 rate_flags |= RATE_MCS_CCK_MSK;
1578 /* Set up antennas */
1579 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant);
1580 rate_flags |= BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS;
1582 /* Set the rate in the TX cmd */
1583 tx_cmd->rate_n_flags = cpu_to_le32(rate_plcp | rate_flags);
1587 il4965_tx_cmd_build_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
1588 struct il_tx_cmd *tx_cmd, struct sk_buff *skb_frag,
1591 struct ieee80211_key_conf *keyconf = info->control.hw_key;
1593 switch (keyconf->cipher) {
1594 case WLAN_CIPHER_SUITE_CCMP:
1595 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
1596 memcpy(tx_cmd->key, keyconf->key, keyconf->keylen);
1597 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1598 tx_cmd->tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
1599 D_TX("tx_cmd with AES hwcrypto\n");
1602 case WLAN_CIPHER_SUITE_TKIP:
1603 tx_cmd->sec_ctl = TX_CMD_SEC_TKIP;
1604 ieee80211_get_tkip_p2k(keyconf, skb_frag, tx_cmd->key);
1605 D_TX("tx_cmd with tkip hwcrypto\n");
1608 case WLAN_CIPHER_SUITE_WEP104:
1609 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
1611 case WLAN_CIPHER_SUITE_WEP40:
1613 (TX_CMD_SEC_WEP | (keyconf->keyidx & TX_CMD_SEC_MSK) <<
1616 memcpy(&tx_cmd->key[3], keyconf->key, keyconf->keylen);
1618 D_TX("Configuring packet for WEP encryption " "with key %d\n",
1623 IL_ERR("Unknown encode cipher %x\n", keyconf->cipher);
1629 * start C_TX command process
1632 il4965_tx_skb(struct il_priv *il, struct sk_buff *skb)
1634 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1635 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1636 struct ieee80211_sta *sta = info->control.sta;
1637 struct il_station_priv *sta_priv = NULL;
1638 struct il_tx_queue *txq;
1640 struct il_device_cmd *out_cmd;
1641 struct il_cmd_meta *out_meta;
1642 struct il_tx_cmd *tx_cmd;
1644 dma_addr_t phys_addr;
1645 dma_addr_t txcmd_phys;
1646 dma_addr_t scratch_phys;
1647 u16 len, firstlen, secondlen;
1652 u8 wait_write_ptr = 0;
1655 unsigned long flags;
1656 bool is_agg = false;
1658 spin_lock_irqsave(&il->lock, flags);
1659 if (il_is_rfkill(il)) {
1660 D_DROP("Dropping - RF KILL\n");
1664 fc = hdr->frame_control;
1666 #ifdef CONFIG_IWLEGACY_DEBUG
1667 if (ieee80211_is_auth(fc))
1668 D_TX("Sending AUTH frame\n");
1669 else if (ieee80211_is_assoc_req(fc))
1670 D_TX("Sending ASSOC frame\n");
1671 else if (ieee80211_is_reassoc_req(fc))
1672 D_TX("Sending REASSOC frame\n");
1675 hdr_len = ieee80211_hdrlen(fc);
1677 /* For management frames use broadcast id to do not break aggregation */
1678 if (!ieee80211_is_data(fc))
1679 sta_id = il->hw_params.bcast_id;
1681 /* Find idx into station table for destination station */
1682 sta_id = il_sta_id_or_broadcast(il, info->control.sta);
1684 if (sta_id == IL_INVALID_STATION) {
1685 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
1690 D_TX("station Id %d\n", sta_id);
1693 sta_priv = (void *)sta->drv_priv;
1695 if (sta_priv && sta_priv->asleep &&
1696 (info->flags & IEEE80211_TX_CTL_POLL_RESPONSE)) {
1698 * This sends an asynchronous command to the device,
1699 * but we can rely on it being processed before the
1700 * next frame is processed -- and the next frame to
1701 * this station is the one that will consume this
1703 * For now set the counter to just 1 since we do not
1704 * support uAPSD yet.
1706 il4965_sta_modify_sleep_tx_count(il, sta_id, 1);
1709 /* FIXME: remove me ? */
1710 WARN_ON_ONCE(info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM);
1712 /* Access category (AC) is also the queue number */
1713 txq_id = skb_get_queue_mapping(skb);
1715 /* irqs already disabled/saved above when locking il->lock */
1716 spin_lock(&il->sta_lock);
1718 if (ieee80211_is_data_qos(fc)) {
1719 qc = ieee80211_get_qos_ctl(hdr);
1720 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
1721 if (WARN_ON_ONCE(tid >= MAX_TID_COUNT)) {
1722 spin_unlock(&il->sta_lock);
1725 seq_number = il->stations[sta_id].tid[tid].seq_number;
1726 seq_number &= IEEE80211_SCTL_SEQ;
1728 hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG);
1729 hdr->seq_ctrl |= cpu_to_le16(seq_number);
1731 /* aggregation is on for this <sta,tid> */
1732 if (info->flags & IEEE80211_TX_CTL_AMPDU &&
1733 il->stations[sta_id].tid[tid].agg.state == IL_AGG_ON) {
1734 txq_id = il->stations[sta_id].tid[tid].agg.txq_id;
1739 txq = &il->txq[txq_id];
1742 if (unlikely(il_queue_space(q) < q->high_mark)) {
1743 spin_unlock(&il->sta_lock);
1747 if (ieee80211_is_data_qos(fc)) {
1748 il->stations[sta_id].tid[tid].tfds_in_queue++;
1749 if (!ieee80211_has_morefrags(fc))
1750 il->stations[sta_id].tid[tid].seq_number = seq_number;
1753 spin_unlock(&il->sta_lock);
1755 txq->skbs[q->write_ptr] = skb;
1757 /* Set up first empty entry in queue's array of Tx/cmd buffers */
1758 out_cmd = txq->cmd[q->write_ptr];
1759 out_meta = &txq->meta[q->write_ptr];
1760 tx_cmd = &out_cmd->cmd.tx;
1761 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
1762 memset(tx_cmd, 0, sizeof(struct il_tx_cmd));
1765 * Set up the Tx-command (not MAC!) header.
1766 * Store the chosen Tx queue and TFD idx within the sequence field;
1767 * after Tx, uCode's Tx response will return this value so driver can
1768 * locate the frame within the tx queue and do post-tx processing.
1770 out_cmd->hdr.cmd = C_TX;
1771 out_cmd->hdr.sequence =
1773 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
1775 /* Copy MAC header from skb into command buffer */
1776 memcpy(tx_cmd->hdr, hdr, hdr_len);
1778 /* Total # bytes to be transmitted */
1779 len = (u16) skb->len;
1780 tx_cmd->len = cpu_to_le16(len);
1782 if (info->control.hw_key)
1783 il4965_tx_cmd_build_hwcrypto(il, info, tx_cmd, skb, sta_id);
1785 /* TODO need this for burst mode later on */
1786 il4965_tx_cmd_build_basic(il, skb, tx_cmd, info, hdr, sta_id);
1788 il4965_tx_cmd_build_rate(il, tx_cmd, info, fc);
1790 il_update_stats(il, true, fc, len);
1792 * Use the first empty entry in this queue's command buffer array
1793 * to contain the Tx command and MAC header concatenated together
1794 * (payload data will be in another buffer).
1795 * Size of this varies, due to varying MAC header length.
1796 * If end is not dword aligned, we'll have 2 extra bytes at the end
1797 * of the MAC header (device reads on dword boundaries).
1798 * We'll tell device about this padding later.
1800 len = sizeof(struct il_tx_cmd) + sizeof(struct il_cmd_header) + hdr_len;
1801 firstlen = (len + 3) & ~3;
1803 /* Tell NIC about any 2-byte padding after MAC header */
1804 if (firstlen != len)
1805 tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
1807 /* Physical address of this Tx command's header (not MAC header!),
1808 * within command buffer array. */
1810 pci_map_single(il->pci_dev, &out_cmd->hdr, firstlen,
1811 PCI_DMA_BIDIRECTIONAL);
1812 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
1813 dma_unmap_len_set(out_meta, len, firstlen);
1814 /* Add buffer containing Tx command and MAC(!) header to TFD's
1816 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0);
1818 if (!ieee80211_has_morefrags(hdr->frame_control)) {
1819 txq->need_update = 1;
1822 txq->need_update = 0;
1825 /* Set up TFD's 2nd entry to point directly to remainder of skb,
1826 * if any (802.11 null frames have no payload). */
1827 secondlen = skb->len - hdr_len;
1828 if (secondlen > 0) {
1830 pci_map_single(il->pci_dev, skb->data + hdr_len, secondlen,
1832 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen,
1837 txcmd_phys + sizeof(struct il_cmd_header) +
1838 offsetof(struct il_tx_cmd, scratch);
1840 /* take back ownership of DMA buffer to enable update */
1841 pci_dma_sync_single_for_cpu(il->pci_dev, txcmd_phys, firstlen,
1842 PCI_DMA_BIDIRECTIONAL);
1843 tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
1844 tx_cmd->dram_msb_ptr = il_get_dma_hi_addr(scratch_phys);
1846 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
1847 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
1848 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd, sizeof(*tx_cmd));
1849 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, hdr_len);
1851 /* Set up entry for this TFD in Tx byte-count array */
1852 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1853 il->ops->txq_update_byte_cnt_tbl(il, txq, le16_to_cpu(tx_cmd->len));
1855 pci_dma_sync_single_for_device(il->pci_dev, txcmd_phys, firstlen,
1856 PCI_DMA_BIDIRECTIONAL);
1858 /* Tell device the write idx *just past* this latest filled TFD */
1859 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
1860 il_txq_update_write_ptr(il, txq);
1861 spin_unlock_irqrestore(&il->lock, flags);
1864 * At this point the frame is "transmitted" successfully
1865 * and we will get a TX status notification eventually,
1866 * regardless of the value of ret. "ret" only indicates
1867 * whether or not we should update the write pointer.
1871 * Avoid atomic ops if it isn't an associated client.
1872 * Also, if this is a packet for aggregation, don't
1873 * increase the counter because the ucode will stop
1874 * aggregation queues when their respective station
1877 if (sta_priv && sta_priv->client && !is_agg)
1878 atomic_inc(&sta_priv->pending_frames);
1880 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
1881 if (wait_write_ptr) {
1882 spin_lock_irqsave(&il->lock, flags);
1883 txq->need_update = 1;
1884 il_txq_update_write_ptr(il, txq);
1885 spin_unlock_irqrestore(&il->lock, flags);
1887 il_stop_queue(il, txq);
1894 spin_unlock_irqrestore(&il->lock, flags);
1899 il4965_alloc_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr, size_t size)
1902 dma_alloc_coherent(&il->pci_dev->dev, size, &ptr->dma, GFP_KERNEL);
1910 il4965_free_dma_ptr(struct il_priv *il, struct il_dma_ptr *ptr)
1912 if (unlikely(!ptr->addr))
1915 dma_free_coherent(&il->pci_dev->dev, ptr->size, ptr->addr, ptr->dma);
1916 memset(ptr, 0, sizeof(*ptr));
1920 * il4965_hw_txq_ctx_free - Free TXQ Context
1922 * Destroy all TX DMA queues and structures
1925 il4965_hw_txq_ctx_free(struct il_priv *il)
1931 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
1932 if (txq_id == il->cmd_queue)
1933 il_cmd_queue_free(il);
1935 il_tx_queue_free(il, txq_id);
1937 il4965_free_dma_ptr(il, &il->kw);
1939 il4965_free_dma_ptr(il, &il->scd_bc_tbls);
1941 /* free tx queue structure */
1946 * il4965_txq_ctx_alloc - allocate TX queue context
1947 * Allocate all Tx DMA structures and initialize them
1950 * @return error code
1953 il4965_txq_ctx_alloc(struct il_priv *il)
1956 int txq_id, slots_num;
1957 unsigned long flags;
1959 /* Free all tx/cmd queues and keep-warm buffer */
1960 il4965_hw_txq_ctx_free(il);
1963 il4965_alloc_dma_ptr(il, &il->scd_bc_tbls,
1964 il->hw_params.scd_bc_tbls_size);
1966 IL_ERR("Scheduler BC Table allocation failed\n");
1969 /* Alloc keep-warm buffer */
1970 ret = il4965_alloc_dma_ptr(il, &il->kw, IL_KW_SIZE);
1972 IL_ERR("Keep Warm allocation failed\n");
1976 /* allocate tx queue structure */
1977 ret = il_alloc_txq_mem(il);
1981 spin_lock_irqsave(&il->lock, flags);
1983 /* Turn off all Tx DMA fifos */
1984 il4965_txq_set_sched(il, 0);
1986 /* Tell NIC where to find the "keep warm" buffer */
1987 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4);
1989 spin_unlock_irqrestore(&il->lock, flags);
1991 /* Alloc and init all Tx queues, including the command queue (#4/#9) */
1992 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
1995 il->cmd_queue) ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1996 ret = il_tx_queue_init(il, &il->txq[txq_id], slots_num, txq_id);
1998 IL_ERR("Tx %d queue init failed\n", txq_id);
2006 il4965_hw_txq_ctx_free(il);
2007 il4965_free_dma_ptr(il, &il->kw);
2009 il4965_free_dma_ptr(il, &il->scd_bc_tbls);
2015 il4965_txq_ctx_reset(struct il_priv *il)
2017 int txq_id, slots_num;
2018 unsigned long flags;
2020 spin_lock_irqsave(&il->lock, flags);
2022 /* Turn off all Tx DMA fifos */
2023 il4965_txq_set_sched(il, 0);
2025 /* Tell NIC where to find the "keep warm" buffer */
2026 il_wr(il, FH49_KW_MEM_ADDR_REG, il->kw.dma >> 4);
2028 spin_unlock_irqrestore(&il->lock, flags);
2030 /* Alloc and init all Tx queues, including the command queue (#4) */
2031 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++) {
2033 txq_id == il->cmd_queue ? TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
2034 il_tx_queue_reset(il, &il->txq[txq_id], slots_num, txq_id);
2039 il4965_txq_ctx_unmap(struct il_priv *il)
2046 /* Unmap DMA from host system and free skb's */
2047 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2048 if (txq_id == il->cmd_queue)
2049 il_cmd_queue_unmap(il);
2051 il_tx_queue_unmap(il, txq_id);
2055 * il4965_txq_ctx_stop - Stop all Tx DMA channels
2058 il4965_txq_ctx_stop(struct il_priv *il)
2062 _il_wr_prph(il, IL49_SCD_TXFACT, 0);
2064 /* Stop each Tx DMA channel, and wait for it to be idle */
2065 for (ch = 0; ch < il->hw_params.dma_chnl_num; ch++) {
2066 _il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(ch), 0x0);
2068 _il_poll_bit(il, FH49_TSSR_TX_STATUS_REG,
2069 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
2070 FH49_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(ch),
2073 IL_ERR("Timeout stopping DMA channel %d [0x%08x]",
2074 ch, _il_rd(il, FH49_TSSR_TX_STATUS_REG));
2079 * Find first available (lowest unused) Tx Queue, mark it "active".
2080 * Called only when finding queue for aggregation.
2081 * Should never return anything < 7, because they should already
2082 * be in use as EDCA AC (0-3), Command (4), reserved (5, 6)
2085 il4965_txq_ctx_activate_free(struct il_priv *il)
2089 for (txq_id = 0; txq_id < il->hw_params.max_txq_num; txq_id++)
2090 if (!test_and_set_bit(txq_id, &il->txq_ctx_active_msk))
2096 * il4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
2099 il4965_tx_queue_stop_scheduler(struct il_priv *il, u16 txq_id)
2101 /* Simply stop the queue, but don't change any configuration;
2102 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
2103 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
2104 (0 << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
2105 (1 << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
2109 * il4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
2112 il4965_tx_queue_set_q2ratid(struct il_priv *il, u16 ra_tid, u16 txq_id)
2118 scd_q2ratid = ra_tid & IL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
2121 il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
2123 tbl_dw = il_read_targ_mem(il, tbl_dw_addr);
2126 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
2128 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
2130 il_write_targ_mem(il, tbl_dw_addr, tbl_dw);
2136 * il4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
2138 * NOTE: txq_id must be greater than IL49_FIRST_AMPDU_QUEUE,
2139 * i.e. it must be one of the higher queues used for aggregation
2142 il4965_txq_agg_enable(struct il_priv *il, int txq_id, int tx_fifo, int sta_id,
2143 int tid, u16 ssn_idx)
2145 unsigned long flags;
2149 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2150 (IL49_FIRST_AMPDU_QUEUE +
2151 il->cfg->num_of_ampdu_queues <= txq_id)) {
2152 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2153 txq_id, IL49_FIRST_AMPDU_QUEUE,
2154 IL49_FIRST_AMPDU_QUEUE +
2155 il->cfg->num_of_ampdu_queues - 1);
2159 ra_tid = BUILD_RAxTID(sta_id, tid);
2161 /* Modify device's station table to Tx this TID */
2162 ret = il4965_sta_tx_modify_enable_tid(il, sta_id, tid);
2166 spin_lock_irqsave(&il->lock, flags);
2168 /* Stop this Tx queue before configuring it */
2169 il4965_tx_queue_stop_scheduler(il, txq_id);
2171 /* Map receiver-address / traffic-ID to this queue */
2172 il4965_tx_queue_set_q2ratid(il, ra_tid, txq_id);
2174 /* Set this queue as a chain-building queue */
2175 il_set_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2177 /* Place first TFD at idx corresponding to start sequence number.
2178 * Assumes that ssn_idx is valid (!= 0xFFF) */
2179 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2180 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2181 il4965_set_wr_ptrs(il, txq_id, ssn_idx);
2183 /* Set up Tx win size and frame limit for this queue */
2184 il_write_targ_mem(il,
2186 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
2187 (SCD_WIN_SIZE << IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS)
2188 & IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
2190 il_write_targ_mem(il,
2192 IL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
2194 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
2195 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
2197 il_set_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2199 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
2200 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 1);
2202 spin_unlock_irqrestore(&il->lock, flags);
2208 il4965_tx_agg_start(struct il_priv *il, struct ieee80211_vif *vif,
2209 struct ieee80211_sta *sta, u16 tid, u16 * ssn)
2215 unsigned long flags;
2216 struct il_tid_data *tid_data;
2218 /* FIXME: warning if tx fifo not found ? */
2219 tx_fifo = il4965_get_fifo_from_tid(tid);
2220 if (unlikely(tx_fifo < 0))
2223 D_HT("%s on ra = %pM tid = %d\n", __func__, sta->addr, tid);
2225 sta_id = il_sta_id(sta);
2226 if (sta_id == IL_INVALID_STATION) {
2227 IL_ERR("Start AGG on invalid station\n");
2230 if (unlikely(tid >= MAX_TID_COUNT))
2233 if (il->stations[sta_id].tid[tid].agg.state != IL_AGG_OFF) {
2234 IL_ERR("Start AGG when state is not IL_AGG_OFF !\n");
2238 txq_id = il4965_txq_ctx_activate_free(il);
2240 IL_ERR("No free aggregation queue available\n");
2244 spin_lock_irqsave(&il->sta_lock, flags);
2245 tid_data = &il->stations[sta_id].tid[tid];
2246 *ssn = SEQ_TO_SN(tid_data->seq_number);
2247 tid_data->agg.txq_id = txq_id;
2248 il_set_swq_id(&il->txq[txq_id], il4965_get_ac_from_tid(tid), txq_id);
2249 spin_unlock_irqrestore(&il->sta_lock, flags);
2251 ret = il4965_txq_agg_enable(il, txq_id, tx_fifo, sta_id, tid, *ssn);
2255 spin_lock_irqsave(&il->sta_lock, flags);
2256 tid_data = &il->stations[sta_id].tid[tid];
2257 if (tid_data->tfds_in_queue == 0) {
2258 D_HT("HW queue is empty\n");
2259 tid_data->agg.state = IL_AGG_ON;
2260 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2262 D_HT("HW queue is NOT empty: %d packets in HW queue\n",
2263 tid_data->tfds_in_queue);
2264 tid_data->agg.state = IL_EMPTYING_HW_QUEUE_ADDBA;
2266 spin_unlock_irqrestore(&il->sta_lock, flags);
2271 * txq_id must be greater than IL49_FIRST_AMPDU_QUEUE
2272 * il->lock must be held by the caller
2275 il4965_txq_agg_disable(struct il_priv *il, u16 txq_id, u16 ssn_idx, u8 tx_fifo)
2277 if ((IL49_FIRST_AMPDU_QUEUE > txq_id) ||
2278 (IL49_FIRST_AMPDU_QUEUE +
2279 il->cfg->num_of_ampdu_queues <= txq_id)) {
2280 IL_WARN("queue number out of range: %d, must be %d to %d\n",
2281 txq_id, IL49_FIRST_AMPDU_QUEUE,
2282 IL49_FIRST_AMPDU_QUEUE +
2283 il->cfg->num_of_ampdu_queues - 1);
2287 il4965_tx_queue_stop_scheduler(il, txq_id);
2289 il_clear_bits_prph(il, IL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
2291 il->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
2292 il->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
2293 /* supposes that ssn_idx is valid (!= 0xFFF) */
2294 il4965_set_wr_ptrs(il, txq_id, ssn_idx);
2296 il_clear_bits_prph(il, IL49_SCD_INTERRUPT_MASK, (1 << txq_id));
2297 il_txq_ctx_deactivate(il, txq_id);
2298 il4965_tx_queue_set_status(il, &il->txq[txq_id], tx_fifo, 0);
2304 il4965_tx_agg_stop(struct il_priv *il, struct ieee80211_vif *vif,
2305 struct ieee80211_sta *sta, u16 tid)
2307 int tx_fifo_id, txq_id, sta_id, ssn;
2308 struct il_tid_data *tid_data;
2309 int write_ptr, read_ptr;
2310 unsigned long flags;
2312 /* FIXME: warning if tx_fifo_id not found ? */
2313 tx_fifo_id = il4965_get_fifo_from_tid(tid);
2314 if (unlikely(tx_fifo_id < 0))
2317 sta_id = il_sta_id(sta);
2319 if (sta_id == IL_INVALID_STATION) {
2320 IL_ERR("Invalid station for AGG tid %d\n", tid);
2324 spin_lock_irqsave(&il->sta_lock, flags);
2326 tid_data = &il->stations[sta_id].tid[tid];
2327 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
2328 txq_id = tid_data->agg.txq_id;
2330 switch (il->stations[sta_id].tid[tid].agg.state) {
2331 case IL_EMPTYING_HW_QUEUE_ADDBA:
2333 * This can happen if the peer stops aggregation
2334 * again before we've had a chance to drain the
2335 * queue we selected previously, i.e. before the
2336 * session was really started completely.
2338 D_HT("AGG stop before setup done\n");
2343 IL_WARN("Stopping AGG while state not ON or starting\n");
2346 write_ptr = il->txq[txq_id].q.write_ptr;
2347 read_ptr = il->txq[txq_id].q.read_ptr;
2349 /* The queue is not empty */
2350 if (write_ptr != read_ptr) {
2351 D_HT("Stopping a non empty AGG HW QUEUE\n");
2352 il->stations[sta_id].tid[tid].agg.state =
2353 IL_EMPTYING_HW_QUEUE_DELBA;
2354 spin_unlock_irqrestore(&il->sta_lock, flags);
2358 D_HT("HW queue is empty\n");
2360 il->stations[sta_id].tid[tid].agg.state = IL_AGG_OFF;
2362 /* do not restore/save irqs */
2363 spin_unlock(&il->sta_lock);
2364 spin_lock(&il->lock);
2367 * the only reason this call can fail is queue number out of range,
2368 * which can happen if uCode is reloaded and all the station
2369 * information are lost. if it is outside the range, there is no need
2370 * to deactivate the uCode queue, just return "success" to allow
2371 * mac80211 to clean up it own data.
2373 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo_id);
2374 spin_unlock_irqrestore(&il->lock, flags);
2376 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2382 il4965_txq_check_empty(struct il_priv *il, int sta_id, u8 tid, int txq_id)
2384 struct il_queue *q = &il->txq[txq_id].q;
2385 u8 *addr = il->stations[sta_id].sta.sta.addr;
2386 struct il_tid_data *tid_data = &il->stations[sta_id].tid[tid];
2388 lockdep_assert_held(&il->sta_lock);
2390 switch (il->stations[sta_id].tid[tid].agg.state) {
2391 case IL_EMPTYING_HW_QUEUE_DELBA:
2392 /* We are reclaiming the last packet of the */
2393 /* aggregated HW queue */
2394 if (txq_id == tid_data->agg.txq_id &&
2395 q->read_ptr == q->write_ptr) {
2396 u16 ssn = SEQ_TO_SN(tid_data->seq_number);
2397 int tx_fifo = il4965_get_fifo_from_tid(tid);
2398 D_HT("HW queue empty: continue DELBA flow\n");
2399 il4965_txq_agg_disable(il, txq_id, ssn, tx_fifo);
2400 tid_data->agg.state = IL_AGG_OFF;
2401 ieee80211_stop_tx_ba_cb_irqsafe(il->vif, addr, tid);
2404 case IL_EMPTYING_HW_QUEUE_ADDBA:
2405 /* We are reclaiming the last packet of the queue */
2406 if (tid_data->tfds_in_queue == 0) {
2407 D_HT("HW queue empty: continue ADDBA flow\n");
2408 tid_data->agg.state = IL_AGG_ON;
2409 ieee80211_start_tx_ba_cb_irqsafe(il->vif, addr, tid);
2418 il4965_non_agg_tx_status(struct il_priv *il, const u8 *addr1)
2420 struct ieee80211_sta *sta;
2421 struct il_station_priv *sta_priv;
2424 sta = ieee80211_find_sta(il->vif, addr1);
2426 sta_priv = (void *)sta->drv_priv;
2427 /* avoid atomic ops if this isn't a client */
2428 if (sta_priv->client &&
2429 atomic_dec_return(&sta_priv->pending_frames) == 0)
2430 ieee80211_sta_block_awake(il->hw, sta, false);
2436 il4965_tx_status(struct il_priv *il, struct sk_buff *skb, bool is_agg)
2438 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2441 il4965_non_agg_tx_status(il, hdr->addr1);
2443 ieee80211_tx_status_irqsafe(il->hw, skb);
2447 il4965_tx_queue_reclaim(struct il_priv *il, int txq_id, int idx)
2449 struct il_tx_queue *txq = &il->txq[txq_id];
2450 struct il_queue *q = &txq->q;
2452 struct ieee80211_hdr *hdr;
2453 struct sk_buff *skb;
2455 if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
2456 IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
2457 "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
2458 q->write_ptr, q->read_ptr);
2462 for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
2463 q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
2465 skb = txq->skbs[txq->q.read_ptr];
2467 if (WARN_ON_ONCE(skb == NULL))
2470 hdr = (struct ieee80211_hdr *) skb->data;
2471 if (ieee80211_is_data_qos(hdr->frame_control))
2474 il4965_tx_status(il, skb, txq_id >= IL4965_FIRST_AMPDU_QUEUE);
2476 txq->skbs[txq->q.read_ptr] = NULL;
2477 il->ops->txq_free_tfd(il, txq);
2483 * il4965_tx_status_reply_compressed_ba - Update tx status from block-ack
2485 * Go through block-ack's bitmap of ACK'd frames, update driver's record of
2486 * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
2489 il4965_tx_status_reply_compressed_ba(struct il_priv *il, struct il_ht_agg *agg,
2490 struct il_compressed_ba_resp *ba_resp)
2493 u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
2494 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2496 struct ieee80211_tx_info *info;
2497 u64 bitmap, sent_bitmap;
2499 if (unlikely(!agg->wait_for_ba)) {
2500 if (unlikely(ba_resp->bitmap))
2501 IL_ERR("Received BA when not expected\n");
2505 /* Mark that the expected block-ack response arrived */
2506 agg->wait_for_ba = 0;
2507 D_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
2509 /* Calculate shift to align block-ack bits with our Tx win bits */
2510 sh = agg->start_idx - SEQ_TO_IDX(seq_ctl >> 4);
2511 if (sh < 0) /* tbw something is wrong with indices */
2514 if (agg->frame_count > (64 - sh)) {
2515 D_TX_REPLY("more frames than bitmap size");
2519 /* don't use 64-bit values for now */
2520 bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
2522 /* check for success or failure according to the
2523 * transmitted bitmap and block-ack bitmap */
2524 sent_bitmap = bitmap & agg->bitmap;
2526 /* For each frame attempted in aggregation,
2527 * update driver's record of tx frame's status. */
2529 while (sent_bitmap) {
2530 ack = sent_bitmap & 1ULL;
2532 D_TX_REPLY("%s ON i=%d idx=%d raw=%d\n", ack ? "ACK" : "NACK",
2533 i, (agg->start_idx + i) & 0xff, agg->start_idx + i);
2538 D_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
2540 info = IEEE80211_SKB_CB(il->txq[scd_flow].skbs[agg->start_idx]);
2541 memset(&info->status, 0, sizeof(info->status));
2542 info->flags |= IEEE80211_TX_STAT_ACK;
2543 info->flags |= IEEE80211_TX_STAT_AMPDU;
2544 info->status.ampdu_ack_len = successes;
2545 info->status.ampdu_len = agg->frame_count;
2546 il4965_hwrate_to_tx_control(il, agg->rate_n_flags, info);
2552 il4965_is_tx_success(u32 status)
2554 status &= TX_STATUS_MSK;
2555 return (status == TX_STATUS_SUCCESS || status == TX_STATUS_DIRECT_DONE);
2559 il4965_find_station(struct il_priv *il, const u8 *addr)
2563 int ret = IL_INVALID_STATION;
2564 unsigned long flags;
2566 if (il->iw_mode == NL80211_IFTYPE_ADHOC)
2569 if (is_broadcast_ether_addr(addr))
2570 return il->hw_params.bcast_id;
2572 spin_lock_irqsave(&il->sta_lock, flags);
2573 for (i = start; i < il->hw_params.max_stations; i++)
2574 if (il->stations[i].used &&
2575 (!compare_ether_addr(il->stations[i].sta.sta.addr, addr))) {
2580 D_ASSOC("can not find STA %pM total %d\n", addr, il->num_stations);
2584 * It may be possible that more commands interacting with stations
2585 * arrive before we completed processing the adding of
2588 if (ret != IL_INVALID_STATION &&
2589 (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
2590 ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
2591 (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
2592 IL_ERR("Requested station info for sta %d before ready.\n",
2594 ret = IL_INVALID_STATION;
2596 spin_unlock_irqrestore(&il->sta_lock, flags);
2601 il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
2603 if (il->iw_mode == NL80211_IFTYPE_STATION)
2606 u8 *da = ieee80211_get_DA(hdr);
2608 return il4965_find_station(il, da);
2613 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
2615 return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
2619 il4965_tx_status_to_mac80211(u32 status)
2621 status &= TX_STATUS_MSK;
2624 case TX_STATUS_SUCCESS:
2625 case TX_STATUS_DIRECT_DONE:
2626 return IEEE80211_TX_STAT_ACK;
2627 case TX_STATUS_FAIL_DEST_PS:
2628 return IEEE80211_TX_STAT_TX_FILTERED;
2635 * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
2638 il4965_tx_status_reply_tx(struct il_priv *il, struct il_ht_agg *agg,
2639 struct il4965_tx_resp *tx_resp, int txq_id,
2643 struct agg_tx_status *frame_status = tx_resp->u.agg_status;
2644 struct ieee80211_tx_info *info = NULL;
2645 struct ieee80211_hdr *hdr = NULL;
2646 u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
2649 if (agg->wait_for_ba)
2650 D_TX_REPLY("got tx response w/o block-ack\n");
2652 agg->frame_count = tx_resp->frame_count;
2653 agg->start_idx = start_idx;
2654 agg->rate_n_flags = rate_n_flags;
2657 /* num frames attempted by Tx command */
2658 if (agg->frame_count == 1) {
2659 /* Only one frame was attempted; no block-ack will arrive */
2660 status = le16_to_cpu(frame_status[0].status);
2663 D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
2664 agg->frame_count, agg->start_idx, idx);
2666 info = IEEE80211_SKB_CB(il->txq[txq_id].skbs[idx]);
2667 info->status.rates[0].count = tx_resp->failure_frame + 1;
2668 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
2669 info->flags |= il4965_tx_status_to_mac80211(status);
2670 il4965_hwrate_to_tx_control(il, rate_n_flags, info);
2672 D_TX_REPLY("1 Frame 0x%x failure :%d\n", status & 0xff,
2673 tx_resp->failure_frame);
2674 D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
2676 agg->wait_for_ba = 0;
2678 /* Two or more frames were attempted; expect block-ack */
2680 int start = agg->start_idx;
2681 struct sk_buff *skb;
2683 /* Construct bit-map of pending frames within Tx win */
2684 for (i = 0; i < agg->frame_count; i++) {
2686 status = le16_to_cpu(frame_status[i].status);
2687 seq = le16_to_cpu(frame_status[i].sequence);
2688 idx = SEQ_TO_IDX(seq);
2689 txq_id = SEQ_TO_QUEUE(seq);
2692 (AGG_TX_STATE_FEW_BYTES_MSK |
2693 AGG_TX_STATE_ABORT_MSK))
2696 D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
2697 agg->frame_count, txq_id, idx);
2699 skb = il->txq[txq_id].skbs[idx];
2700 if (WARN_ON_ONCE(skb == NULL))
2702 hdr = (struct ieee80211_hdr *) skb->data;
2704 sc = le16_to_cpu(hdr->seq_ctrl);
2705 if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2706 IL_ERR("BUG_ON idx doesn't match seq control"
2707 " idx=%d, seq_idx=%d, seq=%d\n", idx,
2708 SEQ_TO_SN(sc), hdr->seq_ctrl);
2712 D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n", i, idx,
2717 sh = (start - idx) + 0xff;
2718 bitmap = bitmap << sh;
2721 } else if (sh < -64)
2722 sh = 0xff - (start - idx);
2726 bitmap = bitmap << sh;
2729 bitmap |= 1ULL << sh;
2730 D_TX_REPLY("start=%d bitmap=0x%llx\n", start,
2731 (unsigned long long)bitmap);
2734 agg->bitmap = bitmap;
2735 agg->start_idx = start;
2736 D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
2737 agg->frame_count, agg->start_idx,
2738 (unsigned long long)agg->bitmap);
2741 agg->wait_for_ba = 1;
2747 * il4965_hdl_tx - Handle standard (non-aggregation) Tx response
2750 il4965_hdl_tx(struct il_priv *il, struct il_rx_buf *rxb)
2752 struct il_rx_pkt *pkt = rxb_addr(rxb);
2753 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2754 int txq_id = SEQ_TO_QUEUE(sequence);
2755 int idx = SEQ_TO_IDX(sequence);
2756 struct il_tx_queue *txq = &il->txq[txq_id];
2757 struct sk_buff *skb;
2758 struct ieee80211_hdr *hdr;
2759 struct ieee80211_tx_info *info;
2760 struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2761 u32 status = le32_to_cpu(tx_resp->u.status);
2762 int uninitialized_var(tid);
2766 unsigned long flags;
2768 if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
2769 IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
2770 "is out of range [0-%d] %d %d\n", txq_id, idx,
2771 txq->q.n_bd, txq->q.write_ptr, txq->q.read_ptr);
2775 txq->time_stamp = jiffies;
2777 skb = txq->skbs[txq->q.read_ptr];
2778 info = IEEE80211_SKB_CB(skb);
2779 memset(&info->status, 0, sizeof(info->status));
2781 hdr = (struct ieee80211_hdr *) skb->data;
2782 if (ieee80211_is_data_qos(hdr->frame_control)) {
2783 qc = ieee80211_get_qos_ctl(hdr);
2787 sta_id = il4965_get_ra_sta_id(il, hdr);
2788 if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
2789 IL_ERR("Station not known\n");
2793 spin_lock_irqsave(&il->sta_lock, flags);
2794 if (txq->sched_retry) {
2795 const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
2796 struct il_ht_agg *agg = NULL;
2799 agg = &il->stations[sta_id].tid[tid].agg;
2801 il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
2803 /* check if BAR is needed */
2804 if (tx_resp->frame_count == 1 &&
2805 !il4965_is_tx_success(status))
2806 info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2808 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2809 idx = il_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2810 D_TX_REPLY("Retry scheduler reclaim scd_ssn "
2811 "%d idx %d\n", scd_ssn, idx);
2812 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2814 il4965_free_tfds_in_queue(il, sta_id, tid,
2817 if (il->mac80211_registered &&
2818 il_queue_space(&txq->q) > txq->q.low_mark &&
2819 agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2820 il_wake_queue(il, txq);
2823 info->status.rates[0].count = tx_resp->failure_frame + 1;
2824 info->flags |= il4965_tx_status_to_mac80211(status);
2825 il4965_hwrate_to_tx_control(il,
2826 le32_to_cpu(tx_resp->rate_n_flags),
2829 D_TX_REPLY("TXQ %d status %s (0x%08x) "
2830 "rate_n_flags 0x%x retries %d\n", txq_id,
2831 il4965_get_tx_fail_reason(status), status,
2832 le32_to_cpu(tx_resp->rate_n_flags),
2833 tx_resp->failure_frame);
2835 freed = il4965_tx_queue_reclaim(il, txq_id, idx);
2836 if (qc && likely(sta_id != IL_INVALID_STATION))
2837 il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2838 else if (sta_id == IL_INVALID_STATION)
2839 D_TX_REPLY("Station not known\n");
2841 if (il->mac80211_registered &&
2842 il_queue_space(&txq->q) > txq->q.low_mark)
2843 il_wake_queue(il, txq);
2845 if (qc && likely(sta_id != IL_INVALID_STATION))
2846 il4965_txq_check_empty(il, sta_id, tid, txq_id);
2848 il4965_check_abort_status(il, tx_resp->frame_count, status);
2850 spin_unlock_irqrestore(&il->sta_lock, flags);
2854 * translate ucode response to mac80211 tx status control values
2857 il4965_hwrate_to_tx_control(struct il_priv *il, u32 rate_n_flags,
2858 struct ieee80211_tx_info *info)
2860 struct ieee80211_tx_rate *r = &info->control.rates[0];
2862 info->antenna_sel_tx =
2863 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
2864 if (rate_n_flags & RATE_MCS_HT_MSK)
2865 r->flags |= IEEE80211_TX_RC_MCS;
2866 if (rate_n_flags & RATE_MCS_GF_MSK)
2867 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
2868 if (rate_n_flags & RATE_MCS_HT40_MSK)
2869 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
2870 if (rate_n_flags & RATE_MCS_DUP_MSK)
2871 r->flags |= IEEE80211_TX_RC_DUP_DATA;
2872 if (rate_n_flags & RATE_MCS_SGI_MSK)
2873 r->flags |= IEEE80211_TX_RC_SHORT_GI;
2874 r->idx = il4965_hwrate_to_mac80211_idx(rate_n_flags, info->band);
2878 * il4965_hdl_compressed_ba - Handler for N_COMPRESSED_BA
2880 * Handles block-acknowledge notification from device, which reports success
2881 * of frames sent via aggregation.
2884 il4965_hdl_compressed_ba(struct il_priv *il, struct il_rx_buf *rxb)
2886 struct il_rx_pkt *pkt = rxb_addr(rxb);
2887 struct il_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
2888 struct il_tx_queue *txq = NULL;
2889 struct il_ht_agg *agg;
2893 unsigned long flags;
2895 /* "flow" corresponds to Tx queue */
2896 u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
2898 /* "ssn" is start of block-ack Tx win, corresponds to idx
2899 * (in Tx queue's circular buffer) of first TFD/frame in win */
2900 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
2902 if (scd_flow >= il->hw_params.max_txq_num) {
2903 IL_ERR("BUG_ON scd_flow is bigger than number of queues\n");
2907 txq = &il->txq[scd_flow];
2908 sta_id = ba_resp->sta_id;
2910 agg = &il->stations[sta_id].tid[tid].agg;
2911 if (unlikely(agg->txq_id != scd_flow)) {
2913 * FIXME: this is a uCode bug which need to be addressed,
2914 * log the information and return for now!
2915 * since it is possible happen very often and in order
2916 * not to fill the syslog, don't enable the logging by default
2918 D_TX_REPLY("BA scd_flow %d does not match txq_id %d\n",
2919 scd_flow, agg->txq_id);
2923 /* Find idx just before block-ack win */
2924 idx = il_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
2926 spin_lock_irqsave(&il->sta_lock, flags);
2928 D_TX_REPLY("N_COMPRESSED_BA [%d] Received from %pM, " "sta_id = %d\n",
2929 agg->wait_for_ba, (u8 *) &ba_resp->sta_addr_lo32,
2931 D_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx," "scd_flow = "
2932 "%d, scd_ssn = %d\n", ba_resp->tid, ba_resp->seq_ctl,
2933 (unsigned long long)le64_to_cpu(ba_resp->bitmap),
2934 ba_resp->scd_flow, ba_resp->scd_ssn);
2935 D_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx\n", agg->start_idx,
2936 (unsigned long long)agg->bitmap);
2938 /* Update driver's record of ACK vs. not for each frame in win */
2939 il4965_tx_status_reply_compressed_ba(il, agg, ba_resp);
2941 /* Release all TFDs before the SSN, i.e. all TFDs in front of
2942 * block-ack win (we assume that they've been successfully
2943 * transmitted ... if not, it's too late anyway). */
2944 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
2945 /* calculate mac80211 ampdu sw queue to wake */
2946 int freed = il4965_tx_queue_reclaim(il, scd_flow, idx);
2947 il4965_free_tfds_in_queue(il, sta_id, tid, freed);
2949 if (il_queue_space(&txq->q) > txq->q.low_mark &&
2950 il->mac80211_registered &&
2951 agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
2952 il_wake_queue(il, txq);
2954 il4965_txq_check_empty(il, sta_id, tid, scd_flow);
2957 spin_unlock_irqrestore(&il->sta_lock, flags);
2960 #ifdef CONFIG_IWLEGACY_DEBUG
2962 il4965_get_tx_fail_reason(u32 status)
2964 #define TX_STATUS_FAIL(x) case TX_STATUS_FAIL_ ## x: return #x
2965 #define TX_STATUS_POSTPONE(x) case TX_STATUS_POSTPONE_ ## x: return #x
2967 switch (status & TX_STATUS_MSK) {
2968 case TX_STATUS_SUCCESS:
2970 TX_STATUS_POSTPONE(DELAY);
2971 TX_STATUS_POSTPONE(FEW_BYTES);
2972 TX_STATUS_POSTPONE(QUIET_PERIOD);
2973 TX_STATUS_POSTPONE(CALC_TTAK);
2974 TX_STATUS_FAIL(INTERNAL_CROSSED_RETRY);
2975 TX_STATUS_FAIL(SHORT_LIMIT);
2976 TX_STATUS_FAIL(LONG_LIMIT);
2977 TX_STATUS_FAIL(FIFO_UNDERRUN);
2978 TX_STATUS_FAIL(DRAIN_FLOW);
2979 TX_STATUS_FAIL(RFKILL_FLUSH);
2980 TX_STATUS_FAIL(LIFE_EXPIRE);
2981 TX_STATUS_FAIL(DEST_PS);
2982 TX_STATUS_FAIL(HOST_ABORTED);
2983 TX_STATUS_FAIL(BT_RETRY);
2984 TX_STATUS_FAIL(STA_INVALID);
2985 TX_STATUS_FAIL(FRAG_DROPPED);
2986 TX_STATUS_FAIL(TID_DISABLE);
2987 TX_STATUS_FAIL(FIFO_FLUSHED);
2988 TX_STATUS_FAIL(INSUFFICIENT_CF_POLL);
2989 TX_STATUS_FAIL(PASSIVE_NO_RX);
2990 TX_STATUS_FAIL(NO_BEACON_ON_RADAR);
2995 #undef TX_STATUS_FAIL
2996 #undef TX_STATUS_POSTPONE
2998 #endif /* CONFIG_IWLEGACY_DEBUG */
3000 static struct il_link_quality_cmd *
3001 il4965_sta_alloc_lq(struct il_priv *il, u8 sta_id)
3004 struct il_link_quality_cmd *link_cmd;
3006 __le32 rate_n_flags;
3008 link_cmd = kzalloc(sizeof(struct il_link_quality_cmd), GFP_KERNEL);
3010 IL_ERR("Unable to allocate memory for LQ cmd.\n");
3013 /* Set up the rate scaling to start at selected rate, fall back
3014 * all the way down to 1M in IEEE order, and then spin on 1M */
3015 if (il->band == IEEE80211_BAND_5GHZ)
3020 if (r >= IL_FIRST_CCK_RATE && r <= IL_LAST_CCK_RATE)
3021 rate_flags |= RATE_MCS_CCK_MSK;
3024 il4965_first_antenna(il->hw_params.
3025 valid_tx_ant) << RATE_MCS_ANT_POS;
3026 rate_n_flags = cpu_to_le32(il_rates[r].plcp | rate_flags);
3027 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
3028 link_cmd->rs_table[i].rate_n_flags = rate_n_flags;
3030 link_cmd->general_params.single_stream_ant_msk =
3031 il4965_first_antenna(il->hw_params.valid_tx_ant);
3033 link_cmd->general_params.dual_stream_ant_msk =
3034 il->hw_params.valid_tx_ant & ~il4965_first_antenna(il->hw_params.
3036 if (!link_cmd->general_params.dual_stream_ant_msk) {
3037 link_cmd->general_params.dual_stream_ant_msk = ANT_AB;
3038 } else if (il4965_num_of_ant(il->hw_params.valid_tx_ant) == 2) {
3039 link_cmd->general_params.dual_stream_ant_msk =
3040 il->hw_params.valid_tx_ant;
3043 link_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
3044 link_cmd->agg_params.agg_time_limit =
3045 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
3047 link_cmd->sta_id = sta_id;
3053 * il4965_add_bssid_station - Add the special IBSS BSSID station
3058 il4965_add_bssid_station(struct il_priv *il, const u8 *addr, u8 *sta_id_r)
3062 struct il_link_quality_cmd *link_cmd;
3063 unsigned long flags;
3066 *sta_id_r = IL_INVALID_STATION;
3068 ret = il_add_station_common(il, addr, 0, NULL, &sta_id);
3070 IL_ERR("Unable to add station %pM\n", addr);
3077 spin_lock_irqsave(&il->sta_lock, flags);
3078 il->stations[sta_id].used |= IL_STA_LOCAL;
3079 spin_unlock_irqrestore(&il->sta_lock, flags);
3081 /* Set up default rate scaling table in device's station table */
3082 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3084 IL_ERR("Unable to initialize rate scaling for station %pM.\n",
3089 ret = il_send_lq_cmd(il, link_cmd, CMD_SYNC, true);
3091 IL_ERR("Link quality command failed (%d)\n", ret);
3093 spin_lock_irqsave(&il->sta_lock, flags);
3094 il->stations[sta_id].lq = link_cmd;
3095 spin_unlock_irqrestore(&il->sta_lock, flags);
3101 il4965_static_wepkey_cmd(struct il_priv *il, bool send_if_empty)
3104 u8 buff[sizeof(struct il_wep_cmd) +
3105 sizeof(struct il_wep_key) * WEP_KEYS_MAX];
3106 struct il_wep_cmd *wep_cmd = (struct il_wep_cmd *)buff;
3107 size_t cmd_size = sizeof(struct il_wep_cmd);
3108 struct il_host_cmd cmd = {
3113 bool not_empty = false;
3118 cmd_size + (sizeof(struct il_wep_key) * WEP_KEYS_MAX));
3120 for (i = 0; i < WEP_KEYS_MAX; i++) {
3121 u8 key_size = il->_4965.wep_keys[i].key_size;
3123 wep_cmd->key[i].key_idx = i;
3125 wep_cmd->key[i].key_offset = i;
3128 wep_cmd->key[i].key_offset = WEP_INVALID_OFFSET;
3130 wep_cmd->key[i].key_size = key_size;
3131 memcpy(&wep_cmd->key[i].key[3], il->_4965.wep_keys[i].key, key_size);
3134 wep_cmd->global_key_type = WEP_KEY_WEP_TYPE;
3135 wep_cmd->num_keys = WEP_KEYS_MAX;
3137 cmd_size += sizeof(struct il_wep_key) * WEP_KEYS_MAX;
3140 if (not_empty || send_if_empty)
3141 return il_send_cmd(il, &cmd);
3147 il4965_restore_default_wep_keys(struct il_priv *il)
3149 lockdep_assert_held(&il->mutex);
3151 return il4965_static_wepkey_cmd(il, false);
3155 il4965_remove_default_wep_key(struct il_priv *il,
3156 struct ieee80211_key_conf *keyconf)
3159 int idx = keyconf->keyidx;
3161 lockdep_assert_held(&il->mutex);
3163 D_WEP("Removing default WEP key: idx=%d\n", idx);
3165 memset(&il->_4965.wep_keys[idx], 0, sizeof(struct il_wep_key));
3166 if (il_is_rfkill(il)) {
3167 D_WEP("Not sending C_WEPKEY command due to RFKILL.\n");
3168 /* but keys in device are clear anyway so return success */
3171 ret = il4965_static_wepkey_cmd(il, 1);
3172 D_WEP("Remove default WEP key: idx=%d ret=%d\n", idx, ret);
3178 il4965_set_default_wep_key(struct il_priv *il,
3179 struct ieee80211_key_conf *keyconf)
3182 int len = keyconf->keylen;
3183 int idx = keyconf->keyidx;
3185 lockdep_assert_held(&il->mutex);
3187 if (len != WEP_KEY_LEN_128 && len != WEP_KEY_LEN_64) {
3188 D_WEP("Bad WEP key length %d\n", keyconf->keylen);
3192 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV;
3193 keyconf->hw_key_idx = HW_KEY_DEFAULT;
3194 il->stations[IL_AP_ID].keyinfo.cipher = keyconf->cipher;
3196 il->_4965.wep_keys[idx].key_size = len;
3197 memcpy(&il->_4965.wep_keys[idx].key, &keyconf->key, len);
3199 ret = il4965_static_wepkey_cmd(il, false);
3201 D_WEP("Set default WEP key: len=%d idx=%d ret=%d\n", len, idx, ret);
3206 il4965_set_wep_dynamic_key_info(struct il_priv *il,
3207 struct ieee80211_key_conf *keyconf, u8 sta_id)
3209 unsigned long flags;
3210 __le16 key_flags = 0;
3211 struct il_addsta_cmd sta_cmd;
3213 lockdep_assert_held(&il->mutex);
3215 keyconf->flags &= ~IEEE80211_KEY_FLAG_GENERATE_IV;
3217 key_flags |= (STA_KEY_FLG_WEP | STA_KEY_FLG_MAP_KEY_MSK);
3218 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3219 key_flags &= ~STA_KEY_FLG_INVALID;
3221 if (keyconf->keylen == WEP_KEY_LEN_128)
3222 key_flags |= STA_KEY_FLG_KEY_SIZE_MSK;
3224 if (sta_id == il->hw_params.bcast_id)
3225 key_flags |= STA_KEY_MULTICAST_MSK;
3227 spin_lock_irqsave(&il->sta_lock, flags);
3229 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3230 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
3231 il->stations[sta_id].keyinfo.keyidx = keyconf->keyidx;
3233 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
3235 memcpy(&il->stations[sta_id].sta.key.key[3], keyconf->key,
3238 if ((il->stations[sta_id].sta.key.
3239 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3240 il->stations[sta_id].sta.key.key_offset =
3241 il_get_free_ucode_key_idx(il);
3242 /* else, we are overriding an existing key => no need to allocated room
3245 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3246 "no space for a new key");
3248 il->stations[sta_id].sta.key.key_flags = key_flags;
3249 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3250 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3252 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3253 sizeof(struct il_addsta_cmd));
3254 spin_unlock_irqrestore(&il->sta_lock, flags);
3256 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3260 il4965_set_ccmp_dynamic_key_info(struct il_priv *il,
3261 struct ieee80211_key_conf *keyconf, u8 sta_id)
3263 unsigned long flags;
3264 __le16 key_flags = 0;
3265 struct il_addsta_cmd sta_cmd;
3267 lockdep_assert_held(&il->mutex);
3269 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
3270 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3271 key_flags &= ~STA_KEY_FLG_INVALID;
3273 if (sta_id == il->hw_params.bcast_id)
3274 key_flags |= STA_KEY_MULTICAST_MSK;
3276 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3278 spin_lock_irqsave(&il->sta_lock, flags);
3279 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3280 il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
3282 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
3284 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
3286 if ((il->stations[sta_id].sta.key.
3287 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3288 il->stations[sta_id].sta.key.key_offset =
3289 il_get_free_ucode_key_idx(il);
3290 /* else, we are overriding an existing key => no need to allocated room
3293 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3294 "no space for a new key");
3296 il->stations[sta_id].sta.key.key_flags = key_flags;
3297 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3298 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3300 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3301 sizeof(struct il_addsta_cmd));
3302 spin_unlock_irqrestore(&il->sta_lock, flags);
3304 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3308 il4965_set_tkip_dynamic_key_info(struct il_priv *il,
3309 struct ieee80211_key_conf *keyconf, u8 sta_id)
3311 unsigned long flags;
3313 __le16 key_flags = 0;
3315 key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
3316 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
3317 key_flags &= ~STA_KEY_FLG_INVALID;
3319 if (sta_id == il->hw_params.bcast_id)
3320 key_flags |= STA_KEY_MULTICAST_MSK;
3322 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
3323 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
3325 spin_lock_irqsave(&il->sta_lock, flags);
3327 il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
3328 il->stations[sta_id].keyinfo.keylen = 16;
3330 if ((il->stations[sta_id].sta.key.
3331 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
3332 il->stations[sta_id].sta.key.key_offset =
3333 il_get_free_ucode_key_idx(il);
3334 /* else, we are overriding an existing key => no need to allocated room
3337 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
3338 "no space for a new key");
3340 il->stations[sta_id].sta.key.key_flags = key_flags;
3342 /* This copy is acutally not needed: we get the key with each TX */
3343 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, 16);
3345 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, 16);
3347 spin_unlock_irqrestore(&il->sta_lock, flags);
3353 il4965_update_tkip_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
3354 struct ieee80211_sta *sta, u32 iv32, u16 *phase1key)
3357 unsigned long flags;
3360 if (il_scan_cancel(il)) {
3361 /* cancel scan failed, just live w/ bad key and rely
3362 briefly on SW decryption */
3366 sta_id = il_sta_id_or_broadcast(il, sta);
3367 if (sta_id == IL_INVALID_STATION)
3370 spin_lock_irqsave(&il->sta_lock, flags);
3372 il->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
3374 for (i = 0; i < 5; i++)
3375 il->stations[sta_id].sta.key.tkip_rx_ttak[i] =
3376 cpu_to_le16(phase1key[i]);
3378 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3379 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3381 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
3383 spin_unlock_irqrestore(&il->sta_lock, flags);
3387 il4965_remove_dynamic_key(struct il_priv *il,
3388 struct ieee80211_key_conf *keyconf, u8 sta_id)
3390 unsigned long flags;
3393 struct il_addsta_cmd sta_cmd;
3395 lockdep_assert_held(&il->mutex);
3397 il->_4965.key_mapping_keys--;
3399 spin_lock_irqsave(&il->sta_lock, flags);
3400 key_flags = le16_to_cpu(il->stations[sta_id].sta.key.key_flags);
3401 keyidx = (key_flags >> STA_KEY_FLG_KEYID_POS) & 0x3;
3403 D_WEP("Remove dynamic key: idx=%d sta=%d\n", keyconf->keyidx, sta_id);
3405 if (keyconf->keyidx != keyidx) {
3406 /* We need to remove a key with idx different that the one
3407 * in the uCode. This means that the key we need to remove has
3408 * been replaced by another one with different idx.
3409 * Don't do anything and return ok
3411 spin_unlock_irqrestore(&il->sta_lock, flags);
3415 if (il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET) {
3416 IL_WARN("Removing wrong key %d 0x%x\n", keyconf->keyidx,
3418 spin_unlock_irqrestore(&il->sta_lock, flags);
3422 if (!test_and_clear_bit
3423 (il->stations[sta_id].sta.key.key_offset, &il->ucode_key_table))
3424 IL_ERR("idx %d not used in uCode key table.\n",
3425 il->stations[sta_id].sta.key.key_offset);
3426 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
3427 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
3428 il->stations[sta_id].sta.key.key_flags =
3429 STA_KEY_FLG_NO_ENC | STA_KEY_FLG_INVALID;
3430 il->stations[sta_id].sta.key.key_offset = WEP_INVALID_OFFSET;
3431 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
3432 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3434 if (il_is_rfkill(il)) {
3436 ("Not sending C_ADD_STA command because RFKILL enabled.\n");
3437 spin_unlock_irqrestore(&il->sta_lock, flags);
3440 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3441 sizeof(struct il_addsta_cmd));
3442 spin_unlock_irqrestore(&il->sta_lock, flags);
3444 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3448 il4965_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
3453 lockdep_assert_held(&il->mutex);
3455 il->_4965.key_mapping_keys++;
3456 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
3458 switch (keyconf->cipher) {
3459 case WLAN_CIPHER_SUITE_CCMP:
3461 il4965_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
3463 case WLAN_CIPHER_SUITE_TKIP:
3465 il4965_set_tkip_dynamic_key_info(il, keyconf, sta_id);
3467 case WLAN_CIPHER_SUITE_WEP40:
3468 case WLAN_CIPHER_SUITE_WEP104:
3469 ret = il4965_set_wep_dynamic_key_info(il, keyconf, sta_id);
3472 IL_ERR("Unknown alg: %s cipher = %x\n", __func__,
3477 D_WEP("Set dynamic key: cipher=%x len=%d idx=%d sta=%d ret=%d\n",
3478 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
3484 * il4965_alloc_bcast_station - add broadcast station into driver's station table.
3486 * This adds the broadcast station into the driver's station table
3487 * and marks it driver active, so that it will be restored to the
3488 * device at the next best time.
3491 il4965_alloc_bcast_station(struct il_priv *il)
3493 struct il_link_quality_cmd *link_cmd;
3494 unsigned long flags;
3497 spin_lock_irqsave(&il->sta_lock, flags);
3498 sta_id = il_prep_station(il, il_bcast_addr, false, NULL);
3499 if (sta_id == IL_INVALID_STATION) {
3500 IL_ERR("Unable to prepare broadcast station\n");
3501 spin_unlock_irqrestore(&il->sta_lock, flags);
3506 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
3507 il->stations[sta_id].used |= IL_STA_BCAST;
3508 spin_unlock_irqrestore(&il->sta_lock, flags);
3510 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3513 ("Unable to initialize rate scaling for bcast station.\n");
3517 spin_lock_irqsave(&il->sta_lock, flags);
3518 il->stations[sta_id].lq = link_cmd;
3519 spin_unlock_irqrestore(&il->sta_lock, flags);
3525 * il4965_update_bcast_station - update broadcast station's LQ command
3527 * Only used by iwl4965. Placed here to have all bcast station management
3531 il4965_update_bcast_station(struct il_priv *il)
3533 unsigned long flags;
3534 struct il_link_quality_cmd *link_cmd;
3535 u8 sta_id = il->hw_params.bcast_id;
3537 link_cmd = il4965_sta_alloc_lq(il, sta_id);
3539 IL_ERR("Unable to initialize rate scaling for bcast sta.\n");
3543 spin_lock_irqsave(&il->sta_lock, flags);
3544 if (il->stations[sta_id].lq)
3545 kfree(il->stations[sta_id].lq);
3547 D_INFO("Bcast sta rate scaling has not been initialized.\n");
3548 il->stations[sta_id].lq = link_cmd;
3549 spin_unlock_irqrestore(&il->sta_lock, flags);
3555 il4965_update_bcast_stations(struct il_priv *il)
3557 return il4965_update_bcast_station(il);
3561 * il4965_sta_tx_modify_enable_tid - Enable Tx for this TID in station table
3564 il4965_sta_tx_modify_enable_tid(struct il_priv *il, int sta_id, int tid)
3566 unsigned long flags;
3567 struct il_addsta_cmd sta_cmd;
3569 lockdep_assert_held(&il->mutex);
3571 /* Remove "disable" flag, to enable Tx for this TID */
3572 spin_lock_irqsave(&il->sta_lock, flags);
3573 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
3574 il->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
3575 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3576 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3577 sizeof(struct il_addsta_cmd));
3578 spin_unlock_irqrestore(&il->sta_lock, flags);
3580 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3584 il4965_sta_rx_agg_start(struct il_priv *il, struct ieee80211_sta *sta, int tid,
3587 unsigned long flags;
3589 struct il_addsta_cmd sta_cmd;
3591 lockdep_assert_held(&il->mutex);
3593 sta_id = il_sta_id(sta);
3594 if (sta_id == IL_INVALID_STATION)
3597 spin_lock_irqsave(&il->sta_lock, flags);
3598 il->stations[sta_id].sta.station_flags_msk = 0;
3599 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
3600 il->stations[sta_id].sta.add_immediate_ba_tid = (u8) tid;
3601 il->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
3602 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3603 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3604 sizeof(struct il_addsta_cmd));
3605 spin_unlock_irqrestore(&il->sta_lock, flags);
3607 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3611 il4965_sta_rx_agg_stop(struct il_priv *il, struct ieee80211_sta *sta, int tid)
3613 unsigned long flags;
3615 struct il_addsta_cmd sta_cmd;
3617 lockdep_assert_held(&il->mutex);
3619 sta_id = il_sta_id(sta);
3620 if (sta_id == IL_INVALID_STATION) {
3621 IL_ERR("Invalid station for AGG tid %d\n", tid);
3625 spin_lock_irqsave(&il->sta_lock, flags);
3626 il->stations[sta_id].sta.station_flags_msk = 0;
3627 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
3628 il->stations[sta_id].sta.remove_immediate_ba_tid = (u8) tid;
3629 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3630 memcpy(&sta_cmd, &il->stations[sta_id].sta,
3631 sizeof(struct il_addsta_cmd));
3632 spin_unlock_irqrestore(&il->sta_lock, flags);
3634 return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
3638 il4965_sta_modify_sleep_tx_count(struct il_priv *il, int sta_id, int cnt)
3640 unsigned long flags;
3642 spin_lock_irqsave(&il->sta_lock, flags);
3643 il->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK;
3644 il->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3645 il->stations[sta_id].sta.sta.modify_mask =
3646 STA_MODIFY_SLEEP_TX_COUNT_MSK;
3647 il->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt);
3648 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3649 il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
3650 spin_unlock_irqrestore(&il->sta_lock, flags);
3655 il4965_update_chain_flags(struct il_priv *il)
3657 if (il->ops->set_rxon_chain) {
3658 il->ops->set_rxon_chain(il);
3659 if (il->active.rx_chain != il->staging.rx_chain)
3665 il4965_clear_free_frames(struct il_priv *il)
3667 struct list_head *element;
3669 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
3671 while (!list_empty(&il->free_frames)) {
3672 element = il->free_frames.next;
3674 kfree(list_entry(element, struct il_frame, list));
3678 if (il->frames_count) {
3679 IL_WARN("%d frames still in use. Did we lose one?\n",
3681 il->frames_count = 0;
3685 static struct il_frame *
3686 il4965_get_free_frame(struct il_priv *il)
3688 struct il_frame *frame;
3689 struct list_head *element;
3690 if (list_empty(&il->free_frames)) {
3691 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
3693 IL_ERR("Could not allocate frame!\n");
3701 element = il->free_frames.next;
3703 return list_entry(element, struct il_frame, list);
3707 il4965_free_frame(struct il_priv *il, struct il_frame *frame)
3709 memset(frame, 0, sizeof(*frame));
3710 list_add(&frame->list, &il->free_frames);
3714 il4965_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
3717 lockdep_assert_held(&il->mutex);
3719 if (!il->beacon_skb)
3722 if (il->beacon_skb->len > left)
3725 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
3727 return il->beacon_skb->len;
3730 /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
3732 il4965_set_beacon_tim(struct il_priv *il,
3733 struct il_tx_beacon_cmd *tx_beacon_cmd, u8 * beacon,
3737 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
3740 * The idx is relative to frame start but we start looking at the
3741 * variable-length part of the beacon.
3743 tim_idx = mgmt->u.beacon.variable - beacon;
3745 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
3746 while ((tim_idx < (frame_size - 2)) &&
3747 (beacon[tim_idx] != WLAN_EID_TIM))
3748 tim_idx += beacon[tim_idx + 1] + 2;
3750 /* If TIM field was found, set variables */
3751 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
3752 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
3753 tx_beacon_cmd->tim_size = beacon[tim_idx + 1];
3755 IL_WARN("Unable to find TIM Element in beacon\n");
3759 il4965_hw_get_beacon_cmd(struct il_priv *il, struct il_frame *frame)
3761 struct il_tx_beacon_cmd *tx_beacon_cmd;
3766 * We have to set up the TX command, the TX Beacon command, and the
3770 lockdep_assert_held(&il->mutex);
3772 if (!il->beacon_enabled) {
3773 IL_ERR("Trying to build beacon without beaconing enabled\n");
3777 /* Initialize memory */
3778 tx_beacon_cmd = &frame->u.beacon;
3779 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
3781 /* Set up TX beacon contents */
3783 il4965_fill_beacon_frame(il, tx_beacon_cmd->frame,
3784 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
3785 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
3790 /* Set up TX command fields */
3791 tx_beacon_cmd->tx.len = cpu_to_le16((u16) frame_size);
3792 tx_beacon_cmd->tx.sta_id = il->hw_params.bcast_id;
3793 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
3794 tx_beacon_cmd->tx.tx_flags =
3795 TX_CMD_FLG_SEQ_CTL_MSK | TX_CMD_FLG_TSF_MSK |
3796 TX_CMD_FLG_STA_RATE_MSK;
3798 /* Set up TX beacon command fields */
3799 il4965_set_beacon_tim(il, tx_beacon_cmd, (u8 *) tx_beacon_cmd->frame,
3802 /* Set up packet rate and flags */
3803 rate = il_get_lowest_plcp(il);
3804 il4965_toggle_tx_ant(il, &il->mgmt_tx_ant, il->hw_params.valid_tx_ant);
3805 rate_flags = BIT(il->mgmt_tx_ant) << RATE_MCS_ANT_POS;
3806 if ((rate >= IL_FIRST_CCK_RATE) && (rate <= IL_LAST_CCK_RATE))
3807 rate_flags |= RATE_MCS_CCK_MSK;
3808 tx_beacon_cmd->tx.rate_n_flags = cpu_to_le32(rate | rate_flags);
3810 return sizeof(*tx_beacon_cmd) + frame_size;
3814 il4965_send_beacon_cmd(struct il_priv *il)
3816 struct il_frame *frame;
3817 unsigned int frame_size;
3820 frame = il4965_get_free_frame(il);
3822 IL_ERR("Could not obtain free frame buffer for beacon "
3827 frame_size = il4965_hw_get_beacon_cmd(il, frame);
3829 IL_ERR("Error configuring the beacon command\n");
3830 il4965_free_frame(il, frame);
3834 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
3836 il4965_free_frame(il, frame);
3841 static inline dma_addr_t
3842 il4965_tfd_tb_get_addr(struct il_tfd *tfd, u8 idx)
3844 struct il_tfd_tb *tb = &tfd->tbs[idx];
3846 dma_addr_t addr = get_unaligned_le32(&tb->lo);
3847 if (sizeof(dma_addr_t) > sizeof(u32))
3849 ((dma_addr_t) (le16_to_cpu(tb->hi_n_len) & 0xF) << 16) <<
3856 il4965_tfd_tb_get_len(struct il_tfd *tfd, u8 idx)
3858 struct il_tfd_tb *tb = &tfd->tbs[idx];
3860 return le16_to_cpu(tb->hi_n_len) >> 4;
3864 il4965_tfd_set_tb(struct il_tfd *tfd, u8 idx, dma_addr_t addr, u16 len)
3866 struct il_tfd_tb *tb = &tfd->tbs[idx];
3867 u16 hi_n_len = len << 4;
3869 put_unaligned_le32(addr, &tb->lo);
3870 if (sizeof(dma_addr_t) > sizeof(u32))
3871 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
3873 tb->hi_n_len = cpu_to_le16(hi_n_len);
3875 tfd->num_tbs = idx + 1;
3879 il4965_tfd_get_num_tbs(struct il_tfd *tfd)
3881 return tfd->num_tbs & 0x1f;
3885 * il4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
3886 * @il - driver ilate data
3889 * Does NOT advance any TFD circular buffer read/write idxes
3890 * Does NOT free the TFD itself (which is within circular buffer)
3893 il4965_hw_txq_free_tfd(struct il_priv *il, struct il_tx_queue *txq)
3895 struct il_tfd *tfd_tmp = (struct il_tfd *)txq->tfds;
3897 struct pci_dev *dev = il->pci_dev;
3898 int idx = txq->q.read_ptr;
3902 tfd = &tfd_tmp[idx];
3904 /* Sanity check on number of chunks */
3905 num_tbs = il4965_tfd_get_num_tbs(tfd);
3907 if (num_tbs >= IL_NUM_OF_TBS) {
3908 IL_ERR("Too many chunks: %i\n", num_tbs);
3909 /* @todo issue fatal error, it is quite serious situation */
3915 pci_unmap_single(dev, dma_unmap_addr(&txq->meta[idx], mapping),
3916 dma_unmap_len(&txq->meta[idx], len),
3917 PCI_DMA_BIDIRECTIONAL);
3919 /* Unmap chunks, if any. */
3920 for (i = 1; i < num_tbs; i++)
3921 pci_unmap_single(dev, il4965_tfd_tb_get_addr(tfd, i),
3922 il4965_tfd_tb_get_len(tfd, i),
3927 struct sk_buff *skb = txq->skbs[txq->q.read_ptr];
3929 /* can be called from irqs-disabled context */
3931 dev_kfree_skb_any(skb);
3932 txq->skbs[txq->q.read_ptr] = NULL;
3938 il4965_hw_txq_attach_buf_to_tfd(struct il_priv *il, struct il_tx_queue *txq,
3939 dma_addr_t addr, u16 len, u8 reset, u8 pad)
3942 struct il_tfd *tfd, *tfd_tmp;
3946 tfd_tmp = (struct il_tfd *)txq->tfds;
3947 tfd = &tfd_tmp[q->write_ptr];
3950 memset(tfd, 0, sizeof(*tfd));
3952 num_tbs = il4965_tfd_get_num_tbs(tfd);
3954 /* Each TFD can point to a maximum 20 Tx buffers */
3955 if (num_tbs >= IL_NUM_OF_TBS) {
3956 IL_ERR("Error can not send more than %d chunks\n",
3961 BUG_ON(addr & ~DMA_BIT_MASK(36));
3962 if (unlikely(addr & ~IL_TX_DMA_MASK))
3963 IL_ERR("Unaligned address = %llx\n", (unsigned long long)addr);
3965 il4965_tfd_set_tb(tfd, num_tbs, addr, len);
3971 * Tell nic where to find circular buffer of Tx Frame Descriptors for
3972 * given Tx queue, and enable the DMA channel used for that queue.
3974 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
3975 * channels supported in hardware.
3978 il4965_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
3980 int txq_id = txq->q.id;
3982 /* Circular buffer (TFD queue in DRAM) physical base address */
3983 il_wr(il, FH49_MEM_CBBC_QUEUE(txq_id), txq->q.dma_addr >> 8);
3988 /******************************************************************************
3990 * Generic RX handler implementations
3992 ******************************************************************************/
3994 il4965_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
3996 struct il_rx_pkt *pkt = rxb_addr(rxb);
3997 struct il_alive_resp *palive;
3998 struct delayed_work *pwork;
4000 palive = &pkt->u.alive_frame;
4002 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
4003 palive->is_valid, palive->ver_type, palive->ver_subtype);
4005 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
4006 D_INFO("Initialization Alive received.\n");
4007 memcpy(&il->card_alive_init, &pkt->u.alive_frame,
4008 sizeof(struct il_init_alive_resp));
4009 pwork = &il->init_alive_start;
4011 D_INFO("Runtime Alive received.\n");
4012 memcpy(&il->card_alive, &pkt->u.alive_frame,
4013 sizeof(struct il_alive_resp));
4014 pwork = &il->alive_start;
4017 /* We delay the ALIVE response by 5ms to
4018 * give the HW RF Kill time to activate... */
4019 if (palive->is_valid == UCODE_VALID_OK)
4020 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
4022 IL_WARN("uCode did not respond OK.\n");
4026 * il4965_bg_stats_periodic - Timer callback to queue stats
4028 * This callback is provided in order to send a stats request.
4030 * This timer function is continually reset to execute within
4031 * 60 seconds since the last N_STATS was received. We need to
4032 * ensure we receive the stats in order to update the temperature
4033 * used for calibrating the TXPOWER.
4036 il4965_bg_stats_periodic(unsigned long data)
4038 struct il_priv *il = (struct il_priv *)data;
4040 if (test_bit(S_EXIT_PENDING, &il->status))
4043 /* dont send host command if rf-kill is on */
4044 if (!il_is_ready_rf(il))
4047 il_send_stats_request(il, CMD_ASYNC, false);
4051 il4965_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
4053 struct il_rx_pkt *pkt = rxb_addr(rxb);
4054 struct il4965_beacon_notif *beacon =
4055 (struct il4965_beacon_notif *)pkt->u.raw;
4056 #ifdef CONFIG_IWLEGACY_DEBUG
4057 u8 rate = il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
4059 D_RX("beacon status %x retries %d iss %d tsf:0x%.8x%.8x rate %d\n",
4060 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
4061 beacon->beacon_notify_hdr.failure_frame,
4062 le32_to_cpu(beacon->ibss_mgr_status),
4063 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
4065 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
4069 il4965_perform_ct_kill_task(struct il_priv *il)
4071 unsigned long flags;
4073 D_POWER("Stop all queues\n");
4075 if (il->mac80211_registered)
4076 ieee80211_stop_queues(il->hw);
4078 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
4079 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
4080 _il_rd(il, CSR_UCODE_DRV_GP1);
4082 spin_lock_irqsave(&il->reg_lock, flags);
4083 if (likely(_il_grab_nic_access(il)))
4084 _il_release_nic_access(il);
4085 spin_unlock_irqrestore(&il->reg_lock, flags);
4088 /* Handle notification from uCode that card's power state is changing
4089 * due to software, hardware, or critical temperature RFKILL */
4091 il4965_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
4093 struct il_rx_pkt *pkt = rxb_addr(rxb);
4094 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
4095 unsigned long status = il->status;
4097 D_RF_KILL("Card state received: HW:%s SW:%s CT:%s\n",
4098 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
4099 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
4100 (flags & CT_CARD_DISABLED) ? "Reached" : "Not reached");
4102 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | CT_CARD_DISABLED)) {
4104 _il_wr(il, CSR_UCODE_DRV_GP1_SET,
4105 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4107 il_wr(il, HBUS_TARG_MBX_C, HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4109 if (!(flags & RXON_CARD_DISABLED)) {
4110 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
4111 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
4112 il_wr(il, HBUS_TARG_MBX_C,
4113 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
4117 if (flags & CT_CARD_DISABLED)
4118 il4965_perform_ct_kill_task(il);
4120 if (flags & HW_CARD_DISABLED)
4121 set_bit(S_RF_KILL_HW, &il->status);
4123 clear_bit(S_RF_KILL_HW, &il->status);
4125 if (!(flags & RXON_CARD_DISABLED))
4128 if ((test_bit(S_RF_KILL_HW, &status) !=
4129 test_bit(S_RF_KILL_HW, &il->status)))
4130 wiphy_rfkill_set_hw_state(il->hw->wiphy,
4131 test_bit(S_RF_KILL_HW, &il->status));
4133 wake_up(&il->wait_command_queue);
4137 * il4965_setup_handlers - Initialize Rx handler callbacks
4139 * Setup the RX handlers for each of the reply types sent from the uCode
4142 * This function chains into the hardware specific files for them to setup
4143 * any hardware specific handlers as well.
4146 il4965_setup_handlers(struct il_priv *il)
4148 il->handlers[N_ALIVE] = il4965_hdl_alive;
4149 il->handlers[N_ERROR] = il_hdl_error;
4150 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
4151 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
4152 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
4153 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
4154 il->handlers[N_BEACON] = il4965_hdl_beacon;
4157 * The same handler is used for both the REPLY to a discrete
4158 * stats request from the host as well as for the periodic
4159 * stats notifications (after received beacons) from the uCode.
4161 il->handlers[C_STATS] = il4965_hdl_c_stats;
4162 il->handlers[N_STATS] = il4965_hdl_stats;
4164 il_setup_rx_scan_handlers(il);
4166 /* status change handler */
4167 il->handlers[N_CARD_STATE] = il4965_hdl_card_state;
4169 il->handlers[N_MISSED_BEACONS] = il4965_hdl_missed_beacon;
4171 il->handlers[N_RX_PHY] = il4965_hdl_rx_phy;
4172 il->handlers[N_RX_MPDU] = il4965_hdl_rx;
4173 il->handlers[N_RX] = il4965_hdl_rx;
4175 il->handlers[N_COMPRESSED_BA] = il4965_hdl_compressed_ba;
4177 il->handlers[C_TX] = il4965_hdl_tx;
4181 * il4965_rx_handle - Main entry function for receiving responses from uCode
4183 * Uses the il->handlers callback function array to invoke
4184 * the appropriate handlers, including command responses,
4185 * frame-received notifications, and other notifications.
4188 il4965_rx_handle(struct il_priv *il)
4190 struct il_rx_buf *rxb;
4191 struct il_rx_pkt *pkt;
4192 struct il_rx_queue *rxq = &il->rxq;
4195 unsigned long flags;
4200 /* uCode's read idx (stored in shared DRAM) indicates the last Rx
4201 * buffer that the driver may process (last buffer filled by ucode). */
4202 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
4205 /* Rx interrupt, but nothing sent from uCode */
4207 D_RX("r = %d, i = %d\n", r, i);
4209 /* calculate total frames need to be restock after handling RX */
4210 total_empty = r - rxq->write_actual;
4211 if (total_empty < 0)
4212 total_empty += RX_QUEUE_SIZE;
4214 if (total_empty > (RX_QUEUE_SIZE / 2))
4220 rxb = rxq->queue[i];
4222 /* If an RXB doesn't have a Rx queue slot associated with it,
4223 * then a bug has been introduced in the queue refilling
4224 * routines -- catch it here */
4225 BUG_ON(rxb == NULL);
4227 rxq->queue[i] = NULL;
4229 pci_unmap_page(il->pci_dev, rxb->page_dma,
4230 PAGE_SIZE << il->hw_params.rx_page_order,
4231 PCI_DMA_FROMDEVICE);
4232 pkt = rxb_addr(rxb);
4234 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4235 len += sizeof(u32); /* account for status word */
4237 /* Reclaim a command buffer only if this packet is a response
4238 * to a (driver-originated) command.
4239 * If the packet (e.g. Rx frame) originated from uCode,
4240 * there is no command buffer to reclaim.
4241 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
4242 * but apparently a few don't get set; catch them here. */
4243 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
4244 (pkt->hdr.cmd != N_RX_PHY) && (pkt->hdr.cmd != N_RX) &&
4245 (pkt->hdr.cmd != N_RX_MPDU) &&
4246 (pkt->hdr.cmd != N_COMPRESSED_BA) &&
4247 (pkt->hdr.cmd != N_STATS) && (pkt->hdr.cmd != C_TX);
4249 /* Based on type of command response or notification,
4250 * handle those that need handling via function in
4251 * handlers table. See il4965_setup_handlers() */
4252 if (il->handlers[pkt->hdr.cmd]) {
4253 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
4254 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4255 il->isr_stats.handlers[pkt->hdr.cmd]++;
4256 il->handlers[pkt->hdr.cmd] (il, rxb);
4258 /* No handling needed */
4259 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
4260 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
4264 * XXX: After here, we should always check rxb->page
4265 * against NULL before touching it or its virtual
4266 * memory (pkt). Because some handler might have
4267 * already taken or freed the pages.
4271 /* Invoke any callbacks, transfer the buffer to caller,
4272 * and fire off the (possibly) blocking il_send_cmd()
4273 * as we reclaim the driver command queue */
4275 il_tx_cmd_complete(il, rxb);
4277 IL_WARN("Claim null rxb?\n");
4280 /* Reuse the page if possible. For notification packets and
4281 * SKBs that fail to Rx correctly, add them back into the
4282 * rx_free list for reuse later. */
4283 spin_lock_irqsave(&rxq->lock, flags);
4284 if (rxb->page != NULL) {
4286 pci_map_page(il->pci_dev, rxb->page, 0,
4287 PAGE_SIZE << il->hw_params.
4288 rx_page_order, PCI_DMA_FROMDEVICE);
4289 list_add_tail(&rxb->list, &rxq->rx_free);
4292 list_add_tail(&rxb->list, &rxq->rx_used);
4294 spin_unlock_irqrestore(&rxq->lock, flags);
4296 i = (i + 1) & RX_QUEUE_MASK;
4297 /* If there are a lot of unused frames,
4298 * restock the Rx queue so ucode wont assert. */
4303 il4965_rx_replenish_now(il);
4309 /* Backtrack one entry */
4312 il4965_rx_replenish_now(il);
4314 il4965_rx_queue_restock(il);
4317 /* call this function to flush any scheduled tasklet */
4319 il4965_synchronize_irq(struct il_priv *il)
4321 /* wait to make sure we flush pending tasklet */
4322 synchronize_irq(il->pci_dev->irq);
4323 tasklet_kill(&il->irq_tasklet);
4327 il4965_irq_tasklet(struct il_priv *il)
4329 u32 inta, handled = 0;
4331 unsigned long flags;
4333 #ifdef CONFIG_IWLEGACY_DEBUG
4337 spin_lock_irqsave(&il->lock, flags);
4339 /* Ack/clear/reset pending uCode interrupts.
4340 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4341 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4342 inta = _il_rd(il, CSR_INT);
4343 _il_wr(il, CSR_INT, inta);
4345 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4346 * Any new interrupts that happen after this, either while we're
4347 * in this tasklet, or later, will show up in next ISR/tasklet. */
4348 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
4349 _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
4351 #ifdef CONFIG_IWLEGACY_DEBUG
4352 if (il_get_debug_level(il) & IL_DL_ISR) {
4353 /* just for debug */
4354 inta_mask = _il_rd(il, CSR_INT_MASK);
4355 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
4356 inta_mask, inta_fh);
4360 spin_unlock_irqrestore(&il->lock, flags);
4362 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
4363 * atomic, make sure that inta covers all the interrupts that
4364 * we've discovered, even if FH interrupt came in just after
4365 * reading CSR_INT. */
4366 if (inta_fh & CSR49_FH_INT_RX_MASK)
4367 inta |= CSR_INT_BIT_FH_RX;
4368 if (inta_fh & CSR49_FH_INT_TX_MASK)
4369 inta |= CSR_INT_BIT_FH_TX;
4371 /* Now service all interrupt bits discovered above. */
4372 if (inta & CSR_INT_BIT_HW_ERR) {
4373 IL_ERR("Hardware error detected. Restarting.\n");
4375 /* Tell the device to stop sending interrupts */
4376 il_disable_interrupts(il);
4379 il_irq_handle_error(il);
4381 handled |= CSR_INT_BIT_HW_ERR;
4385 #ifdef CONFIG_IWLEGACY_DEBUG
4386 if (il_get_debug_level(il) & (IL_DL_ISR)) {
4387 /* NIC fires this, but we don't use it, redundant with WAKEUP */
4388 if (inta & CSR_INT_BIT_SCD) {
4389 D_ISR("Scheduler finished to transmit "
4390 "the frame/frames.\n");
4391 il->isr_stats.sch++;
4394 /* Alive notification via Rx interrupt will do the real work */
4395 if (inta & CSR_INT_BIT_ALIVE) {
4396 D_ISR("Alive interrupt\n");
4397 il->isr_stats.alive++;
4401 /* Safely ignore these bits for debug checks below */
4402 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
4404 /* HW RF KILL switch toggled */
4405 if (inta & CSR_INT_BIT_RF_KILL) {
4408 if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4411 IL_WARN("RF_KILL bit toggled to %s.\n",
4412 hw_rf_kill ? "disable radio" : "enable radio");
4414 il->isr_stats.rfkill++;
4416 /* driver only loads ucode once setting the interface up.
4417 * the driver allows loading the ucode even if the radio
4418 * is killed. Hence update the killswitch state here. The
4419 * rfkill handler will care about restarting if needed.
4421 if (!test_bit(S_ALIVE, &il->status)) {
4423 set_bit(S_RF_KILL_HW, &il->status);
4425 clear_bit(S_RF_KILL_HW, &il->status);
4426 wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rf_kill);
4429 handled |= CSR_INT_BIT_RF_KILL;
4432 /* Chip got too hot and stopped itself */
4433 if (inta & CSR_INT_BIT_CT_KILL) {
4434 IL_ERR("Microcode CT kill error detected.\n");
4435 il->isr_stats.ctkill++;
4436 handled |= CSR_INT_BIT_CT_KILL;
4439 /* Error detected by uCode */
4440 if (inta & CSR_INT_BIT_SW_ERR) {
4441 IL_ERR("Microcode SW error detected. " " Restarting 0x%X.\n",
4444 il_irq_handle_error(il);
4445 handled |= CSR_INT_BIT_SW_ERR;
4449 * uCode wakes up after power-down sleep.
4450 * Tell device about any new tx or host commands enqueued,
4451 * and about any Rx buffers made available while asleep.
4453 if (inta & CSR_INT_BIT_WAKEUP) {
4454 D_ISR("Wakeup interrupt\n");
4455 il_rx_queue_update_write_ptr(il, &il->rxq);
4456 for (i = 0; i < il->hw_params.max_txq_num; i++)
4457 il_txq_update_write_ptr(il, &il->txq[i]);
4458 il->isr_stats.wakeup++;
4459 handled |= CSR_INT_BIT_WAKEUP;
4462 /* All uCode command responses, including Tx command responses,
4463 * Rx "responses" (frame-received notification), and other
4464 * notifications from uCode come through here*/
4465 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
4466 il4965_rx_handle(il);
4468 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
4471 /* This "Tx" DMA channel is used only for loading uCode */
4472 if (inta & CSR_INT_BIT_FH_TX) {
4473 D_ISR("uCode load interrupt\n");
4475 handled |= CSR_INT_BIT_FH_TX;
4476 /* Wake up uCode load routine, now that load is complete */
4477 il->ucode_write_complete = 1;
4478 wake_up(&il->wait_command_queue);
4481 if (inta & ~handled) {
4482 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
4483 il->isr_stats.unhandled++;
4486 if (inta & ~(il->inta_mask)) {
4487 IL_WARN("Disabled INTA bits 0x%08x were pending\n",
4488 inta & ~il->inta_mask);
4489 IL_WARN(" with FH49_INT = 0x%08x\n", inta_fh);
4492 /* Re-enable all interrupts */
4493 /* only Re-enable if disabled by irq */
4494 if (test_bit(S_INT_ENABLED, &il->status))
4495 il_enable_interrupts(il);
4496 /* Re-enable RF_KILL if it occurred */
4497 else if (handled & CSR_INT_BIT_RF_KILL)
4498 il_enable_rfkill_int(il);
4500 #ifdef CONFIG_IWLEGACY_DEBUG
4501 if (il_get_debug_level(il) & (IL_DL_ISR)) {
4502 inta = _il_rd(il, CSR_INT);
4503 inta_mask = _il_rd(il, CSR_INT_MASK);
4504 inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
4505 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4506 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4511 /*****************************************************************************
4515 *****************************************************************************/
4517 #ifdef CONFIG_IWLEGACY_DEBUG
4520 * The following adds a new attribute to the sysfs representation
4521 * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
4522 * used for controlling the debug level.
4524 * See the level definitions in iwl for details.
4526 * The debug_level being managed using sysfs below is a per device debug
4527 * level that is used instead of the global debug level if it (the per
4528 * device debug level) is set.
4531 il4965_show_debug_level(struct device *d, struct device_attribute *attr,
4534 struct il_priv *il = dev_get_drvdata(d);
4535 return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
4539 il4965_store_debug_level(struct device *d, struct device_attribute *attr,
4540 const char *buf, size_t count)
4542 struct il_priv *il = dev_get_drvdata(d);
4546 ret = strict_strtoul(buf, 0, &val);
4548 IL_ERR("%s is not in hex or decimal form.\n", buf);
4550 il->debug_level = val;
4552 return strnlen(buf, count);
4555 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il4965_show_debug_level,
4556 il4965_store_debug_level);
4558 #endif /* CONFIG_IWLEGACY_DEBUG */
4561 il4965_show_temperature(struct device *d, struct device_attribute *attr,
4564 struct il_priv *il = dev_get_drvdata(d);
4566 if (!il_is_alive(il))
4569 return sprintf(buf, "%d\n", il->temperature);
4572 static DEVICE_ATTR(temperature, S_IRUGO, il4965_show_temperature, NULL);
4575 il4965_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
4577 struct il_priv *il = dev_get_drvdata(d);
4579 if (!il_is_ready_rf(il))
4580 return sprintf(buf, "off\n");
4582 return sprintf(buf, "%d\n", il->tx_power_user_lmt);
4586 il4965_store_tx_power(struct device *d, struct device_attribute *attr,
4587 const char *buf, size_t count)
4589 struct il_priv *il = dev_get_drvdata(d);
4593 ret = strict_strtoul(buf, 10, &val);
4595 IL_INFO("%s is not in decimal form.\n", buf);
4597 ret = il_set_tx_power(il, val, false);
4599 IL_ERR("failed setting tx power (0x%d).\n", ret);
4606 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il4965_show_tx_power,
4607 il4965_store_tx_power);
4609 static struct attribute *il_sysfs_entries[] = {
4610 &dev_attr_temperature.attr,
4611 &dev_attr_tx_power.attr,
4612 #ifdef CONFIG_IWLEGACY_DEBUG
4613 &dev_attr_debug_level.attr,
4618 static struct attribute_group il_attribute_group = {
4619 .name = NULL, /* put in device directory */
4620 .attrs = il_sysfs_entries,
4623 /******************************************************************************
4625 * uCode download functions
4627 ******************************************************************************/
4630 il4965_dealloc_ucode_pci(struct il_priv *il)
4632 il_free_fw_desc(il->pci_dev, &il->ucode_code);
4633 il_free_fw_desc(il->pci_dev, &il->ucode_data);
4634 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
4635 il_free_fw_desc(il->pci_dev, &il->ucode_init);
4636 il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
4637 il_free_fw_desc(il->pci_dev, &il->ucode_boot);
4641 il4965_nic_start(struct il_priv *il)
4643 /* Remove all resets to allow NIC to operate */
4644 _il_wr(il, CSR_RESET, 0);
4647 static void il4965_ucode_callback(const struct firmware *ucode_raw,
4649 static int il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length);
4651 static int __must_check
4652 il4965_request_firmware(struct il_priv *il, bool first)
4654 const char *name_pre = il->cfg->fw_name_pre;
4658 il->fw_idx = il->cfg->ucode_api_max;
4659 sprintf(tag, "%d", il->fw_idx);
4662 sprintf(tag, "%d", il->fw_idx);
4665 if (il->fw_idx < il->cfg->ucode_api_min) {
4666 IL_ERR("no suitable firmware found!\n");
4670 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
4672 D_INFO("attempting to load firmware '%s'\n", il->firmware_name);
4674 return request_firmware_nowait(THIS_MODULE, 1, il->firmware_name,
4675 &il->pci_dev->dev, GFP_KERNEL, il,
4676 il4965_ucode_callback);
4679 struct il4965_firmware_pieces {
4680 const void *inst, *data, *init, *init_data, *boot;
4681 size_t inst_size, data_size, init_size, init_data_size, boot_size;
4685 il4965_load_firmware(struct il_priv *il, const struct firmware *ucode_raw,
4686 struct il4965_firmware_pieces *pieces)
4688 struct il_ucode_header *ucode = (void *)ucode_raw->data;
4689 u32 api_ver, hdr_size;
4692 il->ucode_ver = le32_to_cpu(ucode->ver);
4693 api_ver = IL_UCODE_API(il->ucode_ver);
4701 if (ucode_raw->size < hdr_size) {
4702 IL_ERR("File size too small!\n");
4705 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size);
4706 pieces->data_size = le32_to_cpu(ucode->v1.data_size);
4707 pieces->init_size = le32_to_cpu(ucode->v1.init_size);
4708 pieces->init_data_size = le32_to_cpu(ucode->v1.init_data_size);
4709 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size);
4710 src = ucode->v1.data;
4714 /* Verify size of file vs. image size info in file's header */
4715 if (ucode_raw->size !=
4716 hdr_size + pieces->inst_size + pieces->data_size +
4717 pieces->init_size + pieces->init_data_size + pieces->boot_size) {
4719 IL_ERR("uCode file size %d does not match expected size\n",
4720 (int)ucode_raw->size);
4725 src += pieces->inst_size;
4727 src += pieces->data_size;
4729 src += pieces->init_size;
4730 pieces->init_data = src;
4731 src += pieces->init_data_size;
4733 src += pieces->boot_size;
4739 * il4965_ucode_callback - callback when firmware was loaded
4741 * If loaded successfully, copies the firmware into buffers
4742 * for the card to fetch (via DMA).
4745 il4965_ucode_callback(const struct firmware *ucode_raw, void *context)
4747 struct il_priv *il = context;
4748 struct il_ucode_header *ucode;
4750 struct il4965_firmware_pieces pieces;
4751 const unsigned int api_max = il->cfg->ucode_api_max;
4752 const unsigned int api_min = il->cfg->ucode_api_min;
4755 u32 max_probe_length = 200;
4756 u32 standard_phy_calibration_size =
4757 IL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE;
4759 memset(&pieces, 0, sizeof(pieces));
4762 if (il->fw_idx <= il->cfg->ucode_api_max)
4763 IL_ERR("request for firmware file '%s' failed.\n",
4768 D_INFO("Loaded firmware file '%s' (%zd bytes).\n", il->firmware_name,
4771 /* Make sure that we got at least the API version number */
4772 if (ucode_raw->size < 4) {
4773 IL_ERR("File size way too small!\n");
4777 /* Data from ucode file: header followed by uCode images */
4778 ucode = (struct il_ucode_header *)ucode_raw->data;
4780 err = il4965_load_firmware(il, ucode_raw, &pieces);
4785 api_ver = IL_UCODE_API(il->ucode_ver);
4788 * api_ver should match the api version forming part of the
4789 * firmware filename ... but we don't check for that and only rely
4790 * on the API version read from firmware header from here on forward
4792 if (api_ver < api_min || api_ver > api_max) {
4793 IL_ERR("Driver unable to support your firmware API. "
4794 "Driver supports v%u, firmware is v%u.\n", api_max,
4799 if (api_ver != api_max)
4800 IL_ERR("Firmware has old API version. Expected v%u, "
4801 "got v%u. New firmware can be obtained "
4802 "from http://www.intellinuxwireless.org.\n", api_max,
4805 IL_INFO("loaded firmware version %u.%u.%u.%u\n",
4806 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
4807 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
4809 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
4810 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
4811 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
4812 IL_UCODE_SERIAL(il->ucode_ver));
4815 * For any of the failures below (before allocating pci memory)
4816 * we will try to load a version with a smaller API -- maybe the
4817 * user just got a corrupted version of the latest API.
4820 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
4821 D_INFO("f/w package hdr runtime inst size = %Zd\n", pieces.inst_size);
4822 D_INFO("f/w package hdr runtime data size = %Zd\n", pieces.data_size);
4823 D_INFO("f/w package hdr init inst size = %Zd\n", pieces.init_size);
4824 D_INFO("f/w package hdr init data size = %Zd\n", pieces.init_data_size);
4825 D_INFO("f/w package hdr boot inst size = %Zd\n", pieces.boot_size);
4827 /* Verify that uCode images will fit in card's SRAM */
4828 if (pieces.inst_size > il->hw_params.max_inst_size) {
4829 IL_ERR("uCode instr len %Zd too large to fit in\n",
4834 if (pieces.data_size > il->hw_params.max_data_size) {
4835 IL_ERR("uCode data len %Zd too large to fit in\n",
4840 if (pieces.init_size > il->hw_params.max_inst_size) {
4841 IL_ERR("uCode init instr len %Zd too large to fit in\n",
4846 if (pieces.init_data_size > il->hw_params.max_data_size) {
4847 IL_ERR("uCode init data len %Zd too large to fit in\n",
4848 pieces.init_data_size);
4852 if (pieces.boot_size > il->hw_params.max_bsm_size) {
4853 IL_ERR("uCode boot instr len %Zd too large to fit in\n",
4858 /* Allocate ucode buffers for card's bus-master loading ... */
4860 /* Runtime instructions and 2 copies of data:
4861 * 1) unmodified from disk
4862 * 2) backup cache for save/restore during power-downs */
4863 il->ucode_code.len = pieces.inst_size;
4864 il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
4866 il->ucode_data.len = pieces.data_size;
4867 il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
4869 il->ucode_data_backup.len = pieces.data_size;
4870 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
4872 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
4873 !il->ucode_data_backup.v_addr)
4876 /* Initialization instructions and data */
4877 if (pieces.init_size && pieces.init_data_size) {
4878 il->ucode_init.len = pieces.init_size;
4879 il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
4881 il->ucode_init_data.len = pieces.init_data_size;
4882 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
4884 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
4888 /* Bootstrap (instructions only, no data) */
4889 if (pieces.boot_size) {
4890 il->ucode_boot.len = pieces.boot_size;
4891 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
4893 if (!il->ucode_boot.v_addr)
4897 /* Now that we can no longer fail, copy information */
4899 il->sta_key_max_num = STA_KEY_MAX_NUM;
4901 /* Copy images into buffers for card's bus-master reads ... */
4903 /* Runtime instructions (first block of data in file) */
4904 D_INFO("Copying (but not loading) uCode instr len %Zd\n",
4906 memcpy(il->ucode_code.v_addr, pieces.inst, pieces.inst_size);
4908 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
4909 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
4913 * NOTE: Copy into backup buffer will be done in il_up()
4915 D_INFO("Copying (but not loading) uCode data len %Zd\n",
4917 memcpy(il->ucode_data.v_addr, pieces.data, pieces.data_size);
4918 memcpy(il->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
4920 /* Initialization instructions */
4921 if (pieces.init_size) {
4922 D_INFO("Copying (but not loading) init instr len %Zd\n",
4924 memcpy(il->ucode_init.v_addr, pieces.init, pieces.init_size);
4927 /* Initialization data */
4928 if (pieces.init_data_size) {
4929 D_INFO("Copying (but not loading) init data len %Zd\n",
4930 pieces.init_data_size);
4931 memcpy(il->ucode_init_data.v_addr, pieces.init_data,
4932 pieces.init_data_size);
4935 /* Bootstrap instructions */
4936 D_INFO("Copying (but not loading) boot instr len %Zd\n",
4938 memcpy(il->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
4941 * figure out the offset of chain noise reset and gain commands
4942 * base on the size of standard phy calibration commands table size
4944 il->_4965.phy_calib_chain_noise_reset_cmd =
4945 standard_phy_calibration_size;
4946 il->_4965.phy_calib_chain_noise_gain_cmd =
4947 standard_phy_calibration_size + 1;
4949 /**************************************************
4950 * This is still part of probe() in a sense...
4952 * 9. Setup and register with mac80211 and debugfs
4953 **************************************************/
4954 err = il4965_mac_setup_register(il, max_probe_length);
4958 err = il_dbgfs_register(il, DRV_NAME);
4960 IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
4963 err = sysfs_create_group(&il->pci_dev->dev.kobj, &il_attribute_group);
4965 IL_ERR("failed to create sysfs device attributes\n");
4969 /* We have our copies now, allow OS release its copies */
4970 release_firmware(ucode_raw);
4971 complete(&il->_4965.firmware_loading_complete);
4975 /* try next, if any */
4976 if (il4965_request_firmware(il, false))
4978 release_firmware(ucode_raw);
4982 IL_ERR("failed to allocate pci memory\n");
4983 il4965_dealloc_ucode_pci(il);
4985 complete(&il->_4965.firmware_loading_complete);
4986 device_release_driver(&il->pci_dev->dev);
4987 release_firmware(ucode_raw);
4990 static const char *const desc_lookup_text[] = {
4995 "NMI_INTERRUPT_WDG",
4999 "HW_ERROR_TUNE_LOCK",
5000 "HW_ERROR_TEMPERATURE",
5001 "ILLEGAL_CHAN_FREQ",
5004 "NMI_INTERRUPT_HOST",
5005 "NMI_INTERRUPT_ACTION_PT",
5006 "NMI_INTERRUPT_UNKNOWN",
5007 "UCODE_VERSION_MISMATCH",
5008 "HW_ERROR_ABS_LOCK",
5009 "HW_ERROR_CAL_LOCK_FAIL",
5010 "NMI_INTERRUPT_INST_ACTION_PT",
5011 "NMI_INTERRUPT_DATA_ACTION_PT",
5013 "NMI_INTERRUPT_TRM",
5014 "NMI_INTERRUPT_BREAK_POINT",
5024 } advanced_lookup[] = {
5026 "NMI_INTERRUPT_WDG", 0x34}, {
5027 "SYSASSERT", 0x35}, {
5028 "UCODE_VERSION_MISMATCH", 0x37}, {
5029 "BAD_COMMAND", 0x38}, {
5030 "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C}, {
5031 "FATAL_ERROR", 0x3D}, {
5032 "NMI_TRM_HW_ERR", 0x46}, {
5033 "NMI_INTERRUPT_TRM", 0x4C}, {
5034 "NMI_INTERRUPT_BREAK_POINT", 0x54}, {
5035 "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C}, {
5036 "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64}, {
5037 "NMI_INTERRUPT_HOST", 0x66}, {
5038 "NMI_INTERRUPT_ACTION_PT", 0x7C}, {
5039 "NMI_INTERRUPT_UNKNOWN", 0x84}, {
5040 "NMI_INTERRUPT_INST_ACTION_PT", 0x86}, {
5041 "ADVANCED_SYSASSERT", 0},};
5044 il4965_desc_lookup(u32 num)
5047 int max = ARRAY_SIZE(desc_lookup_text);
5050 return desc_lookup_text[num];
5052 max = ARRAY_SIZE(advanced_lookup) - 1;
5053 for (i = 0; i < max; i++) {
5054 if (advanced_lookup[i].num == num)
5057 return advanced_lookup[i].name;
5060 #define ERROR_START_OFFSET (1 * sizeof(u32))
5061 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
5064 il4965_dump_nic_error_log(struct il_priv *il)
5067 u32 desc, time, count, base, data1;
5068 u32 blink1, blink2, ilink1, ilink2;
5071 if (il->ucode_type == UCODE_INIT)
5072 base = le32_to_cpu(il->card_alive_init.error_event_table_ptr);
5074 base = le32_to_cpu(il->card_alive.error_event_table_ptr);
5076 if (!il->ops->is_valid_rtc_data_addr(base)) {
5077 IL_ERR("Not valid error log pointer 0x%08X for %s uCode\n",
5078 base, (il->ucode_type == UCODE_INIT) ? "Init" : "RT");
5082 count = il_read_targ_mem(il, base);
5084 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
5085 IL_ERR("Start IWL Error Log Dump:\n");
5086 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
5089 desc = il_read_targ_mem(il, base + 1 * sizeof(u32));
5090 il->isr_stats.err_code = desc;
5091 pc = il_read_targ_mem(il, base + 2 * sizeof(u32));
5092 blink1 = il_read_targ_mem(il, base + 3 * sizeof(u32));
5093 blink2 = il_read_targ_mem(il, base + 4 * sizeof(u32));
5094 ilink1 = il_read_targ_mem(il, base + 5 * sizeof(u32));
5095 ilink2 = il_read_targ_mem(il, base + 6 * sizeof(u32));
5096 data1 = il_read_targ_mem(il, base + 7 * sizeof(u32));
5097 data2 = il_read_targ_mem(il, base + 8 * sizeof(u32));
5098 line = il_read_targ_mem(il, base + 9 * sizeof(u32));
5099 time = il_read_targ_mem(il, base + 11 * sizeof(u32));
5100 hcmd = il_read_targ_mem(il, base + 22 * sizeof(u32));
5103 "data1 data2 line\n");
5104 IL_ERR("%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n",
5105 il4965_desc_lookup(desc), desc, time, data1, data2, line);
5106 IL_ERR("pc blink1 blink2 ilink1 ilink2 hcmd\n");
5107 IL_ERR("0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", pc, blink1,
5108 blink2, ilink1, ilink2, hcmd);
5112 il4965_rf_kill_ct_config(struct il_priv *il)
5114 struct il_ct_kill_config cmd;
5115 unsigned long flags;
5118 spin_lock_irqsave(&il->lock, flags);
5119 _il_wr(il, CSR_UCODE_DRV_GP1_CLR,
5120 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
5121 spin_unlock_irqrestore(&il->lock, flags);
5123 cmd.critical_temperature_R =
5124 cpu_to_le32(il->hw_params.ct_kill_threshold);
5126 ret = il_send_cmd_pdu(il, C_CT_KILL_CONFIG, sizeof(cmd), &cmd);
5128 IL_ERR("C_CT_KILL_CONFIG failed\n");
5130 D_INFO("C_CT_KILL_CONFIG " "succeeded, "
5131 "critical temperature is %d\n",
5132 il->hw_params.ct_kill_threshold);
5135 static const s8 default_queue_to_tx_fifo[] = {
5145 #define IL_MASK(lo, hi) ((1 << (hi)) | ((1 << (hi)) - (1 << (lo))))
5148 il4965_alive_notify(struct il_priv *il)
5151 unsigned long flags;
5155 spin_lock_irqsave(&il->lock, flags);
5157 /* Clear 4965's internal Tx Scheduler data base */
5158 il->scd_base_addr = il_rd_prph(il, IL49_SCD_SRAM_BASE_ADDR);
5159 a = il->scd_base_addr + IL49_SCD_CONTEXT_DATA_OFFSET;
5160 for (; a < il->scd_base_addr + IL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
5161 il_write_targ_mem(il, a, 0);
5162 for (; a < il->scd_base_addr + IL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
5163 il_write_targ_mem(il, a, 0);
5167 IL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(il->hw_params.max_txq_num);
5169 il_write_targ_mem(il, a, 0);
5171 /* Tel 4965 where to find Tx byte count tables */
5172 il_wr_prph(il, IL49_SCD_DRAM_BASE_ADDR, il->scd_bc_tbls.dma >> 10);
5174 /* Enable DMA channel */
5175 for (chan = 0; chan < FH49_TCSR_CHNL_NUM; chan++)
5176 il_wr(il, FH49_TCSR_CHNL_TX_CONFIG_REG(chan),
5177 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
5178 FH49_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
5180 /* Update FH chicken bits */
5181 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG);
5182 il_wr(il, FH49_TX_CHICKEN_BITS_REG,
5183 reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
5185 /* Disable chain mode for all queues */
5186 il_wr_prph(il, IL49_SCD_QUEUECHAIN_SEL, 0);
5188 /* Initialize each Tx queue (including the command queue) */
5189 for (i = 0; i < il->hw_params.max_txq_num; i++) {
5191 /* TFD circular buffer read/write idxes */
5192 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(i), 0);
5193 il_wr(il, HBUS_TARG_WRPTR, 0 | (i << 8));
5195 /* Max Tx Window size for Scheduler-ACK mode */
5196 il_write_targ_mem(il,
5198 IL49_SCD_CONTEXT_QUEUE_OFFSET(i),
5200 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
5201 IL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
5204 il_write_targ_mem(il,
5206 IL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
5209 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
5210 IL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
5213 il_wr_prph(il, IL49_SCD_INTERRUPT_MASK,
5214 (1 << il->hw_params.max_txq_num) - 1);
5216 /* Activate all Tx DMA/FIFO channels */
5217 il4965_txq_set_sched(il, IL_MASK(0, 6));
5219 il4965_set_wr_ptrs(il, IL_DEFAULT_CMD_QUEUE_NUM, 0);
5221 /* make sure all queue are not stopped */
5222 memset(&il->queue_stopped[0], 0, sizeof(il->queue_stopped));
5223 for (i = 0; i < 4; i++)
5224 atomic_set(&il->queue_stop_count[i], 0);
5226 /* reset to 0 to enable all the queue first */
5227 il->txq_ctx_active_msk = 0;
5228 /* Map each Tx/cmd queue to its corresponding fifo */
5229 BUILD_BUG_ON(ARRAY_SIZE(default_queue_to_tx_fifo) != 7);
5231 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
5232 int ac = default_queue_to_tx_fifo[i];
5234 il_txq_ctx_activate(il, i);
5236 if (ac == IL_TX_FIFO_UNUSED)
5239 il4965_tx_queue_set_status(il, &il->txq[i], ac, 0);
5242 spin_unlock_irqrestore(&il->lock, flags);
5248 * il4965_alive_start - called after N_ALIVE notification received
5249 * from protocol/runtime uCode (initialization uCode's
5250 * Alive gets handled by il_init_alive_start()).
5253 il4965_alive_start(struct il_priv *il)
5257 D_INFO("Runtime Alive received.\n");
5259 if (il->card_alive.is_valid != UCODE_VALID_OK) {
5260 /* We had an error bringing up the hardware, so take it
5261 * all the way back down so we can try again */
5262 D_INFO("Alive failed.\n");
5266 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
5267 * This is a paranoid check, because we would not have gotten the
5268 * "runtime" alive if code weren't properly loaded. */
5269 if (il4965_verify_ucode(il)) {
5270 /* Runtime instruction load was bad;
5271 * take it all the way back down so we can try again */
5272 D_INFO("Bad runtime uCode load.\n");
5276 ret = il4965_alive_notify(il);
5278 IL_WARN("Could not complete ALIVE transition [ntf]: %d\n", ret);
5282 /* After the ALIVE response, we can send host commands to the uCode */
5283 set_bit(S_ALIVE, &il->status);
5285 /* Enable watchdog to monitor the driver tx queues */
5286 il_setup_watchdog(il);
5288 if (il_is_rfkill(il))
5291 ieee80211_wake_queues(il->hw);
5293 il->active_rate = RATES_MASK;
5295 if (il_is_associated(il)) {
5296 struct il_rxon_cmd *active_rxon =
5297 (struct il_rxon_cmd *)&il->active;
5298 /* apply any changes in staging */
5299 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
5300 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5302 /* Initialize our rx_config data */
5303 il_connection_init_rx_config(il);
5305 if (il->ops->set_rxon_chain)
5306 il->ops->set_rxon_chain(il);
5309 /* Configure bluetooth coexistence if enabled */
5310 il_send_bt_config(il);
5312 il4965_reset_run_time_calib(il);
5314 set_bit(S_READY, &il->status);
5316 /* Configure the adapter for unassociated operation */
5319 /* At this point, the NIC is initialized and operational */
5320 il4965_rf_kill_ct_config(il);
5322 D_INFO("ALIVE processing complete.\n");
5323 wake_up(&il->wait_command_queue);
5325 il_power_update_mode(il, true);
5326 D_INFO("Updated power mode\n");
5331 queue_work(il->workqueue, &il->restart);
5334 static void il4965_cancel_deferred_work(struct il_priv *il);
5337 __il4965_down(struct il_priv *il)
5339 unsigned long flags;
5342 D_INFO(DRV_NAME " is going down\n");
5344 il_scan_cancel_timeout(il, 200);
5346 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
5348 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
5349 * to prevent rearm timer */
5350 del_timer_sync(&il->watchdog);
5352 il_clear_ucode_stations(il);
5354 /* FIXME: race conditions ? */
5355 spin_lock_irq(&il->sta_lock);
5357 * Remove all key information that is not stored as part
5358 * of station information since mac80211 may not have had
5359 * a chance to remove all the keys. When device is
5360 * reconfigured by mac80211 after an error all keys will
5363 memset(il->_4965.wep_keys, 0, sizeof(il->_4965.wep_keys));
5364 il->_4965.key_mapping_keys = 0;
5365 spin_unlock_irq(&il->sta_lock);
5367 il_dealloc_bcast_stations(il);
5368 il_clear_driver_stations(il);
5370 /* Unblock any waiting calls */
5371 wake_up_all(&il->wait_command_queue);
5373 /* Wipe out the EXIT_PENDING status bit if we are not actually
5374 * exiting the module */
5376 clear_bit(S_EXIT_PENDING, &il->status);
5378 /* stop and reset the on-board processor */
5379 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5381 /* tell the device to stop sending interrupts */
5382 spin_lock_irqsave(&il->lock, flags);
5383 il_disable_interrupts(il);
5384 spin_unlock_irqrestore(&il->lock, flags);
5385 il4965_synchronize_irq(il);
5387 if (il->mac80211_registered)
5388 ieee80211_stop_queues(il->hw);
5390 /* If we have not previously called il_init() then
5391 * clear all bits but the RF Kill bit and return */
5392 if (!il_is_init(il)) {
5394 test_bit(S_RF_KILL_HW, &il->status) << S_RF_KILL_HW |
5395 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
5396 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5400 /* ...otherwise clear out all the status bits but the RF Kill
5401 * bit and continue taking the NIC down. */
5403 test_bit(S_RF_KILL_HW, &il->status) << S_RF_KILL_HW |
5404 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED |
5405 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR |
5406 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
5409 * We disabled and synchronized interrupt, and priv->mutex is taken, so
5410 * here is the only thread which will program device registers, but
5411 * still have lockdep assertions, so we are taking reg_lock.
5413 spin_lock_irq(&il->reg_lock);
5414 /* FIXME: il_grab_nic_access if rfkill is off ? */
5416 il4965_txq_ctx_stop(il);
5417 il4965_rxq_stop(il);
5418 /* Power-down device's busmaster DMA clocks */
5419 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
5421 /* Make sure (redundant) we've released our request to stay awake */
5422 _il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5423 /* Stop the device, and put it in low power state */
5426 spin_unlock_irq(&il->reg_lock);
5428 il4965_txq_ctx_unmap(il);
5430 memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
5432 dev_kfree_skb(il->beacon_skb);
5433 il->beacon_skb = NULL;
5435 /* clear out any free frames */
5436 il4965_clear_free_frames(il);
5440 il4965_down(struct il_priv *il)
5442 mutex_lock(&il->mutex);
5444 mutex_unlock(&il->mutex);
5446 il4965_cancel_deferred_work(il);
5451 il4965_set_hw_ready(struct il_priv *il)
5455 il_set_bit(il, CSR_HW_IF_CONFIG_REG,
5456 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
5458 /* See if we got it */
5459 ret = _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5460 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
5461 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
5464 il->hw_ready = true;
5466 D_INFO("hardware %s ready\n", (il->hw_ready) ? "" : "not");
5470 il4965_prepare_card_hw(struct il_priv *il)
5474 il->hw_ready = false;
5476 il4965_set_hw_ready(il);
5480 /* If HW is not ready, prepare the conditions to check again */
5481 il_set_bit(il, CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG_PREPARE);
5484 _il_poll_bit(il, CSR_HW_IF_CONFIG_REG,
5485 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
5486 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
5488 /* HW should be ready by now, check again. */
5489 if (ret != -ETIMEDOUT)
5490 il4965_set_hw_ready(il);
5493 #define MAX_HW_RESTARTS 5
5496 __il4965_up(struct il_priv *il)
5501 if (test_bit(S_EXIT_PENDING, &il->status)) {
5502 IL_WARN("Exit pending; will not bring the NIC up\n");
5506 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
5507 IL_ERR("ucode not available for device bringup\n");
5511 ret = il4965_alloc_bcast_station(il);
5513 il_dealloc_bcast_stations(il);
5517 il4965_prepare_card_hw(il);
5518 if (!il->hw_ready) {
5519 IL_ERR("HW not ready\n");
5523 /* If platform's RF_KILL switch is NOT set to KILL */
5524 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5525 clear_bit(S_RF_KILL_HW, &il->status);
5527 set_bit(S_RF_KILL_HW, &il->status);
5529 if (il_is_rfkill(il)) {
5530 wiphy_rfkill_set_hw_state(il->hw->wiphy, true);
5532 il_enable_interrupts(il);
5533 IL_WARN("Radio disabled by HW RF Kill switch\n");
5537 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5539 /* must be initialised before il_hw_nic_init */
5540 il->cmd_queue = IL_DEFAULT_CMD_QUEUE_NUM;
5542 ret = il4965_hw_nic_init(il);
5544 IL_ERR("Unable to init nic\n");
5548 /* make sure rfkill handshake bits are cleared */
5549 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5550 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5552 /* clear (again), then enable host interrupts */
5553 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5554 il_enable_interrupts(il);
5556 /* really make sure rfkill handshake bits are cleared */
5557 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5558 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5560 /* Copy original ucode data image from disk into backup cache.
5561 * This will be used to initialize the on-board processor's
5562 * data SRAM for a clean start when the runtime program first loads. */
5563 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
5564 il->ucode_data.len);
5566 for (i = 0; i < MAX_HW_RESTARTS; i++) {
5568 /* load bootstrap state machine,
5569 * load bootstrap program into processor's memory,
5570 * prepare to load the "initialize" uCode */
5571 ret = il->ops->load_ucode(il);
5574 IL_ERR("Unable to set up bootstrap uCode: %d\n", ret);
5578 /* start card; "initialize" will load runtime ucode */
5579 il4965_nic_start(il);
5581 D_INFO(DRV_NAME " is coming up\n");
5586 set_bit(S_EXIT_PENDING, &il->status);
5588 clear_bit(S_EXIT_PENDING, &il->status);
5590 /* tried to restart and config the device for as long as our
5591 * patience could withstand */
5592 IL_ERR("Unable to initialize device after %d attempts.\n", i);
5596 /*****************************************************************************
5598 * Workqueue callbacks
5600 *****************************************************************************/
5603 il4965_bg_init_alive_start(struct work_struct *data)
5605 struct il_priv *il =
5606 container_of(data, struct il_priv, init_alive_start.work);
5608 mutex_lock(&il->mutex);
5609 if (test_bit(S_EXIT_PENDING, &il->status))
5612 il->ops->init_alive_start(il);
5614 mutex_unlock(&il->mutex);
5618 il4965_bg_alive_start(struct work_struct *data)
5620 struct il_priv *il =
5621 container_of(data, struct il_priv, alive_start.work);
5623 mutex_lock(&il->mutex);
5624 if (test_bit(S_EXIT_PENDING, &il->status))
5627 il4965_alive_start(il);
5629 mutex_unlock(&il->mutex);
5633 il4965_bg_run_time_calib_work(struct work_struct *work)
5635 struct il_priv *il = container_of(work, struct il_priv,
5636 run_time_calib_work);
5638 mutex_lock(&il->mutex);
5640 if (test_bit(S_EXIT_PENDING, &il->status) ||
5641 test_bit(S_SCANNING, &il->status)) {
5642 mutex_unlock(&il->mutex);
5646 if (il->start_calib) {
5647 il4965_chain_noise_calibration(il, (void *)&il->_4965.stats);
5648 il4965_sensitivity_calibration(il, (void *)&il->_4965.stats);
5651 mutex_unlock(&il->mutex);
5655 il4965_bg_restart(struct work_struct *data)
5657 struct il_priv *il = container_of(data, struct il_priv, restart);
5659 if (test_bit(S_EXIT_PENDING, &il->status))
5662 if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
5663 mutex_lock(&il->mutex);
5664 /* FIXME: do we dereference vif without mutex locked ? */
5670 mutex_unlock(&il->mutex);
5671 il4965_cancel_deferred_work(il);
5672 ieee80211_restart_hw(il->hw);
5676 mutex_lock(&il->mutex);
5677 if (test_bit(S_EXIT_PENDING, &il->status)) {
5678 mutex_unlock(&il->mutex);
5683 mutex_unlock(&il->mutex);
5688 il4965_bg_rx_replenish(struct work_struct *data)
5690 struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
5692 if (test_bit(S_EXIT_PENDING, &il->status))
5695 mutex_lock(&il->mutex);
5696 il4965_rx_replenish(il);
5697 mutex_unlock(&il->mutex);
5700 /*****************************************************************************
5702 * mac80211 entry point functions
5704 *****************************************************************************/
5706 #define UCODE_READY_TIMEOUT (4 * HZ)
5709 * Not a mac80211 entry point function, but it fits in with all the
5710 * other mac80211 functions grouped here.
5713 il4965_mac_setup_register(struct il_priv *il, u32 max_probe_length)
5716 struct ieee80211_hw *hw = il->hw;
5718 hw->rate_control_algorithm = "iwl-4965-rs";
5720 /* Tell mac80211 our characteristics */
5722 IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_AMPDU_AGGREGATION |
5723 IEEE80211_HW_NEED_DTIM_PERIOD | IEEE80211_HW_SPECTRUM_MGMT |
5724 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
5726 if (il->cfg->sku & IL_SKU_N)
5728 IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
5729 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
5731 hw->sta_data_size = sizeof(struct il_station_priv);
5732 hw->vif_data_size = sizeof(struct il_vif_priv);
5734 hw->wiphy->interface_modes =
5735 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
5738 WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS;
5741 * For now, disable PS by default because it affects
5742 * RX performance significantly.
5744 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
5746 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
5747 /* we create the 802.11 header and a zero-length SSID element */
5748 hw->wiphy->max_scan_ie_len = max_probe_length - 24 - 2;
5750 /* Default value; 4 EDCA QOS priorities */
5753 hw->max_listen_interval = IL_CONN_MAX_LISTEN_INTERVAL;
5755 if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
5756 il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5757 &il->bands[IEEE80211_BAND_2GHZ];
5758 if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
5759 il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5760 &il->bands[IEEE80211_BAND_5GHZ];
5764 ret = ieee80211_register_hw(il->hw);
5766 IL_ERR("Failed to register hw (error %d)\n", ret);
5769 il->mac80211_registered = 1;
5775 il4965_mac_start(struct ieee80211_hw *hw)
5777 struct il_priv *il = hw->priv;
5780 D_MAC80211("enter\n");
5782 /* we should be verifying the device is ready to be opened */
5783 mutex_lock(&il->mutex);
5784 ret = __il4965_up(il);
5785 mutex_unlock(&il->mutex);
5790 if (il_is_rfkill(il))
5793 D_INFO("Start UP work done.\n");
5795 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from
5796 * mac80211 will not be run successfully. */
5797 ret = wait_event_timeout(il->wait_command_queue,
5798 test_bit(S_READY, &il->status),
5799 UCODE_READY_TIMEOUT);
5801 if (!test_bit(S_READY, &il->status)) {
5802 IL_ERR("START_ALIVE timeout after %dms.\n",
5803 jiffies_to_msecs(UCODE_READY_TIMEOUT));
5808 il4965_led_enable(il);
5812 D_MAC80211("leave\n");
5817 il4965_mac_stop(struct ieee80211_hw *hw)
5819 struct il_priv *il = hw->priv;
5821 D_MAC80211("enter\n");
5830 flush_workqueue(il->workqueue);
5832 /* User space software may expect getting rfkill changes
5833 * even if interface is down */
5834 _il_wr(il, CSR_INT, 0xFFFFFFFF);
5835 il_enable_rfkill_int(il);
5837 D_MAC80211("leave\n");
5841 il4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
5843 struct il_priv *il = hw->priv;
5845 D_MACDUMP("enter\n");
5847 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
5848 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
5850 if (il4965_tx_skb(il, skb))
5851 dev_kfree_skb_any(skb);
5853 D_MACDUMP("leave\n");
5857 il4965_mac_update_tkip_key(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5858 struct ieee80211_key_conf *keyconf,
5859 struct ieee80211_sta *sta, u32 iv32, u16 * phase1key)
5861 struct il_priv *il = hw->priv;
5863 D_MAC80211("enter\n");
5865 il4965_update_tkip_key(il, keyconf, sta, iv32, phase1key);
5867 D_MAC80211("leave\n");
5871 il4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
5872 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
5873 struct ieee80211_key_conf *key)
5875 struct il_priv *il = hw->priv;
5878 bool is_default_wep_key = false;
5880 D_MAC80211("enter\n");
5882 if (il->cfg->mod_params->sw_crypto) {
5883 D_MAC80211("leave - hwcrypto disabled\n");
5887 sta_id = il_sta_id_or_broadcast(il, sta);
5888 if (sta_id == IL_INVALID_STATION)
5891 mutex_lock(&il->mutex);
5892 il_scan_cancel_timeout(il, 100);
5895 * If we are getting WEP group key and we didn't receive any key mapping
5896 * so far, we are in legacy wep mode (group key only), otherwise we are
5898 * In legacy wep mode, we use another host command to the uCode.
5900 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
5901 key->cipher == WLAN_CIPHER_SUITE_WEP104) && !sta) {
5903 is_default_wep_key = !il->_4965.key_mapping_keys;
5905 is_default_wep_key =
5906 (key->hw_key_idx == HW_KEY_DEFAULT);
5911 if (is_default_wep_key)
5912 ret = il4965_set_default_wep_key(il, key);
5914 ret = il4965_set_dynamic_key(il, key, sta_id);
5916 D_MAC80211("enable hwcrypto key\n");
5919 if (is_default_wep_key)
5920 ret = il4965_remove_default_wep_key(il, key);
5922 ret = il4965_remove_dynamic_key(il, key, sta_id);
5924 D_MAC80211("disable hwcrypto key\n");
5930 mutex_unlock(&il->mutex);
5931 D_MAC80211("leave\n");
5937 il4965_mac_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5938 enum ieee80211_ampdu_mlme_action action,
5939 struct ieee80211_sta *sta, u16 tid, u16 * ssn,
5942 struct il_priv *il = hw->priv;
5945 D_HT("A-MPDU action on addr %pM tid %d\n", sta->addr, tid);
5947 if (!(il->cfg->sku & IL_SKU_N))
5950 mutex_lock(&il->mutex);
5953 case IEEE80211_AMPDU_RX_START:
5955 ret = il4965_sta_rx_agg_start(il, sta, tid, *ssn);
5957 case IEEE80211_AMPDU_RX_STOP:
5959 ret = il4965_sta_rx_agg_stop(il, sta, tid);
5960 if (test_bit(S_EXIT_PENDING, &il->status))
5963 case IEEE80211_AMPDU_TX_START:
5965 ret = il4965_tx_agg_start(il, vif, sta, tid, ssn);
5967 case IEEE80211_AMPDU_TX_STOP:
5969 ret = il4965_tx_agg_stop(il, vif, sta, tid);
5970 if (test_bit(S_EXIT_PENDING, &il->status))
5973 case IEEE80211_AMPDU_TX_OPERATIONAL:
5977 mutex_unlock(&il->mutex);
5983 il4965_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5984 struct ieee80211_sta *sta)
5986 struct il_priv *il = hw->priv;
5987 struct il_station_priv *sta_priv = (void *)sta->drv_priv;
5988 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
5992 D_INFO("received request to add station %pM\n", sta->addr);
5993 mutex_lock(&il->mutex);
5994 D_INFO("proceeding to add station %pM\n", sta->addr);
5995 sta_priv->common.sta_id = IL_INVALID_STATION;
5997 atomic_set(&sta_priv->pending_frames, 0);
6000 il_add_station_common(il, sta->addr, is_ap, sta, &sta_id);
6002 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
6003 /* Should we return success if return code is EEXIST ? */
6004 mutex_unlock(&il->mutex);
6008 sta_priv->common.sta_id = sta_id;
6010 /* Initialize rate scaling */
6011 D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
6012 il4965_rs_rate_init(il, sta, sta_id);
6013 mutex_unlock(&il->mutex);
6019 il4965_mac_channel_switch(struct ieee80211_hw *hw,
6020 struct ieee80211_channel_switch *ch_switch)
6022 struct il_priv *il = hw->priv;
6023 const struct il_channel_info *ch_info;
6024 struct ieee80211_conf *conf = &hw->conf;
6025 struct ieee80211_channel *channel = ch_switch->channel;
6026 struct il_ht_config *ht_conf = &il->current_ht_config;
6029 D_MAC80211("enter\n");
6031 mutex_lock(&il->mutex);
6033 if (il_is_rfkill(il))
6036 if (test_bit(S_EXIT_PENDING, &il->status) ||
6037 test_bit(S_SCANNING, &il->status) ||
6038 test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
6041 if (!il_is_associated(il))
6044 if (!il->ops->set_channel_switch)
6047 ch = channel->hw_value;
6048 if (le16_to_cpu(il->active.channel) == ch)
6051 ch_info = il_get_channel_info(il, channel->band, ch);
6052 if (!il_is_channel_valid(ch_info)) {
6053 D_MAC80211("invalid channel\n");
6057 spin_lock_irq(&il->lock);
6059 il->current_ht_config.smps = conf->smps_mode;
6061 /* Configure HT40 channels */
6062 il->ht.enabled = conf_is_ht(conf);
6063 if (il->ht.enabled) {
6064 if (conf_is_ht40_minus(conf)) {
6065 il->ht.extension_chan_offset =
6066 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
6067 il->ht.is_40mhz = true;
6068 } else if (conf_is_ht40_plus(conf)) {
6069 il->ht.extension_chan_offset =
6070 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
6071 il->ht.is_40mhz = true;
6073 il->ht.extension_chan_offset =
6074 IEEE80211_HT_PARAM_CHA_SEC_NONE;
6075 il->ht.is_40mhz = false;
6078 il->ht.is_40mhz = false;
6080 if ((le16_to_cpu(il->staging.channel) != ch))
6081 il->staging.flags = 0;
6083 il_set_rxon_channel(il, channel);
6084 il_set_rxon_ht(il, ht_conf);
6085 il_set_flags_for_band(il, channel->band, il->vif);
6087 spin_unlock_irq(&il->lock);
6091 * at this point, staging_rxon has the
6092 * configuration for channel switch
6094 set_bit(S_CHANNEL_SWITCH_PENDING, &il->status);
6095 il->switch_channel = cpu_to_le16(ch);
6096 if (il->ops->set_channel_switch(il, ch_switch)) {
6097 clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status);
6098 il->switch_channel = 0;
6099 ieee80211_chswitch_done(il->vif, false);
6103 mutex_unlock(&il->mutex);
6104 D_MAC80211("leave\n");
6108 il4965_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
6109 unsigned int *total_flags, u64 multicast)
6111 struct il_priv *il = hw->priv;
6112 __le32 filter_or = 0, filter_nand = 0;
6114 #define CHK(test, flag) do { \
6115 if (*total_flags & (test)) \
6116 filter_or |= (flag); \
6118 filter_nand |= (flag); \
6121 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
6124 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
6125 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
6126 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
6127 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
6131 mutex_lock(&il->mutex);
6133 il->staging.filter_flags &= ~filter_nand;
6134 il->staging.filter_flags |= filter_or;
6137 * Not committing directly because hardware can perform a scan,
6138 * but we'll eventually commit the filter flags change anyway.
6141 mutex_unlock(&il->mutex);
6144 * Receiving all multicast frames is always enabled by the
6145 * default flags setup in il_connection_init_rx_config()
6146 * since we currently do not support programming multicast
6147 * filters into the device.
6150 FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
6151 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
6154 /*****************************************************************************
6156 * driver setup and teardown
6158 *****************************************************************************/
6161 il4965_bg_txpower_work(struct work_struct *work)
6163 struct il_priv *il = container_of(work, struct il_priv,
6166 mutex_lock(&il->mutex);
6168 /* If a scan happened to start before we got here
6169 * then just return; the stats notification will
6170 * kick off another scheduled work to compensate for
6171 * any temperature delta we missed here. */
6172 if (test_bit(S_EXIT_PENDING, &il->status) ||
6173 test_bit(S_SCANNING, &il->status))
6176 /* Regardless of if we are associated, we must reconfigure the
6177 * TX power since frames can be sent on non-radar channels while
6179 il->ops->send_tx_power(il);
6181 /* Update last_temperature to keep is_calib_needed from running
6182 * when it isn't needed... */
6183 il->last_temperature = il->temperature;
6185 mutex_unlock(&il->mutex);
6189 il4965_setup_deferred_work(struct il_priv *il)
6191 il->workqueue = create_singlethread_workqueue(DRV_NAME);
6193 init_waitqueue_head(&il->wait_command_queue);
6195 INIT_WORK(&il->restart, il4965_bg_restart);
6196 INIT_WORK(&il->rx_replenish, il4965_bg_rx_replenish);
6197 INIT_WORK(&il->run_time_calib_work, il4965_bg_run_time_calib_work);
6198 INIT_DELAYED_WORK(&il->init_alive_start, il4965_bg_init_alive_start);
6199 INIT_DELAYED_WORK(&il->alive_start, il4965_bg_alive_start);
6201 il_setup_scan_deferred_work(il);
6203 INIT_WORK(&il->txpower_work, il4965_bg_txpower_work);
6205 init_timer(&il->stats_periodic);
6206 il->stats_periodic.data = (unsigned long)il;
6207 il->stats_periodic.function = il4965_bg_stats_periodic;
6209 init_timer(&il->watchdog);
6210 il->watchdog.data = (unsigned long)il;
6211 il->watchdog.function = il_bg_watchdog;
6213 tasklet_init(&il->irq_tasklet,
6214 (void (*)(unsigned long))il4965_irq_tasklet,
6219 il4965_cancel_deferred_work(struct il_priv *il)
6221 cancel_work_sync(&il->txpower_work);
6222 cancel_delayed_work_sync(&il->init_alive_start);
6223 cancel_delayed_work(&il->alive_start);
6224 cancel_work_sync(&il->run_time_calib_work);
6226 il_cancel_scan_deferred_work(il);
6228 del_timer_sync(&il->stats_periodic);
6232 il4965_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
6236 for (i = 0; i < RATE_COUNT_LEGACY; i++) {
6237 rates[i].bitrate = il_rates[i].ieee * 5;
6238 rates[i].hw_value = i; /* Rate scaling will work on idxes */
6239 rates[i].hw_value_short = i;
6241 if ((i >= IL_FIRST_CCK_RATE) && (i <= IL_LAST_CCK_RATE)) {
6243 * If CCK != 1M then set short preamble rate flag.
6246 (il_rates[i].plcp ==
6247 RATE_1M_PLCP) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
6253 * Acquire il->lock before calling this function !
6256 il4965_set_wr_ptrs(struct il_priv *il, int txq_id, u32 idx)
6258 il_wr(il, HBUS_TARG_WRPTR, (idx & 0xff) | (txq_id << 8));
6259 il_wr_prph(il, IL49_SCD_QUEUE_RDPTR(txq_id), idx);
6263 il4965_tx_queue_set_status(struct il_priv *il, struct il_tx_queue *txq,
6264 int tx_fifo_id, int scd_retry)
6266 int txq_id = txq->q.id;
6268 /* Find out whether to activate Tx queue */
6269 int active = test_bit(txq_id, &il->txq_ctx_active_msk) ? 1 : 0;
6271 /* Set up and activate */
6272 il_wr_prph(il, IL49_SCD_QUEUE_STATUS_BITS(txq_id),
6273 (active << IL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
6274 (tx_fifo_id << IL49_SCD_QUEUE_STTS_REG_POS_TXF) |
6275 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_WSL) |
6276 (scd_retry << IL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
6277 IL49_SCD_QUEUE_STTS_REG_MSK);
6279 txq->sched_retry = scd_retry;
6281 D_INFO("%s %s Queue %d on AC %d\n", active ? "Activate" : "Deactivate",
6282 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
6285 const struct ieee80211_ops il4965_mac_ops = {
6286 .tx = il4965_mac_tx,
6287 .start = il4965_mac_start,
6288 .stop = il4965_mac_stop,
6289 .add_interface = il_mac_add_interface,
6290 .remove_interface = il_mac_remove_interface,
6291 .change_interface = il_mac_change_interface,
6292 .config = il_mac_config,
6293 .configure_filter = il4965_configure_filter,
6294 .set_key = il4965_mac_set_key,
6295 .update_tkip_key = il4965_mac_update_tkip_key,
6296 .conf_tx = il_mac_conf_tx,
6297 .reset_tsf = il_mac_reset_tsf,
6298 .bss_info_changed = il_mac_bss_info_changed,
6299 .ampdu_action = il4965_mac_ampdu_action,
6300 .hw_scan = il_mac_hw_scan,
6301 .sta_add = il4965_mac_sta_add,
6302 .sta_remove = il_mac_sta_remove,
6303 .channel_switch = il4965_mac_channel_switch,
6304 .tx_last_beacon = il_mac_tx_last_beacon,
6308 il4965_init_drv(struct il_priv *il)
6312 spin_lock_init(&il->sta_lock);
6313 spin_lock_init(&il->hcmd_lock);
6315 INIT_LIST_HEAD(&il->free_frames);
6317 mutex_init(&il->mutex);
6319 il->ieee_channels = NULL;
6320 il->ieee_rates = NULL;
6321 il->band = IEEE80211_BAND_2GHZ;
6323 il->iw_mode = NL80211_IFTYPE_STATION;
6324 il->current_ht_config.smps = IEEE80211_SMPS_STATIC;
6325 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
6327 /* initialize force reset */
6328 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
6330 /* Choose which receivers/antennas to use */
6331 if (il->ops->set_rxon_chain)
6332 il->ops->set_rxon_chain(il);
6334 il_init_scan_params(il);
6336 ret = il_init_channel_map(il);
6338 IL_ERR("initializing regulatory failed: %d\n", ret);
6342 ret = il_init_geos(il);
6344 IL_ERR("initializing geos failed: %d\n", ret);
6345 goto err_free_channel_map;
6347 il4965_init_hw_rates(il, il->ieee_rates);
6351 err_free_channel_map:
6352 il_free_channel_map(il);
6358 il4965_uninit_drv(struct il_priv *il)
6360 il4965_calib_free_results(il);
6362 il_free_channel_map(il);
6363 kfree(il->scan_cmd);
6367 il4965_hw_detect(struct il_priv *il)
6369 il->hw_rev = _il_rd(il, CSR_HW_REV);
6370 il->hw_wa_rev = _il_rd(il, CSR_HW_REV_WA_REG);
6371 il->rev_id = il->pci_dev->revision;
6372 D_INFO("HW Revision ID = 0x%X\n", il->rev_id);
6375 static struct il_sensitivity_ranges il4965_sensitivity = {
6377 .max_nrg_cck = 0, /* not used, set to 0 */
6379 .auto_corr_min_ofdm = 85,
6380 .auto_corr_min_ofdm_mrc = 170,
6381 .auto_corr_min_ofdm_x1 = 105,
6382 .auto_corr_min_ofdm_mrc_x1 = 220,
6384 .auto_corr_max_ofdm = 120,
6385 .auto_corr_max_ofdm_mrc = 210,
6386 .auto_corr_max_ofdm_x1 = 140,
6387 .auto_corr_max_ofdm_mrc_x1 = 270,
6389 .auto_corr_min_cck = 125,
6390 .auto_corr_max_cck = 200,
6391 .auto_corr_min_cck_mrc = 200,
6392 .auto_corr_max_cck_mrc = 400,
6397 .barker_corr_th_min = 190,
6398 .barker_corr_th_min_mrc = 390,
6403 il4965_set_hw_params(struct il_priv *il)
6405 il->hw_params.bcast_id = IL4965_BROADCAST_ID;
6406 il->hw_params.max_rxq_size = RX_QUEUE_SIZE;
6407 il->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
6408 if (il->cfg->mod_params->amsdu_size_8K)
6409 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_8K);
6411 il->hw_params.rx_page_order = get_order(IL_RX_BUF_SIZE_4K);
6413 il->hw_params.max_beacon_itrvl = IL_MAX_UCODE_BEACON_INTERVAL;
6415 if (il->cfg->mod_params->disable_11n)
6416 il->cfg->sku &= ~IL_SKU_N;
6418 if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
6419 il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
6420 il->cfg->num_of_queues =
6421 il->cfg->mod_params->num_of_queues;
6423 il->hw_params.max_txq_num = il->cfg->num_of_queues;
6424 il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
6425 il->hw_params.scd_bc_tbls_size =
6426 il->cfg->num_of_queues *
6427 sizeof(struct il4965_scd_bc_tbl);
6429 il->hw_params.tfd_size = sizeof(struct il_tfd);
6430 il->hw_params.max_stations = IL4965_STATION_COUNT;
6431 il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
6432 il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
6433 il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
6434 il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
6436 il->hw_params.rx_wrt_ptr_reg = FH49_RSCSR_CHNL0_WPTR;
6438 il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
6439 il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
6440 il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
6441 il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
6443 il->hw_params.ct_kill_threshold =
6444 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
6446 il->hw_params.sens = &il4965_sensitivity;
6447 il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
6451 il4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6455 struct ieee80211_hw *hw;
6456 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
6457 unsigned long flags;
6460 /************************
6461 * 1. Allocating HW data
6462 ************************/
6464 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il4965_mac_ops);
6471 SET_IEEE80211_DEV(hw, &pdev->dev);
6473 D_INFO("*** LOAD DRIVER ***\n");
6475 il->ops = &il4965_ops;
6476 #ifdef CONFIG_IWLEGACY_DEBUGFS
6477 il->debugfs_ops = &il4965_debugfs_ops;
6480 il->inta_mask = CSR_INI_SET_MASK;
6482 /**************************
6483 * 2. Initializing PCI bus
6484 **************************/
6485 pci_disable_link_state(pdev,
6486 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
6487 PCIE_LINK_STATE_CLKPM);
6489 if (pci_enable_device(pdev)) {
6491 goto out_ieee80211_free_hw;
6494 pci_set_master(pdev);
6496 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
6498 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
6500 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6503 pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
6504 /* both attempts failed: */
6506 IL_WARN("No suitable DMA available.\n");
6507 goto out_pci_disable_device;
6511 err = pci_request_regions(pdev, DRV_NAME);
6513 goto out_pci_disable_device;
6515 pci_set_drvdata(pdev, il);
6517 /***********************
6518 * 3. Read REV register
6519 ***********************/
6520 il->hw_base = pci_ioremap_bar(pdev, 0);
6523 goto out_pci_release_regions;
6526 D_INFO("pci_resource_len = 0x%08llx\n",
6527 (unsigned long long)pci_resource_len(pdev, 0));
6528 D_INFO("pci_resource_base = %p\n", il->hw_base);
6530 /* these spin locks will be used in apm_ops.init and EEPROM access
6531 * we should init now
6533 spin_lock_init(&il->reg_lock);
6534 spin_lock_init(&il->lock);
6537 * stop and reset the on-board processor just in case it is in a
6538 * strange state ... like being left stranded by a primary kernel
6539 * and this is now the kdump kernel trying to start up
6541 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
6543 il4965_hw_detect(il);
6544 IL_INFO("Detected %s, REV=0x%X\n", il->cfg->name, il->hw_rev);
6546 /* We disable the RETRY_TIMEOUT register (0x41) to keep
6547 * PCI Tx retries from interfering with C3 CPU state */
6548 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
6550 il4965_prepare_card_hw(il);
6551 if (!il->hw_ready) {
6552 IL_WARN("Failed, HW not ready\n");
6559 /* Read the EEPROM */
6560 err = il_eeprom_init(il);
6562 IL_ERR("Unable to init EEPROM\n");
6565 err = il4965_eeprom_check_version(il);
6567 goto out_free_eeprom;
6570 goto out_free_eeprom;
6572 /* extract MAC Address */
6573 il4965_eeprom_get_mac(il, il->addresses[0].addr);
6574 D_INFO("MAC address: %pM\n", il->addresses[0].addr);
6575 il->hw->wiphy->addresses = il->addresses;
6576 il->hw->wiphy->n_addresses = 1;
6578 /************************
6579 * 5. Setup HW constants
6580 ************************/
6581 il4965_set_hw_params(il);
6583 /*******************
6585 *******************/
6587 err = il4965_init_drv(il);
6589 goto out_free_eeprom;
6590 /* At this point both hw and il are initialized. */
6592 /********************
6594 ********************/
6595 spin_lock_irqsave(&il->lock, flags);
6596 il_disable_interrupts(il);
6597 spin_unlock_irqrestore(&il->lock, flags);
6599 pci_enable_msi(il->pci_dev);
6601 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
6603 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
6604 goto out_disable_msi;
6607 il4965_setup_deferred_work(il);
6608 il4965_setup_handlers(il);
6610 /*********************************************
6611 * 8. Enable interrupts and read RFKILL state
6612 *********************************************/
6614 /* enable rfkill interrupt: hw bug w/a */
6615 pci_read_config_word(il->pci_dev, PCI_COMMAND, &pci_cmd);
6616 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
6617 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
6618 pci_write_config_word(il->pci_dev, PCI_COMMAND, pci_cmd);
6621 il_enable_rfkill_int(il);
6623 /* If platform's RF_KILL switch is NOT set to KILL */
6624 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
6625 clear_bit(S_RF_KILL_HW, &il->status);
6627 set_bit(S_RF_KILL_HW, &il->status);
6629 wiphy_rfkill_set_hw_state(il->hw->wiphy,
6630 test_bit(S_RF_KILL_HW, &il->status));
6632 il_power_initialize(il);
6634 init_completion(&il->_4965.firmware_loading_complete);
6636 err = il4965_request_firmware(il, true);
6638 goto out_destroy_workqueue;
6642 out_destroy_workqueue:
6643 destroy_workqueue(il->workqueue);
6644 il->workqueue = NULL;
6645 free_irq(il->pci_dev->irq, il);
6647 pci_disable_msi(il->pci_dev);
6648 il4965_uninit_drv(il);
6652 iounmap(il->hw_base);
6653 out_pci_release_regions:
6654 pci_set_drvdata(pdev, NULL);
6655 pci_release_regions(pdev);
6656 out_pci_disable_device:
6657 pci_disable_device(pdev);
6658 out_ieee80211_free_hw:
6659 ieee80211_free_hw(il->hw);
6664 static void __devexit
6665 il4965_pci_remove(struct pci_dev *pdev)
6667 struct il_priv *il = pci_get_drvdata(pdev);
6668 unsigned long flags;
6673 wait_for_completion(&il->_4965.firmware_loading_complete);
6675 D_INFO("*** UNLOAD DRIVER ***\n");
6677 il_dbgfs_unregister(il);
6678 sysfs_remove_group(&pdev->dev.kobj, &il_attribute_group);
6680 /* ieee80211_unregister_hw call wil cause il_mac_stop to
6681 * to be called and il4965_down since we are removing the device
6682 * we need to set S_EXIT_PENDING bit.
6684 set_bit(S_EXIT_PENDING, &il->status);
6688 if (il->mac80211_registered) {
6689 ieee80211_unregister_hw(il->hw);
6690 il->mac80211_registered = 0;
6696 * Make sure device is reset to low power before unloading driver.
6697 * This may be redundant with il4965_down(), but there are paths to
6698 * run il4965_down() without calling apm_ops.stop(), and there are
6699 * paths to avoid running il4965_down() at all before leaving driver.
6700 * This (inexpensive) call *makes sure* device is reset.
6704 /* make sure we flush any pending irq or
6705 * tasklet for the driver
6707 spin_lock_irqsave(&il->lock, flags);
6708 il_disable_interrupts(il);
6709 spin_unlock_irqrestore(&il->lock, flags);
6711 il4965_synchronize_irq(il);
6713 il4965_dealloc_ucode_pci(il);
6716 il4965_rx_queue_free(il, &il->rxq);
6717 il4965_hw_txq_ctx_free(il);
6721 /*netif_stop_queue(dev); */
6722 flush_workqueue(il->workqueue);
6724 /* ieee80211_unregister_hw calls il_mac_stop, which flushes
6725 * il->workqueue... so we can't take down the workqueue
6727 destroy_workqueue(il->workqueue);
6728 il->workqueue = NULL;
6730 free_irq(il->pci_dev->irq, il);
6731 pci_disable_msi(il->pci_dev);
6732 iounmap(il->hw_base);
6733 pci_release_regions(pdev);
6734 pci_disable_device(pdev);
6735 pci_set_drvdata(pdev, NULL);
6737 il4965_uninit_drv(il);
6739 dev_kfree_skb(il->beacon_skb);
6741 ieee80211_free_hw(il->hw);
6745 * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
6746 * must be called under il->lock and mac access
6749 il4965_txq_set_sched(struct il_priv *il, u32 mask)
6751 il_wr_prph(il, IL49_SCD_TXFACT, mask);
6754 /*****************************************************************************
6756 * driver and module entry point
6758 *****************************************************************************/
6760 /* Hardware specific file defines the PCI IDs table for that hardware module */
6761 static DEFINE_PCI_DEVICE_TABLE(il4965_hw_card_ids) = {
6762 {IL_PCI_DEVICE(0x4229, PCI_ANY_ID, il4965_cfg)},
6763 {IL_PCI_DEVICE(0x4230, PCI_ANY_ID, il4965_cfg)},
6766 MODULE_DEVICE_TABLE(pci, il4965_hw_card_ids);
6768 static struct pci_driver il4965_driver = {
6770 .id_table = il4965_hw_card_ids,
6771 .probe = il4965_pci_probe,
6772 .remove = __devexit_p(il4965_pci_remove),
6773 .driver.pm = IL_LEGACY_PM_OPS,
6781 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
6782 pr_info(DRV_COPYRIGHT "\n");
6784 ret = il4965_rate_control_register();
6786 pr_err("Unable to register rate control algorithm: %d\n", ret);
6790 ret = pci_register_driver(&il4965_driver);
6792 pr_err("Unable to initialize PCI module\n");
6793 goto error_register;
6799 il4965_rate_control_unregister();
6806 pci_unregister_driver(&il4965_driver);
6807 il4965_rate_control_unregister();
6810 module_exit(il4965_exit);
6811 module_init(il4965_init);
6813 #ifdef CONFIG_IWLEGACY_DEBUG
6814 module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
6815 MODULE_PARM_DESC(debug, "debug output mask");
6818 module_param_named(swcrypto, il4965_mod_params.sw_crypto, int, S_IRUGO);
6819 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
6820 module_param_named(queues_num, il4965_mod_params.num_of_queues, int, S_IRUGO);
6821 MODULE_PARM_DESC(queues_num, "number of hw queues.");
6822 module_param_named(11n_disable, il4965_mod_params.disable_11n, int, S_IRUGO);
6823 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
6824 module_param_named(amsdu_size_8K, il4965_mod_params.amsdu_size_8K, int,
6826 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
6827 module_param_named(fw_restart, il4965_mod_params.restart_fw, int, S_IRUGO);
6828 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");