drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47 #include "iwl-agn-led.h"
  48
  49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  50 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
  51
  52 /* Highest firmware API version supported */
  53 #define IWL4965_UCODE_API_MAX 2
  54
  55 /* Lowest firmware API version supported */
  56 #define IWL4965_UCODE_API_MIN 2
  57
  58 #define IWL4965_FW_PRE "iwlwifi-4965-"
  59 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  60 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  61
  62
  63 /* module parameters */
  64 static struct iwl_mod_params iwl4965_mod_params = {
  65         .amsdu_size_8K = 1,
  66         .restart_fw = 1,
  67         /* the rest are 0 by default */
  68 };
  69
  70 /* check contents of special bootstrap uCode SRAM */
  71 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  72 {
  73         __le32 *image = priv->ucode_boot.v_addr;
  74         u32 len = priv->ucode_boot.len;
  75         u32 reg;
  76         u32 val;
  77
  78         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  79
  80         /* verify BSM SRAM contents */
  81         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  82         for (reg = BSM_SRAM_LOWER_BOUND;
  83              reg < BSM_SRAM_LOWER_BOUND + len;
  84              reg += sizeof(u32), image++) {
  85                 val = iwl_read_prph(priv, reg);
  86                 if (val != le32_to_cpu(*image)) {
  87                         IWL_ERR(priv, "BSM uCode verification failed at "
  88                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  89                                   BSM_SRAM_LOWER_BOUND,
  90                                   reg - BSM_SRAM_LOWER_BOUND, len,
  91                                   val, le32_to_cpu(*image));
  92                         return -EIO;
  93                 }
  94         }
  95
  96         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  97
  98         return 0;
  99 }
 100
 101 /**
 102  * iwl4965_load_bsm - Load bootstrap instructions
 103  *
 104  * BSM operation:
 105  *
 106  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 107  * in special SRAM that does not power down during RFKILL.  When powering back
 108  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 109  * the bootstrap program into the on-board processor, and starts it.
 110  *
 111  * The bootstrap program loads (via DMA) instructions and data for a new
 112  * program from host DRAM locations indicated by the host driver in the
 113  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 114  * automatically.
 115  *
 116  * When initializing the NIC, the host driver points the BSM to the
 117  * "initialize" uCode image.  This uCode sets up some internal data, then
 118  * notifies host via "initialize alive" that it is complete.
 119  *
 120  * The host then replaces the BSM_DRAM_* pointer values to point to the
 121  * normal runtime uCode instructions and a backup uCode data cache buffer
 122  * (filled initially with starting data values for the on-board processor),
 123  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 124  * which begins normal operation.
 125  *
 126  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 127  * the backup data cache in DRAM before SRAM is powered down.
 128  *
 129  * When powering back up, the BSM loads the bootstrap program.  This reloads
 130  * the runtime uCode instructions and the backup data cache into SRAM,
 131  * and re-launches the runtime uCode from where it left off.
 132  */
 133 static int iwl4965_load_bsm(struct iwl_priv *priv)
 134 {
 135         __le32 *image = priv->ucode_boot.v_addr;
 136         u32 len = priv->ucode_boot.len;
 137         dma_addr_t pinst;
 138         dma_addr_t pdata;
 139         u32 inst_len;
 140         u32 data_len;
 141         int i;
 142         u32 done;
 143         u32 reg_offset;
 144         int ret;
 145
 146         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 147
 148         priv->ucode_type = UCODE_RT;
 149
 150         /* make sure bootstrap program is no larger than BSM's SRAM size */
 151         if (len > IWL49_MAX_BSM_SIZE)
 152                 return -EINVAL;
 153
 154         /* Tell bootstrap uCode where to find the "Initialize" uCode
 155          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 156          * NOTE:  iwl_init_alive_start() will replace these values,
 157          *        after the "initialize" uCode has run, to point to
 158          *        runtime/protocol instructions and backup data cache.
 159          */
 160         pinst = priv->ucode_init.p_addr >> 4;
 161         pdata = priv->ucode_init_data.p_addr >> 4;
 162         inst_len = priv->ucode_init.len;
 163         data_len = priv->ucode_init_data.len;
 164
 165         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 166         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 167         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 168         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 169
 170         /* Fill BSM memory with bootstrap instructions */
 171         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 172              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 173              reg_offset += sizeof(u32), image++)
 174                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 175
 176         ret = iwl4965_verify_bsm(priv);
 177         if (ret)
 178                 return ret;
 179
 180         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 181         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 182         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 183         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 184
 185         /* Load bootstrap code into instruction SRAM now,
 186          *   to prepare to load "initialize" uCode */
 187         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 188
 189         /* Wait for load of bootstrap uCode to finish */
 190         for (i = 0; i < 100; i++) {
 191                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 192                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 193                         break;
 194                 udelay(10);
 195         }
 196         if (i < 100)
 197                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 198         else {
 199                 IWL_ERR(priv, "BSM write did not complete!\n");
 200                 return -EIO;
 201         }
 202
 203         /* Enable future boot loads whenever power management unit triggers it
 204          *   (e.g. when powering back up after power-save shutdown) */
 205         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 206
 207
 208         return 0;
 209 }
 210
 211 /**
 212  * iwl4965_set_ucode_ptrs - Set uCode address location
 213  *
 214  * Tell initialization uCode where to find runtime uCode.
 215  *
 216  * BSM registers initially contain pointers to initialization uCode.
 217  * We need to replace them to load runtime uCode inst and data,
 218  * and to save runtime data when powering down.
 219  */
 220 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 221 {
 222         dma_addr_t pinst;
 223         dma_addr_t pdata;
 224         int ret = 0;
 225
 226         /* bits 35:4 for 4965 */
 227         pinst = priv->ucode_code.p_addr >> 4;
 228         pdata = priv->ucode_data_backup.p_addr >> 4;
 229
 230         /* Tell bootstrap uCode where to find image to load */
 231         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 232         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 233         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 234                                  priv->ucode_data.len);
 235
 236         /* Inst byte count must be last to set up, bit 31 signals uCode
 237          *   that all new ptr/size info is in place */
 238         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 239                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 240         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 241
 242         return ret;
 243 }
 244
 245 /**
 246  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 247  *
 248  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 249  *
 250  * The 4965 "initialize" ALIVE reply contains calibration data for:
 251  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 252  *   (3945 does not contain this data).
 253  *
 254  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 255 */
 256 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 257 {
 258         /* Check alive response for "valid" sign from uCode */
 259         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 260                 /* We had an error bringing up the hardware, so take it
 261                  * all the way back down so we can try again */
 262                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 263                 goto restart;
 264         }
 265
 266         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 267          * This is a paranoid check, because we would not have gotten the
 268          * "initialize" alive if code weren't properly loaded.  */
 269         if (iwl_verify_ucode(priv)) {
 270                 /* Runtime instruction load was bad;
 271                  * take it all the way back down so we can try again */
 272                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 273                 goto restart;
 274         }
 275
 276         /* Calculate temperature */
 277         priv->temperature = iwl4965_hw_get_temperature(priv);
 278
 279         /* Send pointers to protocol/runtime uCode image ... init code will
 280          * load and launch runtime uCode, which will send us another "Alive"
 281          * notification. */
 282         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 283         if (iwl4965_set_ucode_ptrs(priv)) {
 284                 /* Runtime instruction load won't happen;
 285                  * take it all the way back down so we can try again */
 286                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 287                 goto restart;
 288         }
 289         return;
 290
 291 restart:
 292         queue_work(priv->workqueue, &priv->restart);
 293 }
 294
 295 static bool is_ht40_channel(__le32 rxon_flags)
 296 {
 297         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 298                                     >> RXON_FLG_CHANNEL_MODE_POS;
 299         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
 300                   (chan_mod == CHANNEL_MODE_MIXED));
 301 }
 302
 303 /*
 304  * EEPROM handlers
 305  */
 306 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 307 {
 308         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 309 }
 310
 311 /*
 312  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 313  * must be called under priv->lock and mac access
 314  */
 315 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 316 {
 317         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 318 }
 319
 320 static void iwl4965_nic_config(struct iwl_priv *priv)
 321 {
 322         unsigned long flags;
 323         u16 radio_cfg;
 324
 325         spin_lock_irqsave(&priv->lock, flags);
 326
 327         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 328
 329         /* write radio config values to register */
 330         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 331                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 332                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 333                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 334                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 335
 336         /* set CSR_HW_CONFIG_REG for uCode use */
 337         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 338                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 339                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 340
 341         priv->calib_info = (struct iwl_eeprom_calib_info *)
 342                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 343
 344         spin_unlock_irqrestore(&priv->lock, flags);
 345 }
 346
 347 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 348  * Called after every association, but this runs only once!
 349  *  ... once chain noise is calibrated the first time, it's good forever.  */
 350 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 351 {
 352         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 353
 354         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 355                 struct iwl_calib_diff_gain_cmd cmd;
 356
 357                 memset(&cmd, 0, sizeof(cmd));
 358                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 359                 cmd.diff_gain_a = 0;
 360                 cmd.diff_gain_b = 0;
 361                 cmd.diff_gain_c = 0;
 362                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 363                                  sizeof(cmd), &cmd))
 364                         IWL_ERR(priv,
 365                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 366                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 367                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 368         }
 369 }
 370
 371 static void iwl4965_gain_computation(struct iwl_priv *priv,
 372                 u32 *average_noise,
 373                 u16 min_average_noise_antenna_i,
 374                 u32 min_average_noise,
 375                 u8 default_chain)
 376 {
 377         int i, ret;
 378         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 379
 380         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 381
 382         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
 383                 s32 delta_g = 0;
 384
 385                 if (!(data->disconn_array[i]) &&
 386                     (data->delta_gain_code[i] ==
 387                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 388                         delta_g = average_noise[i] - min_average_noise;
 389                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 390                         data->delta_gain_code[i] =
 391                                 min(data->delta_gain_code[i],
 392                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 393
 394                         data->delta_gain_code[i] =
 395                                 (data->delta_gain_code[i] | (1 << 2));
 396                 } else {
 397                         data->delta_gain_code[i] = 0;
 398                 }
 399         }
 400         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 401                      data->delta_gain_code[0],
 402                      data->delta_gain_code[1],
 403                      data->delta_gain_code[2]);
 404
 405         /* Differential gain gets sent to uCode only once */
 406         if (!data->radio_write) {
 407                 struct iwl_calib_diff_gain_cmd cmd;
 408                 data->radio_write = 1;
 409
 410                 memset(&cmd, 0, sizeof(cmd));
 411                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 412                 cmd.diff_gain_a = data->delta_gain_code[0];
 413                 cmd.diff_gain_b = data->delta_gain_code[1];
 414                 cmd.diff_gain_c = data->delta_gain_code[2];
 415                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 416                                       sizeof(cmd), &cmd);
 417                 if (ret)
 418                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 419                                      "REPLY_PHY_CALIBRATION_CMD \n");
 420
 421                 /* TODO we might want recalculate
 422                  * rx_chain in rxon cmd */
 423
 424                 /* Mark so we run this algo only once! */
 425                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 426         }
 427         data->chain_noise_a = 0;
 428         data->chain_noise_b = 0;
 429         data->chain_noise_c = 0;
 430         data->chain_signal_a = 0;
 431         data->chain_signal_b = 0;
 432         data->chain_signal_c = 0;
 433         data->beacon_count = 0;
 434 }
 435
 436 static void iwl4965_bg_txpower_work(struct work_struct *work)
 437 {
 438         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 439                         txpower_work);
 440
 441         /* If a scan happened to start before we got here
 442          * then just return; the statistics notification will
 443          * kick off another scheduled work to compensate for
 444          * any temperature delta we missed here. */
 445         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 446             test_bit(STATUS_SCANNING, &priv->status))
 447                 return;
 448
 449         mutex_lock(&priv->mutex);
 450
 451         /* Regardless of if we are associated, we must reconfigure the
 452          * TX power since frames can be sent on non-radar channels while
 453          * not associated */
 454         iwl4965_send_tx_power(priv);
 455
 456         /* Update last_temperature to keep is_calib_needed from running
 457          * when it isn't needed... */
 458         priv->last_temperature = priv->temperature;
 459
 460         mutex_unlock(&priv->mutex);
 461 }
 462
 463 /*
 464  * Acquire priv->lock before calling this function !
 465  */
 466 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 467 {
 468         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 469                              (index & 0xff) | (txq_id << 8));
 470         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 471 }
 472
 473 /**
 474  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 475  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 476  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 477  *
 478  * NOTE:  Acquire priv->lock before calling this function !
 479  */
 480 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 481                                         struct iwl_tx_queue *txq,
 482                                         int tx_fifo_id, int scd_retry)
 483 {
 484         int txq_id = txq->q.id;
 485
 486         /* Find out whether to activate Tx queue */
 487         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 488
 489         /* Set up and activate */
 490         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 491                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 492                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 493                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 494                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 495                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 496
 497         txq->sched_retry = scd_retry;
 498
 499         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 500                        active ? "Activate" : "Deactivate",
 501                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 502 }
 503
 504 static const u16 default_queue_to_tx_fifo[] = {
 505         IWL_TX_FIFO_AC3,
 506         IWL_TX_FIFO_AC2,
 507         IWL_TX_FIFO_AC1,
 508         IWL_TX_FIFO_AC0,
 509         IWL49_CMD_FIFO_NUM,
 510         IWL_TX_FIFO_HCCA_1,
 511         IWL_TX_FIFO_HCCA_2
 512 };
 513
 514 static int iwl4965_alive_notify(struct iwl_priv *priv)
 515 {
 516         u32 a;
 517         unsigned long flags;
 518         int i, chan;
 519         u32 reg_val;
 520
 521         spin_lock_irqsave(&priv->lock, flags);
 522
 523         /* Clear 4965's internal Tx Scheduler data base */
 524         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 525         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 526         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 527                 iwl_write_targ_mem(priv, a, 0);
 528         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 529                 iwl_write_targ_mem(priv, a, 0);
 530         for (; a < priv->scd_base_addr +
 531                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
 532                 iwl_write_targ_mem(priv, a, 0);
 533
 534         /* Tel 4965 where to find Tx byte count tables */
 535         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 536                         priv->scd_bc_tbls.dma >> 10);
 537
 538         /* Enable DMA channel */
 539         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 540                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 541                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 542                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 543
 544         /* Update FH chicken bits */
 545         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 546         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 547                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 548
 549         /* Disable chain mode for all queues */
 550         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 551
 552         /* Initialize each Tx queue (including the command queue) */
 553         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 554
 555                 /* TFD circular buffer read/write indexes */
 556                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 557                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 558
 559                 /* Max Tx Window size for Scheduler-ACK mode */
 560                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 561                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 562                                 (SCD_WIN_SIZE <<
 563                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 564                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 565
 566                 /* Frame limit */
 567                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 568                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 569                                 sizeof(u32),
 570                                 (SCD_FRAME_LIMIT <<
 571                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 572                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 573
 574         }
 575         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 576                                  (1 << priv->hw_params.max_txq_num) - 1);
 577
 578         /* Activate all Tx DMA/FIFO channels */
 579         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 580
 581         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 582
 583         /* Map each Tx/cmd queue to its corresponding fifo */
 584         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 585                 int ac = default_queue_to_tx_fifo[i];
 586                 iwl_txq_ctx_activate(priv, i);
 587                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 588         }
 589
 590         spin_unlock_irqrestore(&priv->lock, flags);
 591
 592         return 0;
 593 }
 594
 595 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 596         .min_nrg_cck = 97,
 597         .max_nrg_cck = 0, /* not used, set to 0 */
 598
 599         .auto_corr_min_ofdm = 85,
 600         .auto_corr_min_ofdm_mrc = 170,
 601         .auto_corr_min_ofdm_x1 = 105,
 602         .auto_corr_min_ofdm_mrc_x1 = 220,
 603
 604         .auto_corr_max_ofdm = 120,
 605         .auto_corr_max_ofdm_mrc = 210,
 606         .auto_corr_max_ofdm_x1 = 140,
 607         .auto_corr_max_ofdm_mrc_x1 = 270,
 608
 609         .auto_corr_min_cck = 125,
 610         .auto_corr_max_cck = 200,
 611         .auto_corr_min_cck_mrc = 200,
 612         .auto_corr_max_cck_mrc = 400,
 613
 614         .nrg_th_cck = 100,
 615         .nrg_th_ofdm = 100,
 616
 617         .barker_corr_th_min = 190,
 618         .barker_corr_th_min_mrc = 390,
 619         .nrg_th_cca = 62,
 620 };
 621
 622 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
 623 {
 624         /* want Kelvin */
 625         priv->hw_params.ct_kill_threshold =
 626                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 627 }
 628
 629 /**
 630  * iwl4965_hw_set_hw_params
 631  *
 632  * Called when initializing driver
 633  */
 634 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 635 {
 636         if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
 637             priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
 638                 priv->cfg->num_of_queues =
 639                         priv->cfg->mod_params->num_of_queues;
 640
 641         priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
 642         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 643         priv->hw_params.scd_bc_tbls_size =
 644                         priv->cfg->num_of_queues *
 645                         sizeof(struct iwl4965_scd_bc_tbl);
 646         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 647         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 648         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 649         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 650         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 651         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 652         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 653
 654         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 655
 656         priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
 657         priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
 658         priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
 659         priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
 660         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 661                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 662
 663         priv->hw_params.sens = &iwl4965_sensitivity;
 664
 665         return 0;
 666 }
 667
 668 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 669 {
 670         s32 sign = 1;
 671
 672         if (num < 0) {
 673                 sign = -sign;
 674                 num = -num;
 675         }
 676         if (denom < 0) {
 677                 sign = -sign;
 678                 denom = -denom;
 679         }
 680         *res = 1;
 681         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 682
 683         return 1;
 684 }
 685
 686 /**
 687  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 688  *
 689  * Determines power supply voltage compensation for txpower calculations.
 690  * Returns number of 1/2-dB steps to subtract from gain table index,
 691  * to compensate for difference between power supply voltage during
 692  * factory measurements, vs. current power supply voltage.
 693  *
 694  * Voltage indication is higher for lower voltage.
 695  * Lower voltage requires more gain (lower gain table index).
 696  */
 697 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 698                                             s32 current_voltage)
 699 {
 700         s32 comp = 0;
 701
 702         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 703             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 704                 return 0;
 705
 706         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 707                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 708
 709         if (current_voltage > eeprom_voltage)
 710                 comp *= 2;
 711         if ((comp < -2) || (comp > 2))
 712                 comp = 0;
 713
 714         return comp;
 715 }
 716
 717 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 718 {
 719         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 720             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 721                 return CALIB_CH_GROUP_5;
 722
 723         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 724             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 725                 return CALIB_CH_GROUP_1;
 726
 727         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 728             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 729                 return CALIB_CH_GROUP_2;
 730
 731         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 732             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 733                 return CALIB_CH_GROUP_3;
 734
 735         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 736             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 737                 return CALIB_CH_GROUP_4;
 738
 739         return -1;
 740 }
 741
 742 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 743 {
 744         s32 b = -1;
 745
 746         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 747                 if (priv->calib_info->band_info[b].ch_from == 0)
 748                         continue;
 749
 750                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 751                     && (channel <= priv->calib_info->band_info[b].ch_to))
 752                         break;
 753         }
 754
 755         return b;
 756 }
 757
 758 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 759 {
 760         s32 val;
 761
 762         if (x2 == x1)
 763                 return y1;
 764         else {
 765                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 766                 return val + y2;
 767         }
 768 }
 769
 770 /**
 771  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 772  *
 773  * Interpolates factory measurements from the two sample channels within a
 774  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 775  * differences in channel frequencies, which is proportional to differences
 776  * in channel number.
 777  */
 778 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 779                                     struct iwl_eeprom_calib_ch_info *chan_info)
 780 {
 781         s32 s = -1;
 782         u32 c;
 783         u32 m;
 784         const struct iwl_eeprom_calib_measure *m1;
 785         const struct iwl_eeprom_calib_measure *m2;
 786         struct iwl_eeprom_calib_measure *omeas;
 787         u32 ch_i1;
 788         u32 ch_i2;
 789
 790         s = iwl4965_get_sub_band(priv, channel);
 791         if (s >= EEPROM_TX_POWER_BANDS) {
 792                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 793                 return -1;
 794         }
 795
 796         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 797         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 798         chan_info->ch_num = (u8) channel;
 799
 800         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 801                           channel, s, ch_i1, ch_i2);
 802
 803         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 804                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 805                         m1 = &(priv->calib_info->band_info[s].ch1.
 806                                measurements[c][m]);
 807                         m2 = &(priv->calib_info->band_info[s].ch2.
 808                                measurements[c][m]);
 809                         omeas = &(chan_info->measurements[c][m]);
 810
 811                         omeas->actual_pow =
 812                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 813                                                            m1->actual_pow,
 814                                                            ch_i2,
 815                                                            m2->actual_pow);
 816                         omeas->gain_idx =
 817                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 818                                                            m1->gain_idx, ch_i2,
 819                                                            m2->gain_idx);
 820                         omeas->temperature =
 821                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 822                                                            m1->temperature,
 823                                                            ch_i2,
 824                                                            m2->temperature);
 825                         omeas->pa_det =
 826                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 827                                                            m1->pa_det, ch_i2,
 828                                                            m2->pa_det);
 829
 830                         IWL_DEBUG_TXPOWER(priv,
 831                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 832                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 833                         IWL_DEBUG_TXPOWER(priv,
 834                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 835                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 836                         IWL_DEBUG_TXPOWER(priv,
 837                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 838                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 839                         IWL_DEBUG_TXPOWER(priv,
 840                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 841                                 m1->temperature, m2->temperature,
 842                                 omeas->temperature);
 843                 }
 844         }
 845
 846         return 0;
 847 }
 848
 849 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 850  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 851 static s32 back_off_table[] = {
 852         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 853         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 854         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 855         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 856         10                      /* CCK */
 857 };
 858
 859 /* Thermal compensation values for txpower for various frequency ranges ...
 860  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 861 static struct iwl4965_txpower_comp_entry {
 862         s32 degrees_per_05db_a;
 863         s32 degrees_per_05db_a_denom;
 864 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 865         {9, 2},                 /* group 0 5.2, ch  34-43 */
 866         {4, 1},                 /* group 1 5.2, ch  44-70 */
 867         {4, 1},                 /* group 2 5.2, ch  71-124 */
 868         {4, 1},                 /* group 3 5.2, ch 125-200 */
 869         {3, 1}                  /* group 4 2.4, ch   all */
 870 };
 871
 872 static s32 get_min_power_index(s32 rate_power_index, u32 band)
 873 {
 874         if (!band) {
 875                 if ((rate_power_index & 7) <= 4)
 876                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
 877         }
 878         return MIN_TX_GAIN_INDEX;
 879 }
 880
 881 struct gain_entry {
 882         u8 dsp;
 883         u8 radio;
 884 };
 885
 886 static const struct gain_entry gain_table[2][108] = {
 887         /* 5.2GHz power gain index table */
 888         {
 889          {123, 0x3F},           /* highest txpower */
 890          {117, 0x3F},
 891          {110, 0x3F},
 892          {104, 0x3F},
 893          {98, 0x3F},
 894          {110, 0x3E},
 895          {104, 0x3E},
 896          {98, 0x3E},
 897          {110, 0x3D},
 898          {104, 0x3D},
 899          {98, 0x3D},
 900          {110, 0x3C},
 901          {104, 0x3C},
 902          {98, 0x3C},
 903          {110, 0x3B},
 904          {104, 0x3B},
 905          {98, 0x3B},
 906          {110, 0x3A},
 907          {104, 0x3A},
 908          {98, 0x3A},
 909          {110, 0x39},
 910          {104, 0x39},
 911          {98, 0x39},
 912          {110, 0x38},
 913          {104, 0x38},
 914          {98, 0x38},
 915          {110, 0x37},
 916          {104, 0x37},
 917          {98, 0x37},
 918          {110, 0x36},
 919          {104, 0x36},
 920          {98, 0x36},
 921          {110, 0x35},
 922          {104, 0x35},
 923          {98, 0x35},
 924          {110, 0x34},
 925          {104, 0x34},
 926          {98, 0x34},
 927          {110, 0x33},
 928          {104, 0x33},
 929          {98, 0x33},
 930          {110, 0x32},
 931          {104, 0x32},
 932          {98, 0x32},
 933          {110, 0x31},
 934          {104, 0x31},
 935          {98, 0x31},
 936          {110, 0x30},
 937          {104, 0x30},
 938          {98, 0x30},
 939          {110, 0x25},
 940          {104, 0x25},
 941          {98, 0x25},
 942          {110, 0x24},
 943          {104, 0x24},
 944          {98, 0x24},
 945          {110, 0x23},
 946          {104, 0x23},
 947          {98, 0x23},
 948          {110, 0x22},
 949          {104, 0x18},
 950          {98, 0x18},
 951          {110, 0x17},
 952          {104, 0x17},
 953          {98, 0x17},
 954          {110, 0x16},
 955          {104, 0x16},
 956          {98, 0x16},
 957          {110, 0x15},
 958          {104, 0x15},
 959          {98, 0x15},
 960          {110, 0x14},
 961          {104, 0x14},
 962          {98, 0x14},
 963          {110, 0x13},
 964          {104, 0x13},
 965          {98, 0x13},
 966          {110, 0x12},
 967          {104, 0x08},
 968          {98, 0x08},
 969          {110, 0x07},
 970          {104, 0x07},
 971          {98, 0x07},
 972          {110, 0x06},
 973          {104, 0x06},
 974          {98, 0x06},
 975          {110, 0x05},
 976          {104, 0x05},
 977          {98, 0x05},
 978          {110, 0x04},
 979          {104, 0x04},
 980          {98, 0x04},
 981          {110, 0x03},
 982          {104, 0x03},
 983          {98, 0x03},
 984          {110, 0x02},
 985          {104, 0x02},
 986          {98, 0x02},
 987          {110, 0x01},
 988          {104, 0x01},
 989          {98, 0x01},
 990          {110, 0x00},
 991          {104, 0x00},
 992          {98, 0x00},
 993          {93, 0x00},
 994          {88, 0x00},
 995          {83, 0x00},
 996          {78, 0x00},
 997          },
 998         /* 2.4GHz power gain index table */
 999         {
1000          {110, 0x3f},           /* highest txpower */
1001          {104, 0x3f},
1002          {98, 0x3f},
1003          {110, 0x3e},
1004          {104, 0x3e},
1005          {98, 0x3e},
1006          {110, 0x3d},
1007          {104, 0x3d},
1008          {98, 0x3d},
1009          {110, 0x3c},
1010          {104, 0x3c},
1011          {98, 0x3c},
1012          {110, 0x3b},
1013          {104, 0x3b},
1014          {98, 0x3b},
1015          {110, 0x3a},
1016          {104, 0x3a},
1017          {98, 0x3a},
1018          {110, 0x39},
1019          {104, 0x39},
1020          {98, 0x39},
1021          {110, 0x38},
1022          {104, 0x38},
1023          {98, 0x38},
1024          {110, 0x37},
1025          {104, 0x37},
1026          {98, 0x37},
1027          {110, 0x36},
1028          {104, 0x36},
1029          {98, 0x36},
1030          {110, 0x35},
1031          {104, 0x35},
1032          {98, 0x35},
1033          {110, 0x34},
1034          {104, 0x34},
1035          {98, 0x34},
1036          {110, 0x33},
1037          {104, 0x33},
1038          {98, 0x33},
1039          {110, 0x32},
1040          {104, 0x32},
1041          {98, 0x32},
1042          {110, 0x31},
1043          {104, 0x31},
1044          {98, 0x31},
1045          {110, 0x30},
1046          {104, 0x30},
1047          {98, 0x30},
1048          {110, 0x6},
1049          {104, 0x6},
1050          {98, 0x6},
1051          {110, 0x5},
1052          {104, 0x5},
1053          {98, 0x5},
1054          {110, 0x4},
1055          {104, 0x4},
1056          {98, 0x4},
1057          {110, 0x3},
1058          {104, 0x3},
1059          {98, 0x3},
1060          {110, 0x2},
1061          {104, 0x2},
1062          {98, 0x2},
1063          {110, 0x1},
1064          {104, 0x1},
1065          {98, 0x1},
1066          {110, 0x0},
1067          {104, 0x0},
1068          {98, 0x0},
1069          {97, 0},
1070          {96, 0},
1071          {95, 0},
1072          {94, 0},
1073          {93, 0},
1074          {92, 0},
1075          {91, 0},
1076          {90, 0},
1077          {89, 0},
1078          {88, 0},
1079          {87, 0},
1080          {86, 0},
1081          {85, 0},
1082          {84, 0},
1083          {83, 0},
1084          {82, 0},
1085          {81, 0},
1086          {80, 0},
1087          {79, 0},
1088          {78, 0},
1089          {77, 0},
1090          {76, 0},
1091          {75, 0},
1092          {74, 0},
1093          {73, 0},
1094          {72, 0},
1095          {71, 0},
1096          {70, 0},
1097          {69, 0},
1098          {68, 0},
1099          {67, 0},
1100          {66, 0},
1101          {65, 0},
1102          {64, 0},
1103          {63, 0},
1104          {62, 0},
1105          {61, 0},
1106          {60, 0},
1107          {59, 0},
1108          }
1109 };
1110
1111 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1112                                     u8 is_ht40, u8 ctrl_chan_high,
1113                                     struct iwl4965_tx_power_db *tx_power_tbl)
1114 {
1115         u8 saturation_power;
1116         s32 target_power;
1117         s32 user_target_power;
1118         s32 power_limit;
1119         s32 current_temp;
1120         s32 reg_limit;
1121         s32 current_regulatory;
1122         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1123         int i;
1124         int c;
1125         const struct iwl_channel_info *ch_info = NULL;
1126         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1127         const struct iwl_eeprom_calib_measure *measurement;
1128         s16 voltage;
1129         s32 init_voltage;
1130         s32 voltage_compensation;
1131         s32 degrees_per_05db_num;
1132         s32 degrees_per_05db_denom;
1133         s32 factory_temp;
1134         s32 temperature_comp[2];
1135         s32 factory_gain_index[2];
1136         s32 factory_actual_pwr[2];
1137         s32 power_index;
1138
1139         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1140          *   are used for indexing into txpower table) */
1141         user_target_power = 2 * priv->tx_power_user_lmt;
1142
1143         /* Get current (RXON) channel, band, width */
1144         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1145                           is_ht40);
1146
1147         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1148
1149         if (!is_channel_valid(ch_info))
1150                 return -EINVAL;
1151
1152         /* get txatten group, used to select 1) thermal txpower adjustment
1153          *   and 2) mimo txpower balance between Tx chains. */
1154         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1155         if (txatten_grp < 0) {
1156                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1157                           channel);
1158                 return -EINVAL;
1159         }
1160
1161         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1162                           channel, txatten_grp);
1163
1164         if (is_ht40) {
1165                 if (ctrl_chan_high)
1166                         channel -= 2;
1167                 else
1168                         channel += 2;
1169         }
1170
1171         /* hardware txpower limits ...
1172          * saturation (clipping distortion) txpowers are in half-dBm */
1173         if (band)
1174                 saturation_power = priv->calib_info->saturation_power24;
1175         else
1176                 saturation_power = priv->calib_info->saturation_power52;
1177
1178         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1179             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1180                 if (band)
1181                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1182                 else
1183                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1184         }
1185
1186         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1187          *   max_power_avg values are in dBm, convert * 2 */
1188         if (is_ht40)
1189                 reg_limit = ch_info->ht40_max_power_avg * 2;
1190         else
1191                 reg_limit = ch_info->max_power_avg * 2;
1192
1193         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1194             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1195                 if (band)
1196                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1197                 else
1198                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1199         }
1200
1201         /* Interpolate txpower calibration values for this channel,
1202          *   based on factory calibration tests on spaced channels. */
1203         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1204
1205         /* calculate tx gain adjustment based on power supply voltage */
1206         voltage = priv->calib_info->voltage;
1207         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1208         voltage_compensation =
1209             iwl4965_get_voltage_compensation(voltage, init_voltage);
1210
1211         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1212                           init_voltage,
1213                           voltage, voltage_compensation);
1214
1215         /* get current temperature (Celsius) */
1216         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1217         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1218         current_temp = KELVIN_TO_CELSIUS(current_temp);
1219
1220         /* select thermal txpower adjustment params, based on channel group
1221          *   (same frequency group used for mimo txatten adjustment) */
1222         degrees_per_05db_num =
1223             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1224         degrees_per_05db_denom =
1225             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1226
1227         /* get per-chain txpower values from factory measurements */
1228         for (c = 0; c < 2; c++) {
1229                 measurement = &ch_eeprom_info.measurements[c][1];
1230
1231                 /* txgain adjustment (in half-dB steps) based on difference
1232                  *   between factory and current temperature */
1233                 factory_temp = measurement->temperature;
1234                 iwl4965_math_div_round((current_temp - factory_temp) *
1235                                        degrees_per_05db_denom,
1236                                        degrees_per_05db_num,
1237                                        &temperature_comp[c]);
1238
1239                 factory_gain_index[c] = measurement->gain_idx;
1240                 factory_actual_pwr[c] = measurement->actual_pow;
1241
1242                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1243                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1244                                   "curr tmp %d, comp %d steps\n",
1245                                   factory_temp, current_temp,
1246                                   temperature_comp[c]);
1247
1248                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1249                                   factory_gain_index[c],
1250                                   factory_actual_pwr[c]);
1251         }
1252
1253         /* for each of 33 bit-rates (including 1 for CCK) */
1254         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1255                 u8 is_mimo_rate;
1256                 union iwl4965_tx_power_dual_stream tx_power;
1257
1258                 /* for mimo, reduce each chain's txpower by half
1259                  * (3dB, 6 steps), so total output power is regulatory
1260                  * compliant. */
1261                 if (i & 0x8) {
1262                         current_regulatory = reg_limit -
1263                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1264                         is_mimo_rate = 1;
1265                 } else {
1266                         current_regulatory = reg_limit;
1267                         is_mimo_rate = 0;
1268                 }
1269
1270                 /* find txpower limit, either hardware or regulatory */
1271                 power_limit = saturation_power - back_off_table[i];
1272                 if (power_limit > current_regulatory)
1273                         power_limit = current_regulatory;
1274
1275                 /* reduce user's txpower request if necessary
1276                  * for this rate on this channel */
1277                 target_power = user_target_power;
1278                 if (target_power > power_limit)
1279                         target_power = power_limit;
1280
1281                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1282                                   i, saturation_power - back_off_table[i],
1283                                   current_regulatory, user_target_power,
1284                                   target_power);
1285
1286                 /* for each of 2 Tx chains (radio transmitters) */
1287                 for (c = 0; c < 2; c++) {
1288                         s32 atten_value;
1289
1290                         if (is_mimo_rate)
1291                                 atten_value =
1292                                     (s32)le32_to_cpu(priv->card_alive_init.
1293                                     tx_atten[txatten_grp][c]);
1294                         else
1295                                 atten_value = 0;
1296
1297                         /* calculate index; higher index means lower txpower */
1298                         power_index = (u8) (factory_gain_index[c] -
1299                                             (target_power -
1300                                              factory_actual_pwr[c]) -
1301                                             temperature_comp[c] -
1302                                             voltage_compensation +
1303                                             atten_value);
1304
1305 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1306                                                 power_index); */
1307
1308                         if (power_index < get_min_power_index(i, band))
1309                                 power_index = get_min_power_index(i, band);
1310
1311                         /* adjust 5 GHz index to support negative indexes */
1312                         if (!band)
1313                                 power_index += 9;
1314
1315                         /* CCK, rate 32, reduce txpower for CCK */
1316                         if (i == POWER_TABLE_CCK_ENTRY)
1317                                 power_index +=
1318                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1319
1320                         /* stay within the table! */
1321                         if (power_index > 107) {
1322                                 IWL_WARN(priv, "txpower index %d > 107\n",
1323                                             power_index);
1324                                 power_index = 107;
1325                         }
1326                         if (power_index < 0) {
1327                                 IWL_WARN(priv, "txpower index %d < 0\n",
1328                                             power_index);
1329                                 power_index = 0;
1330                         }
1331
1332                         /* fill txpower command for this rate/chain */
1333                         tx_power.s.radio_tx_gain[c] =
1334                                 gain_table[band][power_index].radio;
1335                         tx_power.s.dsp_predis_atten[c] =
1336                                 gain_table[band][power_index].dsp;
1337
1338                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1339                                           "gain 0x%02x dsp %d\n",
1340                                           c, atten_value, power_index,
1341                                         tx_power.s.radio_tx_gain[c],
1342                                         tx_power.s.dsp_predis_atten[c]);
1343                 } /* for each chain */
1344
1345                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1346
1347         } /* for each rate */
1348
1349         return 0;
1350 }
1351
1352 /**
1353  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1354  *
1355  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1356  * The power limit is taken from priv->tx_power_user_lmt.
1357  */
1358 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1359 {
1360         struct iwl4965_txpowertable_cmd cmd = { 0 };
1361         int ret;
1362         u8 band = 0;
1363         bool is_ht40 = false;
1364         u8 ctrl_chan_high = 0;
1365
1366         if (test_bit(STATUS_SCANNING, &priv->status)) {
1367                 /* If this gets hit a lot, switch it to a BUG() and catch
1368                  * the stack trace to find out who is calling this during
1369                  * a scan. */
1370                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1371                 return -EAGAIN;
1372         }
1373
1374         band = priv->band == IEEE80211_BAND_2GHZ;
1375
1376         is_ht40 =  is_ht40_channel(priv->active_rxon.flags);
1377
1378         if (is_ht40 &&
1379             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1380                 ctrl_chan_high = 1;
1381
1382         cmd.band = band;
1383         cmd.channel = priv->active_rxon.channel;
1384
1385         ret = iwl4965_fill_txpower_tbl(priv, band,
1386                                 le16_to_cpu(priv->active_rxon.channel),
1387                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1388         if (ret)
1389                 goto out;
1390
1391         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1392
1393 out:
1394         return ret;
1395 }
1396
1397 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1398 {
1399         int ret = 0;
1400         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1401         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1402         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1403
1404         if ((rxon1->flags == rxon2->flags) &&
1405             (rxon1->filter_flags == rxon2->filter_flags) &&
1406             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1407             (rxon1->ofdm_ht_single_stream_basic_rates ==
1408              rxon2->ofdm_ht_single_stream_basic_rates) &&
1409             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1410              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1411             (rxon1->rx_chain == rxon2->rx_chain) &&
1412             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1413                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1414                 return 0;
1415         }
1416
1417         rxon_assoc.flags = priv->staging_rxon.flags;
1418         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1419         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1420         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1421         rxon_assoc.reserved = 0;
1422         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1423             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1424         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1425             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1426         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1427
1428         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1429                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1430         if (ret)
1431                 return ret;
1432
1433         return ret;
1434 }
1435
1436 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1437 {
1438         int rc;
1439         u8 band = 0;
1440         bool is_ht40 = false;
1441         u8 ctrl_chan_high = 0;
1442         struct iwl4965_channel_switch_cmd cmd;
1443         const struct iwl_channel_info *ch_info;
1444
1445         band = priv->band == IEEE80211_BAND_2GHZ;
1446
1447         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1448
1449         is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1450
1451         if (is_ht40 &&
1452             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1453                 ctrl_chan_high = 1;
1454
1455         cmd.band = band;
1456         cmd.expect_beacon = 0;
1457         cmd.channel = cpu_to_le16(channel);
1458         cmd.rxon_flags = priv->active_rxon.flags;
1459         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1460         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1461         if (ch_info)
1462                 cmd.expect_beacon = is_channel_radar(ch_info);
1463         else {
1464                 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
1465                         priv->active_rxon.channel, channel);
1466                 return -EFAULT;
1467         }
1468
1469         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1470                                       ctrl_chan_high, &cmd.tx_power);
1471         if (rc) {
1472                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1473                 return rc;
1474         }
1475
1476         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1477         return rc;
1478 }
1479
1480 /**
1481  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1482  */
1483 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1484                                             struct iwl_tx_queue *txq,
1485                                             u16 byte_cnt)
1486 {
1487         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1488         int txq_id = txq->q.id;
1489         int write_ptr = txq->q.write_ptr;
1490         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1491         __le16 bc_ent;
1492
1493         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1494
1495         bc_ent = cpu_to_le16(len & 0xFFF);
1496         /* Set up byte count within first 256 entries */
1497         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1498
1499         /* If within first 64 entries, duplicate at end */
1500         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1501                 scd_bc_tbl[txq_id].
1502                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1503 }
1504
1505 /**
1506  * sign_extend - Sign extend a value using specified bit as sign-bit
1507  *
1508  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1509  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1510  *
1511  * @param oper value to sign extend
1512  * @param index 0 based bit index (0<=index<32) to sign bit
1513  */
1514 static s32 sign_extend(u32 oper, int index)
1515 {
1516         u8 shift = 31 - index;
1517
1518         return (s32)(oper << shift) >> shift;
1519 }
1520
1521 /**
1522  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1523  * @statistics: Provides the temperature reading from the uCode
1524  *
1525  * A return of <0 indicates bogus data in the statistics
1526  */
1527 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1528 {
1529         s32 temperature;
1530         s32 vt;
1531         s32 R1, R2, R3;
1532         u32 R4;
1533
1534         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1535                 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1536                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1537                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1538                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1539                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1540                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1541         } else {
1542                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1543                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1544                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1545                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1546                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1547         }
1548
1549         /*
1550          * Temperature is only 23 bits, so sign extend out to 32.
1551          *
1552          * NOTE If we haven't received a statistics notification yet
1553          * with an updated temperature, use R4 provided to us in the
1554          * "initialize" ALIVE response.
1555          */
1556         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1557                 vt = sign_extend(R4, 23);
1558         else
1559                 vt = sign_extend(
1560                         le32_to_cpu(priv->statistics.general.temperature), 23);
1561
1562         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1563
1564         if (R3 == R1) {
1565                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1566                 return -1;
1567         }
1568
1569         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1570          * Add offset to center the adjustment around 0 degrees Centigrade. */
1571         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1572         temperature /= (R3 - R1);
1573         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1574
1575         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1576                         temperature, KELVIN_TO_CELSIUS(temperature));
1577
1578         return temperature;
1579 }
1580
1581 /* Adjust Txpower only if temperature variance is greater than threshold. */
1582 #define IWL_TEMPERATURE_THRESHOLD   3
1583
1584 /**
1585  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1586  *
1587  * If the temperature changed has changed sufficiently, then a recalibration
1588  * is needed.
1589  *
1590  * Assumes caller will replace priv->last_temperature once calibration
1591  * executed.
1592  */
1593 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1594 {
1595         int temp_diff;
1596
1597         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1598                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1599                 return 0;
1600         }
1601
1602         temp_diff = priv->temperature - priv->last_temperature;
1603
1604         /* get absolute value */
1605         if (temp_diff < 0) {
1606                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1607                 temp_diff = -temp_diff;
1608         } else if (temp_diff == 0)
1609                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1610         else
1611                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1612
1613         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1614                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1615                 return 0;
1616         }
1617
1618         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1619
1620         return 1;
1621 }
1622
1623 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1624 {
1625         s32 temp;
1626
1627         temp = iwl4965_hw_get_temperature(priv);
1628         if (temp < 0)
1629                 return;
1630
1631         if (priv->temperature != temp) {
1632                 if (priv->temperature)
1633                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1634                                        "from %dC to %dC\n",
1635                                        KELVIN_TO_CELSIUS(priv->temperature),
1636                                        KELVIN_TO_CELSIUS(temp));
1637                 else
1638                         IWL_DEBUG_TEMP(priv, "Temperature "
1639                                        "initialized to %dC\n",
1640                                        KELVIN_TO_CELSIUS(temp));
1641         }
1642
1643         priv->temperature = temp;
1644         iwl_tt_handler(priv);
1645         set_bit(STATUS_TEMPERATURE, &priv->status);
1646
1647         if (!priv->disable_tx_power_cal &&
1648              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1649              iwl4965_is_temp_calib_needed(priv))
1650                 queue_work(priv->workqueue, &priv->txpower_work);
1651 }
1652
1653 /**
1654  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1655  */
1656 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1657                                             u16 txq_id)
1658 {
1659         /* Simply stop the queue, but don't change any configuration;
1660          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1661         iwl_write_prph(priv,
1662                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1663                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1664                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1665 }
1666
1667 /**
1668  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1669  * priv->lock must be held by the caller
1670  */
1671 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1672                                    u16 ssn_idx, u8 tx_fifo)
1673 {
1674         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1675             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1676              <= txq_id)) {
1677                 IWL_WARN(priv,
1678                         "queue number out of range: %d, must be %d to %d\n",
1679                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1680                         IWL49_FIRST_AMPDU_QUEUE +
1681                         priv->cfg->num_of_ampdu_queues - 1);
1682                 return -EINVAL;
1683         }
1684
1685         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1686
1687         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1688
1689         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1690         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1691         /* supposes that ssn_idx is valid (!= 0xFFF) */
1692         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1693
1694         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1695         iwl_txq_ctx_deactivate(priv, txq_id);
1696         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1697
1698         return 0;
1699 }
1700
1701 /**
1702  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1703  */
1704 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1705                                         u16 txq_id)
1706 {
1707         u32 tbl_dw_addr;
1708         u32 tbl_dw;
1709         u16 scd_q2ratid;
1710
1711         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1712
1713         tbl_dw_addr = priv->scd_base_addr +
1714                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1715
1716         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1717
1718         if (txq_id & 0x1)
1719                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1720         else
1721                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1722
1723         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1724
1725         return 0;
1726 }
1727
1728
1729 /**
1730  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1731  *
1732  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1733  *        i.e. it must be one of the higher queues used for aggregation
1734  */
1735 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1736                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1737 {
1738         unsigned long flags;
1739         u16 ra_tid;
1740
1741         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1742             (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1743              <= txq_id)) {
1744                 IWL_WARN(priv,
1745                         "queue number out of range: %d, must be %d to %d\n",
1746                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1747                         IWL49_FIRST_AMPDU_QUEUE +
1748                         priv->cfg->num_of_ampdu_queues - 1);
1749                 return -EINVAL;
1750         }
1751
1752         ra_tid = BUILD_RAxTID(sta_id, tid);
1753
1754         /* Modify device's station table to Tx this TID */
1755         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1756
1757         spin_lock_irqsave(&priv->lock, flags);
1758
1759         /* Stop this Tx queue before configuring it */
1760         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1761
1762         /* Map receiver-address / traffic-ID to this queue */
1763         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1764
1765         /* Set this queue as a chain-building queue */
1766         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1767
1768         /* Place first TFD at index corresponding to start sequence number.
1769          * Assumes that ssn_idx is valid (!= 0xFFF) */
1770         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1771         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1772         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1773
1774         /* Set up Tx window size and frame limit for this queue */
1775         iwl_write_targ_mem(priv,
1776                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1777                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1778                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1779
1780         iwl_write_targ_mem(priv, priv->scd_base_addr +
1781                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1782                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1783                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1784
1785         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1786
1787         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1788         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1789
1790         spin_unlock_irqrestore(&priv->lock, flags);
1791
1792         return 0;
1793 }
1794
1795
1796 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1797 {
1798         switch (cmd_id) {
1799         case REPLY_RXON:
1800                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1801         default:
1802                 return len;
1803         }
1804 }
1805
1806 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1807 {
1808         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1809         addsta->mode = cmd->mode;
1810         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1811         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1812         addsta->station_flags = cmd->station_flags;
1813         addsta->station_flags_msk = cmd->station_flags_msk;
1814         addsta->tid_disable_tx = cmd->tid_disable_tx;
1815         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1816         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1817         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1818         addsta->reserved1 = cpu_to_le16(0);
1819         addsta->reserved2 = cpu_to_le32(0);
1820
1821         return (u16)sizeof(struct iwl4965_addsta_cmd);
1822 }
1823
1824 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1825 {
1826         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1827 }
1828
1829 /**
1830  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1831  */
1832 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1833                                       struct iwl_ht_agg *agg,
1834                                       struct iwl4965_tx_resp *tx_resp,
1835                                       int txq_id, u16 start_idx)
1836 {
1837         u16 status;
1838         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1839         struct ieee80211_tx_info *info = NULL;
1840         struct ieee80211_hdr *hdr = NULL;
1841         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1842         int i, sh, idx;
1843         u16 seq;
1844         if (agg->wait_for_ba)
1845                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1846
1847         agg->frame_count = tx_resp->frame_count;
1848         agg->start_idx = start_idx;
1849         agg->rate_n_flags = rate_n_flags;
1850         agg->bitmap = 0;
1851
1852         /* num frames attempted by Tx command */
1853         if (agg->frame_count == 1) {
1854                 /* Only one frame was attempted; no block-ack will arrive */
1855                 status = le16_to_cpu(frame_status[0].status);
1856                 idx = start_idx;
1857
1858                 /* FIXME: code repetition */
1859                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1860                                    agg->frame_count, agg->start_idx, idx);
1861
1862                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1863                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1864                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1865                 info->flags |= iwl_is_tx_success(status) ?
1866                         IEEE80211_TX_STAT_ACK : 0;
1867                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1868                 /* FIXME: code repetition end */
1869
1870                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1871                                     status & 0xff, tx_resp->failure_frame);
1872                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1873
1874                 agg->wait_for_ba = 0;
1875         } else {
1876                 /* Two or more frames were attempted; expect block-ack */
1877                 u64 bitmap = 0;
1878                 int start = agg->start_idx;
1879
1880                 /* Construct bit-map of pending frames within Tx window */
1881                 for (i = 0; i < agg->frame_count; i++) {
1882                         u16 sc;
1883                         status = le16_to_cpu(frame_status[i].status);
1884                         seq  = le16_to_cpu(frame_status[i].sequence);
1885                         idx = SEQ_TO_INDEX(seq);
1886                         txq_id = SEQ_TO_QUEUE(seq);
1887
1888                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1889                                       AGG_TX_STATE_ABORT_MSK))
1890                                 continue;
1891
1892                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1893                                            agg->frame_count, txq_id, idx);
1894
1895                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1896                         if (!hdr) {
1897                                 IWL_ERR(priv,
1898                                         "BUG_ON idx doesn't point to valid skb"
1899                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1900                                 return -1;
1901                         }
1902
1903                         sc = le16_to_cpu(hdr->seq_ctrl);
1904                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
1905                                 IWL_ERR(priv,
1906                                         "BUG_ON idx doesn't match seq control"
1907                                         " idx=%d, seq_idx=%d, seq=%d\n",
1908                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
1909                                 return -1;
1910                         }
1911
1912                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
1913                                            i, idx, SEQ_TO_SN(sc));
1914
1915                         sh = idx - start;
1916                         if (sh > 64) {
1917                                 sh = (start - idx) + 0xff;
1918                                 bitmap = bitmap << sh;
1919                                 sh = 0;
1920                                 start = idx;
1921                         } else if (sh < -64)
1922                                 sh  = 0xff - (start - idx);
1923                         else if (sh < 0) {
1924                                 sh = start - idx;
1925                                 start = idx;
1926                                 bitmap = bitmap << sh;
1927                                 sh = 0;
1928                         }
1929                         bitmap |= 1ULL << sh;
1930                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
1931                                            start, (unsigned long long)bitmap);
1932                 }
1933
1934                 agg->bitmap = bitmap;
1935                 agg->start_idx = start;
1936                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
1937                                    agg->frame_count, agg->start_idx,
1938                                    (unsigned long long)agg->bitmap);
1939
1940                 if (bitmap)
1941                         agg->wait_for_ba = 1;
1942         }
1943         return 0;
1944 }
1945
1946 /**
1947  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
1948  */
1949 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
1950                                 struct iwl_rx_mem_buffer *rxb)
1951 {
1952         struct iwl_rx_packet *pkt = rxb_addr(rxb);
1953         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1954         int txq_id = SEQ_TO_QUEUE(sequence);
1955         int index = SEQ_TO_INDEX(sequence);
1956         struct iwl_tx_queue *txq = &priv->txq[txq_id];
1957         struct ieee80211_hdr *hdr;
1958         struct ieee80211_tx_info *info;
1959         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
1960         u32  status = le32_to_cpu(tx_resp->u.status);
1961         int tid = MAX_TID_COUNT;
1962         int sta_id;
1963         int freed;
1964         u8 *qc = NULL;
1965
1966         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
1967                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
1968                           "is out of range [0-%d] %d %d\n", txq_id,
1969                           index, txq->q.n_bd, txq->q.write_ptr,
1970                           txq->q.read_ptr);
1971                 return;
1972         }
1973
1974         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
1975         memset(&info->status, 0, sizeof(info->status));
1976
1977         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
1978         if (ieee80211_is_data_qos(hdr->frame_control)) {
1979                 qc = ieee80211_get_qos_ctl(hdr);
1980                 tid = qc[0] & 0xf;
1981         }
1982
1983         sta_id = iwl_get_ra_sta_id(priv, hdr);
1984         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
1985                 IWL_ERR(priv, "Station not known\n");
1986                 return;
1987         }
1988
1989         if (txq->sched_retry) {
1990                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
1991                 struct iwl_ht_agg *agg = NULL;
1992
1993                 WARN_ON(!qc);
1994
1995                 agg = &priv->stations[sta_id].tid[tid].agg;
1996
1997                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
1998
1999                 /* check if BAR is needed */
2000                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2001                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2002
2003                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2004                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2005                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2006                                            "%d index %d\n", scd_ssn , index);
2007                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2008                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2009
2010                         if (priv->mac80211_registered &&
2011                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2012                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2013                                 if (agg->state == IWL_AGG_OFF)
2014                                         iwl_wake_queue(priv, txq_id);
2015                                 else
2016                                         iwl_wake_queue(priv, txq->swq_id);
2017                         }
2018                 }
2019         } else {
2020                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2021                 info->flags |= iwl_is_tx_success(status) ?
2022                                         IEEE80211_TX_STAT_ACK : 0;
2023                 iwl_hwrate_to_tx_control(priv,
2024                                         le32_to_cpu(tx_resp->rate_n_flags),
2025                                         info);
2026
2027                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2028                                    "rate_n_flags 0x%x retries %d\n",
2029                                    txq_id,
2030                                    iwl_get_tx_fail_reason(status), status,
2031                                    le32_to_cpu(tx_resp->rate_n_flags),
2032                                    tx_resp->failure_frame);
2033
2034                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2035                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2036                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2037
2038                 if (priv->mac80211_registered &&
2039                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2040                         iwl_wake_queue(priv, txq_id);
2041         }
2042
2043         if (qc && likely(sta_id != IWL_INVALID_STATION))
2044                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2045
2046         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2047                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2048 }
2049
2050 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2051                              struct iwl_rx_phy_res *rx_resp)
2052 {
2053         /* data from PHY/DSP regarding signal strength, etc.,
2054          *   contents are always there, not configurable by host.  */
2055         struct iwl4965_rx_non_cfg_phy *ncphy =
2056             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2057         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2058                         >> IWL49_AGC_DB_POS;
2059
2060         u32 valid_antennae =
2061             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2062                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2063         u8 max_rssi = 0;
2064         u32 i;
2065
2066         /* Find max rssi among 3 possible receivers.
2067          * These values are measured by the digital signal processor (DSP).
2068          * They should stay fairly constant even as the signal strength varies,
2069          *   if the radio's automatic gain control (AGC) is working right.
2070          * AGC value (see below) will provide the "interesting" info. */
2071         for (i = 0; i < 3; i++)
2072                 if (valid_antennae & (1 << i))
2073                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2074
2075         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2076                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2077                 max_rssi, agc);
2078
2079         /* dBm = max_rssi dB - agc dB - constant.
2080          * Higher AGC (higher radio gain) means lower signal. */
2081         return max_rssi - agc - IWL49_RSSI_OFFSET;
2082 }
2083
2084
2085 /* Set up 4965-specific Rx frame reply handlers */
2086 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2087 {
2088         /* Legacy Rx frames */
2089         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2090         /* Tx response */
2091         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2092 }
2093
2094 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2095 {
2096         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2097 }
2098
2099 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2100 {
2101         cancel_work_sync(&priv->txpower_work);
2102 }
2103
2104 #define IWL4965_UCODE_GET(item)                                         \
2105 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2106                                     u32 api_ver)                        \
2107 {                                                                       \
2108         return le32_to_cpu(ucode->u.v1.item);                           \
2109 }
2110
2111 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2112 {
2113         return UCODE_HEADER_SIZE(1);
2114 }
2115 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2116                                    u32 api_ver)
2117 {
2118         return 0;
2119 }
2120 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2121                                   u32 api_ver)
2122 {
2123         return (u8 *) ucode->u.v1.data;
2124 }
2125
2126 IWL4965_UCODE_GET(inst_size);
2127 IWL4965_UCODE_GET(data_size);
2128 IWL4965_UCODE_GET(init_size);
2129 IWL4965_UCODE_GET(init_data_size);
2130 IWL4965_UCODE_GET(boot_size);
2131
2132 static struct iwl_hcmd_ops iwl4965_hcmd = {
2133         .rxon_assoc = iwl4965_send_rxon_assoc,
2134         .commit_rxon = iwl_commit_rxon,
2135         .set_rxon_chain = iwl_set_rxon_chain,
2136 };
2137
2138 static struct iwl_ucode_ops iwl4965_ucode = {
2139         .get_header_size = iwl4965_ucode_get_header_size,
2140         .get_build = iwl4965_ucode_get_build,
2141         .get_inst_size = iwl4965_ucode_get_inst_size,
2142         .get_data_size = iwl4965_ucode_get_data_size,
2143         .get_init_size = iwl4965_ucode_get_init_size,
2144         .get_init_data_size = iwl4965_ucode_get_init_data_size,
2145         .get_boot_size = iwl4965_ucode_get_boot_size,
2146         .get_data = iwl4965_ucode_get_data,
2147 };
2148 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2149         .get_hcmd_size = iwl4965_get_hcmd_size,
2150         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2151         .chain_noise_reset = iwl4965_chain_noise_reset,
2152         .gain_computation = iwl4965_gain_computation,
2153         .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2154         .calc_rssi = iwl4965_calc_rssi,
2155 };
2156
2157 static struct iwl_lib_ops iwl4965_lib = {
2158         .set_hw_params = iwl4965_hw_set_hw_params,
2159         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2160         .txq_set_sched = iwl4965_txq_set_sched,
2161         .txq_agg_enable = iwl4965_txq_agg_enable,
2162         .txq_agg_disable = iwl4965_txq_agg_disable,
2163         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2164         .txq_free_tfd = iwl_hw_txq_free_tfd,
2165         .txq_init = iwl_hw_tx_queue_init,
2166         .rx_handler_setup = iwl4965_rx_handler_setup,
2167         .setup_deferred_work = iwl4965_setup_deferred_work,
2168         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2169         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2170         .alive_notify = iwl4965_alive_notify,
2171         .init_alive_start = iwl4965_init_alive_start,
2172         .load_ucode = iwl4965_load_bsm,
2173         .dump_nic_event_log = iwl_dump_nic_event_log,
2174         .dump_nic_error_log = iwl_dump_nic_error_log,
2175         .set_channel_switch = iwl4965_hw_channel_switch,
2176         .apm_ops = {
2177                 .init = iwl_apm_init,
2178                 .stop = iwl_apm_stop,
2179                 .config = iwl4965_nic_config,
2180                 .set_pwr_src = iwl_set_pwr_src,
2181         },
2182         .eeprom_ops = {
2183                 .regulatory_bands = {
2184                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2185                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2186                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2187                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2188                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2189                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2190                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2191                 },
2192                 .verify_signature  = iwlcore_eeprom_verify_signature,
2193                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2194                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2195                 .calib_version = iwl4965_eeprom_calib_version,
2196                 .query_addr = iwlcore_eeprom_query_addr,
2197         },
2198         .send_tx_power  = iwl4965_send_tx_power,
2199         .update_chain_flags = iwl_update_chain_flags,
2200         .post_associate = iwl_post_associate,
2201         .config_ap = iwl_config_ap,
2202         .isr = iwl_isr_legacy,
2203         .temp_ops = {
2204                 .temperature = iwl4965_temperature_calib,
2205                 .set_ct_kill = iwl4965_set_ct_threshold,
2206         },
2207 };
2208
2209 static struct iwl_ops iwl4965_ops = {
2210         .ucode = &iwl4965_ucode,
2211         .lib = &iwl4965_lib,
2212         .hcmd = &iwl4965_hcmd,
2213         .utils = &iwl4965_hcmd_utils,
2214         .led = &iwlagn_led_ops,
2215 };
2216
2217 struct iwl_cfg iwl4965_agn_cfg = {
2218         .name = "4965AGN",
2219         .fw_name_pre = IWL4965_FW_PRE,
2220         .ucode_api_max = IWL4965_UCODE_API_MAX,
2221         .ucode_api_min = IWL4965_UCODE_API_MIN,
2222         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2223         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2224         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2225         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2226         .ops = &iwl4965_ops,
2227         .num_of_queues = IWL49_NUM_QUEUES,
2228         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
2229         .mod_params = &iwl4965_mod_params,
2230         .valid_tx_ant = ANT_AB,
2231         .valid_rx_ant = ANT_AB,
2232         .pll_cfg_val = 0,
2233         .set_l0s = true,
2234         .use_bsm = true,
2235         .use_isr_legacy = true,
2236         .ht_greenfield_support = false,
2237         .broken_powersave = true,
2238         .led_compensation = 61,
2239         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2240 };
2241
2242 /* Module firmware */
2243 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2244
2245 module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
2246 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2247 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
2248 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2249 module_param_named(
2250         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
2251 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2252
2253 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
2254 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2255 /* 11n */
2256 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
2257 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2258 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2259                    int, S_IRUGO);
2260 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2261
2262 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
2263 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");