drivers/net/wireless/iwlwifi/iwl-4965.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  *  Intel Linux Wireless <ilw@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/init.h>
  30 #include <linux/pci.h>
  31 #include <linux/dma-mapping.h>
  32 #include <linux/delay.h>
  33 #include <linux/skbuff.h>
  34 #include <linux/netdevice.h>
  35 #include <linux/wireless.h>
  36 #include <net/mac80211.h>
  37 #include <linux/etherdevice.h>
  38 #include <asm/unaligned.h>
  39
  40 #include "iwl-eeprom.h"
  41 #include "iwl-dev.h"
  42 #include "iwl-core.h"
  43 #include "iwl-io.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-calib.h"
  46 #include "iwl-sta.h"
  47 #include "iwl-agn-led.h"
  48
  49 static int iwl4965_send_tx_power(struct iwl_priv *priv);
  50 static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
  51
  52 /* Highest firmware API version supported */
  53 #define IWL4965_UCODE_API_MAX 2
  54
  55 /* Lowest firmware API version supported */
  56 #define IWL4965_UCODE_API_MIN 2
  57
  58 #define IWL4965_FW_PRE "iwlwifi-4965-"
  59 #define _IWL4965_MODULE_FIRMWARE(api) IWL4965_FW_PRE #api ".ucode"
  60 #define IWL4965_MODULE_FIRMWARE(api) _IWL4965_MODULE_FIRMWARE(api)
  61
  62
  63 /* module parameters */
  64 static struct iwl_mod_params iwl4965_mod_params = {
  65         .num_of_queues = IWL49_NUM_QUEUES,
  66         .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
  67         .amsdu_size_8K = 1,
  68         .restart_fw = 1,
  69         /* the rest are 0 by default */
  70 };
  71
  72 /* check contents of special bootstrap uCode SRAM */
  73 static int iwl4965_verify_bsm(struct iwl_priv *priv)
  74 {
  75         __le32 *image = priv->ucode_boot.v_addr;
  76         u32 len = priv->ucode_boot.len;
  77         u32 reg;
  78         u32 val;
  79
  80         IWL_DEBUG_INFO(priv, "Begin verify bsm\n");
  81
  82         /* verify BSM SRAM contents */
  83         val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  84         for (reg = BSM_SRAM_LOWER_BOUND;
  85              reg < BSM_SRAM_LOWER_BOUND + len;
  86              reg += sizeof(u32), image++) {
  87                 val = iwl_read_prph(priv, reg);
  88                 if (val != le32_to_cpu(*image)) {
  89                         IWL_ERR(priv, "BSM uCode verification failed at "
  90                                   "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  91                                   BSM_SRAM_LOWER_BOUND,
  92                                   reg - BSM_SRAM_LOWER_BOUND, len,
  93                                   val, le32_to_cpu(*image));
  94                         return -EIO;
  95                 }
  96         }
  97
  98         IWL_DEBUG_INFO(priv, "BSM bootstrap uCode image OK\n");
  99
 100         return 0;
 101 }
 102
 103 /**
 104  * iwl4965_load_bsm - Load bootstrap instructions
 105  *
 106  * BSM operation:
 107  *
 108  * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
 109  * in special SRAM that does not power down during RFKILL.  When powering back
 110  * up after power-saving sleeps (or during initial uCode load), the BSM loads
 111  * the bootstrap program into the on-board processor, and starts it.
 112  *
 113  * The bootstrap program loads (via DMA) instructions and data for a new
 114  * program from host DRAM locations indicated by the host driver in the
 115  * BSM_DRAM_* registers.  Once the new program is loaded, it starts
 116  * automatically.
 117  *
 118  * When initializing the NIC, the host driver points the BSM to the
 119  * "initialize" uCode image.  This uCode sets up some internal data, then
 120  * notifies host via "initialize alive" that it is complete.
 121  *
 122  * The host then replaces the BSM_DRAM_* pointer values to point to the
 123  * normal runtime uCode instructions and a backup uCode data cache buffer
 124  * (filled initially with starting data values for the on-board processor),
 125  * then triggers the "initialize" uCode to load and launch the runtime uCode,
 126  * which begins normal operation.
 127  *
 128  * When doing a power-save shutdown, runtime uCode saves data SRAM into
 129  * the backup data cache in DRAM before SRAM is powered down.
 130  *
 131  * When powering back up, the BSM loads the bootstrap program.  This reloads
 132  * the runtime uCode instructions and the backup data cache into SRAM,
 133  * and re-launches the runtime uCode from where it left off.
 134  */
 135 static int iwl4965_load_bsm(struct iwl_priv *priv)
 136 {
 137         __le32 *image = priv->ucode_boot.v_addr;
 138         u32 len = priv->ucode_boot.len;
 139         dma_addr_t pinst;
 140         dma_addr_t pdata;
 141         u32 inst_len;
 142         u32 data_len;
 143         int i;
 144         u32 done;
 145         u32 reg_offset;
 146         int ret;
 147
 148         IWL_DEBUG_INFO(priv, "Begin load bsm\n");
 149
 150         priv->ucode_type = UCODE_RT;
 151
 152         /* make sure bootstrap program is no larger than BSM's SRAM size */
 153         if (len > IWL49_MAX_BSM_SIZE)
 154                 return -EINVAL;
 155
 156         /* Tell bootstrap uCode where to find the "Initialize" uCode
 157          *   in host DRAM ... host DRAM physical address bits 35:4 for 4965.
 158          * NOTE:  iwl_init_alive_start() will replace these values,
 159          *        after the "initialize" uCode has run, to point to
 160          *        runtime/protocol instructions and backup data cache.
 161          */
 162         pinst = priv->ucode_init.p_addr >> 4;
 163         pdata = priv->ucode_init_data.p_addr >> 4;
 164         inst_len = priv->ucode_init.len;
 165         data_len = priv->ucode_init_data.len;
 166
 167         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 168         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 169         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
 170         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
 171
 172         /* Fill BSM memory with bootstrap instructions */
 173         for (reg_offset = BSM_SRAM_LOWER_BOUND;
 174              reg_offset < BSM_SRAM_LOWER_BOUND + len;
 175              reg_offset += sizeof(u32), image++)
 176                 _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
 177
 178         ret = iwl4965_verify_bsm(priv);
 179         if (ret)
 180                 return ret;
 181
 182         /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
 183         iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
 184         iwl_write_prph(priv, BSM_WR_MEM_DST_REG, IWL49_RTC_INST_LOWER_BOUND);
 185         iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
 186
 187         /* Load bootstrap code into instruction SRAM now,
 188          *   to prepare to load "initialize" uCode */
 189         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
 190
 191         /* Wait for load of bootstrap uCode to finish */
 192         for (i = 0; i < 100; i++) {
 193                 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
 194                 if (!(done & BSM_WR_CTRL_REG_BIT_START))
 195                         break;
 196                 udelay(10);
 197         }
 198         if (i < 100)
 199                 IWL_DEBUG_INFO(priv, "BSM write complete, poll %d iterations\n", i);
 200         else {
 201                 IWL_ERR(priv, "BSM write did not complete!\n");
 202                 return -EIO;
 203         }
 204
 205         /* Enable future boot loads whenever power management unit triggers it
 206          *   (e.g. when powering back up after power-save shutdown) */
 207         iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
 208
 209
 210         return 0;
 211 }
 212
 213 /**
 214  * iwl4965_set_ucode_ptrs - Set uCode address location
 215  *
 216  * Tell initialization uCode where to find runtime uCode.
 217  *
 218  * BSM registers initially contain pointers to initialization uCode.
 219  * We need to replace them to load runtime uCode inst and data,
 220  * and to save runtime data when powering down.
 221  */
 222 static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
 223 {
 224         dma_addr_t pinst;
 225         dma_addr_t pdata;
 226         int ret = 0;
 227
 228         /* bits 35:4 for 4965 */
 229         pinst = priv->ucode_code.p_addr >> 4;
 230         pdata = priv->ucode_data_backup.p_addr >> 4;
 231
 232         /* Tell bootstrap uCode where to find image to load */
 233         iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
 234         iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
 235         iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
 236                                  priv->ucode_data.len);
 237
 238         /* Inst byte count must be last to set up, bit 31 signals uCode
 239          *   that all new ptr/size info is in place */
 240         iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
 241                                  priv->ucode_code.len | BSM_DRAM_INST_LOAD);
 242         IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
 243
 244         return ret;
 245 }
 246
 247 /**
 248  * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
 249  *
 250  * Called after REPLY_ALIVE notification received from "initialize" uCode.
 251  *
 252  * The 4965 "initialize" ALIVE reply contains calibration data for:
 253  *   Voltage, temperature, and MIMO tx gain correction, now stored in priv
 254  *   (3945 does not contain this data).
 255  *
 256  * Tell "initialize" uCode to go ahead and load the runtime uCode.
 257 */
 258 static void iwl4965_init_alive_start(struct iwl_priv *priv)
 259 {
 260         /* Check alive response for "valid" sign from uCode */
 261         if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
 262                 /* We had an error bringing up the hardware, so take it
 263                  * all the way back down so we can try again */
 264                 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
 265                 goto restart;
 266         }
 267
 268         /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
 269          * This is a paranoid check, because we would not have gotten the
 270          * "initialize" alive if code weren't properly loaded.  */
 271         if (iwl_verify_ucode(priv)) {
 272                 /* Runtime instruction load was bad;
 273                  * take it all the way back down so we can try again */
 274                 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
 275                 goto restart;
 276         }
 277
 278         /* Calculate temperature */
 279         priv->temperature = iwl4965_hw_get_temperature(priv);
 280
 281         /* Send pointers to protocol/runtime uCode image ... init code will
 282          * load and launch runtime uCode, which will send us another "Alive"
 283          * notification. */
 284         IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
 285         if (iwl4965_set_ucode_ptrs(priv)) {
 286                 /* Runtime instruction load won't happen;
 287                  * take it all the way back down so we can try again */
 288                 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
 289                 goto restart;
 290         }
 291         return;
 292
 293 restart:
 294         queue_work(priv->workqueue, &priv->restart);
 295 }
 296
 297 static bool is_ht40_channel(__le32 rxon_flags)
 298 {
 299         int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
 300                                     >> RXON_FLG_CHANNEL_MODE_POS;
 301         return ((chan_mod == CHANNEL_MODE_PURE_40) ||
 302                   (chan_mod == CHANNEL_MODE_MIXED));
 303 }
 304
 305 /*
 306  * EEPROM handlers
 307  */
 308 static u16 iwl4965_eeprom_calib_version(struct iwl_priv *priv)
 309 {
 310         return iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
 311 }
 312
 313 /*
 314  * Activate/Deactivate Tx DMA/FIFO channels according tx fifos mask
 315  * must be called under priv->lock and mac access
 316  */
 317 static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
 318 {
 319         iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
 320 }
 321
 322 static int iwl4965_apm_init(struct iwl_priv *priv)
 323 {
 324         int ret = 0;
 325
 326         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 327                           CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
 328
 329         /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
 330         iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 331                           CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 332
 333         /* set "initialization complete" bit to move adapter
 334          * D0U* --> D0A* state */
 335         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 336
 337         /* wait for clock stabilization */
 338         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 339                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 340                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 341         if (ret < 0) {
 342                 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
 343                 goto out;
 344         }
 345
 346         /* enable DMA */
 347         iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 348                                                 APMG_CLK_VAL_BSM_CLK_RQT);
 349
 350         udelay(20);
 351
 352         /* disable L1-Active */
 353         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 354                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 355
 356 out:
 357         return ret;
 358 }
 359
 360
 361 static void iwl4965_nic_config(struct iwl_priv *priv)
 362 {
 363         unsigned long flags;
 364         u16 radio_cfg;
 365         u16 lctl;
 366
 367         spin_lock_irqsave(&priv->lock, flags);
 368
 369         lctl = iwl_pcie_link_ctl(priv);
 370
 371         /* HW bug W/A - negligible power consumption */
 372         /* L1-ASPM is enabled by BIOS */
 373         if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
 374                 /* L1-ASPM enabled: disable L0S  */
 375                 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 376         else
 377                 /* L1-ASPM disabled: enable L0S */
 378                 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
 379
 380         radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
 381
 382         /* write radio config values to register */
 383         if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
 384                 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 385                             EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
 386                             EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
 387                             EEPROM_RF_CFG_DASH_MSK(radio_cfg));
 388
 389         /* set CSR_HW_CONFIG_REG for uCode use */
 390         iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 391                     CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
 392                     CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
 393
 394         priv->calib_info = (struct iwl_eeprom_calib_info *)
 395                 iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
 396
 397         spin_unlock_irqrestore(&priv->lock, flags);
 398 }
 399
 400 static int iwl4965_apm_reset(struct iwl_priv *priv)
 401 {
 402         int ret = 0;
 403
 404         iwl_apm_stop_master(priv);
 405
 406
 407         iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
 408
 409         udelay(10);
 410
 411         /* FIXME: put here L1A -L0S w/a */
 412
 413         iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 414
 415         ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
 416                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 417                         CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 418         if (ret < 0)
 419                 goto out;
 420
 421         udelay(10);
 422
 423         /* Enable DMA and BSM Clock */
 424         iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
 425                                               APMG_CLK_VAL_BSM_CLK_RQT);
 426
 427         udelay(10);
 428
 429         /* disable L1A */
 430         iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 431                           APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 432
 433         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
 434         wake_up_interruptible(&priv->wait_command_queue);
 435
 436 out:
 437         return ret;
 438 }
 439
 440 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 441  * Called after every association, but this runs only once!
 442  *  ... once chain noise is calibrated the first time, it's good forever.  */
 443 static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
 444 {
 445         struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
 446
 447         if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
 448                 struct iwl_calib_diff_gain_cmd cmd;
 449
 450                 memset(&cmd, 0, sizeof(cmd));
 451                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 452                 cmd.diff_gain_a = 0;
 453                 cmd.diff_gain_b = 0;
 454                 cmd.diff_gain_c = 0;
 455                 if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 456                                  sizeof(cmd), &cmd))
 457                         IWL_ERR(priv,
 458                                 "Could not send REPLY_PHY_CALIBRATION_CMD\n");
 459                 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
 460                 IWL_DEBUG_CALIB(priv, "Run chain_noise_calibrate\n");
 461         }
 462 }
 463
 464 static void iwl4965_gain_computation(struct iwl_priv *priv,
 465                 u32 *average_noise,
 466                 u16 min_average_noise_antenna_i,
 467                 u32 min_average_noise,
 468                 u8 default_chain)
 469 {
 470         int i, ret;
 471         struct iwl_chain_noise_data *data = &priv->chain_noise_data;
 472
 473         data->delta_gain_code[min_average_noise_antenna_i] = 0;
 474
 475         for (i = default_chain; i < NUM_RX_CHAINS; i++) {
 476                 s32 delta_g = 0;
 477
 478                 if (!(data->disconn_array[i]) &&
 479                     (data->delta_gain_code[i] ==
 480                              CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
 481                         delta_g = average_noise[i] - min_average_noise;
 482                         data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
 483                         data->delta_gain_code[i] =
 484                                 min(data->delta_gain_code[i],
 485                                 (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
 486
 487                         data->delta_gain_code[i] =
 488                                 (data->delta_gain_code[i] | (1 << 2));
 489                 } else {
 490                         data->delta_gain_code[i] = 0;
 491                 }
 492         }
 493         IWL_DEBUG_CALIB(priv, "delta_gain_codes: a %d b %d c %d\n",
 494                      data->delta_gain_code[0],
 495                      data->delta_gain_code[1],
 496                      data->delta_gain_code[2]);
 497
 498         /* Differential gain gets sent to uCode only once */
 499         if (!data->radio_write) {
 500                 struct iwl_calib_diff_gain_cmd cmd;
 501                 data->radio_write = 1;
 502
 503                 memset(&cmd, 0, sizeof(cmd));
 504                 cmd.hdr.op_code = IWL_PHY_CALIBRATE_DIFF_GAIN_CMD;
 505                 cmd.diff_gain_a = data->delta_gain_code[0];
 506                 cmd.diff_gain_b = data->delta_gain_code[1];
 507                 cmd.diff_gain_c = data->delta_gain_code[2];
 508                 ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
 509                                       sizeof(cmd), &cmd);
 510                 if (ret)
 511                         IWL_DEBUG_CALIB(priv, "fail sending cmd "
 512                                      "REPLY_PHY_CALIBRATION_CMD \n");
 513
 514                 /* TODO we might want recalculate
 515                  * rx_chain in rxon cmd */
 516
 517                 /* Mark so we run this algo only once! */
 518                 data->state = IWL_CHAIN_NOISE_CALIBRATED;
 519         }
 520         data->chain_noise_a = 0;
 521         data->chain_noise_b = 0;
 522         data->chain_noise_c = 0;
 523         data->chain_signal_a = 0;
 524         data->chain_signal_b = 0;
 525         data->chain_signal_c = 0;
 526         data->beacon_count = 0;
 527 }
 528
 529 static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
 530                         __le32 *tx_flags)
 531 {
 532         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 533                 *tx_flags |= TX_CMD_FLG_RTS_MSK;
 534                 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
 535         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 536                 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 537                 *tx_flags |= TX_CMD_FLG_CTS_MSK;
 538         }
 539 }
 540
 541 static void iwl4965_bg_txpower_work(struct work_struct *work)
 542 {
 543         struct iwl_priv *priv = container_of(work, struct iwl_priv,
 544                         txpower_work);
 545
 546         /* If a scan happened to start before we got here
 547          * then just return; the statistics notification will
 548          * kick off another scheduled work to compensate for
 549          * any temperature delta we missed here. */
 550         if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
 551             test_bit(STATUS_SCANNING, &priv->status))
 552                 return;
 553
 554         mutex_lock(&priv->mutex);
 555
 556         /* Regardless of if we are associated, we must reconfigure the
 557          * TX power since frames can be sent on non-radar channels while
 558          * not associated */
 559         iwl4965_send_tx_power(priv);
 560
 561         /* Update last_temperature to keep is_calib_needed from running
 562          * when it isn't needed... */
 563         priv->last_temperature = priv->temperature;
 564
 565         mutex_unlock(&priv->mutex);
 566 }
 567
 568 /*
 569  * Acquire priv->lock before calling this function !
 570  */
 571 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
 572 {
 573         iwl_write_direct32(priv, HBUS_TARG_WRPTR,
 574                              (index & 0xff) | (txq_id << 8));
 575         iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
 576 }
 577
 578 /**
 579  * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
 580  * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
 581  * @scd_retry: (1) Indicates queue will be used in aggregation mode
 582  *
 583  * NOTE:  Acquire priv->lock before calling this function !
 584  */
 585 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
 586                                         struct iwl_tx_queue *txq,
 587                                         int tx_fifo_id, int scd_retry)
 588 {
 589         int txq_id = txq->q.id;
 590
 591         /* Find out whether to activate Tx queue */
 592         int active = test_bit(txq_id, &priv->txq_ctx_active_msk) ? 1 : 0;
 593
 594         /* Set up and activate */
 595         iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
 596                          (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
 597                          (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
 598                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
 599                          (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
 600                          IWL49_SCD_QUEUE_STTS_REG_MSK);
 601
 602         txq->sched_retry = scd_retry;
 603
 604         IWL_DEBUG_INFO(priv, "%s %s Queue %d on AC %d\n",
 605                        active ? "Activate" : "Deactivate",
 606                        scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
 607 }
 608
 609 static const u16 default_queue_to_tx_fifo[] = {
 610         IWL_TX_FIFO_AC3,
 611         IWL_TX_FIFO_AC2,
 612         IWL_TX_FIFO_AC1,
 613         IWL_TX_FIFO_AC0,
 614         IWL49_CMD_FIFO_NUM,
 615         IWL_TX_FIFO_HCCA_1,
 616         IWL_TX_FIFO_HCCA_2
 617 };
 618
 619 static int iwl4965_alive_notify(struct iwl_priv *priv)
 620 {
 621         u32 a;
 622         unsigned long flags;
 623         int i, chan;
 624         u32 reg_val;
 625
 626         spin_lock_irqsave(&priv->lock, flags);
 627
 628         /* Clear 4965's internal Tx Scheduler data base */
 629         priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
 630         a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
 631         for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
 632                 iwl_write_targ_mem(priv, a, 0);
 633         for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
 634                 iwl_write_targ_mem(priv, a, 0);
 635         for (; a < priv->scd_base_addr +
 636                IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
 637                 iwl_write_targ_mem(priv, a, 0);
 638
 639         /* Tel 4965 where to find Tx byte count tables */
 640         iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
 641                         priv->scd_bc_tbls.dma >> 10);
 642
 643         /* Enable DMA channel */
 644         for (chan = 0; chan < FH49_TCSR_CHNL_NUM ; chan++)
 645                 iwl_write_direct32(priv, FH_TCSR_CHNL_TX_CONFIG_REG(chan),
 646                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
 647                                 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE);
 648
 649         /* Update FH chicken bits */
 650         reg_val = iwl_read_direct32(priv, FH_TX_CHICKEN_BITS_REG);
 651         iwl_write_direct32(priv, FH_TX_CHICKEN_BITS_REG,
 652                            reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN);
 653
 654         /* Disable chain mode for all queues */
 655         iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
 656
 657         /* Initialize each Tx queue (including the command queue) */
 658         for (i = 0; i < priv->hw_params.max_txq_num; i++) {
 659
 660                 /* TFD circular buffer read/write indexes */
 661                 iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
 662                 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
 663
 664                 /* Max Tx Window size for Scheduler-ACK mode */
 665                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 666                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
 667                                 (SCD_WIN_SIZE <<
 668                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
 669                                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
 670
 671                 /* Frame limit */
 672                 iwl_write_targ_mem(priv, priv->scd_base_addr +
 673                                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
 674                                 sizeof(u32),
 675                                 (SCD_FRAME_LIMIT <<
 676                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
 677                                 IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
 678
 679         }
 680         iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
 681                                  (1 << priv->hw_params.max_txq_num) - 1);
 682
 683         /* Activate all Tx DMA/FIFO channels */
 684         priv->cfg->ops->lib->txq_set_sched(priv, IWL_MASK(0, 6));
 685
 686         iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
 687
 688         /* Map each Tx/cmd queue to its corresponding fifo */
 689         for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
 690                 int ac = default_queue_to_tx_fifo[i];
 691                 iwl_txq_ctx_activate(priv, i);
 692                 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
 693         }
 694
 695         spin_unlock_irqrestore(&priv->lock, flags);
 696
 697         return 0;
 698 }
 699
 700 static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
 701         .min_nrg_cck = 97,
 702         .max_nrg_cck = 0, /* not used, set to 0 */
 703
 704         .auto_corr_min_ofdm = 85,
 705         .auto_corr_min_ofdm_mrc = 170,
 706         .auto_corr_min_ofdm_x1 = 105,
 707         .auto_corr_min_ofdm_mrc_x1 = 220,
 708
 709         .auto_corr_max_ofdm = 120,
 710         .auto_corr_max_ofdm_mrc = 210,
 711         .auto_corr_max_ofdm_x1 = 140,
 712         .auto_corr_max_ofdm_mrc_x1 = 270,
 713
 714         .auto_corr_min_cck = 125,
 715         .auto_corr_max_cck = 200,
 716         .auto_corr_min_cck_mrc = 200,
 717         .auto_corr_max_cck_mrc = 400,
 718
 719         .nrg_th_cck = 100,
 720         .nrg_th_ofdm = 100,
 721 };
 722
 723 static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
 724 {
 725         /* want Kelvin */
 726         priv->hw_params.ct_kill_threshold =
 727                 CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
 728 }
 729
 730 /**
 731  * iwl4965_hw_set_hw_params
 732  *
 733  * Called when initializing driver
 734  */
 735 static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
 736 {
 737
 738         if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
 739             (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
 740                 IWL_ERR(priv,
 741                         "invalid queues_num, should be between %d and %d\n",
 742                         IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
 743                 return -EINVAL;
 744         }
 745
 746         priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
 747         priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
 748         priv->hw_params.scd_bc_tbls_size =
 749                         IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl);
 750         priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
 751         priv->hw_params.max_stations = IWL4965_STATION_COUNT;
 752         priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
 753         priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
 754         priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
 755         priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
 756         priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
 757
 758         priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
 759
 760         priv->hw_params.tx_chains_num = 2;
 761         priv->hw_params.rx_chains_num = 2;
 762         priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
 763         priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
 764         if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
 765                 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
 766
 767         priv->hw_params.sens = &iwl4965_sensitivity;
 768
 769         return 0;
 770 }
 771
 772 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
 773 {
 774         s32 sign = 1;
 775
 776         if (num < 0) {
 777                 sign = -sign;
 778                 num = -num;
 779         }
 780         if (denom < 0) {
 781                 sign = -sign;
 782                 denom = -denom;
 783         }
 784         *res = 1;
 785         *res = ((num * 2 + denom) / (denom * 2)) * sign;
 786
 787         return 1;
 788 }
 789
 790 /**
 791  * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
 792  *
 793  * Determines power supply voltage compensation for txpower calculations.
 794  * Returns number of 1/2-dB steps to subtract from gain table index,
 795  * to compensate for difference between power supply voltage during
 796  * factory measurements, vs. current power supply voltage.
 797  *
 798  * Voltage indication is higher for lower voltage.
 799  * Lower voltage requires more gain (lower gain table index).
 800  */
 801 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
 802                                             s32 current_voltage)
 803 {
 804         s32 comp = 0;
 805
 806         if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
 807             (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
 808                 return 0;
 809
 810         iwl4965_math_div_round(current_voltage - eeprom_voltage,
 811                                TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
 812
 813         if (current_voltage > eeprom_voltage)
 814                 comp *= 2;
 815         if ((comp < -2) || (comp > 2))
 816                 comp = 0;
 817
 818         return comp;
 819 }
 820
 821 static s32 iwl4965_get_tx_atten_grp(u16 channel)
 822 {
 823         if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
 824             channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
 825                 return CALIB_CH_GROUP_5;
 826
 827         if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
 828             channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
 829                 return CALIB_CH_GROUP_1;
 830
 831         if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
 832             channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
 833                 return CALIB_CH_GROUP_2;
 834
 835         if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
 836             channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
 837                 return CALIB_CH_GROUP_3;
 838
 839         if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
 840             channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
 841                 return CALIB_CH_GROUP_4;
 842
 843         return -1;
 844 }
 845
 846 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
 847 {
 848         s32 b = -1;
 849
 850         for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
 851                 if (priv->calib_info->band_info[b].ch_from == 0)
 852                         continue;
 853
 854                 if ((channel >= priv->calib_info->band_info[b].ch_from)
 855                     && (channel <= priv->calib_info->band_info[b].ch_to))
 856                         break;
 857         }
 858
 859         return b;
 860 }
 861
 862 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
 863 {
 864         s32 val;
 865
 866         if (x2 == x1)
 867                 return y1;
 868         else {
 869                 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
 870                 return val + y2;
 871         }
 872 }
 873
 874 /**
 875  * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
 876  *
 877  * Interpolates factory measurements from the two sample channels within a
 878  * sub-band, to apply to channel of interest.  Interpolation is proportional to
 879  * differences in channel frequencies, which is proportional to differences
 880  * in channel number.
 881  */
 882 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
 883                                     struct iwl_eeprom_calib_ch_info *chan_info)
 884 {
 885         s32 s = -1;
 886         u32 c;
 887         u32 m;
 888         const struct iwl_eeprom_calib_measure *m1;
 889         const struct iwl_eeprom_calib_measure *m2;
 890         struct iwl_eeprom_calib_measure *omeas;
 891         u32 ch_i1;
 892         u32 ch_i2;
 893
 894         s = iwl4965_get_sub_band(priv, channel);
 895         if (s >= EEPROM_TX_POWER_BANDS) {
 896                 IWL_ERR(priv, "Tx Power can not find channel %d\n", channel);
 897                 return -1;
 898         }
 899
 900         ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
 901         ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
 902         chan_info->ch_num = (u8) channel;
 903
 904         IWL_DEBUG_TXPOWER(priv, "channel %d subband %d factory cal ch %d & %d\n",
 905                           channel, s, ch_i1, ch_i2);
 906
 907         for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
 908                 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
 909                         m1 = &(priv->calib_info->band_info[s].ch1.
 910                                measurements[c][m]);
 911                         m2 = &(priv->calib_info->band_info[s].ch2.
 912                                measurements[c][m]);
 913                         omeas = &(chan_info->measurements[c][m]);
 914
 915                         omeas->actual_pow =
 916                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 917                                                            m1->actual_pow,
 918                                                            ch_i2,
 919                                                            m2->actual_pow);
 920                         omeas->gain_idx =
 921                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 922                                                            m1->gain_idx, ch_i2,
 923                                                            m2->gain_idx);
 924                         omeas->temperature =
 925                             (u8) iwl4965_interpolate_value(channel, ch_i1,
 926                                                            m1->temperature,
 927                                                            ch_i2,
 928                                                            m2->temperature);
 929                         omeas->pa_det =
 930                             (s8) iwl4965_interpolate_value(channel, ch_i1,
 931                                                            m1->pa_det, ch_i2,
 932                                                            m2->pa_det);
 933
 934                         IWL_DEBUG_TXPOWER(priv,
 935                                 "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
 936                                 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
 937                         IWL_DEBUG_TXPOWER(priv,
 938                                 "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
 939                                 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
 940                         IWL_DEBUG_TXPOWER(priv,
 941                                 "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
 942                                 m1->pa_det, m2->pa_det, omeas->pa_det);
 943                         IWL_DEBUG_TXPOWER(priv,
 944                                 "chain %d meas %d  T1=%d  T2=%d  T=%d\n", c, m,
 945                                 m1->temperature, m2->temperature,
 946                                 omeas->temperature);
 947                 }
 948         }
 949
 950         return 0;
 951 }
 952
 953 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
 954  * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
 955 static s32 back_off_table[] = {
 956         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
 957         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
 958         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
 959         10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
 960         10                      /* CCK */
 961 };
 962
 963 /* Thermal compensation values for txpower for various frequency ranges ...
 964  *   ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
 965 static struct iwl4965_txpower_comp_entry {
 966         s32 degrees_per_05db_a;
 967         s32 degrees_per_05db_a_denom;
 968 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
 969         {9, 2},                 /* group 0 5.2, ch  34-43 */
 970         {4, 1},                 /* group 1 5.2, ch  44-70 */
 971         {4, 1},                 /* group 2 5.2, ch  71-124 */
 972         {4, 1},                 /* group 3 5.2, ch 125-200 */
 973         {3, 1}                  /* group 4 2.4, ch   all */
 974 };
 975
 976 static s32 get_min_power_index(s32 rate_power_index, u32 band)
 977 {
 978         if (!band) {
 979                 if ((rate_power_index & 7) <= 4)
 980                         return MIN_TX_GAIN_INDEX_52GHZ_EXT;
 981         }
 982         return MIN_TX_GAIN_INDEX;
 983 }
 984
 985 struct gain_entry {
 986         u8 dsp;
 987         u8 radio;
 988 };
 989
 990 static const struct gain_entry gain_table[2][108] = {
 991         /* 5.2GHz power gain index table */
 992         {
 993          {123, 0x3F},           /* highest txpower */
 994          {117, 0x3F},
 995          {110, 0x3F},
 996          {104, 0x3F},
 997          {98, 0x3F},
 998          {110, 0x3E},
 999          {104, 0x3E},
1000          {98, 0x3E},
1001          {110, 0x3D},
1002          {104, 0x3D},
1003          {98, 0x3D},
1004          {110, 0x3C},
1005          {104, 0x3C},
1006          {98, 0x3C},
1007          {110, 0x3B},
1008          {104, 0x3B},
1009          {98, 0x3B},
1010          {110, 0x3A},
1011          {104, 0x3A},
1012          {98, 0x3A},
1013          {110, 0x39},
1014          {104, 0x39},
1015          {98, 0x39},
1016          {110, 0x38},
1017          {104, 0x38},
1018          {98, 0x38},
1019          {110, 0x37},
1020          {104, 0x37},
1021          {98, 0x37},
1022          {110, 0x36},
1023          {104, 0x36},
1024          {98, 0x36},
1025          {110, 0x35},
1026          {104, 0x35},
1027          {98, 0x35},
1028          {110, 0x34},
1029          {104, 0x34},
1030          {98, 0x34},
1031          {110, 0x33},
1032          {104, 0x33},
1033          {98, 0x33},
1034          {110, 0x32},
1035          {104, 0x32},
1036          {98, 0x32},
1037          {110, 0x31},
1038          {104, 0x31},
1039          {98, 0x31},
1040          {110, 0x30},
1041          {104, 0x30},
1042          {98, 0x30},
1043          {110, 0x25},
1044          {104, 0x25},
1045          {98, 0x25},
1046          {110, 0x24},
1047          {104, 0x24},
1048          {98, 0x24},
1049          {110, 0x23},
1050          {104, 0x23},
1051          {98, 0x23},
1052          {110, 0x22},
1053          {104, 0x18},
1054          {98, 0x18},
1055          {110, 0x17},
1056          {104, 0x17},
1057          {98, 0x17},
1058          {110, 0x16},
1059          {104, 0x16},
1060          {98, 0x16},
1061          {110, 0x15},
1062          {104, 0x15},
1063          {98, 0x15},
1064          {110, 0x14},
1065          {104, 0x14},
1066          {98, 0x14},
1067          {110, 0x13},
1068          {104, 0x13},
1069          {98, 0x13},
1070          {110, 0x12},
1071          {104, 0x08},
1072          {98, 0x08},
1073          {110, 0x07},
1074          {104, 0x07},
1075          {98, 0x07},
1076          {110, 0x06},
1077          {104, 0x06},
1078          {98, 0x06},
1079          {110, 0x05},
1080          {104, 0x05},
1081          {98, 0x05},
1082          {110, 0x04},
1083          {104, 0x04},
1084          {98, 0x04},
1085          {110, 0x03},
1086          {104, 0x03},
1087          {98, 0x03},
1088          {110, 0x02},
1089          {104, 0x02},
1090          {98, 0x02},
1091          {110, 0x01},
1092          {104, 0x01},
1093          {98, 0x01},
1094          {110, 0x00},
1095          {104, 0x00},
1096          {98, 0x00},
1097          {93, 0x00},
1098          {88, 0x00},
1099          {83, 0x00},
1100          {78, 0x00},
1101          },
1102         /* 2.4GHz power gain index table */
1103         {
1104          {110, 0x3f},           /* highest txpower */
1105          {104, 0x3f},
1106          {98, 0x3f},
1107          {110, 0x3e},
1108          {104, 0x3e},
1109          {98, 0x3e},
1110          {110, 0x3d},
1111          {104, 0x3d},
1112          {98, 0x3d},
1113          {110, 0x3c},
1114          {104, 0x3c},
1115          {98, 0x3c},
1116          {110, 0x3b},
1117          {104, 0x3b},
1118          {98, 0x3b},
1119          {110, 0x3a},
1120          {104, 0x3a},
1121          {98, 0x3a},
1122          {110, 0x39},
1123          {104, 0x39},
1124          {98, 0x39},
1125          {110, 0x38},
1126          {104, 0x38},
1127          {98, 0x38},
1128          {110, 0x37},
1129          {104, 0x37},
1130          {98, 0x37},
1131          {110, 0x36},
1132          {104, 0x36},
1133          {98, 0x36},
1134          {110, 0x35},
1135          {104, 0x35},
1136          {98, 0x35},
1137          {110, 0x34},
1138          {104, 0x34},
1139          {98, 0x34},
1140          {110, 0x33},
1141          {104, 0x33},
1142          {98, 0x33},
1143          {110, 0x32},
1144          {104, 0x32},
1145          {98, 0x32},
1146          {110, 0x31},
1147          {104, 0x31},
1148          {98, 0x31},
1149          {110, 0x30},
1150          {104, 0x30},
1151          {98, 0x30},
1152          {110, 0x6},
1153          {104, 0x6},
1154          {98, 0x6},
1155          {110, 0x5},
1156          {104, 0x5},
1157          {98, 0x5},
1158          {110, 0x4},
1159          {104, 0x4},
1160          {98, 0x4},
1161          {110, 0x3},
1162          {104, 0x3},
1163          {98, 0x3},
1164          {110, 0x2},
1165          {104, 0x2},
1166          {98, 0x2},
1167          {110, 0x1},
1168          {104, 0x1},
1169          {98, 0x1},
1170          {110, 0x0},
1171          {104, 0x0},
1172          {98, 0x0},
1173          {97, 0},
1174          {96, 0},
1175          {95, 0},
1176          {94, 0},
1177          {93, 0},
1178          {92, 0},
1179          {91, 0},
1180          {90, 0},
1181          {89, 0},
1182          {88, 0},
1183          {87, 0},
1184          {86, 0},
1185          {85, 0},
1186          {84, 0},
1187          {83, 0},
1188          {82, 0},
1189          {81, 0},
1190          {80, 0},
1191          {79, 0},
1192          {78, 0},
1193          {77, 0},
1194          {76, 0},
1195          {75, 0},
1196          {74, 0},
1197          {73, 0},
1198          {72, 0},
1199          {71, 0},
1200          {70, 0},
1201          {69, 0},
1202          {68, 0},
1203          {67, 0},
1204          {66, 0},
1205          {65, 0},
1206          {64, 0},
1207          {63, 0},
1208          {62, 0},
1209          {61, 0},
1210          {60, 0},
1211          {59, 0},
1212          }
1213 };
1214
1215 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1216                                     u8 is_ht40, u8 ctrl_chan_high,
1217                                     struct iwl4965_tx_power_db *tx_power_tbl)
1218 {
1219         u8 saturation_power;
1220         s32 target_power;
1221         s32 user_target_power;
1222         s32 power_limit;
1223         s32 current_temp;
1224         s32 reg_limit;
1225         s32 current_regulatory;
1226         s32 txatten_grp = CALIB_CH_GROUP_MAX;
1227         int i;
1228         int c;
1229         const struct iwl_channel_info *ch_info = NULL;
1230         struct iwl_eeprom_calib_ch_info ch_eeprom_info;
1231         const struct iwl_eeprom_calib_measure *measurement;
1232         s16 voltage;
1233         s32 init_voltage;
1234         s32 voltage_compensation;
1235         s32 degrees_per_05db_num;
1236         s32 degrees_per_05db_denom;
1237         s32 factory_temp;
1238         s32 temperature_comp[2];
1239         s32 factory_gain_index[2];
1240         s32 factory_actual_pwr[2];
1241         s32 power_index;
1242
1243         /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
1244          *   are used for indexing into txpower table) */
1245         user_target_power = 2 * priv->tx_power_user_lmt;
1246
1247         /* Get current (RXON) channel, band, width */
1248         IWL_DEBUG_TXPOWER(priv, "chan %d band %d is_ht40 %d\n", channel, band,
1249                           is_ht40);
1250
1251         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1252
1253         if (!is_channel_valid(ch_info))
1254                 return -EINVAL;
1255
1256         /* get txatten group, used to select 1) thermal txpower adjustment
1257          *   and 2) mimo txpower balance between Tx chains. */
1258         txatten_grp = iwl4965_get_tx_atten_grp(channel);
1259         if (txatten_grp < 0) {
1260                 IWL_ERR(priv, "Can't find txatten group for channel %d.\n",
1261                           channel);
1262                 return -EINVAL;
1263         }
1264
1265         IWL_DEBUG_TXPOWER(priv, "channel %d belongs to txatten group %d\n",
1266                           channel, txatten_grp);
1267
1268         if (is_ht40) {
1269                 if (ctrl_chan_high)
1270                         channel -= 2;
1271                 else
1272                         channel += 2;
1273         }
1274
1275         /* hardware txpower limits ...
1276          * saturation (clipping distortion) txpowers are in half-dBm */
1277         if (band)
1278                 saturation_power = priv->calib_info->saturation_power24;
1279         else
1280                 saturation_power = priv->calib_info->saturation_power52;
1281
1282         if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
1283             saturation_power > IWL_TX_POWER_SATURATION_MAX) {
1284                 if (band)
1285                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
1286                 else
1287                         saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
1288         }
1289
1290         /* regulatory txpower limits ... reg_limit values are in half-dBm,
1291          *   max_power_avg values are in dBm, convert * 2 */
1292         if (is_ht40)
1293                 reg_limit = ch_info->ht40_max_power_avg * 2;
1294         else
1295                 reg_limit = ch_info->max_power_avg * 2;
1296
1297         if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
1298             (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
1299                 if (band)
1300                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
1301                 else
1302                         reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
1303         }
1304
1305         /* Interpolate txpower calibration values for this channel,
1306          *   based on factory calibration tests on spaced channels. */
1307         iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1308
1309         /* calculate tx gain adjustment based on power supply voltage */
1310         voltage = priv->calib_info->voltage;
1311         init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1312         voltage_compensation =
1313             iwl4965_get_voltage_compensation(voltage, init_voltage);
1314
1315         IWL_DEBUG_TXPOWER(priv, "curr volt %d eeprom volt %d volt comp %d\n",
1316                           init_voltage,
1317                           voltage, voltage_compensation);
1318
1319         /* get current temperature (Celsius) */
1320         current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
1321         current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
1322         current_temp = KELVIN_TO_CELSIUS(current_temp);
1323
1324         /* select thermal txpower adjustment params, based on channel group
1325          *   (same frequency group used for mimo txatten adjustment) */
1326         degrees_per_05db_num =
1327             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
1328         degrees_per_05db_denom =
1329             tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
1330
1331         /* get per-chain txpower values from factory measurements */
1332         for (c = 0; c < 2; c++) {
1333                 measurement = &ch_eeprom_info.measurements[c][1];
1334
1335                 /* txgain adjustment (in half-dB steps) based on difference
1336                  *   between factory and current temperature */
1337                 factory_temp = measurement->temperature;
1338                 iwl4965_math_div_round((current_temp - factory_temp) *
1339                                        degrees_per_05db_denom,
1340                                        degrees_per_05db_num,
1341                                        &temperature_comp[c]);
1342
1343                 factory_gain_index[c] = measurement->gain_idx;
1344                 factory_actual_pwr[c] = measurement->actual_pow;
1345
1346                 IWL_DEBUG_TXPOWER(priv, "chain = %d\n", c);
1347                 IWL_DEBUG_TXPOWER(priv, "fctry tmp %d, "
1348                                   "curr tmp %d, comp %d steps\n",
1349                                   factory_temp, current_temp,
1350                                   temperature_comp[c]);
1351
1352                 IWL_DEBUG_TXPOWER(priv, "fctry idx %d, fctry pwr %d\n",
1353                                   factory_gain_index[c],
1354                                   factory_actual_pwr[c]);
1355         }
1356
1357         /* for each of 33 bit-rates (including 1 for CCK) */
1358         for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
1359                 u8 is_mimo_rate;
1360                 union iwl4965_tx_power_dual_stream tx_power;
1361
1362                 /* for mimo, reduce each chain's txpower by half
1363                  * (3dB, 6 steps), so total output power is regulatory
1364                  * compliant. */
1365                 if (i & 0x8) {
1366                         current_regulatory = reg_limit -
1367                             IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
1368                         is_mimo_rate = 1;
1369                 } else {
1370                         current_regulatory = reg_limit;
1371                         is_mimo_rate = 0;
1372                 }
1373
1374                 /* find txpower limit, either hardware or regulatory */
1375                 power_limit = saturation_power - back_off_table[i];
1376                 if (power_limit > current_regulatory)
1377                         power_limit = current_regulatory;
1378
1379                 /* reduce user's txpower request if necessary
1380                  * for this rate on this channel */
1381                 target_power = user_target_power;
1382                 if (target_power > power_limit)
1383                         target_power = power_limit;
1384
1385                 IWL_DEBUG_TXPOWER(priv, "rate %d sat %d reg %d usr %d tgt %d\n",
1386                                   i, saturation_power - back_off_table[i],
1387                                   current_regulatory, user_target_power,
1388                                   target_power);
1389
1390                 /* for each of 2 Tx chains (radio transmitters) */
1391                 for (c = 0; c < 2; c++) {
1392                         s32 atten_value;
1393
1394                         if (is_mimo_rate)
1395                                 atten_value =
1396                                     (s32)le32_to_cpu(priv->card_alive_init.
1397                                     tx_atten[txatten_grp][c]);
1398                         else
1399                                 atten_value = 0;
1400
1401                         /* calculate index; higher index means lower txpower */
1402                         power_index = (u8) (factory_gain_index[c] -
1403                                             (target_power -
1404                                              factory_actual_pwr[c]) -
1405                                             temperature_comp[c] -
1406                                             voltage_compensation +
1407                                             atten_value);
1408
1409 /*                      IWL_DEBUG_TXPOWER(priv, "calculated txpower index %d\n",
1410                                                 power_index); */
1411
1412                         if (power_index < get_min_power_index(i, band))
1413                                 power_index = get_min_power_index(i, band);
1414
1415                         /* adjust 5 GHz index to support negative indexes */
1416                         if (!band)
1417                                 power_index += 9;
1418
1419                         /* CCK, rate 32, reduce txpower for CCK */
1420                         if (i == POWER_TABLE_CCK_ENTRY)
1421                                 power_index +=
1422                                     IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
1423
1424                         /* stay within the table! */
1425                         if (power_index > 107) {
1426                                 IWL_WARN(priv, "txpower index %d > 107\n",
1427                                             power_index);
1428                                 power_index = 107;
1429                         }
1430                         if (power_index < 0) {
1431                                 IWL_WARN(priv, "txpower index %d < 0\n",
1432                                             power_index);
1433                                 power_index = 0;
1434                         }
1435
1436                         /* fill txpower command for this rate/chain */
1437                         tx_power.s.radio_tx_gain[c] =
1438                                 gain_table[band][power_index].radio;
1439                         tx_power.s.dsp_predis_atten[c] =
1440                                 gain_table[band][power_index].dsp;
1441
1442                         IWL_DEBUG_TXPOWER(priv, "chain %d mimo %d index %d "
1443                                           "gain 0x%02x dsp %d\n",
1444                                           c, atten_value, power_index,
1445                                         tx_power.s.radio_tx_gain[c],
1446                                         tx_power.s.dsp_predis_atten[c]);
1447                 } /* for each chain */
1448
1449                 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
1450
1451         } /* for each rate */
1452
1453         return 0;
1454 }
1455
1456 /**
1457  * iwl4965_send_tx_power - Configure the TXPOWER level user limit
1458  *
1459  * Uses the active RXON for channel, band, and characteristics (ht40, high)
1460  * The power limit is taken from priv->tx_power_user_lmt.
1461  */
1462 static int iwl4965_send_tx_power(struct iwl_priv *priv)
1463 {
1464         struct iwl4965_txpowertable_cmd cmd = { 0 };
1465         int ret;
1466         u8 band = 0;
1467         bool is_ht40 = false;
1468         u8 ctrl_chan_high = 0;
1469
1470         if (test_bit(STATUS_SCANNING, &priv->status)) {
1471                 /* If this gets hit a lot, switch it to a BUG() and catch
1472                  * the stack trace to find out who is calling this during
1473                  * a scan. */
1474                 IWL_WARN(priv, "TX Power requested while scanning!\n");
1475                 return -EAGAIN;
1476         }
1477
1478         band = priv->band == IEEE80211_BAND_2GHZ;
1479
1480         is_ht40 =  is_ht40_channel(priv->active_rxon.flags);
1481
1482         if (is_ht40 &&
1483             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1484                 ctrl_chan_high = 1;
1485
1486         cmd.band = band;
1487         cmd.channel = priv->active_rxon.channel;
1488
1489         ret = iwl4965_fill_txpower_tbl(priv, band,
1490                                 le16_to_cpu(priv->active_rxon.channel),
1491                                 is_ht40, ctrl_chan_high, &cmd.tx_power);
1492         if (ret)
1493                 goto out;
1494
1495         ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
1496
1497 out:
1498         return ret;
1499 }
1500
1501 static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1502 {
1503         int ret = 0;
1504         struct iwl4965_rxon_assoc_cmd rxon_assoc;
1505         const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
1506         const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
1507
1508         if ((rxon1->flags == rxon2->flags) &&
1509             (rxon1->filter_flags == rxon2->filter_flags) &&
1510             (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
1511             (rxon1->ofdm_ht_single_stream_basic_rates ==
1512              rxon2->ofdm_ht_single_stream_basic_rates) &&
1513             (rxon1->ofdm_ht_dual_stream_basic_rates ==
1514              rxon2->ofdm_ht_dual_stream_basic_rates) &&
1515             (rxon1->rx_chain == rxon2->rx_chain) &&
1516             (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
1517                 IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC.  Not resending.\n");
1518                 return 0;
1519         }
1520
1521         rxon_assoc.flags = priv->staging_rxon.flags;
1522         rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
1523         rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
1524         rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
1525         rxon_assoc.reserved = 0;
1526         rxon_assoc.ofdm_ht_single_stream_basic_rates =
1527             priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
1528         rxon_assoc.ofdm_ht_dual_stream_basic_rates =
1529             priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
1530         rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
1531
1532         ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
1533                                      sizeof(rxon_assoc), &rxon_assoc, NULL);
1534         if (ret)
1535                 return ret;
1536
1537         return ret;
1538 }
1539
1540 #ifdef IEEE80211_CONF_CHANNEL_SWITCH
1541 static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1542 {
1543         int rc;
1544         u8 band = 0;
1545         bool is_ht40 = false;
1546         u8 ctrl_chan_high = 0;
1547         struct iwl4965_channel_switch_cmd cmd = { 0 };
1548         const struct iwl_channel_info *ch_info;
1549
1550         band = priv->band == IEEE80211_BAND_2GHZ;
1551
1552         ch_info = iwl_get_channel_info(priv, priv->band, channel);
1553
1554         is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1555
1556         if (is_ht40 &&
1557             (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1558                 ctrl_chan_high = 1;
1559
1560         cmd.band = band;
1561         cmd.expect_beacon = 0;
1562         cmd.channel = cpu_to_le16(channel);
1563         cmd.rxon_flags = priv->active_rxon.flags;
1564         cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
1565         cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1566         if (ch_info)
1567                 cmd.expect_beacon = is_channel_radar(ch_info);
1568         else
1569                 cmd.expect_beacon = 1;
1570
1571         rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1572                                       ctrl_chan_high, &cmd.tx_power);
1573         if (rc) {
1574                 IWL_DEBUG_11H(priv, "error:%d  fill txpower_tbl\n", rc);
1575                 return rc;
1576         }
1577
1578         rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1579         return rc;
1580 }
1581 #endif
1582
1583 /**
1584  * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
1585  */
1586 static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
1587                                             struct iwl_tx_queue *txq,
1588                                             u16 byte_cnt)
1589 {
1590         struct iwl4965_scd_bc_tbl *scd_bc_tbl = priv->scd_bc_tbls.addr;
1591         int txq_id = txq->q.id;
1592         int write_ptr = txq->q.write_ptr;
1593         int len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
1594         __le16 bc_ent;
1595
1596         WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
1597
1598         bc_ent = cpu_to_le16(len & 0xFFF);
1599         /* Set up byte count within first 256 entries */
1600         scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
1601
1602         /* If within first 64 entries, duplicate at end */
1603         if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
1604                 scd_bc_tbl[txq_id].
1605                         tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
1606 }
1607
1608 /**
1609  * sign_extend - Sign extend a value using specified bit as sign-bit
1610  *
1611  * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
1612  * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
1613  *
1614  * @param oper value to sign extend
1615  * @param index 0 based bit index (0<=index<32) to sign bit
1616  */
1617 static s32 sign_extend(u32 oper, int index)
1618 {
1619         u8 shift = 31 - index;
1620
1621         return (s32)(oper << shift) >> shift;
1622 }
1623
1624 /**
1625  * iwl4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
1626  * @statistics: Provides the temperature reading from the uCode
1627  *
1628  * A return of <0 indicates bogus data in the statistics
1629  */
1630 static int iwl4965_hw_get_temperature(struct iwl_priv *priv)
1631 {
1632         s32 temperature;
1633         s32 vt;
1634         s32 R1, R2, R3;
1635         u32 R4;
1636
1637         if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
1638                 (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
1639                 IWL_DEBUG_TEMP(priv, "Running HT40 temperature calibration\n");
1640                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
1641                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
1642                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
1643                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
1644         } else {
1645                 IWL_DEBUG_TEMP(priv, "Running temperature calibration\n");
1646                 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
1647                 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
1648                 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
1649                 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
1650         }
1651
1652         /*
1653          * Temperature is only 23 bits, so sign extend out to 32.
1654          *
1655          * NOTE If we haven't received a statistics notification yet
1656          * with an updated temperature, use R4 provided to us in the
1657          * "initialize" ALIVE response.
1658          */
1659         if (!test_bit(STATUS_TEMPERATURE, &priv->status))
1660                 vt = sign_extend(R4, 23);
1661         else
1662                 vt = sign_extend(
1663                         le32_to_cpu(priv->statistics.general.temperature), 23);
1664
1665         IWL_DEBUG_TEMP(priv, "Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
1666
1667         if (R3 == R1) {
1668                 IWL_ERR(priv, "Calibration conflict R1 == R3\n");
1669                 return -1;
1670         }
1671
1672         /* Calculate temperature in degrees Kelvin, adjust by 97%.
1673          * Add offset to center the adjustment around 0 degrees Centigrade. */
1674         temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
1675         temperature /= (R3 - R1);
1676         temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
1677
1678         IWL_DEBUG_TEMP(priv, "Calibrated temperature: %dK, %dC\n",
1679                         temperature, KELVIN_TO_CELSIUS(temperature));
1680
1681         return temperature;
1682 }
1683
1684 /* Adjust Txpower only if temperature variance is greater than threshold. */
1685 #define IWL_TEMPERATURE_THRESHOLD   3
1686
1687 /**
1688  * iwl4965_is_temp_calib_needed - determines if new calibration is needed
1689  *
1690  * If the temperature changed has changed sufficiently, then a recalibration
1691  * is needed.
1692  *
1693  * Assumes caller will replace priv->last_temperature once calibration
1694  * executed.
1695  */
1696 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
1697 {
1698         int temp_diff;
1699
1700         if (!test_bit(STATUS_STATISTICS, &priv->status)) {
1701                 IWL_DEBUG_TEMP(priv, "Temperature not updated -- no statistics.\n");
1702                 return 0;
1703         }
1704
1705         temp_diff = priv->temperature - priv->last_temperature;
1706
1707         /* get absolute value */
1708         if (temp_diff < 0) {
1709                 IWL_DEBUG_POWER(priv, "Getting cooler, delta %d, \n", temp_diff);
1710                 temp_diff = -temp_diff;
1711         } else if (temp_diff == 0)
1712                 IWL_DEBUG_POWER(priv, "Same temp, \n");
1713         else
1714                 IWL_DEBUG_POWER(priv, "Getting warmer, delta %d, \n", temp_diff);
1715
1716         if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
1717                 IWL_DEBUG_POWER(priv, "Thermal txpower calib not needed\n");
1718                 return 0;
1719         }
1720
1721         IWL_DEBUG_POWER(priv, "Thermal txpower calib needed\n");
1722
1723         return 1;
1724 }
1725
1726 static void iwl4965_temperature_calib(struct iwl_priv *priv)
1727 {
1728         s32 temp;
1729
1730         temp = iwl4965_hw_get_temperature(priv);
1731         if (temp < 0)
1732                 return;
1733
1734         if (priv->temperature != temp) {
1735                 if (priv->temperature)
1736                         IWL_DEBUG_TEMP(priv, "Temperature changed "
1737                                        "from %dC to %dC\n",
1738                                        KELVIN_TO_CELSIUS(priv->temperature),
1739                                        KELVIN_TO_CELSIUS(temp));
1740                 else
1741                         IWL_DEBUG_TEMP(priv, "Temperature "
1742                                        "initialized to %dC\n",
1743                                        KELVIN_TO_CELSIUS(temp));
1744         }
1745
1746         priv->temperature = temp;
1747         iwl_tt_handler(priv);
1748         set_bit(STATUS_TEMPERATURE, &priv->status);
1749
1750         if (!priv->disable_tx_power_cal &&
1751              unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
1752              iwl4965_is_temp_calib_needed(priv))
1753                 queue_work(priv->workqueue, &priv->txpower_work);
1754 }
1755
1756 /**
1757  * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
1758  */
1759 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
1760                                             u16 txq_id)
1761 {
1762         /* Simply stop the queue, but don't change any configuration;
1763          * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
1764         iwl_write_prph(priv,
1765                 IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
1766                 (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
1767                 (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
1768 }
1769
1770 /**
1771  * txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE
1772  * priv->lock must be held by the caller
1773  */
1774 static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1775                                    u16 ssn_idx, u8 tx_fifo)
1776 {
1777         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1778             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1779                 IWL_WARN(priv,
1780                         "queue number out of range: %d, must be %d to %d\n",
1781                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1782                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1783                 return -EINVAL;
1784         }
1785
1786         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1787
1788         iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1789
1790         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1791         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1792         /* supposes that ssn_idx is valid (!= 0xFFF) */
1793         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1794
1795         iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1796         iwl_txq_ctx_deactivate(priv, txq_id);
1797         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
1798
1799         return 0;
1800 }
1801
1802 /**
1803  * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
1804  */
1805 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
1806                                         u16 txq_id)
1807 {
1808         u32 tbl_dw_addr;
1809         u32 tbl_dw;
1810         u16 scd_q2ratid;
1811
1812         scd_q2ratid = ra_tid & IWL_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
1813
1814         tbl_dw_addr = priv->scd_base_addr +
1815                         IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
1816
1817         tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
1818
1819         if (txq_id & 0x1)
1820                 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
1821         else
1822                 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
1823
1824         iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
1825
1826         return 0;
1827 }
1828
1829
1830 /**
1831  * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
1832  *
1833  * NOTE:  txq_id must be greater than IWL49_FIRST_AMPDU_QUEUE,
1834  *        i.e. it must be one of the higher queues used for aggregation
1835  */
1836 static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1837                                   int tx_fifo, int sta_id, int tid, u16 ssn_idx)
1838 {
1839         unsigned long flags;
1840         u16 ra_tid;
1841
1842         if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1843             (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) {
1844                 IWL_WARN(priv,
1845                         "queue number out of range: %d, must be %d to %d\n",
1846                         txq_id, IWL49_FIRST_AMPDU_QUEUE,
1847                         IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1);
1848                 return -EINVAL;
1849         }
1850
1851         ra_tid = BUILD_RAxTID(sta_id, tid);
1852
1853         /* Modify device's station table to Tx this TID */
1854         iwl_sta_tx_modify_enable_tid(priv, sta_id, tid);
1855
1856         spin_lock_irqsave(&priv->lock, flags);
1857
1858         /* Stop this Tx queue before configuring it */
1859         iwl4965_tx_queue_stop_scheduler(priv, txq_id);
1860
1861         /* Map receiver-address / traffic-ID to this queue */
1862         iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
1863
1864         /* Set this queue as a chain-building queue */
1865         iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
1866
1867         /* Place first TFD at index corresponding to start sequence number.
1868          * Assumes that ssn_idx is valid (!= 0xFFF) */
1869         priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
1870         priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
1871         iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
1872
1873         /* Set up Tx window size and frame limit for this queue */
1874         iwl_write_targ_mem(priv,
1875                 priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
1876                 (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1877                 IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1878
1879         iwl_write_targ_mem(priv, priv->scd_base_addr +
1880                 IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
1881                 (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
1882                 & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1883
1884         iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
1885
1886         /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
1887         iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
1888
1889         spin_unlock_irqrestore(&priv->lock, flags);
1890
1891         return 0;
1892 }
1893
1894
1895 static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
1896 {
1897         switch (cmd_id) {
1898         case REPLY_RXON:
1899                 return (u16) sizeof(struct iwl4965_rxon_cmd);
1900         default:
1901                 return len;
1902         }
1903 }
1904
1905 static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1906 {
1907         struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
1908         addsta->mode = cmd->mode;
1909         memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
1910         memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
1911         addsta->station_flags = cmd->station_flags;
1912         addsta->station_flags_msk = cmd->station_flags_msk;
1913         addsta->tid_disable_tx = cmd->tid_disable_tx;
1914         addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1915         addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1916         addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1917         addsta->reserved1 = cpu_to_le16(0);
1918         addsta->reserved2 = cpu_to_le32(0);
1919
1920         return (u16)sizeof(struct iwl4965_addsta_cmd);
1921 }
1922
1923 static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
1924 {
1925         return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
1926 }
1927
1928 /**
1929  * iwl4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
1930  */
1931 static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1932                                       struct iwl_ht_agg *agg,
1933                                       struct iwl4965_tx_resp *tx_resp,
1934                                       int txq_id, u16 start_idx)
1935 {
1936         u16 status;
1937         struct agg_tx_status *frame_status = tx_resp->u.agg_status;
1938         struct ieee80211_tx_info *info = NULL;
1939         struct ieee80211_hdr *hdr = NULL;
1940         u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
1941         int i, sh, idx;
1942         u16 seq;
1943         if (agg->wait_for_ba)
1944                 IWL_DEBUG_TX_REPLY(priv, "got tx response w/o block-ack\n");
1945
1946         agg->frame_count = tx_resp->frame_count;
1947         agg->start_idx = start_idx;
1948         agg->rate_n_flags = rate_n_flags;
1949         agg->bitmap = 0;
1950
1951         /* num frames attempted by Tx command */
1952         if (agg->frame_count == 1) {
1953                 /* Only one frame was attempted; no block-ack will arrive */
1954                 status = le16_to_cpu(frame_status[0].status);
1955                 idx = start_idx;
1956
1957                 /* FIXME: code repetition */
1958                 IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, StartIdx=%d idx=%d\n",
1959                                    agg->frame_count, agg->start_idx, idx);
1960
1961                 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1962                 info->status.rates[0].count = tx_resp->failure_frame + 1;
1963                 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1964                 info->flags |= iwl_is_tx_success(status) ?
1965                         IEEE80211_TX_STAT_ACK : 0;
1966                 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1967                 /* FIXME: code repetition end */
1968
1969                 IWL_DEBUG_TX_REPLY(priv, "1 Frame 0x%x failure :%d\n",
1970                                     status & 0xff, tx_resp->failure_frame);
1971                 IWL_DEBUG_TX_REPLY(priv, "Rate Info rate_n_flags=%x\n", rate_n_flags);
1972
1973                 agg->wait_for_ba = 0;
1974         } else {
1975                 /* Two or more frames were attempted; expect block-ack */
1976                 u64 bitmap = 0;
1977                 int start = agg->start_idx;
1978
1979                 /* Construct bit-map of pending frames within Tx window */
1980                 for (i = 0; i < agg->frame_count; i++) {
1981                         u16 sc;
1982                         status = le16_to_cpu(frame_status[i].status);
1983                         seq  = le16_to_cpu(frame_status[i].sequence);
1984                         idx = SEQ_TO_INDEX(seq);
1985                         txq_id = SEQ_TO_QUEUE(seq);
1986
1987                         if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
1988                                       AGG_TX_STATE_ABORT_MSK))
1989                                 continue;
1990
1991                         IWL_DEBUG_TX_REPLY(priv, "FrameCnt = %d, txq_id=%d idx=%d\n",
1992                                            agg->frame_count, txq_id, idx);
1993
1994                         hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
1995                         if (!hdr) {
1996                                 IWL_ERR(priv,
1997                                         "BUG_ON idx doesn't point to valid skb"
1998                                         " idx=%d, txq_id=%d\n", idx, txq_id);
1999                                 return -1;
2000                         }
2001
2002                         sc = le16_to_cpu(hdr->seq_ctrl);
2003                         if (idx != (SEQ_TO_SN(sc) & 0xff)) {
2004                                 IWL_ERR(priv,
2005                                         "BUG_ON idx doesn't match seq control"
2006                                         " idx=%d, seq_idx=%d, seq=%d\n",
2007                                         idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
2008                                 return -1;
2009                         }
2010
2011                         IWL_DEBUG_TX_REPLY(priv, "AGG Frame i=%d idx %d seq=%d\n",
2012                                            i, idx, SEQ_TO_SN(sc));
2013
2014                         sh = idx - start;
2015                         if (sh > 64) {
2016                                 sh = (start - idx) + 0xff;
2017                                 bitmap = bitmap << sh;
2018                                 sh = 0;
2019                                 start = idx;
2020                         } else if (sh < -64)
2021                                 sh  = 0xff - (start - idx);
2022                         else if (sh < 0) {
2023                                 sh = start - idx;
2024                                 start = idx;
2025                                 bitmap = bitmap << sh;
2026                                 sh = 0;
2027                         }
2028                         bitmap |= 1ULL << sh;
2029                         IWL_DEBUG_TX_REPLY(priv, "start=%d bitmap=0x%llx\n",
2030                                            start, (unsigned long long)bitmap);
2031                 }
2032
2033                 agg->bitmap = bitmap;
2034                 agg->start_idx = start;
2035                 IWL_DEBUG_TX_REPLY(priv, "Frames %d start_idx=%d bitmap=0x%llx\n",
2036                                    agg->frame_count, agg->start_idx,
2037                                    (unsigned long long)agg->bitmap);
2038
2039                 if (bitmap)
2040                         agg->wait_for_ba = 1;
2041         }
2042         return 0;
2043 }
2044
2045 /**
2046  * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
2047  */
2048 static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2049                                 struct iwl_rx_mem_buffer *rxb)
2050 {
2051         struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
2052         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2053         int txq_id = SEQ_TO_QUEUE(sequence);
2054         int index = SEQ_TO_INDEX(sequence);
2055         struct iwl_tx_queue *txq = &priv->txq[txq_id];
2056         struct ieee80211_hdr *hdr;
2057         struct ieee80211_tx_info *info;
2058         struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2059         u32  status = le32_to_cpu(tx_resp->u.status);
2060         int tid = MAX_TID_COUNT;
2061         int sta_id;
2062         int freed;
2063         u8 *qc = NULL;
2064
2065         if ((index >= txq->q.n_bd) || (iwl_queue_used(&txq->q, index) == 0)) {
2066                 IWL_ERR(priv, "Read index for DMA queue txq_id (%d) index %d "
2067                           "is out of range [0-%d] %d %d\n", txq_id,
2068                           index, txq->q.n_bd, txq->q.write_ptr,
2069                           txq->q.read_ptr);
2070                 return;
2071         }
2072
2073         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
2074         memset(&info->status, 0, sizeof(info->status));
2075
2076         hdr = iwl_tx_queue_get_hdr(priv, txq_id, index);
2077         if (ieee80211_is_data_qos(hdr->frame_control)) {
2078                 qc = ieee80211_get_qos_ctl(hdr);
2079                 tid = qc[0] & 0xf;
2080         }
2081
2082         sta_id = iwl_get_ra_sta_id(priv, hdr);
2083         if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
2084                 IWL_ERR(priv, "Station not known\n");
2085                 return;
2086         }
2087
2088         if (txq->sched_retry) {
2089                 const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
2090                 struct iwl_ht_agg *agg = NULL;
2091
2092                 WARN_ON(!qc);
2093
2094                 agg = &priv->stations[sta_id].tid[tid].agg;
2095
2096                 iwl4965_tx_status_reply_tx(priv, agg, tx_resp, txq_id, index);
2097
2098                 /* check if BAR is needed */
2099                 if ((tx_resp->frame_count == 1) && !iwl_is_tx_success(status))
2100                         info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
2101
2102                 if (txq->q.read_ptr != (scd_ssn & 0xff)) {
2103                         index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
2104                         IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2105                                            "%d index %d\n", scd_ssn , index);
2106                         freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2107                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2108
2109                         if (priv->mac80211_registered &&
2110                             (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
2111                             (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) {
2112                                 if (agg->state == IWL_AGG_OFF)
2113                                         iwl_wake_queue(priv, txq_id);
2114                                 else
2115                                         iwl_wake_queue(priv, txq->swq_id);
2116                         }
2117                 }
2118         } else {
2119                 info->status.rates[0].count = tx_resp->failure_frame + 1;
2120                 info->flags |= iwl_is_tx_success(status) ?
2121                                         IEEE80211_TX_STAT_ACK : 0;
2122                 iwl_hwrate_to_tx_control(priv,
2123                                         le32_to_cpu(tx_resp->rate_n_flags),
2124                                         info);
2125
2126                 IWL_DEBUG_TX_REPLY(priv, "TXQ %d status %s (0x%08x) "
2127                                    "rate_n_flags 0x%x retries %d\n",
2128                                    txq_id,
2129                                    iwl_get_tx_fail_reason(status), status,
2130                                    le32_to_cpu(tx_resp->rate_n_flags),
2131                                    tx_resp->failure_frame);
2132
2133                 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2134                 if (qc && likely(sta_id != IWL_INVALID_STATION))
2135                         priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
2136
2137                 if (priv->mac80211_registered &&
2138                     (iwl_queue_space(&txq->q) > txq->q.low_mark))
2139                         iwl_wake_queue(priv, txq_id);
2140         }
2141
2142         if (qc && likely(sta_id != IWL_INVALID_STATION))
2143                 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2144
2145         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
2146                 IWL_ERR(priv, "TODO:  Implement Tx ABORT REQUIRED!!!\n");
2147 }
2148
2149 static int iwl4965_calc_rssi(struct iwl_priv *priv,
2150                              struct iwl_rx_phy_res *rx_resp)
2151 {
2152         /* data from PHY/DSP regarding signal strength, etc.,
2153          *   contents are always there, not configurable by host.  */
2154         struct iwl4965_rx_non_cfg_phy *ncphy =
2155             (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy_buf;
2156         u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL49_AGC_DB_MASK)
2157                         >> IWL49_AGC_DB_POS;
2158
2159         u32 valid_antennae =
2160             (le16_to_cpu(rx_resp->phy_flags) & IWL49_RX_PHY_FLAGS_ANTENNAE_MASK)
2161                         >> IWL49_RX_PHY_FLAGS_ANTENNAE_OFFSET;
2162         u8 max_rssi = 0;
2163         u32 i;
2164
2165         /* Find max rssi among 3 possible receivers.
2166          * These values are measured by the digital signal processor (DSP).
2167          * They should stay fairly constant even as the signal strength varies,
2168          *   if the radio's automatic gain control (AGC) is working right.
2169          * AGC value (see below) will provide the "interesting" info. */
2170         for (i = 0; i < 3; i++)
2171                 if (valid_antennae & (1 << i))
2172                         max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
2173
2174         IWL_DEBUG_STATS(priv, "Rssi In A %d B %d C %d Max %d AGC dB %d\n",
2175                 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
2176                 max_rssi, agc);
2177
2178         /* dBm = max_rssi dB - agc dB - constant.
2179          * Higher AGC (higher radio gain) means lower signal. */
2180         return max_rssi - agc - IWL49_RSSI_OFFSET;
2181 }
2182
2183
2184 /* Set up 4965-specific Rx frame reply handlers */
2185 static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
2186 {
2187         /* Legacy Rx frames */
2188         priv->rx_handlers[REPLY_RX] = iwl_rx_reply_rx;
2189         /* Tx response */
2190         priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
2191 }
2192
2193 static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
2194 {
2195         INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
2196 }
2197
2198 static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
2199 {
2200         cancel_work_sync(&priv->txpower_work);
2201 }
2202
2203 #define IWL4965_UCODE_GET(item)                                         \
2204 static u32 iwl4965_ucode_get_##item(const struct iwl_ucode_header *ucode,\
2205                                     u32 api_ver)                        \
2206 {                                                                       \
2207         return le32_to_cpu(ucode->u.v1.item);                           \
2208 }
2209
2210 static u32 iwl4965_ucode_get_header_size(u32 api_ver)
2211 {
2212         return UCODE_HEADER_SIZE(1);
2213 }
2214 static u32 iwl4965_ucode_get_build(const struct iwl_ucode_header *ucode,
2215                                    u32 api_ver)
2216 {
2217         return 0;
2218 }
2219 static u8 *iwl4965_ucode_get_data(const struct iwl_ucode_header *ucode,
2220                                   u32 api_ver)
2221 {
2222         return (u8 *) ucode->u.v1.data;
2223 }
2224
2225 IWL4965_UCODE_GET(inst_size);
2226 IWL4965_UCODE_GET(data_size);
2227 IWL4965_UCODE_GET(init_size);
2228 IWL4965_UCODE_GET(init_data_size);
2229 IWL4965_UCODE_GET(boot_size);
2230
2231 static struct iwl_hcmd_ops iwl4965_hcmd = {
2232         .rxon_assoc = iwl4965_send_rxon_assoc,
2233         .commit_rxon = iwl_commit_rxon,
2234         .set_rxon_chain = iwl_set_rxon_chain,
2235 };
2236
2237 static struct iwl_ucode_ops iwl4965_ucode = {
2238         .get_header_size = iwl4965_ucode_get_header_size,
2239         .get_build = iwl4965_ucode_get_build,
2240         .get_inst_size = iwl4965_ucode_get_inst_size,
2241         .get_data_size = iwl4965_ucode_get_data_size,
2242         .get_init_size = iwl4965_ucode_get_init_size,
2243         .get_init_data_size = iwl4965_ucode_get_init_data_size,
2244         .get_boot_size = iwl4965_ucode_get_boot_size,
2245         .get_data = iwl4965_ucode_get_data,
2246 };
2247 static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2248         .get_hcmd_size = iwl4965_get_hcmd_size,
2249         .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2250         .chain_noise_reset = iwl4965_chain_noise_reset,
2251         .gain_computation = iwl4965_gain_computation,
2252         .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag,
2253         .calc_rssi = iwl4965_calc_rssi,
2254 };
2255
2256 static struct iwl_lib_ops iwl4965_lib = {
2257         .set_hw_params = iwl4965_hw_set_hw_params,
2258         .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
2259         .txq_set_sched = iwl4965_txq_set_sched,
2260         .txq_agg_enable = iwl4965_txq_agg_enable,
2261         .txq_agg_disable = iwl4965_txq_agg_disable,
2262         .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
2263         .txq_free_tfd = iwl_hw_txq_free_tfd,
2264         .txq_init = iwl_hw_tx_queue_init,
2265         .rx_handler_setup = iwl4965_rx_handler_setup,
2266         .setup_deferred_work = iwl4965_setup_deferred_work,
2267         .cancel_deferred_work = iwl4965_cancel_deferred_work,
2268         .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
2269         .alive_notify = iwl4965_alive_notify,
2270         .init_alive_start = iwl4965_init_alive_start,
2271         .load_ucode = iwl4965_load_bsm,
2272         .dump_nic_event_log = iwl_dump_nic_event_log,
2273         .dump_nic_error_log = iwl_dump_nic_error_log,
2274         .apm_ops = {
2275                 .init = iwl4965_apm_init,
2276                 .reset = iwl4965_apm_reset,
2277                 .stop = iwl_apm_stop,
2278                 .config = iwl4965_nic_config,
2279                 .set_pwr_src = iwl_set_pwr_src,
2280         },
2281         .eeprom_ops = {
2282                 .regulatory_bands = {
2283                         EEPROM_REGULATORY_BAND_1_CHANNELS,
2284                         EEPROM_REGULATORY_BAND_2_CHANNELS,
2285                         EEPROM_REGULATORY_BAND_3_CHANNELS,
2286                         EEPROM_REGULATORY_BAND_4_CHANNELS,
2287                         EEPROM_REGULATORY_BAND_5_CHANNELS,
2288                         EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
2289                         EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
2290                 },
2291                 .verify_signature  = iwlcore_eeprom_verify_signature,
2292                 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
2293                 .release_semaphore = iwlcore_eeprom_release_semaphore,
2294                 .calib_version = iwl4965_eeprom_calib_version,
2295                 .query_addr = iwlcore_eeprom_query_addr,
2296         },
2297         .send_tx_power  = iwl4965_send_tx_power,
2298         .update_chain_flags = iwl_update_chain_flags,
2299         .post_associate = iwl_post_associate,
2300         .config_ap = iwl_config_ap,
2301         .isr = iwl_isr_legacy,
2302         .temp_ops = {
2303                 .temperature = iwl4965_temperature_calib,
2304                 .set_ct_kill = iwl4965_set_ct_threshold,
2305         },
2306 };
2307
2308 static struct iwl_ops iwl4965_ops = {
2309         .ucode = &iwl4965_ucode,
2310         .lib = &iwl4965_lib,
2311         .hcmd = &iwl4965_hcmd,
2312         .utils = &iwl4965_hcmd_utils,
2313         .led = &iwlagn_led_ops,
2314 };
2315
2316 struct iwl_cfg iwl4965_agn_cfg = {
2317         .name = "4965AGN",
2318         .fw_name_pre = IWL4965_FW_PRE,
2319         .ucode_api_max = IWL4965_UCODE_API_MAX,
2320         .ucode_api_min = IWL4965_UCODE_API_MIN,
2321         .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
2322         .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
2323         .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2324         .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2325         .ops = &iwl4965_ops,
2326         .mod_params = &iwl4965_mod_params,
2327         .use_isr_legacy = true,
2328         .ht_greenfield_support = false,
2329         .broken_powersave = true,
2330         .led_compensation = 61,
2331         .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2332 };
2333
2334 /* Module firmware */
2335 MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2336
2337 module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
2338 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2339 module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
2340 MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2341 module_param_named(
2342         disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
2343 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2344
2345 module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
2346 MODULE_PARM_DESC(queues_num, "number of hw queues.");
2347 /* 11n */
2348 module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
2349 MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2350 module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2351                    int, S_IRUGO);
2352 MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2353
2354 module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
2355 MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");