1 /******************************************************************************
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
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16 * WITHOUT ANY WARRANTY; without even the implied warranty of
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18 * General Public License for more details.
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22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
25 * The full GNU General Public License is included in this distribution
26 * in the file called COPYING.
28 * Contact Information:
29 * Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
35 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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64 *****************************************************************************/
69 #include "fw-api-rs.h"
70 #include "fw-api-tx.h"
71 #include "fw-api-sta.h"
72 #include "fw-api-mac.h"
73 #include "fw-api-power.h"
74 #include "fw-api-d3.h"
75 #include "fw-api-coex.h"
76 #include "fw-api-scan.h"
77 #include "fw-api-stats.h"
78 #include "fw-api-tof.h"
80 /* Tx queue numbers */
82 IWL_MVM_OFFCHANNEL_QUEUE = 8,
83 IWL_MVM_CMD_QUEUE = 9,
86 enum iwl_mvm_tx_fifo {
87 IWL_MVM_TX_FIFO_BK = 0,
91 IWL_MVM_TX_FIFO_MCAST = 5,
92 IWL_MVM_TX_FIFO_CMD = 7,
95 #define IWL_MVM_STATION_COUNT 16
97 #define IWL_MVM_TDLS_STA_COUNT 4
104 INIT_COMPLETE_NOTIF = 0x4,
106 /* PHY context commands */
107 PHY_CONTEXT_CMD = 0x8,
109 ANTENNA_COUPLING_NOTIFICATION = 0xa,
111 /* UMAC scan commands */
112 SCAN_ITERATION_COMPLETE_UMAC = 0xb5,
115 SCAN_ABORT_UMAC = 0xe,
116 SCAN_COMPLETE_UMAC = 0xf,
123 /* paging get item */
124 FW_GET_ITEM_CMD = 0x1a,
129 MGMT_MCAST_KEY = 0x1f,
131 /* scheduler config */
132 SCD_QUEUE_CFG = 0x1d,
138 SHARED_MEM_CFG = 0x25,
141 TDLS_CHANNEL_SWITCH_CMD = 0x27,
142 TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa,
143 TDLS_CONFIG_CMD = 0xa7,
145 /* MAC and Binding commands */
146 MAC_CONTEXT_CMD = 0x28,
147 TIME_EVENT_CMD = 0x29, /* both CMD and response */
148 TIME_EVENT_NOTIFICATION = 0x2a,
149 BINDING_CONTEXT_CMD = 0x2b,
150 TIME_QUOTA_CMD = 0x2c,
151 NON_QOS_TX_COUNTER_CMD = 0x2d,
155 /* paging block to FW cpu2 */
156 FW_PAGING_BLOCK_CMD = 0x4f,
159 SCAN_OFFLOAD_REQUEST_CMD = 0x51,
160 SCAN_OFFLOAD_ABORT_CMD = 0x52,
162 SCAN_OFFLOAD_COMPLETE = 0x6D,
163 SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
164 SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
165 MATCH_FOUND_NOTIFICATION = 0xd9,
166 SCAN_ITERATION_COMPLETE = 0xe7,
169 PHY_CONFIGURATION_CMD = 0x6a,
170 CALIB_RES_NOTIF_PHY_DB = 0x6b,
171 /* PHY_DB_CMD = 0x6c, */
173 /* ToF - 802.11mc FTM */
175 TOF_NOTIFICATION = 0x11,
177 /* Power - legacy power table command */
178 POWER_TABLE_CMD = 0x77,
179 PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
182 /* Thermal Throttling*/
183 REPLY_THERMAL_MNG_BACKOFF = 0x7e,
185 /* Set/Get DC2DC frequency tune */
186 DC2DC_CONFIG_CMD = 0x83,
189 NVM_ACCESS_CMD = 0x88,
191 SET_CALIB_DEFAULT_CMD = 0x8e,
193 BEACON_NOTIFICATION = 0x90,
194 BEACON_TEMPLATE_CMD = 0x91,
195 TX_ANT_CONFIGURATION_CMD = 0x98,
196 STATISTICS_CMD = 0x9c,
197 STATISTICS_NOTIFICATION = 0x9d,
198 EOSP_NOTIFICATION = 0x9e,
199 REDUCE_TX_POWER_CMD = 0x9f,
201 /* RF-KILL commands and notifications */
202 CARD_STATE_CMD = 0xa0,
203 CARD_STATE_NOTIFICATION = 0xa1,
205 MISSED_BEACONS_NOTIFICATION = 0xa2,
207 /* Power - new power table command */
208 MAC_PM_POWER_TABLE = 0xa9,
210 MFUART_LOAD_NOTIFICATION = 0xb1,
212 REPLY_RX_PHY_CMD = 0xc0,
213 REPLY_RX_MPDU_CMD = 0xc1,
216 /* Location Aware Regulatory */
217 MCC_UPDATE_CMD = 0xc8,
218 MCC_CHUB_UPDATE_CMD = 0xc9,
223 BT_COEX_PRIO_TABLE = 0xcc,
224 BT_COEX_PROT_ENV = 0xcd,
225 BT_PROFILE_NOTIFICATION = 0xce,
227 BT_COEX_UPDATE_SW_BOOST = 0x5a,
228 BT_COEX_UPDATE_CORUN_LUT = 0x5b,
229 BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
232 REPLY_SF_CFG_CMD = 0xd1,
233 REPLY_BEACON_FILTERING_CMD = 0xd2,
235 /* DTS measurements */
236 CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
237 DTS_MEASUREMENT_NOTIFICATION = 0xdd,
239 REPLY_DEBUG_CMD = 0xf0,
240 DEBUG_LOG_MSG = 0xf7,
242 BCAST_FILTER_CMD = 0xcf,
243 MCAST_FILTER_CMD = 0xd0,
245 /* D3 commands/notifications */
246 D3_CONFIG_CMD = 0xd3,
247 PROT_OFFLOAD_CONFIG_CMD = 0xd4,
248 OFFLOADS_QUERY_CMD = 0xd5,
249 REMOTE_WAKE_CONFIG_CMD = 0xd6,
252 /* for WoWLAN in particular */
253 WOWLAN_PATTERNS = 0xe0,
254 WOWLAN_CONFIGURATION = 0xe1,
255 WOWLAN_TSC_RSC_PARAM = 0xe2,
256 WOWLAN_TKIP_PARAM = 0xe3,
257 WOWLAN_KEK_KCK_MATERIAL = 0xe4,
258 WOWLAN_GET_STATUSES = 0xe5,
259 WOWLAN_TX_POWER_PER_DB = 0xe6,
261 /* and for NetDetect */
262 SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56,
263 SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58,
264 SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59,
270 * struct iwl_cmd_response - generic response struct for most commands
271 * @status: status of the command asked, changes for each one
273 struct iwl_cmd_response {
278 * struct iwl_tx_ant_cfg_cmd
279 * @valid: valid antenna configuration
281 struct iwl_tx_ant_cfg_cmd {
286 * Calibration control struct.
287 * Sent as part of the phy configuration command.
288 * @flow_trigger: bitmap for which calibrations to perform according to
290 * @event_trigger: bitmap for which calibrations to perform according to
293 struct iwl_calib_ctrl {
295 __le32 event_trigger;
298 /* This enum defines the bitmap of various calibrations to enable in both
299 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
302 IWL_CALIB_CFG_XTAL_IDX = BIT(0),
303 IWL_CALIB_CFG_TEMPERATURE_IDX = BIT(1),
304 IWL_CALIB_CFG_VOLTAGE_READ_IDX = BIT(2),
305 IWL_CALIB_CFG_PAPD_IDX = BIT(3),
306 IWL_CALIB_CFG_TX_PWR_IDX = BIT(4),
307 IWL_CALIB_CFG_DC_IDX = BIT(5),
308 IWL_CALIB_CFG_BB_FILTER_IDX = BIT(6),
309 IWL_CALIB_CFG_LO_LEAKAGE_IDX = BIT(7),
310 IWL_CALIB_CFG_TX_IQ_IDX = BIT(8),
311 IWL_CALIB_CFG_TX_IQ_SKEW_IDX = BIT(9),
312 IWL_CALIB_CFG_RX_IQ_IDX = BIT(10),
313 IWL_CALIB_CFG_RX_IQ_SKEW_IDX = BIT(11),
314 IWL_CALIB_CFG_SENSITIVITY_IDX = BIT(12),
315 IWL_CALIB_CFG_CHAIN_NOISE_IDX = BIT(13),
316 IWL_CALIB_CFG_DISCONNECTED_ANT_IDX = BIT(14),
317 IWL_CALIB_CFG_ANT_COUPLING_IDX = BIT(15),
318 IWL_CALIB_CFG_DAC_IDX = BIT(16),
319 IWL_CALIB_CFG_ABS_IDX = BIT(17),
320 IWL_CALIB_CFG_AGC_IDX = BIT(18),
324 * Phy configuration command.
326 struct iwl_phy_cfg_cmd {
328 struct iwl_calib_ctrl calib_control;
331 #define PHY_CFG_RADIO_TYPE (BIT(0) | BIT(1))
332 #define PHY_CFG_RADIO_STEP (BIT(2) | BIT(3))
333 #define PHY_CFG_RADIO_DASH (BIT(4) | BIT(5))
334 #define PHY_CFG_PRODUCT_NUMBER (BIT(6) | BIT(7))
335 #define PHY_CFG_TX_CHAIN_A BIT(8)
336 #define PHY_CFG_TX_CHAIN_B BIT(9)
337 #define PHY_CFG_TX_CHAIN_C BIT(10)
338 #define PHY_CFG_RX_CHAIN_A BIT(12)
339 #define PHY_CFG_RX_CHAIN_B BIT(13)
340 #define PHY_CFG_RX_CHAIN_C BIT(14)
343 /* Target of the NVM_ACCESS_CMD */
345 NVM_ACCESS_TARGET_CACHE = 0,
346 NVM_ACCESS_TARGET_OTP = 1,
347 NVM_ACCESS_TARGET_EEPROM = 2,
350 /* Section types for NVM_ACCESS_CMD */
352 NVM_SECTION_TYPE_SW = 1,
353 NVM_SECTION_TYPE_REGULATORY = 3,
354 NVM_SECTION_TYPE_CALIBRATION = 4,
355 NVM_SECTION_TYPE_PRODUCTION = 5,
356 NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
357 NVM_SECTION_TYPE_PHY_SKU = 12,
358 NVM_MAX_NUM_SECTIONS = 13,
362 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
363 * @op_code: 0 - read, 1 - write
364 * @target: NVM_ACCESS_TARGET_*
365 * @type: NVM_SECTION_TYPE_*
366 * @offset: offset in bytes into the section
367 * @length: in bytes, to read/write
368 * @data: if write operation, the data to write. On read its empty
370 struct iwl_nvm_access_cmd {
377 } __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
379 #define NUM_OF_FW_PAGING_BLOCKS 33 /* 32 for data and 1 block for CSS */
382 * struct iwl_fw_paging_cmd - paging layout
384 * (FW_PAGING_BLOCK_CMD = 0x4f)
386 * Send to FW the paging layout in the driver.
388 * @flags: various flags for the command
389 * @block_size: the block size in powers of 2
390 * @block_num: number of blocks specified in the command.
391 * @device_phy_addr: virtual addresses from device side
393 struct iwl_fw_paging_cmd {
397 __le32 device_phy_addr[NUM_OF_FW_PAGING_BLOCKS];
398 } __packed; /* FW_PAGING_BLOCK_CMD_API_S_VER_1 */
403 * @IWL_FW_ITEM_ID_PAGING: Address of the pages that the FW will upload
406 enum iwl_fw_item_id {
407 IWL_FW_ITEM_ID_PAGING = 3,
411 * struct iwl_fw_get_item_cmd - get an item from the fw
413 struct iwl_fw_get_item_cmd {
415 } __packed; /* FW_GET_ITEM_CMD_API_S_VER_1 */
417 struct iwl_fw_get_item_resp {
419 __le32 item_byte_cnt;
421 } __packed; /* FW_GET_ITEM_RSP_S_VER_1 */
424 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
425 * @offset: offset in bytes into the section
426 * @length: in bytes, either how much was written or read
427 * @type: NVM_SECTION_TYPE_*
428 * @status: 0 for success, fail otherwise
429 * @data: if read operation, the data returned. Empty on write.
431 struct iwl_nvm_access_resp {
437 } __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
441 /* alive response is_valid values */
442 #define ALIVE_RESP_UCODE_OK BIT(0)
443 #define ALIVE_RESP_RFKILL BIT(1)
445 /* alive response ver_type values */
455 /* alive response ver_subtype values */
457 FW_SUBTYPE_FULL_FEATURE = 0,
458 FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
459 FW_SUBTYPE_REDUCED = 2,
460 FW_SUBTYPE_ALIVE_ONLY = 3,
461 FW_SUBTYPE_WOWLAN = 4,
462 FW_SUBTYPE_AP_SUBTYPE = 5,
463 FW_SUBTYPE_WIPAN = 6,
464 FW_SUBTYPE_INITIALIZE = 9
467 #define IWL_ALIVE_STATUS_ERR 0xDEAD
468 #define IWL_ALIVE_STATUS_OK 0xCAFE
470 #define IWL_ALIVE_FLG_RFKILL BIT(0)
472 struct mvm_alive_resp_ver1 {
486 __le32 error_event_table_ptr; /* SRAM address for error log */
487 __le32 log_event_table_ptr; /* SRAM address for event log */
488 __le32 cpu_register_ptr;
489 __le32 dbgm_config_ptr;
490 __le32 alive_counter_ptr;
491 __le32 scd_base_ptr; /* SRAM address for SCD */
492 } __packed; /* ALIVE_RES_API_S_VER_1 */
494 struct mvm_alive_resp_ver2 {
508 __le32 error_event_table_ptr; /* SRAM address for error log */
509 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
510 __le32 cpu_register_ptr;
511 __le32 dbgm_config_ptr;
512 __le32 alive_counter_ptr;
513 __le32 scd_base_ptr; /* SRAM address for SCD */
514 __le32 st_fwrd_addr; /* pointer to Store and forward */
516 u8 umac_minor; /* UMAC version: minor */
517 u8 umac_major; /* UMAC version: major */
518 __le16 umac_id; /* UMAC version: id */
519 __le32 error_info_addr; /* SRAM address for UMAC error log */
520 __le32 dbg_print_buff_addr;
521 } __packed; /* ALIVE_RES_API_S_VER_2 */
523 struct mvm_alive_resp {
533 __le32 error_event_table_ptr; /* SRAM address for error log */
534 __le32 log_event_table_ptr; /* SRAM address for LMAC event log */
535 __le32 cpu_register_ptr;
536 __le32 dbgm_config_ptr;
537 __le32 alive_counter_ptr;
538 __le32 scd_base_ptr; /* SRAM address for SCD */
539 __le32 st_fwrd_addr; /* pointer to Store and forward */
541 __le32 umac_minor; /* UMAC version: minor */
542 __le32 umac_major; /* UMAC version: major */
543 __le32 error_info_addr; /* SRAM address for UMAC error log */
544 __le32 dbg_print_buff_addr;
545 } __packed; /* ALIVE_RES_API_S_VER_3 */
547 /* Error response/notification */
549 FW_ERR_UNKNOWN_CMD = 0x0,
550 FW_ERR_INVALID_CMD_PARAM = 0x1,
551 FW_ERR_SERVICE = 0x2,
552 FW_ERR_ARC_MEMORY = 0x3,
553 FW_ERR_ARC_CODE = 0x4,
554 FW_ERR_WATCH_DOG = 0x5,
555 FW_ERR_WEP_GRP_KEY_INDX = 0x10,
556 FW_ERR_WEP_KEY_SIZE = 0x11,
557 FW_ERR_OBSOLETE_FUNC = 0x12,
558 FW_ERR_UNEXPECTED = 0xFE,
563 * struct iwl_error_resp - FW error indication
564 * ( REPLY_ERROR = 0x2 )
565 * @error_type: one of FW_ERR_*
566 * @cmd_id: the command ID for which the error occured
567 * @bad_cmd_seq_num: sequence number of the erroneous command
568 * @error_service: which service created the error, applicable only if
569 * error_type = 2, otherwise 0
570 * @timestamp: TSF in usecs.
572 struct iwl_error_resp {
576 __le16 bad_cmd_seq_num;
577 __le32 error_service;
582 /* Common PHY, MAC and Bindings definitions */
584 #define MAX_MACS_IN_BINDING (3)
585 #define MAX_BINDINGS (4)
586 #define AUX_BINDING_INDEX (3)
589 /* Used to extract ID and color from the context dword */
590 #define FW_CTXT_ID_POS (0)
591 #define FW_CTXT_ID_MSK (0xff << FW_CTXT_ID_POS)
592 #define FW_CTXT_COLOR_POS (8)
593 #define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
594 #define FW_CTXT_INVALID (0xffffffff)
596 #define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
597 (_color << FW_CTXT_COLOR_POS))
599 /* Possible actions on PHYs, MACs and Bindings */
601 FW_CTXT_ACTION_STUB = 0,
603 FW_CTXT_ACTION_MODIFY,
604 FW_CTXT_ACTION_REMOVE,
606 }; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
610 /* Time Event types, according to MAC type */
611 enum iwl_time_event_type {
612 /* BSS Station Events */
613 TE_BSS_STA_AGGRESSIVE_ASSOC,
615 TE_BSS_EAP_DHCP_PROT,
618 /* P2P Device Events */
619 TE_P2P_DEVICE_DISCOVERABLE,
620 TE_P2P_DEVICE_LISTEN,
621 TE_P2P_DEVICE_ACTION_SCAN,
622 TE_P2P_DEVICE_FULL_SCAN,
624 /* P2P Client Events */
625 TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
627 TE_P2P_CLIENT_QUIET_PERIOD,
630 TE_P2P_GO_ASSOC_PROT,
631 TE_P2P_GO_REPETITIVE_NOA,
634 /* WiDi Sync Events */
637 /* Channel Switch NoA */
638 TE_CHANNEL_SWITCH_PERIOD,
641 }; /* MAC_EVENT_TYPE_API_E_VER_1 */
645 /* Time event - defines for command API v1 */
648 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
649 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
650 * the first fragment is scheduled.
651 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
652 * the first 2 fragments are scheduled.
653 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
654 * number of fragments are valid.
656 * Other than the constant defined above, specifying a fragmentation value 'x'
657 * means that the event can be fragmented but only the first 'x' will be
662 TE_V1_FRAG_SINGLE = 1,
664 TE_V1_FRAG_ENDLESS = 0xffffffff
667 /* If a Time Event can be fragmented, this is the max number of fragments */
668 #define TE_V1_FRAG_MAX_MSK 0x0fffffff
669 /* Repeat the time event endlessly (until removed) */
670 #define TE_V1_REPEAT_ENDLESS 0xffffffff
671 /* If a Time Event has bounded repetitions, this is the maximal value */
672 #define TE_V1_REPEAT_MAX_MSK_V1 0x0fffffff
674 /* Time Event dependencies: none, on another TE, or in a specific time */
676 TE_V1_INDEPENDENT = 0,
677 TE_V1_DEP_OTHER = BIT(0),
678 TE_V1_DEP_TSF = BIT(1),
679 TE_V1_EVENT_SOCIOPATHIC = BIT(2),
680 }; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
683 * @TE_V1_NOTIF_NONE: no notifications
684 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
685 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
686 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
687 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
688 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
689 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
690 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
691 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
693 * Supported Time event notifications configuration.
694 * A notification (both event and fragment) includes a status indicating weather
695 * the FW was able to schedule the event or not. For fragment start/end
696 * notification the status is always success. There is no start/end fragment
697 * notification for monolithic events.
700 TE_V1_NOTIF_NONE = 0,
701 TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
702 TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
703 TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
704 TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
705 TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
706 TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
707 TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
708 TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
709 }; /* MAC_EVENT_ACTION_API_E_VER_2 */
711 /* Time event - defines for command API */
714 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
715 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
716 * the first fragment is scheduled.
717 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
718 * the first 2 fragments are scheduled.
719 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
720 * number of fragments are valid.
722 * Other than the constant defined above, specifying a fragmentation value 'x'
723 * means that the event can be fragmented but only the first 'x' will be
728 TE_V2_FRAG_SINGLE = 1,
730 TE_V2_FRAG_MAX = 0xfe,
731 TE_V2_FRAG_ENDLESS = 0xff
734 /* Repeat the time event endlessly (until removed) */
735 #define TE_V2_REPEAT_ENDLESS 0xff
736 /* If a Time Event has bounded repetitions, this is the maximal value */
737 #define TE_V2_REPEAT_MAX 0xfe
739 #define TE_V2_PLACEMENT_POS 12
740 #define TE_V2_ABSENCE_POS 15
742 /* Time event policy values
743 * A notification (both event and fragment) includes a status indicating weather
744 * the FW was able to schedule the event or not. For fragment start/end
745 * notification the status is always success. There is no start/end fragment
746 * notification for monolithic events.
748 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
749 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
750 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
751 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
752 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
753 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
754 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
755 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
756 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
757 * @TE_V2_DEP_OTHER: depends on another time event
758 * @TE_V2_DEP_TSF: depends on a specific time
759 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
760 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
763 TE_V2_DEFAULT_POLICY = 0x0,
765 /* notifications (event start/stop, fragment start/stop) */
766 TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
767 TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
768 TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
769 TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
771 TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
772 TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
773 TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
774 TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
775 T2_V2_START_IMMEDIATELY = BIT(11),
777 TE_V2_NOTIF_MSK = 0xff,
779 /* placement characteristics */
780 TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
781 TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
782 TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
784 /* are we present or absent during the Time Event. */
785 TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
789 * struct iwl_time_event_cmd_api - configuring Time Events
790 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
791 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
792 * ( TIME_EVENT_CMD = 0x29 )
793 * @id_and_color: ID and color of the relevant MAC
794 * @action: action to perform, one of FW_CTXT_ACTION_*
795 * @id: this field has two meanings, depending on the action:
796 * If the action is ADD, then it means the type of event to add.
797 * For all other actions it is the unique event ID assigned when the
798 * event was added by the FW.
799 * @apply_time: When to start the Time Event (in GP2)
800 * @max_delay: maximum delay to event's start (apply time), in TU
801 * @depends_on: the unique ID of the event we depend on (if any)
802 * @interval: interval between repetitions, in TU
803 * @duration: duration of event in TU
804 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
805 * @max_frags: maximal number of fragments the Time Event can be divided to
806 * @policy: defines whether uCode shall notify the host or other uCode modules
807 * on event and/or fragment start and/or end
808 * using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
809 * TE_EVENT_SOCIOPATHIC
810 * using TE_ABSENCE and using TE_NOTIF_*
812 struct iwl_time_event_cmd {
813 /* COMMON_INDEX_HDR_API_S_VER_1 */
817 /* MAC_TIME_EVENT_DATA_API_S_VER_2 */
826 } __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
829 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
830 * @status: bit 0 indicates success, all others specify errors
831 * @id: the Time Event type
832 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
833 * @id_and_color: ID and color of the relevant MAC
835 struct iwl_time_event_resp {
840 } __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
843 * struct iwl_time_event_notif - notifications of time event start/stop
844 * ( TIME_EVENT_NOTIFICATION = 0x2a )
845 * @timestamp: action timestamp in GP2
846 * @session_id: session's unique id
847 * @unique_id: unique id of the Time Event itself
848 * @id_and_color: ID and color of the relevant MAC
849 * @action: one of TE_NOTIF_START or TE_NOTIF_END
850 * @status: true if scheduled, false otherwise (not executed)
852 struct iwl_time_event_notif {
859 } __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
862 /* Bindings and Time Quota */
865 * struct iwl_binding_cmd - configuring bindings
866 * ( BINDING_CONTEXT_CMD = 0x2b )
867 * @id_and_color: ID and color of the relevant Binding
868 * @action: action to perform, one of FW_CTXT_ACTION_*
869 * @macs: array of MAC id and colors which belong to the binding
870 * @phy: PHY id and color which belongs to the binding
872 struct iwl_binding_cmd {
873 /* COMMON_INDEX_HDR_API_S_VER_1 */
876 /* BINDING_DATA_API_S_VER_1 */
877 __le32 macs[MAX_MACS_IN_BINDING];
879 } __packed; /* BINDING_CMD_API_S_VER_1 */
881 /* The maximal number of fragments in the FW's schedule session */
882 #define IWL_MVM_MAX_QUOTA 128
885 * struct iwl_time_quota_data - configuration of time quota per binding
886 * @id_and_color: ID and color of the relevant Binding
887 * @quota: absolute time quota in TU. The scheduler will try to divide the
888 * remainig quota (after Time Events) according to this quota.
889 * @max_duration: max uninterrupted context duration in TU
891 struct iwl_time_quota_data {
895 } __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
898 * struct iwl_time_quota_cmd - configuration of time quota between bindings
899 * ( TIME_QUOTA_CMD = 0x2c )
900 * @quotas: allocations per binding
902 struct iwl_time_quota_cmd {
903 struct iwl_time_quota_data quotas[MAX_BINDINGS];
904 } __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
909 /* Supported bands */
910 #define PHY_BAND_5 (0)
911 #define PHY_BAND_24 (1)
913 /* Supported channel width, vary if there is VHT support */
914 #define PHY_VHT_CHANNEL_MODE20 (0x0)
915 #define PHY_VHT_CHANNEL_MODE40 (0x1)
916 #define PHY_VHT_CHANNEL_MODE80 (0x2)
917 #define PHY_VHT_CHANNEL_MODE160 (0x3)
920 * Control channel position:
921 * For legacy set bit means upper channel, otherwise lower.
922 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
923 * bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
926 * 40Mhz |_______|_______|
927 * 80Mhz |_______|_______|_______|_______|
928 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
929 * code 011 010 001 000 | 100 101 110 111
931 #define PHY_VHT_CTRL_POS_1_BELOW (0x0)
932 #define PHY_VHT_CTRL_POS_2_BELOW (0x1)
933 #define PHY_VHT_CTRL_POS_3_BELOW (0x2)
934 #define PHY_VHT_CTRL_POS_4_BELOW (0x3)
935 #define PHY_VHT_CTRL_POS_1_ABOVE (0x4)
936 #define PHY_VHT_CTRL_POS_2_ABOVE (0x5)
937 #define PHY_VHT_CTRL_POS_3_ABOVE (0x6)
938 #define PHY_VHT_CTRL_POS_4_ABOVE (0x7)
942 * @channel: channel number
943 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
944 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
946 struct iwl_fw_channel_info {
953 #define PHY_RX_CHAIN_DRIVER_FORCE_POS (0)
954 #define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
955 (0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
956 #define PHY_RX_CHAIN_VALID_POS (1)
957 #define PHY_RX_CHAIN_VALID_MSK \
958 (0x7 << PHY_RX_CHAIN_VALID_POS)
959 #define PHY_RX_CHAIN_FORCE_SEL_POS (4)
960 #define PHY_RX_CHAIN_FORCE_SEL_MSK \
961 (0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
962 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
963 #define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
964 (0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
965 #define PHY_RX_CHAIN_CNT_POS (10)
966 #define PHY_RX_CHAIN_CNT_MSK \
967 (0x3 << PHY_RX_CHAIN_CNT_POS)
968 #define PHY_RX_CHAIN_MIMO_CNT_POS (12)
969 #define PHY_RX_CHAIN_MIMO_CNT_MSK \
970 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
971 #define PHY_RX_CHAIN_MIMO_FORCE_POS (14)
972 #define PHY_RX_CHAIN_MIMO_FORCE_MSK \
973 (0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
975 /* TODO: fix the value, make it depend on firmware at runtime? */
976 #define NUM_PHY_CTX 3
978 /* TODO: complete missing documentation */
980 * struct iwl_phy_context_cmd - config of the PHY context
981 * ( PHY_CONTEXT_CMD = 0x8 )
982 * @id_and_color: ID and color of the relevant Binding
983 * @action: action to perform, one of FW_CTXT_ACTION_*
984 * @apply_time: 0 means immediate apply and context switch.
985 * other value means apply new params after X usecs
986 * @tx_param_color: ???
990 * @acquisition_data: ???
991 * @dsp_cfg_flags: set to 0
993 struct iwl_phy_context_cmd {
994 /* COMMON_INDEX_HDR_API_S_VER_1 */
997 /* PHY_CONTEXT_DATA_API_S_VER_1 */
999 __le32 tx_param_color;
1000 struct iwl_fw_channel_info ci;
1001 __le32 txchain_info;
1002 __le32 rxchain_info;
1003 __le32 acquisition_data;
1004 __le32 dsp_cfg_flags;
1005 } __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
1010 * Command requests the firmware to create a time event for a certain duration
1011 * and remain on the given channel. This is done by using the Aux framework in
1013 * The command was first used for Hot Spot issues - but can be used regardless
1016 * ( HOT_SPOT_CMD 0x53 )
1018 * @id_and_color: ID and color of the MAC
1019 * @action: action to perform, one of FW_CTXT_ACTION_*
1020 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
1021 * event_unique_id should be the id of the time event assigned by ucode.
1022 * Otherwise ignore the event_unique_id.
1023 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
1025 * @channel_info: channel info
1026 * @node_addr: Our MAC Address
1027 * @reserved: reserved for alignment
1028 * @apply_time: GP2 value to start (should always be the current GP2 value)
1029 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
1030 * time by which start of the event is allowed to be postponed.
1031 * @duration: event duration in TU To calculate event duration:
1032 * timeEventDuration = min(duration, remainingQuota)
1034 struct iwl_hs20_roc_req {
1035 /* COMMON_INDEX_HDR_API_S_VER_1 hdr */
1036 __le32 id_and_color;
1038 __le32 event_unique_id;
1039 __le32 sta_id_and_color;
1040 struct iwl_fw_channel_info channel_info;
1041 u8 node_addr[ETH_ALEN];
1044 __le32 apply_time_max_delay;
1046 } __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
1049 * values for AUX ROC result values
1051 enum iwl_mvm_hot_spot {
1052 HOT_SPOT_RSP_STATUS_OK,
1053 HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
1054 HOT_SPOT_MAX_NUM_OF_SESSIONS,
1058 * Aux ROC command response
1060 * In response to iwl_hs20_roc_req the FW sends this command to notify the
1061 * driver the uid of the timevent.
1063 * ( HOT_SPOT_CMD 0x53 )
1065 * @event_unique_id: Unique ID of time event assigned by ucode
1066 * @status: Return status 0 is success, all the rest used for specific errors
1068 struct iwl_hs20_roc_res {
1069 __le32 event_unique_id;
1071 } __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
1073 #define IWL_RX_INFO_PHY_CNT 8
1074 #define IWL_RX_INFO_ENERGY_ANT_ABC_IDX 1
1075 #define IWL_RX_INFO_ENERGY_ANT_A_MSK 0x000000ff
1076 #define IWL_RX_INFO_ENERGY_ANT_B_MSK 0x0000ff00
1077 #define IWL_RX_INFO_ENERGY_ANT_C_MSK 0x00ff0000
1078 #define IWL_RX_INFO_ENERGY_ANT_A_POS 0
1079 #define IWL_RX_INFO_ENERGY_ANT_B_POS 8
1080 #define IWL_RX_INFO_ENERGY_ANT_C_POS 16
1082 #define IWL_RX_INFO_AGC_IDX 1
1083 #define IWL_RX_INFO_RSSI_AB_IDX 2
1084 #define IWL_OFDM_AGC_A_MSK 0x0000007f
1085 #define IWL_OFDM_AGC_A_POS 0
1086 #define IWL_OFDM_AGC_B_MSK 0x00003f80
1087 #define IWL_OFDM_AGC_B_POS 7
1088 #define IWL_OFDM_AGC_CODE_MSK 0x3fe00000
1089 #define IWL_OFDM_AGC_CODE_POS 20
1090 #define IWL_OFDM_RSSI_INBAND_A_MSK 0x00ff
1091 #define IWL_OFDM_RSSI_A_POS 0
1092 #define IWL_OFDM_RSSI_ALLBAND_A_MSK 0xff00
1093 #define IWL_OFDM_RSSI_ALLBAND_A_POS 8
1094 #define IWL_OFDM_RSSI_INBAND_B_MSK 0xff0000
1095 #define IWL_OFDM_RSSI_B_POS 16
1096 #define IWL_OFDM_RSSI_ALLBAND_B_MSK 0xff000000
1097 #define IWL_OFDM_RSSI_ALLBAND_B_POS 24
1100 * struct iwl_rx_phy_info - phy info
1101 * (REPLY_RX_PHY_CMD = 0xc0)
1102 * @non_cfg_phy_cnt: non configurable DSP phy data byte count
1103 * @cfg_phy_cnt: configurable DSP phy data byte count
1104 * @stat_id: configurable DSP phy data set ID
1106 * @system_timestamp: GP2 at on air rise
1107 * @timestamp: TSF at on air rise
1108 * @beacon_time_stamp: beacon at on-air rise
1109 * @phy_flags: general phy flags: band, modulation, ...
1110 * @channel: channel number
1111 * @non_cfg_phy_buf: for various implementations of non_cfg_phy
1112 * @rate_n_flags: RATE_MCS_*
1113 * @byte_count: frame's byte-count
1114 * @frame_time: frame's time on the air, based on byte count and frame rate
1116 * @mac_active_msk: what MACs were active when the frame was received
1118 * Before each Rx, the device sends this data. It contains PHY information
1119 * about the reception of the packet.
1121 struct iwl_rx_phy_info {
1126 __le32 system_timestamp;
1128 __le32 beacon_time_stamp;
1131 __le32 non_cfg_phy[IWL_RX_INFO_PHY_CNT];
1132 __le32 rate_n_flags;
1134 __le16 mac_active_msk;
1139 * TCP offload Rx assist info
1141 * bits 0:3 - reserved
1142 * bits 4:7 - MIC CRC length
1143 * bits 8:12 - MAC header length
1144 * bit 13 - Padding indication
1145 * bit 14 - A-AMSDU indication
1146 * bit 15 - Offload enabled
1148 enum iwl_csum_rx_assist_info {
1149 CSUM_RXA_RESERVED_MASK = 0x000f,
1150 CSUM_RXA_MICSIZE_MASK = 0x00f0,
1151 CSUM_RXA_HEADERLEN_MASK = 0x1f00,
1152 CSUM_RXA_PADD = BIT(13),
1153 CSUM_RXA_AMSDU = BIT(14),
1154 CSUM_RXA_ENA = BIT(15)
1158 * struct iwl_rx_mpdu_res_start - phy info
1159 * @assist: see CSUM_RX_ASSIST_ above
1161 struct iwl_rx_mpdu_res_start {
1164 } __packed; /* _RX_MPDU_RES_START_API_S_VER_2 */
1167 * enum iwl_rx_phy_flags - to parse %iwl_rx_phy_info phy_flags
1168 * @RX_RES_PHY_FLAGS_BAND_24: true if the packet was received on 2.4 band
1169 * @RX_RES_PHY_FLAGS_MOD_CCK:
1170 * @RX_RES_PHY_FLAGS_SHORT_PREAMBLE: true if packet's preamble was short
1171 * @RX_RES_PHY_FLAGS_NARROW_BAND:
1172 * @RX_RES_PHY_FLAGS_ANTENNA: antenna on which the packet was received
1173 * @RX_RES_PHY_FLAGS_AGG: set if the packet was part of an A-MPDU
1174 * @RX_RES_PHY_FLAGS_OFDM_HT: The frame was an HT frame
1175 * @RX_RES_PHY_FLAGS_OFDM_GF: The frame used GF preamble
1176 * @RX_RES_PHY_FLAGS_OFDM_VHT: The frame was a VHT frame
1178 enum iwl_rx_phy_flags {
1179 RX_RES_PHY_FLAGS_BAND_24 = BIT(0),
1180 RX_RES_PHY_FLAGS_MOD_CCK = BIT(1),
1181 RX_RES_PHY_FLAGS_SHORT_PREAMBLE = BIT(2),
1182 RX_RES_PHY_FLAGS_NARROW_BAND = BIT(3),
1183 RX_RES_PHY_FLAGS_ANTENNA = (0x7 << 4),
1184 RX_RES_PHY_FLAGS_ANTENNA_POS = 4,
1185 RX_RES_PHY_FLAGS_AGG = BIT(7),
1186 RX_RES_PHY_FLAGS_OFDM_HT = BIT(8),
1187 RX_RES_PHY_FLAGS_OFDM_GF = BIT(9),
1188 RX_RES_PHY_FLAGS_OFDM_VHT = BIT(10),
1192 * enum iwl_mvm_rx_status - written by fw for each Rx packet
1193 * @RX_MPDU_RES_STATUS_CRC_OK: CRC is fine
1194 * @RX_MPDU_RES_STATUS_OVERRUN_OK: there was no RXE overflow
1195 * @RX_MPDU_RES_STATUS_SRC_STA_FOUND:
1196 * @RX_MPDU_RES_STATUS_KEY_VALID:
1197 * @RX_MPDU_RES_STATUS_KEY_PARAM_OK:
1198 * @RX_MPDU_RES_STATUS_ICV_OK: ICV is fine, if not, the packet is destroyed
1199 * @RX_MPDU_RES_STATUS_MIC_OK: used for CCM alg only. TKIP MIC is checked
1201 * @RX_MPDU_RES_STATUS_TTAK_OK: TTAK is fine
1202 * @RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR: valid for alg = CCM_CMAC or
1203 * alg = CCM only. Checks replay attack for 11w frames. Relevant only if
1204 * %RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME is set.
1205 * @RX_MPDU_RES_STATUS_SEC_NO_ENC: this frame is not encrypted
1206 * @RX_MPDU_RES_STATUS_SEC_WEP_ENC: this frame is encrypted using WEP
1207 * @RX_MPDU_RES_STATUS_SEC_CCM_ENC: this frame is encrypted using CCM
1208 * @RX_MPDU_RES_STATUS_SEC_TKIP_ENC: this frame is encrypted using TKIP
1209 * @RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC: this frame is encrypted using CCM_CMAC
1210 * @RX_MPDU_RES_STATUS_SEC_ENC_ERR: this frame couldn't be decrypted
1211 * @RX_MPDU_RES_STATUS_SEC_ENC_MSK: bitmask of the encryption algorithm
1212 * @RX_MPDU_RES_STATUS_DEC_DONE: this frame has been successfully decrypted
1213 * @RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP:
1214 * @RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP:
1215 * @RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT:
1216 * @RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME: this frame is an 11w management frame
1217 * @RX_MPDU_RES_STATUS_CSUM_DONE: checksum was done by the hw
1218 * @RX_MPDU_RES_STATUS_CSUM_OK: checksum found no errors
1219 * @RX_MPDU_RES_STATUS_HASH_INDEX_MSK:
1220 * @RX_MPDU_RES_STATUS_STA_ID_MSK:
1221 * @RX_MPDU_RES_STATUS_RRF_KILL:
1222 * @RX_MPDU_RES_STATUS_FILTERING_MSK:
1223 * @RX_MPDU_RES_STATUS2_FILTERING_MSK:
1225 enum iwl_mvm_rx_status {
1226 RX_MPDU_RES_STATUS_CRC_OK = BIT(0),
1227 RX_MPDU_RES_STATUS_OVERRUN_OK = BIT(1),
1228 RX_MPDU_RES_STATUS_SRC_STA_FOUND = BIT(2),
1229 RX_MPDU_RES_STATUS_KEY_VALID = BIT(3),
1230 RX_MPDU_RES_STATUS_KEY_PARAM_OK = BIT(4),
1231 RX_MPDU_RES_STATUS_ICV_OK = BIT(5),
1232 RX_MPDU_RES_STATUS_MIC_OK = BIT(6),
1233 RX_MPDU_RES_STATUS_TTAK_OK = BIT(7),
1234 RX_MPDU_RES_STATUS_MNG_FRAME_REPLAY_ERR = BIT(7),
1235 RX_MPDU_RES_STATUS_SEC_NO_ENC = (0 << 8),
1236 RX_MPDU_RES_STATUS_SEC_WEP_ENC = (1 << 8),
1237 RX_MPDU_RES_STATUS_SEC_CCM_ENC = (2 << 8),
1238 RX_MPDU_RES_STATUS_SEC_TKIP_ENC = (3 << 8),
1239 RX_MPDU_RES_STATUS_SEC_EXT_ENC = (4 << 8),
1240 RX_MPDU_RES_STATUS_SEC_CCM_CMAC_ENC = (6 << 8),
1241 RX_MPDU_RES_STATUS_SEC_ENC_ERR = (7 << 8),
1242 RX_MPDU_RES_STATUS_SEC_ENC_MSK = (7 << 8),
1243 RX_MPDU_RES_STATUS_DEC_DONE = BIT(11),
1244 RX_MPDU_RES_STATUS_PROTECT_FRAME_BIT_CMP = BIT(12),
1245 RX_MPDU_RES_STATUS_EXT_IV_BIT_CMP = BIT(13),
1246 RX_MPDU_RES_STATUS_KEY_ID_CMP_BIT = BIT(14),
1247 RX_MPDU_RES_STATUS_ROBUST_MNG_FRAME = BIT(15),
1248 RX_MPDU_RES_STATUS_CSUM_DONE = BIT(16),
1249 RX_MPDU_RES_STATUS_CSUM_OK = BIT(17),
1250 RX_MPDU_RES_STATUS_HASH_INDEX_MSK = (0x3F0000),
1251 RX_MPDU_RES_STATUS_STA_ID_MSK = (0x1f000000),
1252 RX_MPDU_RES_STATUS_RRF_KILL = BIT(29),
1253 RX_MPDU_RES_STATUS_FILTERING_MSK = (0xc00000),
1254 RX_MPDU_RES_STATUS2_FILTERING_MSK = (0xc0000000),
1258 * struct iwl_radio_version_notif - information on the radio version
1259 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1264 struct iwl_radio_version_notif {
1265 __le32 radio_flavor;
1268 } __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1270 enum iwl_card_state_flags {
1271 CARD_ENABLED = 0x00,
1272 HW_CARD_DISABLED = 0x01,
1273 SW_CARD_DISABLED = 0x02,
1274 CT_KILL_CARD_DISABLED = 0x04,
1275 HALT_CARD_DISABLED = 0x08,
1276 CARD_DISABLED_MSK = 0x0f,
1277 CARD_IS_RX_ON = 0x10,
1281 * struct iwl_radio_version_notif - information on the radio version
1282 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1283 * @flags: %iwl_card_state_flags
1285 struct iwl_card_state_notif {
1287 } __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1290 * struct iwl_missed_beacons_notif - information on missed beacons
1291 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1292 * @mac_id: interface ID
1293 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1294 * beacons since last RX.
1295 * @consec_missed_beacons: number of consecutive missed beacons
1296 * @num_expected_beacons:
1297 * @num_recvd_beacons:
1299 struct iwl_missed_beacons_notif {
1301 __le32 consec_missed_beacons_since_last_rx;
1302 __le32 consec_missed_beacons;
1303 __le32 num_expected_beacons;
1304 __le32 num_recvd_beacons;
1305 } __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1308 * struct iwl_mfuart_load_notif - mfuart image version & status
1309 * ( MFUART_LOAD_NOTIFICATION = 0xb1 )
1310 * @installed_ver: installed image version
1311 * @external_ver: external image version
1312 * @status: MFUART loading status
1313 * @duration: MFUART loading time
1315 struct iwl_mfuart_load_notif {
1316 __le32 installed_ver;
1317 __le32 external_ver;
1320 } __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
1323 * struct iwl_set_calib_default_cmd - set default value for calibration.
1324 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1325 * @calib_index: the calibration to set value for
1327 * @data: the value to set for the calibration result
1329 struct iwl_set_calib_default_cmd {
1333 } __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1335 #define MAX_PORT_ID_NUM 2
1336 #define MAX_MCAST_FILTERING_ADDRESSES 256
1339 * struct iwl_mcast_filter_cmd - configure multicast filter.
1340 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1341 * @port_id: Multicast MAC addresses array specifier. This is a strange way
1342 * to identify network interface adopted in host-device IF.
1343 * It is used by FW as index in array of addresses. This array has
1344 * MAX_PORT_ID_NUM members.
1345 * @count: Number of MAC addresses in the array
1346 * @pass_all: Set 1 to pass all multicast packets.
1347 * @bssid: current association BSSID.
1348 * @addr_list: Place holder for array of MAC addresses.
1349 * IMPORTANT: add padding if necessary to ensure DWORD alignment.
1351 struct iwl_mcast_filter_cmd {
1359 } __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1361 #define MAX_BCAST_FILTERS 8
1362 #define MAX_BCAST_FILTER_ATTRS 2
1365 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1366 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1367 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1368 * start of ip payload).
1370 enum iwl_mvm_bcast_filter_attr_offset {
1371 BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1372 BCAST_FILTER_OFFSET_IP_END = 1,
1376 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1377 * @offset_type: &enum iwl_mvm_bcast_filter_attr_offset.
1378 * @offset: starting offset of this pattern.
1379 * @val: value to match - big endian (MSB is the first
1380 * byte to match from offset pos).
1381 * @mask: mask to match (big endian).
1383 struct iwl_fw_bcast_filter_attr {
1389 } __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1392 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1393 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1394 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1396 enum iwl_mvm_bcast_filter_frame_type {
1397 BCAST_FILTER_FRAME_TYPE_ALL = 0,
1398 BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1402 * struct iwl_fw_bcast_filter - broadcast filter
1403 * @discard: discard frame (1) or let it pass (0).
1404 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1405 * @num_attrs: number of valid attributes in this filter.
1406 * @attrs: attributes of this filter. a filter is considered matched
1407 * only when all its attributes are matched (i.e. AND relationship)
1409 struct iwl_fw_bcast_filter {
1414 struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1415 } __packed; /* BCAST_FILTER_S_VER_1 */
1418 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1419 * @default_discard: default action for this mac (discard (1) / pass (0)).
1420 * @attached_filters: bitmap of relevant filters for this mac.
1422 struct iwl_fw_bcast_mac {
1425 __le16 attached_filters;
1426 } __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1429 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1430 * @disable: enable (0) / disable (1)
1431 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1432 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1433 * @filters: broadcast filters
1434 * @macs: broadcast filtering configuration per-mac
1436 struct iwl_bcast_filter_cmd {
1438 u8 max_bcast_filters;
1441 struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1442 struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1443 } __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1446 * enum iwl_mvm_marker_id - maker ids
1448 * The ids for different type of markers to insert into the usniffer logs
1450 enum iwl_mvm_marker_id {
1451 MARKER_ID_TX_FRAME_LATENCY = 1,
1452 }; /* MARKER_ID_API_E_VER_1 */
1455 * struct iwl_mvm_marker - mark info into the usniffer logs
1457 * (MARKER_CMD = 0xcb)
1459 * Mark the UTC time stamp into the usniffer logs together with additional
1460 * metadata, so the usniffer output can be parsed.
1461 * In the command response the ucode will return the GP2 time.
1463 * @dw_len: The amount of dwords following this byte including this byte.
1464 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1465 * @reserved: reserved.
1466 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1467 * @metadata: additional meta data that will be written to the unsiffer log
1469 struct iwl_mvm_marker {
1475 } __packed; /* MARKER_API_S_VER_1 */
1478 * enum iwl_dc2dc_config_id - flag ids
1480 * Ids of dc2dc configuration flags
1482 enum iwl_dc2dc_config_id {
1483 DCDC_LOW_POWER_MODE_MSK_SET = 0x1, /* not used */
1484 DCDC_FREQ_TUNE_SET = 0x2,
1485 }; /* MARKER_ID_API_E_VER_1 */
1488 * struct iwl_dc2dc_config_cmd - configure dc2dc values
1490 * (DC2DC_CONFIG_CMD = 0x83)
1492 * Set/Get & configure dc2dc values.
1493 * The command always returns the current dc2dc values.
1495 * @flags: set/get dc2dc
1496 * @enable_low_power_mode: not used.
1497 * @dc2dc_freq_tune0: frequency divider - digital domain
1498 * @dc2dc_freq_tune1: frequency divider - analog domain
1500 struct iwl_dc2dc_config_cmd {
1502 __le32 enable_low_power_mode; /* not used */
1503 __le32 dc2dc_freq_tune0;
1504 __le32 dc2dc_freq_tune1;
1505 } __packed; /* DC2DC_CONFIG_CMD_API_S_VER_1 */
1508 * struct iwl_dc2dc_config_resp - response for iwl_dc2dc_config_cmd
1510 * Current dc2dc values returned by the FW.
1512 * @dc2dc_freq_tune0: frequency divider - digital domain
1513 * @dc2dc_freq_tune1: frequency divider - analog domain
1515 struct iwl_dc2dc_config_resp {
1516 __le32 dc2dc_freq_tune0;
1517 __le32 dc2dc_freq_tune1;
1518 } __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */
1520 /***********************************
1522 ***********************************/
1523 /* Smart Fifo state */
1525 SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1532 /* Smart Fifo possible scenario */
1533 enum iwl_sf_scenario {
1534 SF_SCENARIO_SINGLE_UNICAST,
1535 SF_SCENARIO_AGG_UNICAST,
1536 SF_SCENARIO_MULTICAST,
1537 SF_SCENARIO_BA_RESP,
1538 SF_SCENARIO_TX_RESP,
1542 #define SF_TRANSIENT_STATES_NUMBER 2 /* SF_LONG_DELAY_ON and SF_FULL_ON */
1543 #define SF_NUM_TIMEOUT_TYPES 2 /* Aging timer and Idle timer */
1545 /* smart FIFO default values */
1546 #define SF_W_MARK_SISO 6144
1547 #define SF_W_MARK_MIMO2 8192
1548 #define SF_W_MARK_MIMO3 6144
1549 #define SF_W_MARK_LEGACY 4096
1550 #define SF_W_MARK_SCAN 4096
1552 /* SF Scenarios timers for default configuration (aligned to 32 uSec) */
1553 #define SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1554 #define SF_SINGLE_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1555 #define SF_AGG_UNICAST_IDLE_TIMER_DEF 160 /* 150 uSec */
1556 #define SF_AGG_UNICAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1557 #define SF_MCAST_IDLE_TIMER_DEF 160 /* 150 mSec */
1558 #define SF_MCAST_AGING_TIMER_DEF 400 /* 0.4 mSec */
1559 #define SF_BA_IDLE_TIMER_DEF 160 /* 150 uSec */
1560 #define SF_BA_AGING_TIMER_DEF 400 /* 0.4 mSec */
1561 #define SF_TX_RE_IDLE_TIMER_DEF 160 /* 150 uSec */
1562 #define SF_TX_RE_AGING_TIMER_DEF 400 /* 0.4 mSec */
1564 /* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */
1565 #define SF_SINGLE_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1566 #define SF_SINGLE_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1567 #define SF_AGG_UNICAST_IDLE_TIMER 320 /* 300 uSec */
1568 #define SF_AGG_UNICAST_AGING_TIMER 2016 /* 2 mSec */
1569 #define SF_MCAST_IDLE_TIMER 2016 /* 2 mSec */
1570 #define SF_MCAST_AGING_TIMER 10016 /* 10 mSec */
1571 #define SF_BA_IDLE_TIMER 320 /* 300 uSec */
1572 #define SF_BA_AGING_TIMER 2016 /* 2 mSec */
1573 #define SF_TX_RE_IDLE_TIMER 320 /* 300 uSec */
1574 #define SF_TX_RE_AGING_TIMER 2016 /* 2 mSec */
1576 #define SF_LONG_DELAY_AGING_TIMER 1000000 /* 1 Sec */
1578 #define SF_CFG_DUMMY_NOTIF_OFF BIT(16)
1581 * Smart Fifo configuration command.
1582 * @state: smart fifo state, types listed in enum %iwl_sf_sate.
1583 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1584 * @long_delay_timeouts: aging and idle timer values for each scenario
1585 * in long delay state.
1586 * @full_on_timeouts: timer values for each scenario in full on state.
1588 struct iwl_sf_cfg_cmd {
1590 __le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1591 __le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1592 __le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1593 } __packed; /* SF_CFG_API_S_VER_2 */
1595 /***********************************
1596 * Location Aware Regulatory (LAR) API - MCC updates
1597 ***********************************/
1600 * struct iwl_mcc_update_cmd - Request the device to update geographic
1601 * regulatory profile according to the given MCC (Mobile Country Code).
1602 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1603 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1604 * MCC in the cmd response will be the relevant MCC in the NVM.
1605 * @mcc: given mobile country code
1606 * @source_id: the source from where we got the MCC, see iwl_mcc_source
1607 * @reserved: reserved for alignment
1609 struct iwl_mcc_update_cmd {
1613 } __packed; /* LAR_UPDATE_MCC_CMD_API_S */
1616 * iwl_mcc_update_resp - response to MCC_UPDATE_CMD.
1617 * Contains the new channel control profile map, if changed, and the new MCC
1618 * (mobile country code).
1619 * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
1620 * @status: see &enum iwl_mcc_update_status
1621 * @mcc: the new applied MCC
1622 * @cap: capabilities for all channels which matches the MCC
1623 * @source_id: the MCC source, see iwl_mcc_source
1624 * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
1625 * channels, depending on platform)
1626 * @channels: channel control data map, DWORD for each channel. Only the first
1629 struct iwl_mcc_update_resp {
1636 } __packed; /* LAR_UPDATE_MCC_CMD_RESP_S */
1639 * struct iwl_mcc_chub_notif - chub notifies of mcc change
1640 * (MCC_CHUB_UPDATE_CMD = 0xc9)
1641 * The Chub (Communication Hub, CommsHUB) is a HW component that connects to
1642 * the cellular and connectivity cores that gets updates of the mcc, and
1643 * notifies the ucode directly of any mcc change.
1644 * The ucode requests the driver to request the device to update geographic
1645 * regulatory profile according to the given MCC (Mobile Country Code).
1646 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1647 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1648 * MCC in the cmd response will be the relevant MCC in the NVM.
1649 * @mcc: given mobile country code
1650 * @source_id: identity of the change originator, see iwl_mcc_source
1651 * @reserved1: reserved for alignment
1653 struct iwl_mcc_chub_notif {
1657 } __packed; /* LAR_MCC_NOTIFY_S */
1659 enum iwl_mcc_update_status {
1660 MCC_RESP_NEW_CHAN_PROFILE,
1661 MCC_RESP_SAME_CHAN_PROFILE,
1663 MCC_RESP_NVM_DISABLED,
1665 MCC_RESP_LOW_PRIORITY,
1668 enum iwl_mcc_source {
1669 MCC_SOURCE_OLD_FW = 0,
1671 MCC_SOURCE_BIOS = 2,
1672 MCC_SOURCE_3G_LTE_HOST = 3,
1673 MCC_SOURCE_3G_LTE_DEVICE = 4,
1674 MCC_SOURCE_WIFI = 5,
1675 MCC_SOURCE_RESERVED = 6,
1676 MCC_SOURCE_DEFAULT = 7,
1677 MCC_SOURCE_UNINITIALIZED = 8,
1678 MCC_SOURCE_GET_CURRENT = 0x10
1681 /* DTS measurements */
1683 enum iwl_dts_measurement_flags {
1684 DTS_TRIGGER_CMD_FLAGS_TEMP = BIT(0),
1685 DTS_TRIGGER_CMD_FLAGS_VOLT = BIT(1),
1689 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements
1691 * @flags: indicates which measurements we want as specified in &enum
1692 * iwl_dts_measurement_flags
1694 struct iwl_dts_measurement_cmd {
1696 } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */
1699 * iwl_dts_measurement_notif - notification received with the measurements
1701 * @temp: the measured temperature
1702 * @voltage: the measured voltage
1704 struct iwl_dts_measurement_notif {
1707 } __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */
1709 /***********************************
1711 ***********************************/
1713 /* Type of TDLS request */
1714 enum iwl_tdls_channel_switch_type {
1715 TDLS_SEND_CHAN_SW_REQ = 0,
1716 TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH,
1718 }; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */
1721 * Switch timing sub-element in a TDLS channel-switch command
1722 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
1723 * received from peer
1724 * @max_offchan_duration: What amount of microseconds out of a DTIM is given
1725 * to the TDLS off-channel communication. For instance if the DTIM is
1726 * 200TU and the TDLS peer is to be given 25% of the time, the value
1727 * given will be 50TU, or 50 * 1024 if translated into microseconds.
1728 * @switch_time: switch time the peer sent in its channel switch timing IE
1729 * @switch_timout: switch timeout the peer sent in its channel switch timing IE
1731 struct iwl_tdls_channel_switch_timing {
1732 __le32 frame_timestamp; /* GP2 time of peer packet Rx */
1733 __le32 max_offchan_duration; /* given in micro-seconds */
1734 __le32 switch_time; /* given in micro-seconds */
1735 __le32 switch_timeout; /* given in micro-seconds */
1736 } __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */
1738 #define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200
1741 * TDLS channel switch frame template
1743 * A template representing a TDLS channel-switch request or response frame
1745 * @switch_time_offset: offset to the channel switch timing IE in the template
1746 * @tx_cmd: Tx parameters for the frame
1749 struct iwl_tdls_channel_switch_frame {
1750 __le32 switch_time_offset;
1751 struct iwl_tx_cmd tx_cmd;
1752 u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE];
1753 } __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */
1756 * TDLS channel switch command
1758 * The command is sent to initiate a channel switch and also in response to
1759 * incoming TDLS channel-switch request/response packets from remote peers.
1761 * @switch_type: see &enum iwl_tdls_channel_switch_type
1762 * @peer_sta_id: station id of TDLS peer
1763 * @ci: channel we switch to
1764 * @timing: timing related data for command
1765 * @frame: channel-switch request/response template, depending to switch_type
1767 struct iwl_tdls_channel_switch_cmd {
1770 struct iwl_fw_channel_info ci;
1771 struct iwl_tdls_channel_switch_timing timing;
1772 struct iwl_tdls_channel_switch_frame frame;
1773 } __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */
1776 * TDLS channel switch start notification
1778 * @status: non-zero on success
1779 * @offchannel_duration: duration given in microseconds
1780 * @sta_id: peer currently performing the channel-switch with
1782 struct iwl_tdls_channel_switch_notif {
1784 __le32 offchannel_duration;
1786 } __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */
1791 * @sta_id: station id of the TDLS peer
1792 * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx
1793 * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer
1794 * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise
1796 struct iwl_tdls_sta_info {
1799 __le16 tx_to_peer_ssn;
1800 __le32 is_initiator;
1801 } __packed; /* TDLS_STA_INFO_VER_1 */
1804 * TDLS basic config command
1806 * @id_and_color: MAC id and color being configured
1807 * @tdls_peer_count: amount of currently connected TDLS peers
1808 * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx
1809 * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP
1810 * @sta_info: per-station info. Only the first tdls_peer_count entries are set
1811 * @pti_req_data_offset: offset of network-level data for the PTI template
1812 * @pti_req_tx_cmd: Tx parameters for PTI request template
1813 * @pti_req_template: PTI request template data
1815 struct iwl_tdls_config_cmd {
1816 __le32 id_and_color; /* mac id and color */
1819 __le16 tx_to_ap_ssn;
1820 struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT];
1822 __le32 pti_req_data_offset;
1823 struct iwl_tx_cmd pti_req_tx_cmd;
1824 u8 pti_req_template[0];
1825 } __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */
1828 * TDLS per-station config information from FW
1830 * @sta_id: station id of the TDLS peer
1831 * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to
1834 struct iwl_tdls_config_sta_info_res {
1836 __le16 tx_to_peer_last_seq;
1837 } __packed; /* TDLS_STA_INFO_RSP_VER_1 */
1840 * TDLS config information from FW
1842 * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP
1843 * @sta_info: per-station TDLS config information
1845 struct iwl_tdls_config_res {
1846 __le32 tx_to_ap_last_seq;
1847 struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
1848 } __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
1850 #define TX_FIFO_MAX_NUM 8
1851 #define RX_FIFO_MAX_NUM 2
1854 * Shared memory configuration information from the FW
1856 * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
1858 * @shared_mem_size: shared memory size
1859 * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
1860 * 0x0 as accessible only via DBGM RDAT)
1861 * @sample_buff_size: internal sample buff size
1862 * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
1863 * 8000 HW set to 0x0 as not accessible)
1864 * @txfifo_size: size of TXF0 ... TXF7
1865 * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
1866 * @page_buff_addr: used by UMAC and performance debug (page miss analysis),
1867 * when paging is not supported this should be 0
1868 * @page_buff_size: size of %page_buff_addr
1870 struct iwl_shared_mem_cfg {
1871 __le32 shared_mem_addr;
1872 __le32 shared_mem_size;
1873 __le32 sample_buff_addr;
1874 __le32 sample_buff_size;
1876 __le32 txfifo_size[TX_FIFO_MAX_NUM];
1877 __le32 rxfifo_size[RX_FIFO_MAX_NUM];
1878 __le32 page_buff_addr;
1879 __le32 page_buff_size;
1880 } __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */
1882 #endif /* __fw_api_h__ */