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[karo-tx-linux.git] / drivers / net / wireless / rtl8187_dev.c
1 /*
2  * Linux device driver for RTL8187
3  *
4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6  *
7  * Based on the r8187 driver, which is:
8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9  *
10  * Magic delays and register offsets below are taken from the original
11  * r8187 driver sources.  Thanks to Realtek for their support!
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as
15  * published by the Free Software Foundation.
16  */
17
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
24
25 #include "rtl8187.h"
26 #include "rtl8187_rtl8225.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
31 MODULE_LICENSE("GPL");
32
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
34         /* Asus */
35         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
36         /* Belkin */
37         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
38         /* Realtek */
39         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
40         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
41         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
42         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
43         /* Netgear */
44         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
45         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
46         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
47         /* HP */
48         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
49         /* Sitecom */
50         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
51         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
52         /* Abocom */
53         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
54         {}
55 };
56
57 MODULE_DEVICE_TABLE(usb, rtl8187_table);
58
59 static const struct ieee80211_rate rtl818x_rates[] = {
60         { .bitrate = 10, .hw_value = 0, },
61         { .bitrate = 20, .hw_value = 1, },
62         { .bitrate = 55, .hw_value = 2, },
63         { .bitrate = 110, .hw_value = 3, },
64         { .bitrate = 60, .hw_value = 4, },
65         { .bitrate = 90, .hw_value = 5, },
66         { .bitrate = 120, .hw_value = 6, },
67         { .bitrate = 180, .hw_value = 7, },
68         { .bitrate = 240, .hw_value = 8, },
69         { .bitrate = 360, .hw_value = 9, },
70         { .bitrate = 480, .hw_value = 10, },
71         { .bitrate = 540, .hw_value = 11, },
72 };
73
74 static const struct ieee80211_channel rtl818x_channels[] = {
75         { .center_freq = 2412 },
76         { .center_freq = 2417 },
77         { .center_freq = 2422 },
78         { .center_freq = 2427 },
79         { .center_freq = 2432 },
80         { .center_freq = 2437 },
81         { .center_freq = 2442 },
82         { .center_freq = 2447 },
83         { .center_freq = 2452 },
84         { .center_freq = 2457 },
85         { .center_freq = 2462 },
86         { .center_freq = 2467 },
87         { .center_freq = 2472 },
88         { .center_freq = 2484 },
89 };
90
91 static void rtl8187_iowrite_async_cb(struct urb *urb)
92 {
93         kfree(urb->context);
94         usb_free_urb(urb);
95 }
96
97 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
98                                   void *data, u16 len)
99 {
100         struct usb_ctrlrequest *dr;
101         struct urb *urb;
102         struct rtl8187_async_write_data {
103                 u8 data[4];
104                 struct usb_ctrlrequest dr;
105         } *buf;
106         int rc;
107
108         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
109         if (!buf)
110                 return;
111
112         urb = usb_alloc_urb(0, GFP_ATOMIC);
113         if (!urb) {
114                 kfree(buf);
115                 return;
116         }
117
118         dr = &buf->dr;
119
120         dr->bRequestType = RTL8187_REQT_WRITE;
121         dr->bRequest = RTL8187_REQ_SET_REG;
122         dr->wValue = addr;
123         dr->wIndex = 0;
124         dr->wLength = cpu_to_le16(len);
125
126         memcpy(buf, data, len);
127
128         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
129                              (unsigned char *)dr, buf, len,
130                              rtl8187_iowrite_async_cb, buf);
131         rc = usb_submit_urb(urb, GFP_ATOMIC);
132         if (rc < 0) {
133                 kfree(buf);
134                 usb_free_urb(urb);
135         }
136 }
137
138 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
139                                            __le32 *addr, u32 val)
140 {
141         __le32 buf = cpu_to_le32(val);
142
143         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
144                               &buf, sizeof(buf));
145 }
146
147 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
148 {
149         struct rtl8187_priv *priv = dev->priv;
150
151         data <<= 8;
152         data |= addr | 0x80;
153
154         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
155         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
156         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
157         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
158
159         msleep(1);
160 }
161
162 static void rtl8187_tx_cb(struct urb *urb)
163 {
164         struct sk_buff *skb = (struct sk_buff *)urb->context;
165         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
166         struct ieee80211_hw *hw = info->driver_data[0];
167         struct rtl8187_priv *priv = hw->priv;
168
169         usb_free_urb(info->driver_data[1]);
170         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
171                                           sizeof(struct rtl8187_tx_hdr));
172         memset(&info->status, 0, sizeof(info->status));
173         info->flags |= IEEE80211_TX_STAT_ACK;
174         ieee80211_tx_status_irqsafe(hw, skb);
175 }
176
177 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
178 {
179         struct rtl8187_priv *priv = dev->priv;
180         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
181         struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
182         unsigned int ep;
183         void *buf;
184         struct urb *urb;
185         __le16 rts_dur = 0;
186         u32 flags;
187         int rc;
188
189         urb = usb_alloc_urb(0, GFP_ATOMIC);
190         if (!urb) {
191                 kfree_skb(skb);
192                 return 0;
193         }
194
195         flags = skb->len;
196         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
197
198         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
199         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
200                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
201         if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
202                 flags |= RTL818X_TX_DESC_FLAG_RTS;
203                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
204                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
205                                                  skb->len, info);
206         } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
207                 flags |= RTL818X_TX_DESC_FLAG_CTS;
208                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
209         }
210
211         if (!priv->is_rtl8187b) {
212                 struct rtl8187_tx_hdr *hdr =
213                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
214                 hdr->flags = cpu_to_le32(flags);
215                 hdr->len = 0;
216                 hdr->rts_duration = rts_dur;
217                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
218                 buf = hdr;
219
220                 ep = 2;
221         } else {
222                 /* fc needs to be calculated before skb_push() */
223                 unsigned int epmap[4] = { 6, 7, 5, 4 };
224                 struct ieee80211_hdr *tx_hdr =
225                         (struct ieee80211_hdr *)(skb->data);
226                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
227
228                 struct rtl8187b_tx_hdr *hdr =
229                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
230                 struct ieee80211_rate *txrate =
231                         ieee80211_get_tx_rate(dev, info);
232                 memset(hdr, 0, sizeof(*hdr));
233                 hdr->flags = cpu_to_le32(flags);
234                 hdr->rts_duration = rts_dur;
235                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
236                 hdr->tx_duration =
237                         ieee80211_generic_frame_duration(dev, priv->vif,
238                                                          skb->len, txrate);
239                 buf = hdr;
240
241                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
242                         ep = 12;
243                 else
244                         ep = epmap[skb_get_queue_mapping(skb)];
245         }
246
247         /* FIXME: The sequence that follows is needed for this driver to
248          * work with mac80211 since "mac80211: fix TX sequence numbers".
249          * As with the temporary code in rt2x00, changes will be needed
250          * to get proper sequence numbers on beacons. In addition, this
251          * patch places the sequence number in the hardware state, which
252          * limits us to a single virtual state.
253          */
254         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
255                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
256                         priv->seqno += 0x10;
257                 ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
258                 ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
259         }
260
261         info->driver_data[0] = dev;
262         info->driver_data[1] = urb;
263
264         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
265                           buf, skb->len, rtl8187_tx_cb, skb);
266         urb->transfer_flags |= URB_ZERO_PACKET;
267         rc = usb_submit_urb(urb, GFP_ATOMIC);
268         if (rc < 0) {
269                 usb_free_urb(urb);
270                 kfree_skb(skb);
271         }
272
273         return 0;
274 }
275
276 static void rtl8187_rx_cb(struct urb *urb)
277 {
278         struct sk_buff *skb = (struct sk_buff *)urb->context;
279         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
280         struct ieee80211_hw *dev = info->dev;
281         struct rtl8187_priv *priv = dev->priv;
282         struct ieee80211_rx_status rx_status = { 0 };
283         int rate, signal;
284         u32 flags;
285         u32 quality;
286
287         spin_lock(&priv->rx_queue.lock);
288         if (skb->next)
289                 __skb_unlink(skb, &priv->rx_queue);
290         else {
291                 spin_unlock(&priv->rx_queue.lock);
292                 return;
293         }
294         spin_unlock(&priv->rx_queue.lock);
295
296         if (unlikely(urb->status)) {
297                 usb_free_urb(urb);
298                 dev_kfree_skb_irq(skb);
299                 return;
300         }
301
302         skb_put(skb, urb->actual_length);
303         if (!priv->is_rtl8187b) {
304                 struct rtl8187_rx_hdr *hdr =
305                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
306                 flags = le32_to_cpu(hdr->flags);
307                 signal = hdr->signal & 0x7f;
308                 rx_status.antenna = (hdr->signal >> 7) & 1;
309                 rx_status.noise = hdr->noise;
310                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
311                 priv->quality = signal;
312                 rx_status.qual = priv->quality;
313                 priv->noise = hdr->noise;
314                 rate = (flags >> 20) & 0xF;
315                 if (rate > 3) { /* OFDM rate */
316                         if (signal > 90)
317                                 signal = 90;
318                         else if (signal < 25)
319                                 signal = 25;
320                         signal = 90 - signal;
321                 } else {        /* CCK rate */
322                         if (signal > 95)
323                                 signal = 95;
324                         else if (signal < 30)
325                                 signal = 30;
326                         signal = 95 - signal;
327                 }
328                 rx_status.signal = signal;
329                 priv->signal = signal;
330         } else {
331                 struct rtl8187b_rx_hdr *hdr =
332                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
333                 /* The Realtek datasheet for the RTL8187B shows that the RX
334                  * header contains the following quantities: signal quality,
335                  * RSSI, AGC, the received power in dB, and the measured SNR.
336                  * In testing, none of these quantities show qualitative
337                  * agreement with AP signal strength, except for the AGC,
338                  * which is inversely proportional to the strength of the
339                  * signal. In the following, the quality and signal strength
340                  * are derived from the AGC. The arbitrary scaling constants
341                  * are chosen to make the results close to the values obtained
342                  * for a BCM4312 using b43 as the driver. The noise is ignored
343                  * for now.
344                  */
345                 flags = le32_to_cpu(hdr->flags);
346                 quality = 170 - hdr->agc;
347                 if (quality > 100)
348                         quality = 100;
349                 signal = 14 - hdr->agc / 2;
350                 rx_status.qual = quality;
351                 priv->quality = quality;
352                 rx_status.signal = signal;
353                 priv->signal = signal;
354                 rx_status.antenna = (hdr->rssi >> 7) & 1;
355                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
356                 rate = (flags >> 20) & 0xF;
357         }
358
359         skb_trim(skb, flags & 0x0FFF);
360         rx_status.rate_idx = rate;
361         rx_status.freq = dev->conf.channel->center_freq;
362         rx_status.band = dev->conf.channel->band;
363         rx_status.flag |= RX_FLAG_TSFT;
364         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
365                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
366         ieee80211_rx_irqsafe(dev, skb, &rx_status);
367
368         skb = dev_alloc_skb(RTL8187_MAX_RX);
369         if (unlikely(!skb)) {
370                 usb_free_urb(urb);
371                 /* TODO check rx queue length and refill *somewhere* */
372                 return;
373         }
374
375         info = (struct rtl8187_rx_info *)skb->cb;
376         info->urb = urb;
377         info->dev = dev;
378         urb->transfer_buffer = skb_tail_pointer(skb);
379         urb->context = skb;
380         skb_queue_tail(&priv->rx_queue, skb);
381
382         usb_submit_urb(urb, GFP_ATOMIC);
383 }
384
385 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
386 {
387         struct rtl8187_priv *priv = dev->priv;
388         struct urb *entry;
389         struct sk_buff *skb;
390         struct rtl8187_rx_info *info;
391
392         while (skb_queue_len(&priv->rx_queue) < 8) {
393                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
394                 if (!skb)
395                         break;
396                 entry = usb_alloc_urb(0, GFP_KERNEL);
397                 if (!entry) {
398                         kfree_skb(skb);
399                         break;
400                 }
401                 usb_fill_bulk_urb(entry, priv->udev,
402                                   usb_rcvbulkpipe(priv->udev,
403                                   priv->is_rtl8187b ? 3 : 1),
404                                   skb_tail_pointer(skb),
405                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
406                 info = (struct rtl8187_rx_info *)skb->cb;
407                 info->urb = entry;
408                 info->dev = dev;
409                 skb_queue_tail(&priv->rx_queue, skb);
410                 usb_submit_urb(entry, GFP_KERNEL);
411         }
412
413         return 0;
414 }
415
416 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
417 {
418         struct rtl8187_priv *priv = dev->priv;
419         u8 reg;
420         int i;
421
422         reg = rtl818x_ioread8(priv, &priv->map->CMD);
423         reg &= (1 << 1);
424         reg |= RTL818X_CMD_RESET;
425         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
426
427         i = 10;
428         do {
429                 msleep(2);
430                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
431                       RTL818X_CMD_RESET))
432                         break;
433         } while (--i);
434
435         if (!i) {
436                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
437                 return -ETIMEDOUT;
438         }
439
440         /* reload registers from eeprom */
441         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
442
443         i = 10;
444         do {
445                 msleep(4);
446                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
447                       RTL818X_EEPROM_CMD_CONFIG))
448                         break;
449         } while (--i);
450
451         if (!i) {
452                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
453                        wiphy_name(dev->wiphy));
454                 return -ETIMEDOUT;
455         }
456
457         return 0;
458 }
459
460 static int rtl8187_init_hw(struct ieee80211_hw *dev)
461 {
462         struct rtl8187_priv *priv = dev->priv;
463         u8 reg;
464         int res;
465
466         /* reset */
467         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
468                          RTL818X_EEPROM_CMD_CONFIG);
469         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
470         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
471                          RTL818X_CONFIG3_ANAPARAM_WRITE);
472         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
473                           RTL8187_RTL8225_ANAPARAM_ON);
474         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
475                           RTL8187_RTL8225_ANAPARAM2_ON);
476         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
477                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
478         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
479                          RTL818X_EEPROM_CMD_NORMAL);
480
481         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
482
483         msleep(200);
484         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
485         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
486         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
487         msleep(200);
488
489         res = rtl8187_cmd_reset(dev);
490         if (res)
491                 return res;
492
493         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
494         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
495         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
496                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
497         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
498                           RTL8187_RTL8225_ANAPARAM_ON);
499         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
500                           RTL8187_RTL8225_ANAPARAM2_ON);
501         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
502                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
503         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
504
505         /* setup card */
506         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
507         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
508
509         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
510         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
511         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
512
513         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
514
515         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
516         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
517         reg &= 0x3F;
518         reg |= 0x80;
519         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
520
521         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
522
523         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
524         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
525         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
526
527         // TODO: set RESP_RATE and BRSR properly
528         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
529         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
530
531         /* host_usb_init */
532         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
533         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
534         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
535         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
536         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
537         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
538         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
539         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
540         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
541         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
542         msleep(100);
543
544         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
545         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
546         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
547         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
548                          RTL818X_EEPROM_CMD_CONFIG);
549         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
550         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
551                          RTL818X_EEPROM_CMD_NORMAL);
552         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
553         msleep(100);
554
555         priv->rf->init(dev);
556
557         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
558         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
559         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
560         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
561         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
562         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
563         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
564
565         return 0;
566 }
567
568 static const u8 rtl8187b_reg_table[][3] = {
569         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
570         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
571         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
572         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
573
574         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
575         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
576         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
577         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
578         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
579         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
580
581         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
582         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
583         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
584         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
585         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
586         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
587         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
588         {0x73, 0x9A, 2},
589
590         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
591         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
592         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
593         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
594         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
595
596         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
597         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
598 };
599
600 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
601 {
602         struct rtl8187_priv *priv = dev->priv;
603         int res, i;
604         u8 reg;
605
606         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
607                          RTL818X_EEPROM_CMD_CONFIG);
608
609         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
610         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
611         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
612         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
613                           RTL8187B_RTL8225_ANAPARAM2_ON);
614         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
615                           RTL8187B_RTL8225_ANAPARAM_ON);
616         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
617                          RTL8187B_RTL8225_ANAPARAM3_ON);
618
619         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
620         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
621         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
622         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
623
624         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
625         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
626         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
627
628         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
629                          RTL818X_EEPROM_CMD_NORMAL);
630
631         res = rtl8187_cmd_reset(dev);
632         if (res)
633                 return res;
634
635         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
636         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
637         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
638         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
639         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
640         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
641                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
642         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
643
644         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
645         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
646         reg |= RTL818X_RATE_FALLBACK_ENABLE;
647         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
648
649         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
650         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
651         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
652
653         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
654                          RTL818X_EEPROM_CMD_CONFIG);
655         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
656         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
657         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
658                          RTL818X_EEPROM_CMD_NORMAL);
659
660         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
661         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
662                 rtl818x_iowrite8_idx(priv,
663                                      (u8 *)(uintptr_t)
664                                      (rtl8187b_reg_table[i][0] | 0xFF00),
665                                      rtl8187b_reg_table[i][1],
666                                      rtl8187b_reg_table[i][2]);
667         }
668
669         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
670         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
671
672         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
673         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
674         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
675
676         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
677
678         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
679
680         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
681                          RTL818X_EEPROM_CMD_CONFIG);
682         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
683         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
684         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
685         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
686                          RTL818X_EEPROM_CMD_NORMAL);
687
688         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
689         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
690         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
691         msleep(1100);
692
693         priv->rf->init(dev);
694
695         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
696         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
697         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
698
699         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
700         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
701         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
702         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
703         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
704         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
705         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
706
707         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
708         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
709         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
710         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
711         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
712         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
713         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
714         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
715         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
716         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
717         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
718         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
719         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
720
721         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
722
723         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
724
725         return 0;
726 }
727
728 static int rtl8187_start(struct ieee80211_hw *dev)
729 {
730         struct rtl8187_priv *priv = dev->priv;
731         u32 reg;
732         int ret;
733
734         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
735                                      rtl8187b_init_hw(dev);
736         if (ret)
737                 return ret;
738
739         mutex_lock(&priv->conf_mutex);
740         if (priv->is_rtl8187b) {
741                 reg = RTL818X_RX_CONF_MGMT |
742                       RTL818X_RX_CONF_DATA |
743                       RTL818X_RX_CONF_BROADCAST |
744                       RTL818X_RX_CONF_NICMAC |
745                       RTL818X_RX_CONF_BSSID |
746                       (7 << 13 /* RX FIFO threshold NONE */) |
747                       (7 << 10 /* MAX RX DMA */) |
748                       RTL818X_RX_CONF_RX_AUTORESETPHY |
749                       RTL818X_RX_CONF_ONLYERLPKT |
750                       RTL818X_RX_CONF_MULTICAST;
751                 priv->rx_conf = reg;
752                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
753
754                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
755                                   RTL818X_TX_CONF_HW_SEQNUM |
756                                   RTL818X_TX_CONF_DISREQQSIZE |
757                                   (7 << 8  /* short retry limit */) |
758                                   (7 << 0  /* long retry limit */) |
759                                   (7 << 21 /* MAX TX DMA */));
760                 rtl8187_init_urbs(dev);
761                 mutex_unlock(&priv->conf_mutex);
762                 return 0;
763         }
764
765         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
766
767         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
768         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
769
770         rtl8187_init_urbs(dev);
771
772         reg = RTL818X_RX_CONF_ONLYERLPKT |
773               RTL818X_RX_CONF_RX_AUTORESETPHY |
774               RTL818X_RX_CONF_BSSID |
775               RTL818X_RX_CONF_MGMT |
776               RTL818X_RX_CONF_DATA |
777               (7 << 13 /* RX FIFO threshold NONE */) |
778               (7 << 10 /* MAX RX DMA */) |
779               RTL818X_RX_CONF_BROADCAST |
780               RTL818X_RX_CONF_NICMAC;
781
782         priv->rx_conf = reg;
783         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
784
785         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
786         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
787         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
788         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
789
790         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
791         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
792         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
793         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
794         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
795
796         reg  = RTL818X_TX_CONF_CW_MIN |
797                (7 << 21 /* MAX TX DMA */) |
798                RTL818X_TX_CONF_NO_ICV;
799         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
800
801         reg = rtl818x_ioread8(priv, &priv->map->CMD);
802         reg |= RTL818X_CMD_TX_ENABLE;
803         reg |= RTL818X_CMD_RX_ENABLE;
804         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
805         mutex_unlock(&priv->conf_mutex);
806
807         return 0;
808 }
809
810 static void rtl8187_stop(struct ieee80211_hw *dev)
811 {
812         struct rtl8187_priv *priv = dev->priv;
813         struct rtl8187_rx_info *info;
814         struct sk_buff *skb;
815         u32 reg;
816
817         mutex_lock(&priv->conf_mutex);
818         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
819
820         reg = rtl818x_ioread8(priv, &priv->map->CMD);
821         reg &= ~RTL818X_CMD_TX_ENABLE;
822         reg &= ~RTL818X_CMD_RX_ENABLE;
823         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
824
825         priv->rf->stop(dev);
826
827         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
828         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
829         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
830         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
831
832         while ((skb = skb_dequeue(&priv->rx_queue))) {
833                 info = (struct rtl8187_rx_info *)skb->cb;
834                 usb_kill_urb(info->urb);
835                 kfree_skb(skb);
836         }
837         mutex_unlock(&priv->conf_mutex);
838 }
839
840 static int rtl8187_add_interface(struct ieee80211_hw *dev,
841                                  struct ieee80211_if_init_conf *conf)
842 {
843         struct rtl8187_priv *priv = dev->priv;
844         int i;
845
846         if (priv->mode != NL80211_IFTYPE_MONITOR)
847                 return -EOPNOTSUPP;
848
849         switch (conf->type) {
850         case NL80211_IFTYPE_STATION:
851                 priv->mode = conf->type;
852                 break;
853         default:
854                 return -EOPNOTSUPP;
855         }
856
857         mutex_lock(&priv->conf_mutex);
858         priv->vif = conf->vif;
859
860         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
861         for (i = 0; i < ETH_ALEN; i++)
862                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
863                                  ((u8 *)conf->mac_addr)[i]);
864         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
865
866         mutex_unlock(&priv->conf_mutex);
867         return 0;
868 }
869
870 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
871                                      struct ieee80211_if_init_conf *conf)
872 {
873         struct rtl8187_priv *priv = dev->priv;
874         mutex_lock(&priv->conf_mutex);
875         priv->mode = NL80211_IFTYPE_MONITOR;
876         priv->vif = NULL;
877         mutex_unlock(&priv->conf_mutex);
878 }
879
880 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
881 {
882         struct rtl8187_priv *priv = dev->priv;
883         u32 reg;
884
885         mutex_lock(&priv->conf_mutex);
886         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
887         /* Enable TX loopback on MAC level to avoid TX during channel
888          * changes, as this has be seen to causes problems and the
889          * card will stop work until next reset
890          */
891         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
892                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
893         msleep(10);
894         priv->rf->set_chan(dev, conf);
895         msleep(10);
896         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
897
898         if (!priv->is_rtl8187b) {
899                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
900
901                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
902                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
903                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
904                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
905                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
906                 } else {
907                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
908                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
909                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
910                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
911                 }
912         }
913
914         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
915         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
916         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
917         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
918         mutex_unlock(&priv->conf_mutex);
919         return 0;
920 }
921
922 static int rtl8187_config_interface(struct ieee80211_hw *dev,
923                                     struct ieee80211_vif *vif,
924                                     struct ieee80211_if_conf *conf)
925 {
926         struct rtl8187_priv *priv = dev->priv;
927         int i;
928         u8 reg;
929
930         mutex_lock(&priv->conf_mutex);
931         for (i = 0; i < ETH_ALEN; i++)
932                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
933
934         if (is_valid_ether_addr(conf->bssid)) {
935                 reg = RTL818X_MSR_INFRA;
936                 if (priv->is_rtl8187b)
937                         reg |= RTL818X_MSR_ENEDCA;
938                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
939         } else {
940                 reg = RTL818X_MSR_NO_LINK;
941                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
942         }
943
944         mutex_unlock(&priv->conf_mutex);
945         return 0;
946 }
947
948 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
949                                      unsigned int changed_flags,
950                                      unsigned int *total_flags,
951                                      int mc_count, struct dev_addr_list *mclist)
952 {
953         struct rtl8187_priv *priv = dev->priv;
954
955         if (changed_flags & FIF_FCSFAIL)
956                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
957         if (changed_flags & FIF_CONTROL)
958                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
959         if (changed_flags & FIF_OTHER_BSS)
960                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
961         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
962                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
963         else
964                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
965
966         *total_flags = 0;
967
968         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
969                 *total_flags |= FIF_FCSFAIL;
970         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
971                 *total_flags |= FIF_CONTROL;
972         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
973                 *total_flags |= FIF_OTHER_BSS;
974         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
975                 *total_flags |= FIF_ALLMULTI;
976
977         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
978 }
979
980 static const struct ieee80211_ops rtl8187_ops = {
981         .tx                     = rtl8187_tx,
982         .start                  = rtl8187_start,
983         .stop                   = rtl8187_stop,
984         .add_interface          = rtl8187_add_interface,
985         .remove_interface       = rtl8187_remove_interface,
986         .config                 = rtl8187_config,
987         .config_interface       = rtl8187_config_interface,
988         .configure_filter       = rtl8187_configure_filter,
989 };
990
991 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
992 {
993         struct ieee80211_hw *dev = eeprom->data;
994         struct rtl8187_priv *priv = dev->priv;
995         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
996
997         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
998         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
999         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1000         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1001 }
1002
1003 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1004 {
1005         struct ieee80211_hw *dev = eeprom->data;
1006         struct rtl8187_priv *priv = dev->priv;
1007         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1008
1009         if (eeprom->reg_data_in)
1010                 reg |= RTL818X_EEPROM_CMD_WRITE;
1011         if (eeprom->reg_data_out)
1012                 reg |= RTL818X_EEPROM_CMD_READ;
1013         if (eeprom->reg_data_clock)
1014                 reg |= RTL818X_EEPROM_CMD_CK;
1015         if (eeprom->reg_chip_select)
1016                 reg |= RTL818X_EEPROM_CMD_CS;
1017
1018         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1019         udelay(10);
1020 }
1021
1022 static int __devinit rtl8187_probe(struct usb_interface *intf,
1023                                    const struct usb_device_id *id)
1024 {
1025         struct usb_device *udev = interface_to_usbdev(intf);
1026         struct ieee80211_hw *dev;
1027         struct rtl8187_priv *priv;
1028         struct eeprom_93cx6 eeprom;
1029         struct ieee80211_channel *channel;
1030         const char *chip_name;
1031         u16 txpwr, reg;
1032         int err, i;
1033         DECLARE_MAC_BUF(mac);
1034
1035         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1036         if (!dev) {
1037                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1038                 return -ENOMEM;
1039         }
1040
1041         priv = dev->priv;
1042         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1043
1044         SET_IEEE80211_DEV(dev, &intf->dev);
1045         usb_set_intfdata(intf, dev);
1046         priv->udev = udev;
1047
1048         usb_get_dev(udev);
1049
1050         skb_queue_head_init(&priv->rx_queue);
1051
1052         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1053         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1054
1055         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1056         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1057         priv->map = (struct rtl818x_csr *)0xFF00;
1058
1059         priv->band.band = IEEE80211_BAND_2GHZ;
1060         priv->band.channels = priv->channels;
1061         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1062         priv->band.bitrates = priv->rates;
1063         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1064         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1065
1066
1067         priv->mode = NL80211_IFTYPE_MONITOR;
1068         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1069                      IEEE80211_HW_RX_INCLUDES_FCS;
1070
1071         eeprom.data = dev;
1072         eeprom.register_read = rtl8187_eeprom_register_read;
1073         eeprom.register_write = rtl8187_eeprom_register_write;
1074         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1075                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1076         else
1077                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1078
1079         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1080         udelay(10);
1081
1082         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1083                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1084         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1085                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1086                        "generated MAC address\n");
1087                 random_ether_addr(dev->wiphy->perm_addr);
1088         }
1089
1090         channel = priv->channels;
1091         for (i = 0; i < 3; i++) {
1092                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1093                                   &txpwr);
1094                 (*channel++).hw_value = txpwr & 0xFF;
1095                 (*channel++).hw_value = txpwr >> 8;
1096         }
1097         for (i = 0; i < 2; i++) {
1098                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1099                                   &txpwr);
1100                 (*channel++).hw_value = txpwr & 0xFF;
1101                 (*channel++).hw_value = txpwr >> 8;
1102         }
1103
1104         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1105                           &priv->txpwr_base);
1106
1107         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1108         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1109         /* 0 means asic B-cut, we should use SW 3 wire
1110          * bit-by-bit banging for radio. 1 means we can use
1111          * USB specific request to write radio registers */
1112         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1113         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1114         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1115
1116         if (!priv->is_rtl8187b) {
1117                 u32 reg32;
1118                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1119                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1120                 switch (reg32) {
1121                 case RTL818X_TX_CONF_R8187vD_B:
1122                         /* Some RTL8187B devices have a USB ID of 0x8187
1123                          * detect them here */
1124                         chip_name = "RTL8187BvB(early)";
1125                         priv->is_rtl8187b = 1;
1126                         priv->hw_rev = RTL8187BvB;
1127                         break;
1128                 case RTL818X_TX_CONF_R8187vD:
1129                         chip_name = "RTL8187vD";
1130                         break;
1131                 default:
1132                         chip_name = "RTL8187vB (default)";
1133                 }
1134        } else {
1135                 /*
1136                  * Force USB request to write radio registers for 8187B, Realtek
1137                  * only uses it in their sources
1138                  */
1139                 /*if (priv->asic_rev == 0) {
1140                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1141                                "requests to write to radio registers\n");
1142                         priv->asic_rev = 1;
1143                 }*/
1144                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1145                 case RTL818X_R8187B_B:
1146                         chip_name = "RTL8187BvB";
1147                         priv->hw_rev = RTL8187BvB;
1148                         break;
1149                 case RTL818X_R8187B_D:
1150                         chip_name = "RTL8187BvD";
1151                         priv->hw_rev = RTL8187BvD;
1152                         break;
1153                 case RTL818X_R8187B_E:
1154                         chip_name = "RTL8187BvE";
1155                         priv->hw_rev = RTL8187BvE;
1156                         break;
1157                 default:
1158                         chip_name = "RTL8187BvB (default)";
1159                         priv->hw_rev = RTL8187BvB;
1160                 }
1161         }
1162
1163         if (!priv->is_rtl8187b) {
1164                 for (i = 0; i < 2; i++) {
1165                         eeprom_93cx6_read(&eeprom,
1166                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1167                                           &txpwr);
1168                         (*channel++).hw_value = txpwr & 0xFF;
1169                         (*channel++).hw_value = txpwr >> 8;
1170                 }
1171         } else {
1172                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1173                                   &txpwr);
1174                 (*channel++).hw_value = txpwr & 0xFF;
1175
1176                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1177                 (*channel++).hw_value = txpwr & 0xFF;
1178
1179                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1180                 (*channel++).hw_value = txpwr & 0xFF;
1181                 (*channel++).hw_value = txpwr >> 8;
1182         }
1183
1184         if (priv->is_rtl8187b) {
1185                 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1186                         "is EXPERIMENTAL, and could damage your\n"
1187                         "         hardware, use at your own risk\n");
1188                 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1189         } else {
1190                 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1191                 dev->max_signal = 65;
1192         }
1193
1194         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1195
1196         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1197                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1198                        " info!\n");
1199
1200         priv->rf = rtl8187_detect_rf(dev);
1201         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1202                                   sizeof(struct rtl8187_tx_hdr) :
1203                                   sizeof(struct rtl8187b_tx_hdr);
1204         if (!priv->is_rtl8187b)
1205                 dev->queues = 1;
1206         else
1207                 dev->queues = 4;
1208
1209         err = ieee80211_register_hw(dev);
1210         if (err) {
1211                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1212                 goto err_free_dev;
1213         }
1214         mutex_init(&priv->conf_mutex);
1215
1216         printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n",
1217                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1218                chip_name, priv->asic_rev, priv->rf->name);
1219
1220         return 0;
1221
1222  err_free_dev:
1223         ieee80211_free_hw(dev);
1224         usb_set_intfdata(intf, NULL);
1225         usb_put_dev(udev);
1226         return err;
1227 }
1228
1229 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1230 {
1231         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1232         struct rtl8187_priv *priv;
1233
1234         if (!dev)
1235                 return;
1236
1237         ieee80211_unregister_hw(dev);
1238
1239         priv = dev->priv;
1240         usb_put_dev(interface_to_usbdev(intf));
1241         ieee80211_free_hw(dev);
1242 }
1243
1244 static struct usb_driver rtl8187_driver = {
1245         .name           = KBUILD_MODNAME,
1246         .id_table       = rtl8187_table,
1247         .probe          = rtl8187_probe,
1248         .disconnect     = __devexit_p(rtl8187_disconnect),
1249 };
1250
1251 static int __init rtl8187_init(void)
1252 {
1253         return usb_register(&rtl8187_driver);
1254 }
1255
1256 static void __exit rtl8187_exit(void)
1257 {
1258         usb_deregister(&rtl8187_driver);
1259 }
1260
1261 module_init(rtl8187_init);
1262 module_exit(rtl8187_exit);