drivers/net/wireless/ti/wl18xx/acx.h

   1 /*
   2  * This file is part of wl18xx
   3  *
   4  * Copyright (C) 2011 Texas Instruments. All rights reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * version 2 as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18  * 02110-1301 USA
  19  *
  20  */
  21
  22 #ifndef __WL18XX_ACX_H__
  23 #define __WL18XX_ACX_H__
  24
  25 #include "../wlcore/wlcore.h"
  26 #include "../wlcore/acx.h"
  27
  28 /* numbers of bits the length field takes (add 1 for the actual number) */
  29 #define WL18XX_HOST_IF_LEN_SIZE_FIELD 15
  30
  31 struct wl18xx_acx_host_config_bitmap {
  32         struct acx_header header;
  33
  34         __le32 host_cfg_bitmap;
  35
  36         __le32 host_sdio_block_size;
  37
  38         /* extra mem blocks per frame in TX. */
  39         __le32 extra_mem_blocks;
  40
  41         /*
  42          * number of bits of the length field in the first TX word
  43          * (up to 15 - for using the entire 16 bits).
  44          */
  45         __le32 length_field_size;
  46
  47 } __packed;
  48
  49 enum {
  50         CHECKSUM_OFFLOAD_DISABLED = 0,
  51         CHECKSUM_OFFLOAD_ENABLED  = 1,
  52         CHECKSUM_OFFLOAD_FAKE_RX  = 2,
  53         CHECKSUM_OFFLOAD_INVALID  = 0xFF
  54 };
  55
  56 struct wl18xx_acx_checksum_state {
  57         struct acx_header header;
  58
  59          /* enum acx_checksum_state */
  60         u8 checksum_state;
  61         u8 pad[3];
  62 } __packed;
  63
  64 struct wl18xx_acx_debug_stats {
  65         u32 debug1;
  66         u32 debug2;
  67         u32 debug3;
  68         u32 debug4;
  69         u32 debug5;
  70         u32 debug6;
  71 } __packed;
  72
  73 struct wl18xx_acx_ring_stats {
  74         u32 tx_procs;
  75         u32 prepared_descs;
  76         u32 tx_xfr;
  77         u32 tx_dma;
  78         u32 tx_cmplt;
  79         u32 rx_procs;
  80         u32 rx_data;
  81 } __packed;
  82
  83 struct wl18xx_acx_tx_stats {
  84         u32 tx_template_prepared;
  85         u32 tx_data_prepared;
  86         u32 tx_template_programmed;
  87         u32 tx_data_programmed;
  88         u32 tx_burst_programmed;
  89         u32 tx_starts;
  90         u32 tx_imm_resp;
  91         u32 tx_start_templates;
  92         u32 tx_start_int_templates;
  93         u32 tx_start_fw_gen;
  94         u32 tx_start_data;
  95         u32 tx_start_null_frame;
  96         u32 tx_exch;
  97         u32 tx_retry_template;
  98         u32 tx_retry_data;
  99         u32 tx_exch_pending;
 100         u32 tx_exch_expiry;
 101         u32 tx_exch_mismatch;
 102         u32 tx_done_template;
 103         u32 tx_done_data;
 104         u32 tx_done_int_template;
 105         u32 tx_pre_xfr;
 106         u32 tx_xfr;
 107         u32 tx_xfr_out_of_mem;
 108         u32 tx_dma_programmed;
 109         u32 tx_dma_done;
 110 } __packed;
 111
 112 struct wl18xx_acx_rx_stats {
 113         u32 rx_out_of_mem;
 114         u32 rx_hdr_overflow;
 115         u32 rx_hw_stuck;
 116         u32 rx_dropped_frame;
 117         u32 rx_complete_dropped_frame;
 118         u32 rx_alloc_frame;
 119         u32 rx_done_queue;
 120         u32 rx_done;
 121         u32 rx_defrag;
 122         u32 rx_defrag_end;
 123         u32 rx_mic;
 124         u32 rx_mic_end;
 125         u32 rx_xfr;
 126         u32 rx_xfr_end;
 127         u32 rx_cmplt;
 128         u32 rx_pre_complt;
 129         u32 rx_cmplt_task;
 130         u32 rx_phy_hdr;
 131         u32 rx_timeout;
 132 } __packed;
 133
 134 struct wl18xx_acx_dma_stats {
 135         u32 rx_dma_errors;
 136         u32 tx_dma_errors;
 137 } __packed;
 138
 139 struct wl18xx_acx_isr_stats {
 140         u32 irqs;
 141 } __packed;
 142
 143 struct wl18xx_acx_wep_stats {
 144         u32 wep_add_key_count;
 145         u32 wep_default_key_count;
 146         u32 wep_key_not_found;
 147         u32 wep_decrypt_fail;
 148         u32 wep_encrypt_fail;
 149         u32 wep_dec_packets;
 150         u32 wep_dec_interrupt;
 151         u32 wep_enc_packets;
 152         u32 wep_enc_interrupts;
 153 } __packed;
 154
 155 #define PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD 10
 156
 157 struct wl18xx_acx_pwr_stats {
 158         u32 missing_bcns_cnt;
 159         u32 rcvd_bcns_cnt;
 160         u32 connection_out_of_sync;
 161         u32 cont_miss_bcns_spread[PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD];
 162         u32 rcvd_awake_bcns_cnt;
 163 } __packed;
 164
 165 struct wl18xx_acx_mic_stats {
 166         u32 mic_rx_pkts;
 167         u32 mic_calc_failure;
 168 } __packed;
 169
 170 struct wl18xx_acx_aes_stats {
 171         u32 aes_encrypt_fail;
 172         u32 aes_decrypt_fail;
 173         u32 aes_encrypt_packets;
 174         u32 aes_decrypt_packets;
 175         u32 aes_encrypt_interrupt;
 176         u32 aes_decrypt_interrupt;
 177 } __packed;
 178
 179 struct wl18xx_acx_gem_stats {
 180         u32 gem_encrypt_fail;
 181         u32 gem_decrypt_fail;
 182         u32 gem_encrypt_packets;
 183         u32 gem_decrypt_packets;
 184         u32 gem_encrypt_interrupt;
 185         u32 gem_decrypt_interrupt;
 186 } __packed;
 187
 188 struct wl18xx_acx_event_stats {
 189         u32 calibration;
 190         u32 rx_mismatch;
 191         u32 rx_mem_empty;
 192 } __packed;
 193
 194 struct wl18xx_acx_ps_poll_stats {
 195         u32 ps_poll_timeouts;
 196         u32 upsd_timeouts;
 197         u32 upsd_max_ap_turn;
 198         u32 ps_poll_max_ap_turn;
 199         u32 ps_poll_utilization;
 200         u32 upsd_utilization;
 201 } __packed;
 202
 203 struct wl18xx_acx_rx_filter_stats {
 204         u32 beacon_filter;
 205         u32 arp_filter;
 206         u32 mc_filter;
 207         u32 dup_filter;
 208         u32 data_filter;
 209         u32 ibss_filter;
 210         u32 protection_filter;
 211 } __packed;
 212
 213 struct wl18xx_acx_calibration_stats {
 214         u32 init_cal_total;
 215         u32 init_radio_bands_fail;
 216         u32 init_set_params;
 217         u32 init_tx_clpc_fail;
 218         u32 init_rx_iw_mm_fail;
 219         u32 tune_cal_total;
 220         u32 tune_drpw_rtrim_fail;
 221         u32 tune_drpw_pd_buf_fail;
 222         u32 tune_drpw_tx_mix_freq_fail;
 223         u32 tune_drpw_ta_cal;
 224         u32 tune_drpw_rx_if_2_gain;
 225         u32 tune_drpw_rx_dac;
 226         u32 tune_drpw_chan_tune;
 227         u32 tune_drpw_rx_tx_lpf;
 228         u32 tune_drpw_lna_tank;
 229         u32 tune_tx_lo_leak_fail;
 230         u32 tune_tx_iq_mm_fail;
 231         u32 tune_tx_pdet_fail;
 232         u32 tune_tx_ppa_fail;
 233         u32 tune_tx_clpc_fail;
 234         u32 tune_rx_ana_dc_fail;
 235         u32 tune_rx_dig_dc_fail; /* check if this is needed */
 236         u32 tune_rx_iq_mm_fail;
 237         u32 cal_state_fail;
 238 } __packed;
 239
 240 struct wl18xx_acx_statistics {
 241         struct acx_header header;
 242
 243         struct wl18xx_acx_ring_stats            ring;
 244         struct wl18xx_acx_debug_stats           debug;
 245         struct wl18xx_acx_tx_stats              tx;
 246         struct wl18xx_acx_rx_stats              rx;
 247         struct wl18xx_acx_dma_stats             dma;
 248         struct wl18xx_acx_isr_stats             isr;
 249         struct wl18xx_acx_wep_stats             wep;
 250         struct wl18xx_acx_pwr_stats             pwr;
 251         struct wl18xx_acx_aes_stats             aes;
 252         struct wl18xx_acx_mic_stats             mic;
 253         struct wl18xx_acx_event_stats           event;
 254         struct wl18xx_acx_ps_poll_stats         ps_poll;
 255         struct wl18xx_acx_rx_filter_stats       rx_filter;
 256         struct wl18xx_acx_calibration_stats     calibration;
 257         struct wl18xx_acx_gem_stats             gem;
 258 } __packed;
 259
 260 int wl18xx_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap,
 261                                   u32 sdio_blk_size, u32 extra_mem_blks,
 262                                   u32 len_field_size);
 263 int wl18xx_acx_set_checksum_state(struct wl1271 *wl);
 264
 265 #endif /* __WL18XX_ACX_H__ */