drivers/pinctrl/pinctrl-mxs.c

   1 /*
   2  * Copyright 2012 Freescale Semiconductor, Inc.
   3  *
   4  * The code contained herein is licensed under the GNU General Public
   5  * License. You may obtain a copy of the GNU General Public License
   6  * Version 2 or later at the following locations:
   7  *
   8  * http://www.opensource.org/licenses/gpl-license.html
   9  * http://www.gnu.org/copyleft/gpl.html
  10  */
  11
  12 #include <linux/err.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_address.h>
  18 #include <linux/pinctrl/machine.h>
  19 #include <linux/pinctrl/pinconf.h>
  20 #include <linux/pinctrl/pinctrl.h>
  21 #include <linux/pinctrl/pinmux.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/slab.h>
  24 #include "core.h"
  25 #include "pinctrl-mxs.h"
  26
  27 #define SUFFIX_LEN      4
  28
  29 struct mxs_pinctrl_data {
  30         struct device *dev;
  31         struct pinctrl_dev *pctl;
  32         void __iomem *base;
  33         struct mxs_pinctrl_soc_data *soc;
  34 };
  35
  36 static int mxs_get_groups_count(struct pinctrl_dev *pctldev)
  37 {
  38         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
  39
  40         return d->soc->ngroups;
  41 }
  42
  43 static const char *mxs_get_group_name(struct pinctrl_dev *pctldev,
  44                                       unsigned group)
  45 {
  46         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
  47
  48         return d->soc->groups[group].name;
  49 }
  50
  51 static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
  52                               const unsigned **pins, unsigned *num_pins)
  53 {
  54         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
  55
  56         *pins = d->soc->groups[group].pins;
  57         *num_pins = d->soc->groups[group].npins;
  58
  59         return 0;
  60 }
  61
  62 static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  63                              unsigned offset)
  64 {
  65         seq_printf(s, " %s", dev_name(pctldev->dev));
  66 }
  67
  68 static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev,
  69                               struct device_node *np,
  70                               struct pinctrl_map **map, unsigned *num_maps)
  71 {
  72         struct pinctrl_map *new_map;
  73         char *group = NULL;
  74         unsigned new_num = 1;
  75         unsigned long config = 0;
  76         unsigned long *pconfig;
  77         int length = strlen(np->name) + SUFFIX_LEN;
  78         bool purecfg = false;
  79         u32 val, reg;
  80         int ret, i = 0;
  81
  82         /* Check for pin config node which has no 'reg' property */
  83         if (of_property_read_u32(np, "reg", &reg))
  84                 purecfg = true;
  85
  86         ret = of_property_read_u32(np, "fsl,drive-strength", &val);
  87         if (!ret)
  88                 config = val | MA_PRESENT;
  89         ret = of_property_read_u32(np, "fsl,voltage", &val);
  90         if (!ret)
  91                 config |= val << VOL_SHIFT | VOL_PRESENT;
  92         ret = of_property_read_u32(np, "fsl,pull-up", &val);
  93         if (!ret)
  94                 config |= val << PULL_SHIFT | PULL_PRESENT;
  95
  96         /* Check for group node which has both mux and config settings */
  97         if (!purecfg && config)
  98                 new_num = 2;
  99
 100         new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL);
 101         if (!new_map)
 102                 return -ENOMEM;
 103
 104         if (!purecfg) {
 105                 new_map[i].type = PIN_MAP_TYPE_MUX_GROUP;
 106                 new_map[i].data.mux.function = np->name;
 107
 108                 /* Compose group name */
 109                 group = kzalloc(length, GFP_KERNEL);
 110                 if (!group)
 111                         return -ENOMEM;
 112                 snprintf(group, length, "%s.%d", np->name, reg);
 113                 new_map[i].data.mux.group = group;
 114                 i++;
 115         }
 116
 117         if (config) {
 118                 pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL);
 119                 if (!pconfig) {
 120                         ret = -ENOMEM;
 121                         goto free;
 122                 }
 123
 124                 new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
 125                 new_map[i].data.configs.group_or_pin = purecfg ? np->name :
 126                                                                  group;
 127                 new_map[i].data.configs.configs = pconfig;
 128                 new_map[i].data.configs.num_configs = 1;
 129         }
 130
 131         *map = new_map;
 132         *num_maps = new_num;
 133
 134         return 0;
 135
 136 free:
 137         kfree(new_map);
 138         return ret;
 139 }
 140
 141 static void mxs_dt_free_map(struct pinctrl_dev *pctldev,
 142                             struct pinctrl_map *map, unsigned num_maps)
 143 {
 144         int i;
 145
 146         for (i = 0; i < num_maps; i++) {
 147                 if (map[i].type == PIN_MAP_TYPE_MUX_GROUP)
 148                         kfree(map[i].data.mux.group);
 149                 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
 150                         kfree(map[i].data.configs.configs);
 151         }
 152
 153         kfree(map);
 154 }
 155
 156 static struct pinctrl_ops mxs_pinctrl_ops = {
 157         .get_groups_count = mxs_get_groups_count,
 158         .get_group_name = mxs_get_group_name,
 159         .get_group_pins = mxs_get_group_pins,
 160         .pin_dbg_show = mxs_pin_dbg_show,
 161         .dt_node_to_map = mxs_dt_node_to_map,
 162         .dt_free_map = mxs_dt_free_map,
 163 };
 164
 165 static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
 166 {
 167         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 168
 169         return d->soc->nfunctions;
 170 }
 171
 172 static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 173                                              unsigned function)
 174 {
 175         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 176
 177         return d->soc->functions[function].name;
 178 }
 179
 180 static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
 181                                        unsigned group,
 182                                        const char * const **groups,
 183                                        unsigned * const num_groups)
 184 {
 185         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 186
 187         *groups = d->soc->functions[group].groups;
 188         *num_groups = d->soc->functions[group].ngroups;
 189
 190         return 0;
 191 }
 192
 193 static int mxs_pinctrl_enable(struct pinctrl_dev *pctldev, unsigned selector,
 194                               unsigned group)
 195 {
 196         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 197         struct mxs_group *g = &d->soc->groups[group];
 198         void __iomem *reg;
 199         u8 bank, shift;
 200         u16 pin;
 201         int i;
 202
 203         for (i = 0; i < g->npins; i++) {
 204                 bank = PINID_TO_BANK(g->pins[i]);
 205                 pin = PINID_TO_PIN(g->pins[i]);
 206                 reg = d->base + d->soc->regs->muxsel;
 207                 reg += bank * 0x20 + pin / 16 * 0x10;
 208                 shift = pin % 16 * 2;
 209
 210                 writel(0x3 << shift, reg + CLR);
 211                 writel(g->muxsel[i] << shift, reg + SET);
 212         }
 213
 214         return 0;
 215 }
 216
 217 static void mxs_pinctrl_disable(struct pinctrl_dev *pctldev,
 218                                 unsigned function, unsigned group)
 219 {
 220         /* Nothing to do here */
 221 }
 222
 223 static struct pinmux_ops mxs_pinmux_ops = {
 224         .get_functions_count = mxs_pinctrl_get_funcs_count,
 225         .get_function_name = mxs_pinctrl_get_func_name,
 226         .get_function_groups = mxs_pinctrl_get_func_groups,
 227         .enable = mxs_pinctrl_enable,
 228         .disable = mxs_pinctrl_disable,
 229 };
 230
 231 static int mxs_pinconf_get(struct pinctrl_dev *pctldev,
 232                            unsigned pin, unsigned long *config)
 233 {
 234         return -ENOTSUPP;
 235 }
 236
 237 static int mxs_pinconf_set(struct pinctrl_dev *pctldev,
 238                            unsigned pin, unsigned long config)
 239 {
 240         return -ENOTSUPP;
 241 }
 242
 243 static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev,
 244                                  unsigned group, unsigned long *config)
 245 {
 246         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 247
 248         *config = d->soc->groups[group].config;
 249
 250         return 0;
 251 }
 252
 253 static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev,
 254                                  unsigned group, unsigned long config)
 255 {
 256         struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
 257         struct mxs_group *g = &d->soc->groups[group];
 258         void __iomem *reg;
 259         u8 ma, vol, pull, bank, shift;
 260         u16 pin;
 261         int i;
 262
 263         ma = CONFIG_TO_MA(config);
 264         vol = CONFIG_TO_VOL(config);
 265         pull = CONFIG_TO_PULL(config);
 266
 267         for (i = 0; i < g->npins; i++) {
 268                 bank = PINID_TO_BANK(g->pins[i]);
 269                 pin = PINID_TO_PIN(g->pins[i]);
 270
 271                 /* drive */
 272                 reg = d->base + d->soc->regs->drive;
 273                 reg += bank * 0x40 + pin / 8 * 0x10;
 274
 275                 /* mA */
 276                 if (config & MA_PRESENT) {
 277                         shift = pin % 8 * 4;
 278                         writel(0x3 << shift, reg + CLR);
 279                         writel(ma << shift, reg + SET);
 280                 }
 281
 282                 /* vol */
 283                 if (config & VOL_PRESENT) {
 284                         shift = pin % 8 * 4 + 2;
 285                         if (vol)
 286                                 writel(1 << shift, reg + SET);
 287                         else
 288                                 writel(1 << shift, reg + CLR);
 289                 }
 290
 291                 /* pull */
 292                 if (config & PULL_PRESENT) {
 293                         reg = d->base + d->soc->regs->pull;
 294                         reg += bank * 0x10;
 295                         shift = pin;
 296                         if (pull)
 297                                 writel(1 << shift, reg + SET);
 298                         else
 299                                 writel(1 << shift, reg + CLR);
 300                 }
 301         }
 302
 303         /* cache the config value for mxs_pinconf_group_get() */
 304         g->config = config;
 305
 306         return 0;
 307 }
 308
 309 static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
 310                                  struct seq_file *s, unsigned pin)
 311 {
 312         /* Not support */
 313 }
 314
 315 static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 316                                        struct seq_file *s, unsigned group)
 317 {
 318         unsigned long config;
 319
 320         if (!mxs_pinconf_group_get(pctldev, group, &config))
 321                 seq_printf(s, "0x%lx", config);
 322 }
 323
 324 struct pinconf_ops mxs_pinconf_ops = {
 325         .pin_config_get = mxs_pinconf_get,
 326         .pin_config_set = mxs_pinconf_set,
 327         .pin_config_group_get = mxs_pinconf_group_get,
 328         .pin_config_group_set = mxs_pinconf_group_set,
 329         .pin_config_dbg_show = mxs_pinconf_dbg_show,
 330         .pin_config_group_dbg_show = mxs_pinconf_group_dbg_show,
 331 };
 332
 333 static struct pinctrl_desc mxs_pinctrl_desc = {
 334         .pctlops = &mxs_pinctrl_ops,
 335         .pmxops = &mxs_pinmux_ops,
 336         .confops = &mxs_pinconf_ops,
 337         .owner = THIS_MODULE,
 338 };
 339
 340 static int __devinit mxs_pinctrl_parse_group(struct platform_device *pdev,
 341                                              struct device_node *np, int idx,
 342                                              const char **out_name)
 343 {
 344         struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
 345         struct mxs_group *g = &d->soc->groups[idx];
 346         struct property *prop;
 347         const char *propname = "fsl,pinmux-ids";
 348         char *group;
 349         int length = strlen(np->name) + SUFFIX_LEN;
 350         int i;
 351         u32 val;
 352
 353         group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL);
 354         if (!group)
 355                 return -ENOMEM;
 356         if (of_property_read_u32(np, "reg", &val))
 357                 snprintf(group, length, "%s", np->name);
 358         else
 359                 snprintf(group, length, "%s.%d", np->name, val);
 360         g->name = group;
 361
 362         prop = of_find_property(np, propname, &length);
 363         if (!prop)
 364                 return -EINVAL;
 365         g->npins = length / sizeof(u32);
 366
 367         g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins),
 368                                GFP_KERNEL);
 369         if (!g->pins)
 370                 return -ENOMEM;
 371
 372         g->muxsel = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->muxsel),
 373                                  GFP_KERNEL);
 374         if (!g->muxsel)
 375                 return -ENOMEM;
 376
 377         of_property_read_u32_array(np, propname, g->pins, g->npins);
 378         for (i = 0; i < g->npins; i++) {
 379                 g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]);
 380                 g->pins[i] = MUXID_TO_PINID(g->pins[i]);
 381         }
 382
 383         if (out_name)
 384                 *out_name = g->name;
 385
 386         return 0;
 387 }
 388
 389 static int __devinit mxs_pinctrl_probe_dt(struct platform_device *pdev,
 390                                           struct mxs_pinctrl_data *d)
 391 {
 392         struct mxs_pinctrl_soc_data *soc = d->soc;
 393         struct device_node *np = pdev->dev.of_node;
 394         struct device_node *child;
 395         struct mxs_function *f;
 396         const char *gpio_compat = "fsl,mxs-gpio";
 397         const char *fn, *fnull = "";
 398         int i = 0, idxf = 0, idxg = 0;
 399         int ret;
 400         u32 val;
 401
 402         child = of_get_next_child(np, NULL);
 403         if (!child) {
 404                 dev_err(&pdev->dev, "no group is defined\n");
 405                 return -ENOENT;
 406         }
 407
 408         /* Count total functions and groups */
 409         fn = fnull;
 410         for_each_child_of_node(np, child) {
 411                 if (of_device_is_compatible(child, gpio_compat))
 412                         continue;
 413                 soc->ngroups++;
 414                 /* Skip pure pinconf node */
 415                 if (of_property_read_u32(child, "reg", &val))
 416                         continue;
 417                 if (strcmp(fn, child->name)) {
 418                         fn = child->name;
 419                         soc->nfunctions++;
 420                 }
 421         }
 422
 423         soc->functions = devm_kzalloc(&pdev->dev, soc->nfunctions *
 424                                       sizeof(*soc->functions), GFP_KERNEL);
 425         if (!soc->functions)
 426                 return -ENOMEM;
 427
 428         soc->groups = devm_kzalloc(&pdev->dev, soc->ngroups *
 429                                    sizeof(*soc->groups), GFP_KERNEL);
 430         if (!soc->groups)
 431                 return -ENOMEM;
 432
 433         /* Count groups for each function */
 434         fn = fnull;
 435         f = &soc->functions[idxf];
 436         for_each_child_of_node(np, child) {
 437                 if (of_device_is_compatible(child, gpio_compat))
 438                         continue;
 439                 if (of_property_read_u32(child, "reg", &val))
 440                         continue;
 441                 if (strcmp(fn, child->name)) {
 442                         f = &soc->functions[idxf++];
 443                         f->name = fn = child->name;
 444                 }
 445                 f->ngroups++;
 446         };
 447
 448         /* Get groups for each function */
 449         idxf = 0;
 450         fn = fnull;
 451         for_each_child_of_node(np, child) {
 452                 if (of_device_is_compatible(child, gpio_compat))
 453                         continue;
 454                 if (of_property_read_u32(child, "reg", &val)) {
 455                         ret = mxs_pinctrl_parse_group(pdev, child,
 456                                                       idxg++, NULL);
 457                         if (ret)
 458                                 return ret;
 459                         continue;
 460                 }
 461
 462                 if (strcmp(fn, child->name)) {
 463                         f = &soc->functions[idxf++];
 464                         f->groups = devm_kzalloc(&pdev->dev, f->ngroups *
 465                                                  sizeof(*f->groups),
 466                                                  GFP_KERNEL);
 467                         if (!f->groups)
 468                                 return -ENOMEM;
 469                         fn = child->name;
 470                         i = 0;
 471                 }
 472                 ret = mxs_pinctrl_parse_group(pdev, child, idxg++,
 473                                               &f->groups[i++]);
 474                 if (ret)
 475                         return ret;
 476         }
 477
 478         return 0;
 479 }
 480
 481 int __devinit mxs_pinctrl_probe(struct platform_device *pdev,
 482                                 struct mxs_pinctrl_soc_data *soc)
 483 {
 484         struct device_node *np = pdev->dev.of_node;
 485         struct mxs_pinctrl_data *d;
 486         int ret;
 487
 488         d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL);
 489         if (!d)
 490                 return -ENOMEM;
 491
 492         d->dev = &pdev->dev;
 493         d->soc = soc;
 494
 495         d->base = of_iomap(np, 0);
 496         if (!d->base)
 497                 return -EADDRNOTAVAIL;
 498
 499         mxs_pinctrl_desc.pins = d->soc->pins;
 500         mxs_pinctrl_desc.npins = d->soc->npins;
 501         mxs_pinctrl_desc.name = dev_name(&pdev->dev);
 502
 503         platform_set_drvdata(pdev, d);
 504
 505         ret = mxs_pinctrl_probe_dt(pdev, d);
 506         if (ret) {
 507                 dev_err(&pdev->dev, "dt probe failed: %d\n", ret);
 508                 goto err;
 509         }
 510
 511         d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d);
 512         if (!d->pctl) {
 513                 dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n");
 514                 ret = -EINVAL;
 515                 goto err;
 516         }
 517
 518         return 0;
 519
 520 err:
 521         iounmap(d->base);
 522         return ret;
 523 }
 524 EXPORT_SYMBOL_GPL(mxs_pinctrl_probe);
 525
 526 int __devexit mxs_pinctrl_remove(struct platform_device *pdev)
 527 {
 528         struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
 529
 530         pinctrl_unregister(d->pctl);
 531         iounmap(d->base);
 532
 533         return 0;
 534 }
 535 EXPORT_SYMBOL_GPL(mxs_pinctrl_remove);