drivers/pinctrl/pinctrl-single.c

   1 /*
   2  * Generic device tree based pinctrl driver for one register per pin
   3  * type pinmux controllers
   4  *
   5  * Copyright (C) 2012 Texas Instruments, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public
   8  * License version 2. This program is licensed "as is" without any
   9  * warranty of any kind, whether express or implied.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/module.h>
  14 #include <linux/io.h>
  15 #include <linux/slab.h>
  16 #include <linux/err.h>
  17 #include <linux/list.h>
  18
  19 #include <linux/of.h>
  20 #include <linux/of_device.h>
  21 #include <linux/of_address.h>
  22
  23 #include <linux/pinctrl/pinctrl.h>
  24 #include <linux/pinctrl/pinmux.h>
  25 #include <linux/pinctrl/pinconf-generic.h>
  26
  27 #include "core.h"
  28 #include "pinconf.h"
  29
  30 #define DRIVER_NAME                     "pinctrl-single"
  31 #define PCS_MUX_PINS_NAME               "pinctrl-single,pins"
  32 #define PCS_MUX_BITS_NAME               "pinctrl-single,bits"
  33 #define PCS_REG_NAME_LEN                ((sizeof(unsigned long) * 2) + 3)
  34 #define PCS_OFF_DISABLED                ~0U
  35
  36 /**
  37  * struct pcs_pingroup - pingroups for a function
  38  * @np:         pingroup device node pointer
  39  * @name:       pingroup name
  40  * @gpins:      array of the pins in the group
  41  * @ngpins:     number of pins in the group
  42  * @node:       list node
  43  */
  44 struct pcs_pingroup {
  45         struct device_node *np;
  46         const char *name;
  47         int *gpins;
  48         int ngpins;
  49         struct list_head node;
  50 };
  51
  52 /**
  53  * struct pcs_func_vals - mux function register offset and value pair
  54  * @reg:        register virtual address
  55  * @val:        register value
  56  */
  57 struct pcs_func_vals {
  58         void __iomem *reg;
  59         unsigned val;
  60         unsigned mask;
  61 };
  62
  63 /**
  64  * struct pcs_conf_vals - pinconf parameter, pinconf register offset
  65  * and value, enable, disable, mask
  66  * @param:      config parameter
  67  * @val:        user input bits in the pinconf register
  68  * @enable:     enable bits in the pinconf register
  69  * @disable:    disable bits in the pinconf register
  70  * @mask:       mask bits in the register value
  71  */
  72 struct pcs_conf_vals {
  73         enum pin_config_param param;
  74         unsigned val;
  75         unsigned enable;
  76         unsigned disable;
  77         unsigned mask;
  78 };
  79
  80 /**
  81  * struct pcs_conf_type - pinconf property name, pinconf param pair
  82  * @name:       property name in DTS file
  83  * @param:      config parameter
  84  */
  85 struct pcs_conf_type {
  86         const char *name;
  87         enum pin_config_param param;
  88 };
  89
  90 /**
  91  * struct pcs_function - pinctrl function
  92  * @name:       pinctrl function name
  93  * @vals:       register and vals array
  94  * @nvals:      number of entries in vals array
  95  * @pgnames:    array of pingroup names the function uses
  96  * @npgnames:   number of pingroup names the function uses
  97  * @node:       list node
  98  */
  99 struct pcs_function {
 100         const char *name;
 101         struct pcs_func_vals *vals;
 102         unsigned nvals;
 103         const char **pgnames;
 104         int npgnames;
 105         struct pcs_conf_vals *conf;
 106         int nconfs;
 107         struct list_head node;
 108 };
 109
 110 /**
 111  * struct pcs_gpiofunc_range - pin ranges with same mux value of gpio function
 112  * @offset:     offset base of pins
 113  * @npins:      number pins with the same mux value of gpio function
 114  * @gpiofunc:   mux value of gpio function
 115  * @node:       list node
 116  */
 117 struct pcs_gpiofunc_range {
 118         unsigned offset;
 119         unsigned npins;
 120         unsigned gpiofunc;
 121         struct list_head node;
 122 };
 123
 124 /**
 125  * struct pcs_data - wrapper for data needed by pinctrl framework
 126  * @pa:         pindesc array
 127  * @cur:        index to current element
 128  *
 129  * REVISIT: We should be able to drop this eventually by adding
 130  * support for registering pins individually in the pinctrl
 131  * framework for those drivers that don't need a static array.
 132  */
 133 struct pcs_data {
 134         struct pinctrl_pin_desc *pa;
 135         int cur;
 136 };
 137
 138 /**
 139  * struct pcs_name - register name for a pin
 140  * @name:       name of the pinctrl register
 141  *
 142  * REVISIT: We may want to make names optional in the pinctrl
 143  * framework as some drivers may not care about pin names to
 144  * avoid kernel bloat. The pin names can be deciphered by user
 145  * space tools using debugfs based on the register address and
 146  * SoC packaging information.
 147  */
 148 struct pcs_name {
 149         char name[PCS_REG_NAME_LEN];
 150 };
 151
 152 /**
 153  * struct pcs_device - pinctrl device instance
 154  * @res:        resources
 155  * @base:       virtual address of the controller
 156  * @size:       size of the ioremapped area
 157  * @dev:        device entry
 158  * @pctl:       pin controller device
 159  * @mutex:      mutex protecting the lists
 160  * @width:      bits per mux register
 161  * @fmask:      function register mask
 162  * @fshift:     function register shift
 163  * @foff:       value to turn mux off
 164  * @fmax:       max number of functions in fmask
 165  * @is_pinconf: whether supports pinconf
 166  * @bits_per_pin:number of bits per pin
 167  * @names:      array of register names for pins
 168  * @pins:       physical pins on the SoC
 169  * @pgtree:     pingroup index radix tree
 170  * @ftree:      function index radix tree
 171  * @pingroups:  list of pingroups
 172  * @functions:  list of functions
 173  * @gpiofuncs:  list of gpio functions
 174  * @ngroups:    number of pingroups
 175  * @nfuncs:     number of functions
 176  * @desc:       pin controller descriptor
 177  * @read:       register read function to use
 178  * @write:      register write function to use
 179  */
 180 struct pcs_device {
 181         struct resource *res;
 182         void __iomem *base;
 183         unsigned size;
 184         struct device *dev;
 185         struct pinctrl_dev *pctl;
 186         struct mutex mutex;
 187         unsigned width;
 188         unsigned fmask;
 189         unsigned fshift;
 190         unsigned foff;
 191         unsigned fmax;
 192         bool bits_per_mux;
 193         bool is_pinconf;
 194         unsigned bits_per_pin;
 195         struct pcs_name *names;
 196         struct pcs_data pins;
 197         struct radix_tree_root pgtree;
 198         struct radix_tree_root ftree;
 199         struct list_head pingroups;
 200         struct list_head functions;
 201         struct list_head gpiofuncs;
 202         unsigned ngroups;
 203         unsigned nfuncs;
 204         struct pinctrl_desc desc;
 205         unsigned (*read)(void __iomem *reg);
 206         void (*write)(unsigned val, void __iomem *reg);
 207 };
 208
 209 static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
 210                            unsigned long *config);
 211 static int pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
 212                            unsigned long config);
 213
 214 static enum pin_config_param pcs_bias[] = {
 215         PIN_CONFIG_BIAS_PULL_DOWN,
 216         PIN_CONFIG_BIAS_PULL_UP,
 217 };
 218
 219 /*
 220  * REVISIT: Reads and writes could eventually use regmap or something
 221  * generic. But at least on omaps, some mux registers are performance
 222  * critical as they may need to be remuxed every time before and after
 223  * idle. Adding tests for register access width for every read and
 224  * write like regmap is doing is not desired, and caching the registers
 225  * does not help in this case.
 226  */
 227
 228 static unsigned __maybe_unused pcs_readb(void __iomem *reg)
 229 {
 230         return readb(reg);
 231 }
 232
 233 static unsigned __maybe_unused pcs_readw(void __iomem *reg)
 234 {
 235         return readw(reg);
 236 }
 237
 238 static unsigned __maybe_unused pcs_readl(void __iomem *reg)
 239 {
 240         return readl(reg);
 241 }
 242
 243 static void __maybe_unused pcs_writeb(unsigned val, void __iomem *reg)
 244 {
 245         writeb(val, reg);
 246 }
 247
 248 static void __maybe_unused pcs_writew(unsigned val, void __iomem *reg)
 249 {
 250         writew(val, reg);
 251 }
 252
 253 static void __maybe_unused pcs_writel(unsigned val, void __iomem *reg)
 254 {
 255         writel(val, reg);
 256 }
 257
 258 static int pcs_get_groups_count(struct pinctrl_dev *pctldev)
 259 {
 260         struct pcs_device *pcs;
 261
 262         pcs = pinctrl_dev_get_drvdata(pctldev);
 263
 264         return pcs->ngroups;
 265 }
 266
 267 static const char *pcs_get_group_name(struct pinctrl_dev *pctldev,
 268                                         unsigned gselector)
 269 {
 270         struct pcs_device *pcs;
 271         struct pcs_pingroup *group;
 272
 273         pcs = pinctrl_dev_get_drvdata(pctldev);
 274         group = radix_tree_lookup(&pcs->pgtree, gselector);
 275         if (!group) {
 276                 dev_err(pcs->dev, "%s could not find pingroup%i\n",
 277                         __func__, gselector);
 278                 return NULL;
 279         }
 280
 281         return group->name;
 282 }
 283
 284 static int pcs_get_group_pins(struct pinctrl_dev *pctldev,
 285                                         unsigned gselector,
 286                                         const unsigned **pins,
 287                                         unsigned *npins)
 288 {
 289         struct pcs_device *pcs;
 290         struct pcs_pingroup *group;
 291
 292         pcs = pinctrl_dev_get_drvdata(pctldev);
 293         group = radix_tree_lookup(&pcs->pgtree, gselector);
 294         if (!group) {
 295                 dev_err(pcs->dev, "%s could not find pingroup%i\n",
 296                         __func__, gselector);
 297                 return -EINVAL;
 298         }
 299
 300         *pins = group->gpins;
 301         *npins = group->ngpins;
 302
 303         return 0;
 304 }
 305
 306 static void pcs_pin_dbg_show(struct pinctrl_dev *pctldev,
 307                                         struct seq_file *s,
 308                                         unsigned pin)
 309 {
 310         struct pcs_device *pcs;
 311         unsigned val, mux_bytes;
 312
 313         pcs = pinctrl_dev_get_drvdata(pctldev);
 314
 315         mux_bytes = pcs->width / BITS_PER_BYTE;
 316         val = pcs->read(pcs->base + pin * mux_bytes);
 317
 318         seq_printf(s, "%08x %s " , val, DRIVER_NAME);
 319 }
 320
 321 static void pcs_dt_free_map(struct pinctrl_dev *pctldev,
 322                                 struct pinctrl_map *map, unsigned num_maps)
 323 {
 324         struct pcs_device *pcs;
 325
 326         pcs = pinctrl_dev_get_drvdata(pctldev);
 327         devm_kfree(pcs->dev, map);
 328 }
 329
 330 static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
 331                                 struct device_node *np_config,
 332                                 struct pinctrl_map **map, unsigned *num_maps);
 333
 334 static const struct pinctrl_ops pcs_pinctrl_ops = {
 335         .get_groups_count = pcs_get_groups_count,
 336         .get_group_name = pcs_get_group_name,
 337         .get_group_pins = pcs_get_group_pins,
 338         .pin_dbg_show = pcs_pin_dbg_show,
 339         .dt_node_to_map = pcs_dt_node_to_map,
 340         .dt_free_map = pcs_dt_free_map,
 341 };
 342
 343 static int pcs_get_functions_count(struct pinctrl_dev *pctldev)
 344 {
 345         struct pcs_device *pcs;
 346
 347         pcs = pinctrl_dev_get_drvdata(pctldev);
 348
 349         return pcs->nfuncs;
 350 }
 351
 352 static const char *pcs_get_function_name(struct pinctrl_dev *pctldev,
 353                                                 unsigned fselector)
 354 {
 355         struct pcs_device *pcs;
 356         struct pcs_function *func;
 357
 358         pcs = pinctrl_dev_get_drvdata(pctldev);
 359         func = radix_tree_lookup(&pcs->ftree, fselector);
 360         if (!func) {
 361                 dev_err(pcs->dev, "%s could not find function%i\n",
 362                         __func__, fselector);
 363                 return NULL;
 364         }
 365
 366         return func->name;
 367 }
 368
 369 static int pcs_get_function_groups(struct pinctrl_dev *pctldev,
 370                                         unsigned fselector,
 371                                         const char * const **groups,
 372                                         unsigned * const ngroups)
 373 {
 374         struct pcs_device *pcs;
 375         struct pcs_function *func;
 376
 377         pcs = pinctrl_dev_get_drvdata(pctldev);
 378         func = radix_tree_lookup(&pcs->ftree, fselector);
 379         if (!func) {
 380                 dev_err(pcs->dev, "%s could not find function%i\n",
 381                         __func__, fselector);
 382                 return -EINVAL;
 383         }
 384         *groups = func->pgnames;
 385         *ngroups = func->npgnames;
 386
 387         return 0;
 388 }
 389
 390 static int pcs_get_function(struct pinctrl_dev *pctldev, unsigned pin,
 391                             struct pcs_function **func)
 392 {
 393         struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 394         struct pin_desc *pdesc = pin_desc_get(pctldev, pin);
 395         const struct pinctrl_setting_mux *setting;
 396         unsigned fselector;
 397
 398         /* If pin is not described in DTS & enabled, mux_setting is NULL. */
 399         setting = pdesc->mux_setting;
 400         if (!setting)
 401                 return -ENOTSUPP;
 402         fselector = setting->func;
 403         *func = radix_tree_lookup(&pcs->ftree, fselector);
 404         if (!(*func)) {
 405                 dev_err(pcs->dev, "%s could not find function%i\n",
 406                         __func__, fselector);
 407                 return -ENOTSUPP;
 408         }
 409         return 0;
 410 }
 411
 412 static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
 413         unsigned group)
 414 {
 415         struct pcs_device *pcs;
 416         struct pcs_function *func;
 417         int i;
 418
 419         pcs = pinctrl_dev_get_drvdata(pctldev);
 420         /* If function mask is null, needn't enable it. */
 421         if (!pcs->fmask)
 422                 return 0;
 423         func = radix_tree_lookup(&pcs->ftree, fselector);
 424         if (!func)
 425                 return -EINVAL;
 426
 427         dev_dbg(pcs->dev, "enabling %s function%i\n",
 428                 func->name, fselector);
 429
 430         for (i = 0; i < func->nvals; i++) {
 431                 struct pcs_func_vals *vals;
 432                 unsigned val, mask;
 433
 434                 vals = &func->vals[i];
 435                 val = pcs->read(vals->reg);
 436
 437                 if (pcs->bits_per_mux)
 438                         mask = vals->mask;
 439                 else
 440                         mask = pcs->fmask;
 441
 442                 val &= ~mask;
 443                 val |= (vals->val & mask);
 444                 pcs->write(val, vals->reg);
 445         }
 446
 447         return 0;
 448 }
 449
 450 static void pcs_disable(struct pinctrl_dev *pctldev, unsigned fselector,
 451                                         unsigned group)
 452 {
 453         struct pcs_device *pcs;
 454         struct pcs_function *func;
 455         int i;
 456
 457         pcs = pinctrl_dev_get_drvdata(pctldev);
 458         /* If function mask is null, needn't disable it. */
 459         if (!pcs->fmask)
 460                 return;
 461
 462         func = radix_tree_lookup(&pcs->ftree, fselector);
 463         if (!func) {
 464                 dev_err(pcs->dev, "%s could not find function%i\n",
 465                         __func__, fselector);
 466                 return;
 467         }
 468
 469         /*
 470          * Ignore disable if function-off is not specified. Some hardware
 471          * does not have clearly defined disable function. For pin specific
 472          * off modes, you can use alternate named states as described in
 473          * pinctrl-bindings.txt.
 474          */
 475         if (pcs->foff == PCS_OFF_DISABLED) {
 476                 dev_dbg(pcs->dev, "ignoring disable for %s function%i\n",
 477                         func->name, fselector);
 478                 return;
 479         }
 480
 481         dev_dbg(pcs->dev, "disabling function%i %s\n",
 482                 fselector, func->name);
 483
 484         for (i = 0; i < func->nvals; i++) {
 485                 struct pcs_func_vals *vals;
 486                 unsigned val;
 487
 488                 vals = &func->vals[i];
 489                 val = pcs->read(vals->reg);
 490                 val &= ~pcs->fmask;
 491                 val |= pcs->foff << pcs->fshift;
 492                 pcs->write(val, vals->reg);
 493         }
 494 }
 495
 496 static int pcs_request_gpio(struct pinctrl_dev *pctldev,
 497                             struct pinctrl_gpio_range *range, unsigned pin)
 498 {
 499         struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 500         struct pcs_gpiofunc_range *frange = NULL;
 501         struct list_head *pos, *tmp;
 502         int mux_bytes = 0;
 503         unsigned data;
 504
 505         /* If function mask is null, return directly. */
 506         if (!pcs->fmask)
 507                 return -ENOTSUPP;
 508
 509         list_for_each_safe(pos, tmp, &pcs->gpiofuncs) {
 510                 frange = list_entry(pos, struct pcs_gpiofunc_range, node);
 511                 if (pin >= frange->offset + frange->npins
 512                         || pin < frange->offset)
 513                         continue;
 514                 mux_bytes = pcs->width / BITS_PER_BYTE;
 515                 data = pcs->read(pcs->base + pin * mux_bytes) & ~pcs->fmask;
 516                 data |= frange->gpiofunc;
 517                 pcs->write(data, pcs->base + pin * mux_bytes);
 518                 break;
 519         }
 520         return 0;
 521 }
 522
 523 static const struct pinmux_ops pcs_pinmux_ops = {
 524         .get_functions_count = pcs_get_functions_count,
 525         .get_function_name = pcs_get_function_name,
 526         .get_function_groups = pcs_get_function_groups,
 527         .enable = pcs_enable,
 528         .disable = pcs_disable,
 529         .gpio_request_enable = pcs_request_gpio,
 530 };
 531
 532 /* Clear BIAS value */
 533 static void pcs_pinconf_clear_bias(struct pinctrl_dev *pctldev, unsigned pin)
 534 {
 535         unsigned long config;
 536         int i;
 537         for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) {
 538                 config = pinconf_to_config_packed(pcs_bias[i], 0);
 539                 pcs_pinconf_set(pctldev, pin, config);
 540         }
 541 }
 542
 543 /*
 544  * Check whether PIN_CONFIG_BIAS_DISABLE is valid.
 545  * It's depend on that PULL_DOWN & PULL_UP configs are all invalid.
 546  */
 547 static bool pcs_pinconf_bias_disable(struct pinctrl_dev *pctldev, unsigned pin)
 548 {
 549         unsigned long config;
 550         int i;
 551
 552         for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) {
 553                 config = pinconf_to_config_packed(pcs_bias[i], 0);
 554                 if (!pcs_pinconf_get(pctldev, pin, &config))
 555                         goto out;
 556         }
 557         return true;
 558 out:
 559         return false;
 560 }
 561
 562 static int pcs_pinconf_get(struct pinctrl_dev *pctldev,
 563                                 unsigned pin, unsigned long *config)
 564 {
 565         struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 566         struct pcs_function *func;
 567         enum pin_config_param param;
 568         unsigned offset = 0, data = 0, i, j, ret;
 569
 570         ret = pcs_get_function(pctldev, pin, &func);
 571         if (ret)
 572                 return ret;
 573
 574         for (i = 0; i < func->nconfs; i++) {
 575                 param = pinconf_to_config_param(*config);
 576                 if (param == PIN_CONFIG_BIAS_DISABLE) {
 577                         if (pcs_pinconf_bias_disable(pctldev, pin)) {
 578                                 *config = 0;
 579                                 return 0;
 580                         } else {
 581                                 return -ENOTSUPP;
 582                         }
 583                 } else if (param != func->conf[i].param) {
 584                         continue;
 585                 }
 586
 587                 offset = pin * (pcs->width / BITS_PER_BYTE);
 588                 data = pcs->read(pcs->base + offset) & func->conf[i].mask;
 589                 switch (func->conf[i].param) {
 590                 /* 4 parameters */
 591                 case PIN_CONFIG_BIAS_PULL_DOWN:
 592                 case PIN_CONFIG_BIAS_PULL_UP:
 593                 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 594                         if ((data != func->conf[i].enable) ||
 595                             (data == func->conf[i].disable))
 596                                 return -ENOTSUPP;
 597                         *config = 0;
 598                         break;
 599                 /* 2 parameters */
 600                 case PIN_CONFIG_INPUT_SCHMITT:
 601                         for (j = 0; j < func->nconfs; j++) {
 602                                 switch (func->conf[j].param) {
 603                                 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 604                                         if (data != func->conf[j].enable)
 605                                                 return -ENOTSUPP;
 606                                         break;
 607                                 default:
 608                                         break;
 609                                 }
 610                         }
 611                         *config = data;
 612                         break;
 613                 case PIN_CONFIG_DRIVE_STRENGTH:
 614                 case PIN_CONFIG_SLEW_RATE:
 615                 default:
 616                         *config = data;
 617                         break;
 618                 }
 619                 return 0;
 620         }
 621         return -ENOTSUPP;
 622 }
 623
 624 static int pcs_pinconf_set(struct pinctrl_dev *pctldev,
 625                                 unsigned pin, unsigned long config)
 626 {
 627         struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
 628         struct pcs_function *func;
 629         unsigned offset = 0, shift = 0, i, data, ret;
 630         u16 arg;
 631
 632         ret = pcs_get_function(pctldev, pin, &func);
 633         if (ret)
 634                 return ret;
 635
 636         for (i = 0; i < func->nconfs; i++) {
 637                 if (pinconf_to_config_param(config) == func->conf[i].param) {
 638                         offset = pin * (pcs->width / BITS_PER_BYTE);
 639                         data = pcs->read(pcs->base + offset);
 640                         arg = pinconf_to_config_argument(config);
 641                         switch (func->conf[i].param) {
 642                         /* 2 parameters */
 643                         case PIN_CONFIG_INPUT_SCHMITT:
 644                         case PIN_CONFIG_DRIVE_STRENGTH:
 645                         case PIN_CONFIG_SLEW_RATE:
 646                                 shift = ffs(func->conf[i].mask) - 1;
 647                                 data &= ~func->conf[i].mask;
 648                                 data |= (arg << shift) & func->conf[i].mask;
 649                                 break;
 650                         /* 4 parameters */
 651                         case PIN_CONFIG_BIAS_DISABLE:
 652                                 pcs_pinconf_clear_bias(pctldev, pin);
 653                                 break;
 654                         case PIN_CONFIG_BIAS_PULL_DOWN:
 655                         case PIN_CONFIG_BIAS_PULL_UP:
 656                                 if (arg)
 657                                         pcs_pinconf_clear_bias(pctldev, pin);
 658                                 /* fall through */
 659                         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 660                                 data &= ~func->conf[i].mask;
 661                                 if (arg)
 662                                         data |= func->conf[i].enable;
 663                                 else
 664                                         data |= func->conf[i].disable;
 665                                 break;
 666                         default:
 667                                 return -ENOTSUPP;
 668                         }
 669                         pcs->write(data, pcs->base + offset);
 670                         return 0;
 671                 }
 672         }
 673         return -ENOTSUPP;
 674 }
 675
 676 static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev,
 677                                 unsigned group, unsigned long *config)
 678 {
 679         const unsigned *pins;
 680         unsigned npins, old = 0;
 681         int i, ret;
 682
 683         ret = pcs_get_group_pins(pctldev, group, &pins, &npins);
 684         if (ret)
 685                 return ret;
 686         for (i = 0; i < npins; i++) {
 687                 if (pcs_pinconf_get(pctldev, pins[i], config))
 688                         return -ENOTSUPP;
 689                 /* configs do not match between two pins */
 690                 if (i && (old != *config))
 691                         return -ENOTSUPP;
 692                 old = *config;
 693         }
 694         return 0;
 695 }
 696
 697 static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev,
 698                                 unsigned group, unsigned long config)
 699 {
 700         const unsigned *pins;
 701         unsigned npins;
 702         int i, ret;
 703
 704         ret = pcs_get_group_pins(pctldev, group, &pins, &npins);
 705         if (ret)
 706                 return ret;
 707         for (i = 0; i < npins; i++) {
 708                 if (pcs_pinconf_set(pctldev, pins[i], config))
 709                         return -ENOTSUPP;
 710         }
 711         return 0;
 712 }
 713
 714 static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
 715                                 struct seq_file *s, unsigned pin)
 716 {
 717 }
 718
 719 static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
 720                                 struct seq_file *s, unsigned selector)
 721 {
 722 }
 723
 724 static void pcs_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,
 725                                         struct seq_file *s,
 726                                         unsigned long config)
 727 {
 728         pinconf_generic_dump_config(pctldev, s, config);
 729 }
 730
 731 static const struct pinconf_ops pcs_pinconf_ops = {
 732         .pin_config_get = pcs_pinconf_get,
 733         .pin_config_set = pcs_pinconf_set,
 734         .pin_config_group_get = pcs_pinconf_group_get,
 735         .pin_config_group_set = pcs_pinconf_group_set,
 736         .pin_config_dbg_show = pcs_pinconf_dbg_show,
 737         .pin_config_group_dbg_show = pcs_pinconf_group_dbg_show,
 738         .pin_config_config_dbg_show = pcs_pinconf_config_dbg_show,
 739         .is_generic = true,
 740 };
 741
 742 /**
 743  * pcs_add_pin() - add a pin to the static per controller pin array
 744  * @pcs: pcs driver instance
 745  * @offset: register offset from base
 746  */
 747 static int pcs_add_pin(struct pcs_device *pcs, unsigned offset,
 748                 unsigned pin_pos)
 749 {
 750         struct pinctrl_pin_desc *pin;
 751         struct pcs_name *pn;
 752         int i;
 753
 754         i = pcs->pins.cur;
 755         if (i >= pcs->desc.npins) {
 756                 dev_err(pcs->dev, "too many pins, max %i\n",
 757                         pcs->desc.npins);
 758                 return -ENOMEM;
 759         }
 760
 761         pin = &pcs->pins.pa[i];
 762         pn = &pcs->names[i];
 763         sprintf(pn->name, "%lx.%d",
 764                 (unsigned long)pcs->res->start + offset, pin_pos);
 765         pin->name = pn->name;
 766         pin->number = i;
 767         pcs->pins.cur++;
 768
 769         return i;
 770 }
 771
 772 /**
 773  * pcs_allocate_pin_table() - adds all the pins for the pinctrl driver
 774  * @pcs: pcs driver instance
 775  *
 776  * In case of errors, resources are freed in pcs_free_resources.
 777  *
 778  * If your hardware needs holes in the address space, then just set
 779  * up multiple driver instances.
 780  */
 781 static int pcs_allocate_pin_table(struct pcs_device *pcs)
 782 {
 783         int mux_bytes, nr_pins, i;
 784         int num_pins_in_register = 0;
 785
 786         mux_bytes = pcs->width / BITS_PER_BYTE;
 787
 788         if (pcs->bits_per_mux) {
 789                 pcs->bits_per_pin = fls(pcs->fmask);
 790                 nr_pins = (pcs->size * BITS_PER_BYTE) / pcs->bits_per_pin;
 791                 num_pins_in_register = pcs->width / pcs->bits_per_pin;
 792         } else {
 793                 nr_pins = pcs->size / mux_bytes;
 794         }
 795
 796         dev_dbg(pcs->dev, "allocating %i pins\n", nr_pins);
 797         pcs->pins.pa = devm_kzalloc(pcs->dev,
 798                                 sizeof(*pcs->pins.pa) * nr_pins,
 799                                 GFP_KERNEL);
 800         if (!pcs->pins.pa)
 801                 return -ENOMEM;
 802
 803         pcs->names = devm_kzalloc(pcs->dev,
 804                                 sizeof(struct pcs_name) * nr_pins,
 805                                 GFP_KERNEL);
 806         if (!pcs->names)
 807                 return -ENOMEM;
 808
 809         pcs->desc.pins = pcs->pins.pa;
 810         pcs->desc.npins = nr_pins;
 811
 812         for (i = 0; i < pcs->desc.npins; i++) {
 813                 unsigned offset;
 814                 int res;
 815                 int byte_num;
 816                 int pin_pos = 0;
 817
 818                 if (pcs->bits_per_mux) {
 819                         byte_num = (pcs->bits_per_pin * i) / BITS_PER_BYTE;
 820                         offset = (byte_num / mux_bytes) * mux_bytes;
 821                         pin_pos = i % num_pins_in_register;
 822                 } else {
 823                         offset = i * mux_bytes;
 824                 }
 825                 res = pcs_add_pin(pcs, offset, pin_pos);
 826                 if (res < 0) {
 827                         dev_err(pcs->dev, "error adding pins: %i\n", res);
 828                         return res;
 829                 }
 830         }
 831
 832         return 0;
 833 }
 834
 835 /**
 836  * pcs_add_function() - adds a new function to the function list
 837  * @pcs: pcs driver instance
 838  * @np: device node of the mux entry
 839  * @name: name of the function
 840  * @vals: array of mux register value pairs used by the function
 841  * @nvals: number of mux register value pairs
 842  * @pgnames: array of pingroup names for the function
 843  * @npgnames: number of pingroup names
 844  */
 845 static struct pcs_function *pcs_add_function(struct pcs_device *pcs,
 846                                         struct device_node *np,
 847                                         const char *name,
 848                                         struct pcs_func_vals *vals,
 849                                         unsigned nvals,
 850                                         const char **pgnames,
 851                                         unsigned npgnames)
 852 {
 853         struct pcs_function *function;
 854
 855         function = devm_kzalloc(pcs->dev, sizeof(*function), GFP_KERNEL);
 856         if (!function)
 857                 return NULL;
 858
 859         function->name = name;
 860         function->vals = vals;
 861         function->nvals = nvals;
 862         function->pgnames = pgnames;
 863         function->npgnames = npgnames;
 864
 865         mutex_lock(&pcs->mutex);
 866         list_add_tail(&function->node, &pcs->functions);
 867         radix_tree_insert(&pcs->ftree, pcs->nfuncs, function);
 868         pcs->nfuncs++;
 869         mutex_unlock(&pcs->mutex);
 870
 871         return function;
 872 }
 873
 874 static void pcs_remove_function(struct pcs_device *pcs,
 875                                 struct pcs_function *function)
 876 {
 877         int i;
 878
 879         mutex_lock(&pcs->mutex);
 880         for (i = 0; i < pcs->nfuncs; i++) {
 881                 struct pcs_function *found;
 882
 883                 found = radix_tree_lookup(&pcs->ftree, i);
 884                 if (found == function)
 885                         radix_tree_delete(&pcs->ftree, i);
 886         }
 887         list_del(&function->node);
 888         mutex_unlock(&pcs->mutex);
 889 }
 890
 891 /**
 892  * pcs_add_pingroup() - add a pingroup to the pingroup list
 893  * @pcs: pcs driver instance
 894  * @np: device node of the mux entry
 895  * @name: name of the pingroup
 896  * @gpins: array of the pins that belong to the group
 897  * @ngpins: number of pins in the group
 898  */
 899 static int pcs_add_pingroup(struct pcs_device *pcs,
 900                                         struct device_node *np,
 901                                         const char *name,
 902                                         int *gpins,
 903                                         int ngpins)
 904 {
 905         struct pcs_pingroup *pingroup;
 906
 907         pingroup = devm_kzalloc(pcs->dev, sizeof(*pingroup), GFP_KERNEL);
 908         if (!pingroup)
 909                 return -ENOMEM;
 910
 911         pingroup->name = name;
 912         pingroup->np = np;
 913         pingroup->gpins = gpins;
 914         pingroup->ngpins = ngpins;
 915
 916         mutex_lock(&pcs->mutex);
 917         list_add_tail(&pingroup->node, &pcs->pingroups);
 918         radix_tree_insert(&pcs->pgtree, pcs->ngroups, pingroup);
 919         pcs->ngroups++;
 920         mutex_unlock(&pcs->mutex);
 921
 922         return 0;
 923 }
 924
 925 /**
 926  * pcs_get_pin_by_offset() - get a pin index based on the register offset
 927  * @pcs: pcs driver instance
 928  * @offset: register offset from the base
 929  *
 930  * Note that this is OK as long as the pins are in a static array.
 931  */
 932 static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
 933 {
 934         unsigned index;
 935
 936         if (offset >= pcs->size) {
 937                 dev_err(pcs->dev, "mux offset out of range: 0x%x (0x%x)\n",
 938                         offset, pcs->size);
 939                 return -EINVAL;
 940         }
 941
 942         if (pcs->bits_per_mux)
 943                 index = (offset * BITS_PER_BYTE) / pcs->bits_per_pin;
 944         else
 945                 index = offset / (pcs->width / BITS_PER_BYTE);
 946
 947         return index;
 948 }
 949
 950 /*
 951  * check whether data matches enable bits or disable bits
 952  * Return value: 1 for matching enable bits, 0 for matching disable bits,
 953  *               and negative value for matching failure.
 954  */
 955 static int pcs_config_match(unsigned data, unsigned enable, unsigned disable)
 956 {
 957         int ret = -EINVAL;
 958
 959         if (data == enable)
 960                 ret = 1;
 961         else if (data == disable)
 962                 ret = 0;
 963         return ret;
 964 }
 965
 966 static void add_config(struct pcs_conf_vals **conf, enum pin_config_param param,
 967                        unsigned value, unsigned enable, unsigned disable,
 968                        unsigned mask)
 969 {
 970         (*conf)->param = param;
 971         (*conf)->val = value;
 972         (*conf)->enable = enable;
 973         (*conf)->disable = disable;
 974         (*conf)->mask = mask;
 975         (*conf)++;
 976 }
 977
 978 static void add_setting(unsigned long **setting, enum pin_config_param param,
 979                         unsigned arg)
 980 {
 981         **setting = pinconf_to_config_packed(param, arg);
 982         (*setting)++;
 983 }
 984
 985 /* add pinconf setting with 2 parameters */
 986 static void pcs_add_conf2(struct pcs_device *pcs, struct device_node *np,
 987                           const char *name, enum pin_config_param param,
 988                           struct pcs_conf_vals **conf, unsigned long **settings)
 989 {
 990         unsigned value[2], shift;
 991         int ret;
 992
 993         ret = of_property_read_u32_array(np, name, value, 2);
 994         if (ret)
 995                 return;
 996         /* set value & mask */
 997         value[0] &= value[1];
 998         shift = ffs(value[1]) - 1;
 999         /* skip enable & disable */
1000         add_config(conf, param, value[0], 0, 0, value[1]);
1001         add_setting(settings, param, value[0] >> shift);
1002 }
1003
1004 /* add pinconf setting with 4 parameters */
1005 static void pcs_add_conf4(struct pcs_device *pcs, struct device_node *np,
1006                           const char *name, enum pin_config_param param,
1007                           struct pcs_conf_vals **conf, unsigned long **settings)
1008 {
1009         unsigned value[4];
1010         int ret;
1011
1012         /* value to set, enable, disable, mask */
1013         ret = of_property_read_u32_array(np, name, value, 4);
1014         if (ret)
1015                 return;
1016         if (!value[3]) {
1017                 dev_err(pcs->dev, "mask field of the property can't be 0\n");
1018                 return;
1019         }
1020         value[0] &= value[3];
1021         value[1] &= value[3];
1022         value[2] &= value[3];
1023         ret = pcs_config_match(value[0], value[1], value[2]);
1024         if (ret < 0)
1025                 dev_dbg(pcs->dev, "failed to match enable or disable bits\n");
1026         add_config(conf, param, value[0], value[1], value[2], value[3]);
1027         add_setting(settings, param, ret);
1028 }
1029
1030 static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
1031                              struct pcs_function *func,
1032                              struct pinctrl_map **map)
1033
1034 {
1035         struct pinctrl_map *m = *map;
1036         int i = 0, nconfs = 0;
1037         unsigned long *settings = NULL, *s = NULL;
1038         struct pcs_conf_vals *conf = NULL;
1039         struct pcs_conf_type prop2[] = {
1040                 { "pinctrl-single,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, },
1041                 { "pinctrl-single,slew-rate", PIN_CONFIG_SLEW_RATE, },
1042                 { "pinctrl-single,input-schmitt", PIN_CONFIG_INPUT_SCHMITT, },
1043         };
1044         struct pcs_conf_type prop4[] = {
1045                 { "pinctrl-single,bias-pullup", PIN_CONFIG_BIAS_PULL_UP, },
1046                 { "pinctrl-single,bias-pulldown", PIN_CONFIG_BIAS_PULL_DOWN, },
1047                 { "pinctrl-single,input-schmitt-enable",
1048                         PIN_CONFIG_INPUT_SCHMITT_ENABLE, },
1049         };
1050
1051         /* If pinconf isn't supported, don't parse properties in below. */
1052         if (!pcs->is_pinconf)
1053                 return 0;
1054
1055         /* cacluate how much properties are supported in current node */
1056         for (i = 0; i < ARRAY_SIZE(prop2); i++) {
1057                 if (of_find_property(np, prop2[i].name, NULL))
1058                         nconfs++;
1059         }
1060         for (i = 0; i < ARRAY_SIZE(prop4); i++) {
1061                 if (of_find_property(np, prop4[i].name, NULL))
1062                         nconfs++;
1063         }
1064         if (!nconfs)
1065                 return 0;
1066
1067         func->conf = devm_kzalloc(pcs->dev,
1068                                   sizeof(struct pcs_conf_vals) * nconfs,
1069                                   GFP_KERNEL);
1070         if (!func->conf)
1071                 return -ENOMEM;
1072         func->nconfs = nconfs;
1073         conf = &(func->conf[0]);
1074         m++;
1075         settings = devm_kzalloc(pcs->dev, sizeof(unsigned long) * nconfs,
1076                                 GFP_KERNEL);
1077         if (!settings)
1078                 return -ENOMEM;
1079         s = &settings[0];
1080
1081         for (i = 0; i < ARRAY_SIZE(prop2); i++)
1082                 pcs_add_conf2(pcs, np, prop2[i].name, prop2[i].param,
1083                               &conf, &s);
1084         for (i = 0; i < ARRAY_SIZE(prop4); i++)
1085                 pcs_add_conf4(pcs, np, prop4[i].name, prop4[i].param,
1086                               &conf, &s);
1087         m->type = PIN_MAP_TYPE_CONFIGS_GROUP;
1088         m->data.configs.group_or_pin = np->name;
1089         m->data.configs.configs = settings;
1090         m->data.configs.num_configs = nconfs;
1091         return 0;
1092 }
1093
1094 static void pcs_free_pingroups(struct pcs_device *pcs);
1095
1096 /**
1097  * smux_parse_one_pinctrl_entry() - parses a device tree mux entry
1098  * @pcs: pinctrl driver instance
1099  * @np: device node of the mux entry
1100  * @map: map entry
1101  * @num_maps: number of map
1102  * @pgnames: pingroup names
1103  *
1104  * Note that this binding currently supports only sets of one register + value.
1105  *
1106  * Also note that this driver tries to avoid understanding pin and function
1107  * names because of the extra bloat they would cause especially in the case of
1108  * a large number of pins. This driver just sets what is specified for the board
1109  * in the .dts file. Further user space debugging tools can be developed to
1110  * decipher the pin and function names using debugfs.
1111  *
1112  * If you are concerned about the boot time, set up the static pins in
1113  * the bootloader, and only set up selected pins as device tree entries.
1114  */
1115 static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
1116                                                 struct device_node *np,
1117                                                 struct pinctrl_map **map,
1118                                                 unsigned *num_maps,
1119                                                 const char **pgnames)
1120 {
1121         struct pcs_func_vals *vals;
1122         const __be32 *mux;
1123         int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
1124         struct pcs_function *function;
1125
1126         mux = of_get_property(np, PCS_MUX_PINS_NAME, &size);
1127         if ((!mux) || (size < sizeof(*mux) * 2)) {
1128                 dev_err(pcs->dev, "bad data for mux %s\n",
1129                         np->name);
1130                 return -EINVAL;
1131         }
1132
1133         size /= sizeof(*mux);   /* Number of elements in array */
1134         rows = size / 2;
1135
1136         vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
1137         if (!vals)
1138                 return -ENOMEM;
1139
1140         pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows, GFP_KERNEL);
1141         if (!pins)
1142                 goto free_vals;
1143
1144         while (index < size) {
1145                 unsigned offset, val;
1146                 int pin;
1147
1148                 offset = be32_to_cpup(mux + index++);
1149                 val = be32_to_cpup(mux + index++);
1150                 vals[found].reg = pcs->base + offset;
1151                 vals[found].val = val;
1152
1153                 pin = pcs_get_pin_by_offset(pcs, offset);
1154                 if (pin < 0) {
1155                         dev_err(pcs->dev,
1156                                 "could not add functions for %s %ux\n",
1157                                 np->name, offset);
1158                         break;
1159                 }
1160                 pins[found++] = pin;
1161         }
1162
1163         pgnames[0] = np->name;
1164         function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
1165         if (!function)
1166                 goto free_pins;
1167
1168         res = pcs_add_pingroup(pcs, np, np->name, pins, found);
1169         if (res < 0)
1170                 goto free_function;
1171
1172         (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
1173         (*map)->data.mux.group = np->name;
1174         (*map)->data.mux.function = np->name;
1175
1176         if (pcs->is_pinconf) {
1177                 res = pcs_parse_pinconf(pcs, np, function, map);
1178                 if (res)
1179                         goto free_pingroups;
1180                 *num_maps = 2;
1181         } else {
1182                 *num_maps = 1;
1183         }
1184         return 0;
1185
1186 free_pingroups:
1187         pcs_free_pingroups(pcs);
1188         *num_maps = 1;
1189 free_function:
1190         pcs_remove_function(pcs, function);
1191
1192 free_pins:
1193         devm_kfree(pcs->dev, pins);
1194
1195 free_vals:
1196         devm_kfree(pcs->dev, vals);
1197
1198         return res;
1199 }
1200
1201 #define PARAMS_FOR_BITS_PER_MUX 3
1202
1203 static int pcs_parse_bits_in_pinctrl_entry(struct pcs_device *pcs,
1204                                                 struct device_node *np,
1205                                                 struct pinctrl_map **map,
1206                                                 unsigned *num_maps,
1207                                                 const char **pgnames)
1208 {
1209         struct pcs_func_vals *vals;
1210         const __be32 *mux;
1211         int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
1212         int npins_in_row;
1213         struct pcs_function *function;
1214
1215         mux = of_get_property(np, PCS_MUX_BITS_NAME, &size);
1216
1217         if (!mux) {
1218                 dev_err(pcs->dev, "no valid property for %s\n", np->name);
1219                 return -EINVAL;
1220         }
1221
1222         if (size < (sizeof(*mux) * PARAMS_FOR_BITS_PER_MUX)) {
1223                 dev_err(pcs->dev, "bad data for %s\n", np->name);
1224                 return -EINVAL;
1225         }
1226
1227         /* Number of elements in array */
1228         size /= sizeof(*mux);
1229
1230         rows = size / PARAMS_FOR_BITS_PER_MUX;
1231         npins_in_row = pcs->width / pcs->bits_per_pin;
1232
1233         vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows * npins_in_row,
1234                         GFP_KERNEL);
1235         if (!vals)
1236                 return -ENOMEM;
1237
1238         pins = devm_kzalloc(pcs->dev, sizeof(*pins) * rows * npins_in_row,
1239                         GFP_KERNEL);
1240         if (!pins)
1241                 goto free_vals;
1242
1243         while (index < size) {
1244                 unsigned offset, val;
1245                 unsigned mask, bit_pos, val_pos, mask_pos, submask;
1246                 unsigned pin_num_from_lsb;
1247                 int pin;
1248
1249                 offset = be32_to_cpup(mux + index++);
1250                 val = be32_to_cpup(mux + index++);
1251                 mask = be32_to_cpup(mux + index++);
1252
1253                 /* Parse pins in each row from LSB */
1254                 while (mask) {
1255                         bit_pos = ffs(mask);
1256                         pin_num_from_lsb = bit_pos / pcs->bits_per_pin;
1257                         mask_pos = ((pcs->fmask) << (bit_pos - 1));
1258                         val_pos = val & mask_pos;
1259                         submask = mask & mask_pos;
1260                         mask &= ~mask_pos;
1261
1262                         if (submask != mask_pos) {
1263                                 dev_warn(pcs->dev,
1264                                                 "Invalid submask 0x%x for %s at 0x%x\n",
1265                                                 submask, np->name, offset);
1266                                 continue;
1267                         }
1268
1269                         vals[found].mask = submask;
1270                         vals[found].reg = pcs->base + offset;
1271                         vals[found].val = val_pos;
1272
1273                         pin = pcs_get_pin_by_offset(pcs, offset);
1274                         if (pin < 0) {
1275                                 dev_err(pcs->dev,
1276                                         "could not add functions for %s %ux\n",
1277                                         np->name, offset);
1278                                 break;
1279                         }
1280                         pins[found++] = pin + pin_num_from_lsb;
1281                 }
1282         }
1283
1284         pgnames[0] = np->name;
1285         function = pcs_add_function(pcs, np, np->name, vals, found, pgnames, 1);
1286         if (!function)
1287                 goto free_pins;
1288
1289         res = pcs_add_pingroup(pcs, np, np->name, pins, found);
1290         if (res < 0)
1291                 goto free_function;
1292
1293         (*map)->type = PIN_MAP_TYPE_MUX_GROUP;
1294         (*map)->data.mux.group = np->name;
1295         (*map)->data.mux.function = np->name;
1296
1297         if (pcs->is_pinconf) {
1298                 dev_err(pcs->dev, "pinconf not supported\n");
1299                 goto free_pingroups;
1300         }
1301
1302         *num_maps = 1;
1303         return 0;
1304
1305 free_pingroups:
1306         pcs_free_pingroups(pcs);
1307         *num_maps = 1;
1308 free_function:
1309         pcs_remove_function(pcs, function);
1310
1311 free_pins:
1312         devm_kfree(pcs->dev, pins);
1313
1314 free_vals:
1315         devm_kfree(pcs->dev, vals);
1316
1317         return res;
1318 }
1319 /**
1320  * pcs_dt_node_to_map() - allocates and parses pinctrl maps
1321  * @pctldev: pinctrl instance
1322  * @np_config: device tree pinmux entry
1323  * @map: array of map entries
1324  * @num_maps: number of maps
1325  */
1326 static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
1327                                 struct device_node *np_config,
1328                                 struct pinctrl_map **map, unsigned *num_maps)
1329 {
1330         struct pcs_device *pcs;
1331         const char **pgnames;
1332         int ret;
1333
1334         pcs = pinctrl_dev_get_drvdata(pctldev);
1335
1336         /* create 2 maps. One is for pinmux, and the other is for pinconf. */
1337         *map = devm_kzalloc(pcs->dev, sizeof(**map) * 2, GFP_KERNEL);
1338         if (!*map)
1339                 return -ENOMEM;
1340
1341         *num_maps = 0;
1342
1343         pgnames = devm_kzalloc(pcs->dev, sizeof(*pgnames), GFP_KERNEL);
1344         if (!pgnames) {
1345                 ret = -ENOMEM;
1346                 goto free_map;
1347         }
1348
1349         if (pcs->bits_per_mux) {
1350                 ret = pcs_parse_bits_in_pinctrl_entry(pcs, np_config, map,
1351                                 num_maps, pgnames);
1352                 if (ret < 0) {
1353                         dev_err(pcs->dev, "no pins entries for %s\n",
1354                                 np_config->name);
1355                         goto free_pgnames;
1356                 }
1357         } else {
1358                 ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map,
1359                                 num_maps, pgnames);
1360                 if (ret < 0) {
1361                         dev_err(pcs->dev, "no pins entries for %s\n",
1362                                 np_config->name);
1363                         goto free_pgnames;
1364                 }
1365         }
1366
1367         return 0;
1368
1369 free_pgnames:
1370         devm_kfree(pcs->dev, pgnames);
1371 free_map:
1372         devm_kfree(pcs->dev, *map);
1373
1374         return ret;
1375 }
1376
1377 /**
1378  * pcs_free_funcs() - free memory used by functions
1379  * @pcs: pcs driver instance
1380  */
1381 static void pcs_free_funcs(struct pcs_device *pcs)
1382 {
1383         struct list_head *pos, *tmp;
1384         int i;
1385
1386         mutex_lock(&pcs->mutex);
1387         for (i = 0; i < pcs->nfuncs; i++) {
1388                 struct pcs_function *func;
1389
1390                 func = radix_tree_lookup(&pcs->ftree, i);
1391                 if (!func)
1392                         continue;
1393                 radix_tree_delete(&pcs->ftree, i);
1394         }
1395         list_for_each_safe(pos, tmp, &pcs->functions) {
1396                 struct pcs_function *function;
1397
1398                 function = list_entry(pos, struct pcs_function, node);
1399                 list_del(&function->node);
1400         }
1401         mutex_unlock(&pcs->mutex);
1402 }
1403
1404 /**
1405  * pcs_free_pingroups() - free memory used by pingroups
1406  * @pcs: pcs driver instance
1407  */
1408 static void pcs_free_pingroups(struct pcs_device *pcs)
1409 {
1410         struct list_head *pos, *tmp;
1411         int i;
1412
1413         mutex_lock(&pcs->mutex);
1414         for (i = 0; i < pcs->ngroups; i++) {
1415                 struct pcs_pingroup *pingroup;
1416
1417                 pingroup = radix_tree_lookup(&pcs->pgtree, i);
1418                 if (!pingroup)
1419                         continue;
1420                 radix_tree_delete(&pcs->pgtree, i);
1421         }
1422         list_for_each_safe(pos, tmp, &pcs->pingroups) {
1423                 struct pcs_pingroup *pingroup;
1424
1425                 pingroup = list_entry(pos, struct pcs_pingroup, node);
1426                 list_del(&pingroup->node);
1427         }
1428         mutex_unlock(&pcs->mutex);
1429 }
1430
1431 /**
1432  * pcs_free_resources() - free memory used by this driver
1433  * @pcs: pcs driver instance
1434  */
1435 static void pcs_free_resources(struct pcs_device *pcs)
1436 {
1437         if (pcs->pctl)
1438                 pinctrl_unregister(pcs->pctl);
1439
1440         pcs_free_funcs(pcs);
1441         pcs_free_pingroups(pcs);
1442 }
1443
1444 #define PCS_GET_PROP_U32(name, reg, err)                                \
1445         do {                                                            \
1446                 ret = of_property_read_u32(np, name, reg);              \
1447                 if (ret) {                                              \
1448                         dev_err(pcs->dev, err);                         \
1449                         return ret;                                     \
1450                 }                                                       \
1451         } while (0);
1452
1453 static struct of_device_id pcs_of_match[];
1454
1455 static int pcs_add_gpio_func(struct device_node *node, struct pcs_device *pcs)
1456 {
1457         const char *propname = "pinctrl-single,gpio-range";
1458         const char *cellname = "#pinctrl-single,gpio-range-cells";
1459         struct of_phandle_args gpiospec;
1460         struct pcs_gpiofunc_range *range;
1461         int ret, i;
1462
1463         for (i = 0; ; i++) {
1464                 ret = of_parse_phandle_with_args(node, propname, cellname,
1465                                                  i, &gpiospec);
1466                 /* Do not treat it as error. Only treat it as end condition. */
1467                 if (ret) {
1468                         ret = 0;
1469                         break;
1470                 }
1471                 range = devm_kzalloc(pcs->dev, sizeof(*range), GFP_KERNEL);
1472                 if (!range) {
1473                         ret = -ENOMEM;
1474                         break;
1475                 }
1476                 range->offset = gpiospec.args[0];
1477                 range->npins = gpiospec.args[1];
1478                 range->gpiofunc = gpiospec.args[2];
1479                 mutex_lock(&pcs->mutex);
1480                 list_add_tail(&range->node, &pcs->gpiofuncs);
1481                 mutex_unlock(&pcs->mutex);
1482         }
1483         return ret;
1484 }
1485
1486 #ifdef CONFIG_PM
1487 static int pinctrl_single_suspend(struct platform_device *pdev,
1488                                         pm_message_t state)
1489 {
1490         struct pcs_device *pcs;
1491
1492         pcs = platform_get_drvdata(pdev);
1493         if (!pcs)
1494                 return -EINVAL;
1495
1496         return pinctrl_force_sleep(pcs->pctl);
1497 }
1498
1499 static int pinctrl_single_resume(struct platform_device *pdev)
1500 {
1501         struct pcs_device *pcs;
1502
1503         pcs = platform_get_drvdata(pdev);
1504         if (!pcs)
1505                 return -EINVAL;
1506
1507         return pinctrl_force_default(pcs->pctl);
1508 }
1509 #endif
1510
1511 static int pcs_probe(struct platform_device *pdev)
1512 {
1513         struct device_node *np = pdev->dev.of_node;
1514         const struct of_device_id *match;
1515         struct resource *res;
1516         struct pcs_device *pcs;
1517         int ret;
1518
1519         match = of_match_device(pcs_of_match, &pdev->dev);
1520         if (!match)
1521                 return -EINVAL;
1522
1523         pcs = devm_kzalloc(&pdev->dev, sizeof(*pcs), GFP_KERNEL);
1524         if (!pcs) {
1525                 dev_err(&pdev->dev, "could not allocate\n");
1526                 return -ENOMEM;
1527         }
1528         pcs->dev = &pdev->dev;
1529         mutex_init(&pcs->mutex);
1530         INIT_LIST_HEAD(&pcs->pingroups);
1531         INIT_LIST_HEAD(&pcs->functions);
1532         INIT_LIST_HEAD(&pcs->gpiofuncs);
1533         pcs->is_pinconf = match->data;
1534
1535         PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width,
1536                          "register width not specified\n");
1537
1538         ret = of_property_read_u32(np, "pinctrl-single,function-mask",
1539                                    &pcs->fmask);
1540         if (!ret) {
1541                 pcs->fshift = ffs(pcs->fmask) - 1;
1542                 pcs->fmax = pcs->fmask >> pcs->fshift;
1543         } else {
1544                 /* If mask property doesn't exist, function mux is invalid. */
1545                 pcs->fmask = 0;
1546                 pcs->fshift = 0;
1547                 pcs->fmax = 0;
1548         }
1549
1550         ret = of_property_read_u32(np, "pinctrl-single,function-off",
1551                                         &pcs->foff);
1552         if (ret)
1553                 pcs->foff = PCS_OFF_DISABLED;
1554
1555         pcs->bits_per_mux = of_property_read_bool(np,
1556                                                   "pinctrl-single,bit-per-mux");
1557
1558         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1559         if (!res) {
1560                 dev_err(pcs->dev, "could not get resource\n");
1561                 return -ENODEV;
1562         }
1563
1564         pcs->res = devm_request_mem_region(pcs->dev, res->start,
1565                         resource_size(res), DRIVER_NAME);
1566         if (!pcs->res) {
1567                 dev_err(pcs->dev, "could not get mem_region\n");
1568                 return -EBUSY;
1569         }
1570
1571         pcs->size = resource_size(pcs->res);
1572         pcs->base = devm_ioremap(pcs->dev, pcs->res->start, pcs->size);
1573         if (!pcs->base) {
1574                 dev_err(pcs->dev, "could not ioremap\n");
1575                 return -ENODEV;
1576         }
1577
1578         INIT_RADIX_TREE(&pcs->pgtree, GFP_KERNEL);
1579         INIT_RADIX_TREE(&pcs->ftree, GFP_KERNEL);
1580         platform_set_drvdata(pdev, pcs);
1581
1582         switch (pcs->width) {
1583         case 8:
1584                 pcs->read = pcs_readb;
1585                 pcs->write = pcs_writeb;
1586                 break;
1587         case 16:
1588                 pcs->read = pcs_readw;
1589                 pcs->write = pcs_writew;
1590                 break;
1591         case 32:
1592                 pcs->read = pcs_readl;
1593                 pcs->write = pcs_writel;
1594                 break;
1595         default:
1596                 break;
1597         }
1598
1599         pcs->desc.name = DRIVER_NAME;
1600         pcs->desc.pctlops = &pcs_pinctrl_ops;
1601         pcs->desc.pmxops = &pcs_pinmux_ops;
1602         if (pcs->is_pinconf)
1603                 pcs->desc.confops = &pcs_pinconf_ops;
1604         pcs->desc.owner = THIS_MODULE;
1605
1606         ret = pcs_allocate_pin_table(pcs);
1607         if (ret < 0)
1608                 goto free;
1609
1610         pcs->pctl = pinctrl_register(&pcs->desc, pcs->dev, pcs);
1611         if (!pcs->pctl) {
1612                 dev_err(pcs->dev, "could not register single pinctrl driver\n");
1613                 ret = -EINVAL;
1614                 goto free;
1615         }
1616
1617         ret = pcs_add_gpio_func(np, pcs);
1618         if (ret < 0)
1619                 goto free;
1620
1621         dev_info(pcs->dev, "%i pins at pa %p size %u\n",
1622                  pcs->desc.npins, pcs->base, pcs->size);
1623
1624         return 0;
1625
1626 free:
1627         pcs_free_resources(pcs);
1628
1629         return ret;
1630 }
1631
1632 static int pcs_remove(struct platform_device *pdev)
1633 {
1634         struct pcs_device *pcs = platform_get_drvdata(pdev);
1635
1636         if (!pcs)
1637                 return 0;
1638
1639         pcs_free_resources(pcs);
1640
1641         return 0;
1642 }
1643
1644 static struct of_device_id pcs_of_match[] = {
1645         { .compatible = "pinctrl-single", .data = (void *)false },
1646         { .compatible = "pinconf-single", .data = (void *)true },
1647         { },
1648 };
1649 MODULE_DEVICE_TABLE(of, pcs_of_match);
1650
1651 static struct platform_driver pcs_driver = {
1652         .probe          = pcs_probe,
1653         .remove         = pcs_remove,
1654         .driver = {
1655                 .owner          = THIS_MODULE,
1656                 .name           = DRIVER_NAME,
1657                 .of_match_table = pcs_of_match,
1658         },
1659 #ifdef CONFIG_PM
1660         .suspend = pinctrl_single_suspend,
1661         .resume = pinctrl_single_resume,
1662 #endif
1663 };
1664
1665 module_platform_driver(pcs_driver);
1666
1667 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
1668 MODULE_DESCRIPTION("One-register-per-pin type device tree based pinctrl driver");
1669 MODULE_LICENSE("GPL v2");