drivers/rtc/rtc-omap.c

   1 /*
   2  * TI OMAP1 Real Time Clock interface for Linux
   3  *
   4  * Copyright (C) 2003 MontaVista Software, Inc.
   5  * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
   6  *
   7  * Copyright (C) 2006 David Brownell (new RTC framework)
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/ioport.h>
  19 #include <linux/delay.h>
  20 #include <linux/rtc.h>
  21 #include <linux/bcd.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/of.h>
  24 #include <linux/of_device.h>
  25 #include <linux/pm_runtime.h>
  26 #include <linux/io.h>
  27
  28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  29  * with century-range alarm matching, driven by the 32kHz clock.
  30  *
  31  * The main user-visible ways it differs from PC RTCs are by omitting
  32  * "don't care" alarm fields and sub-second periodic IRQs, and having
  33  * an autoadjust mechanism to calibrate to the true oscillator rate.
  34  *
  35  * Board-specific wiring options include using split power mode with
  36  * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  37  * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  38  * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  39  * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  40  */
  41
  42 #define DRIVER_NAME                     "omap_rtc"
  43
  44 /* RTC registers */
  45 #define OMAP_RTC_SECONDS_REG            0x00
  46 #define OMAP_RTC_MINUTES_REG            0x04
  47 #define OMAP_RTC_HOURS_REG              0x08
  48 #define OMAP_RTC_DAYS_REG               0x0C
  49 #define OMAP_RTC_MONTHS_REG             0x10
  50 #define OMAP_RTC_YEARS_REG              0x14
  51 #define OMAP_RTC_WEEKS_REG              0x18
  52
  53 #define OMAP_RTC_ALARM_SECONDS_REG      0x20
  54 #define OMAP_RTC_ALARM_MINUTES_REG      0x24
  55 #define OMAP_RTC_ALARM_HOURS_REG        0x28
  56 #define OMAP_RTC_ALARM_DAYS_REG         0x2c
  57 #define OMAP_RTC_ALARM_MONTHS_REG       0x30
  58 #define OMAP_RTC_ALARM_YEARS_REG        0x34
  59
  60 #define OMAP_RTC_CTRL_REG               0x40
  61 #define OMAP_RTC_STATUS_REG             0x44
  62 #define OMAP_RTC_INTERRUPTS_REG         0x48
  63
  64 #define OMAP_RTC_COMP_LSB_REG           0x4c
  65 #define OMAP_RTC_COMP_MSB_REG           0x50
  66 #define OMAP_RTC_OSC_REG                0x54
  67
  68 #define OMAP_RTC_KICK0_REG              0x6c
  69 #define OMAP_RTC_KICK1_REG              0x70
  70
  71 #define OMAP_RTC_IRQWAKEEN              0x7c
  72
  73 /* OMAP_RTC_CTRL_REG bit fields: */
  74 #define OMAP_RTC_CTRL_SPLIT             BIT(7)
  75 #define OMAP_RTC_CTRL_DISABLE           BIT(6)
  76 #define OMAP_RTC_CTRL_SET_32_COUNTER    BIT(5)
  77 #define OMAP_RTC_CTRL_TEST              BIT(4)
  78 #define OMAP_RTC_CTRL_MODE_12_24        BIT(3)
  79 #define OMAP_RTC_CTRL_AUTO_COMP         BIT(2)
  80 #define OMAP_RTC_CTRL_ROUND_30S         BIT(1)
  81 #define OMAP_RTC_CTRL_STOP              BIT(0)
  82
  83 /* OMAP_RTC_STATUS_REG bit fields: */
  84 #define OMAP_RTC_STATUS_POWER_UP        BIT(7)
  85 #define OMAP_RTC_STATUS_ALARM           BIT(6)
  86 #define OMAP_RTC_STATUS_1D_EVENT        BIT(5)
  87 #define OMAP_RTC_STATUS_1H_EVENT        BIT(4)
  88 #define OMAP_RTC_STATUS_1M_EVENT        BIT(3)
  89 #define OMAP_RTC_STATUS_1S_EVENT        BIT(2)
  90 #define OMAP_RTC_STATUS_RUN             BIT(1)
  91 #define OMAP_RTC_STATUS_BUSY            BIT(0)
  92
  93 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  94 #define OMAP_RTC_INTERRUPTS_IT_ALARM    BIT(3)
  95 #define OMAP_RTC_INTERRUPTS_IT_TIMER    BIT(2)
  96
  97 /* OMAP_RTC_OSC_REG bit fields: */
  98 #define OMAP_RTC_OSC_32KCLK_EN          BIT(6)
  99
 100 /* OMAP_RTC_IRQWAKEEN bit fields: */
 101 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
 102
 103 /* OMAP_RTC_KICKER values */
 104 #define KICK0_VALUE                     0x83e70b13
 105 #define KICK1_VALUE                     0x95a4f1e0
 106
 107 #define OMAP_RTC_HAS_KICKER             BIT(0)
 108
 109 /*
 110  * Few RTC IP revisions has special WAKE-EN Register to enable Wakeup
 111  * generation for event Alarm.
 112  */
 113 #define OMAP_RTC_HAS_IRQWAKEEN          BIT(1)
 114
 115 /*
 116  * Some RTC IP revisions (like those in AM335x and DRA7x) need
 117  * the 32KHz clock to be explicitly enabled.
 118  */
 119 #define OMAP_RTC_HAS_32KCLK_EN          BIT(2)
 120
 121 static void __iomem     *rtc_base;
 122
 123 #define rtc_read(addr)          readb(rtc_base + (addr))
 124 #define rtc_write(val, addr)    writeb(val, rtc_base + (addr))
 125
 126 #define rtc_writel(val, addr)   writel(val, rtc_base + (addr))
 127
 128
 129 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
 130  * so the only other requirement is that register accesses which
 131  * require BUSY to be clear are made with IRQs locally disabled
 132  */
 133 static void rtc_wait_not_busy(void)
 134 {
 135         int     count = 0;
 136         u8      status;
 137
 138         /* BUSY may stay active for 1/32768 second (~30 usec) */
 139         for (count = 0; count < 50; count++) {
 140                 status = rtc_read(OMAP_RTC_STATUS_REG);
 141                 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
 142                         break;
 143                 udelay(1);
 144         }
 145         /* now we have ~15 usec to read/write various registers */
 146 }
 147
 148 static irqreturn_t rtc_irq(int irq, void *rtc)
 149 {
 150         unsigned long           events = 0;
 151         u8                      irq_data;
 152
 153         irq_data = rtc_read(OMAP_RTC_STATUS_REG);
 154
 155         /* alarm irq? */
 156         if (irq_data & OMAP_RTC_STATUS_ALARM) {
 157                 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
 158                 events |= RTC_IRQF | RTC_AF;
 159         }
 160
 161         /* 1/sec periodic/update irq? */
 162         if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
 163                 events |= RTC_IRQF | RTC_UF;
 164
 165         rtc_update_irq(rtc, 1, events);
 166
 167         return IRQ_HANDLED;
 168 }
 169
 170 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 171 {
 172         u8 reg, irqwake_reg = 0;
 173         struct platform_device *pdev = to_platform_device(dev);
 174         const struct platform_device_id *id_entry =
 175                                         platform_get_device_id(pdev);
 176
 177         local_irq_disable();
 178         rtc_wait_not_busy();
 179         reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
 180         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
 181                 irqwake_reg = rtc_read(OMAP_RTC_IRQWAKEEN);
 182
 183         if (enabled) {
 184                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 185                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 186         } else {
 187                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 188                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 189         }
 190         rtc_wait_not_busy();
 191         rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
 192         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
 193                 rtc_write(irqwake_reg, OMAP_RTC_IRQWAKEEN);
 194         local_irq_enable();
 195
 196         return 0;
 197 }
 198
 199 /* this hardware doesn't support "don't care" alarm fields */
 200 static int tm2bcd(struct rtc_time *tm)
 201 {
 202         if (rtc_valid_tm(tm) != 0)
 203                 return -EINVAL;
 204
 205         tm->tm_sec = bin2bcd(tm->tm_sec);
 206         tm->tm_min = bin2bcd(tm->tm_min);
 207         tm->tm_hour = bin2bcd(tm->tm_hour);
 208         tm->tm_mday = bin2bcd(tm->tm_mday);
 209
 210         tm->tm_mon = bin2bcd(tm->tm_mon + 1);
 211
 212         /* epoch == 1900 */
 213         if (tm->tm_year < 100 || tm->tm_year > 199)
 214                 return -EINVAL;
 215         tm->tm_year = bin2bcd(tm->tm_year - 100);
 216
 217         return 0;
 218 }
 219
 220 static void bcd2tm(struct rtc_time *tm)
 221 {
 222         tm->tm_sec = bcd2bin(tm->tm_sec);
 223         tm->tm_min = bcd2bin(tm->tm_min);
 224         tm->tm_hour = bcd2bin(tm->tm_hour);
 225         tm->tm_mday = bcd2bin(tm->tm_mday);
 226         tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
 227         /* epoch == 1900 */
 228         tm->tm_year = bcd2bin(tm->tm_year) + 100;
 229 }
 230
 231
 232 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
 233 {
 234         /* we don't report wday/yday/isdst ... */
 235         local_irq_disable();
 236         rtc_wait_not_busy();
 237
 238         tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
 239         tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
 240         tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
 241         tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
 242         tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
 243         tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
 244
 245         local_irq_enable();
 246
 247         bcd2tm(tm);
 248         return 0;
 249 }
 250
 251 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
 252 {
 253         if (tm2bcd(tm) < 0)
 254                 return -EINVAL;
 255         local_irq_disable();
 256         rtc_wait_not_busy();
 257
 258         rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
 259         rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
 260         rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
 261         rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
 262         rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
 263         rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
 264
 265         local_irq_enable();
 266
 267         return 0;
 268 }
 269
 270 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
 271 {
 272         local_irq_disable();
 273         rtc_wait_not_busy();
 274
 275         alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
 276         alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
 277         alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
 278         alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
 279         alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
 280         alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
 281
 282         local_irq_enable();
 283
 284         bcd2tm(&alm->time);
 285         alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
 286                         & OMAP_RTC_INTERRUPTS_IT_ALARM);
 287
 288         return 0;
 289 }
 290
 291 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 292 {
 293         u8 reg, irqwake_reg = 0;
 294         struct platform_device *pdev = to_platform_device(dev);
 295         const struct platform_device_id *id_entry =
 296                                         platform_get_device_id(pdev);
 297
 298         if (tm2bcd(&alm->time) < 0)
 299                 return -EINVAL;
 300
 301         local_irq_disable();
 302         rtc_wait_not_busy();
 303
 304         rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
 305         rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
 306         rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
 307         rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
 308         rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
 309         rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
 310
 311         reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
 312         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
 313                 irqwake_reg = rtc_read(OMAP_RTC_IRQWAKEEN);
 314
 315         if (alm->enabled) {
 316                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 317                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 318         } else {
 319                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 320                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
 321         }
 322         rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
 323         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
 324                 rtc_write(irqwake_reg, OMAP_RTC_IRQWAKEEN);
 325
 326         local_irq_enable();
 327
 328         return 0;
 329 }
 330
 331 static struct rtc_class_ops omap_rtc_ops = {
 332         .read_time      = omap_rtc_read_time,
 333         .set_time       = omap_rtc_set_time,
 334         .read_alarm     = omap_rtc_read_alarm,
 335         .set_alarm      = omap_rtc_set_alarm,
 336         .alarm_irq_enable = omap_rtc_alarm_irq_enable,
 337 };
 338
 339 static int omap_rtc_alarm;
 340 static int omap_rtc_timer;
 341
 342 #define OMAP_RTC_DATA_AM3352_IDX        1
 343 #define OMAP_RTC_DATA_DA830_IDX         2
 344
 345 static const struct platform_device_id omap_rtc_devtype[] = {
 346         {
 347                 .name   = DRIVER_NAME,
 348         },
 349         [OMAP_RTC_DATA_AM3352_IDX] = {
 350                 .name   = "am3352-rtc",
 351                 .driver_data = OMAP_RTC_HAS_KICKER | OMAP_RTC_HAS_IRQWAKEEN |
 352                                OMAP_RTC_HAS_32KCLK_EN,
 353         },
 354         [OMAP_RTC_DATA_DA830_IDX] = {
 355                 .name   = "da830-rtc",
 356                 .driver_data = OMAP_RTC_HAS_KICKER,
 357         },
 358         {},
 359 };
 360 MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
 361
 362 static const struct of_device_id omap_rtc_of_match[] = {
 363         {       .compatible     = "ti,da830-rtc",
 364                 .data           = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
 365         },
 366         {       .compatible     = "ti,am3352-rtc",
 367                 .data           = &omap_rtc_devtype[OMAP_RTC_DATA_AM3352_IDX],
 368         },
 369         {},
 370 };
 371 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
 372
 373 static int __init omap_rtc_probe(struct platform_device *pdev)
 374 {
 375         struct resource         *res;
 376         struct rtc_device       *rtc;
 377         u8                      reg, new_ctrl;
 378         const struct platform_device_id *id_entry;
 379         const struct of_device_id *of_id;
 380         int ret;
 381
 382         of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
 383         if (of_id)
 384                 pdev->id_entry = of_id->data;
 385
 386         id_entry = platform_get_device_id(pdev);
 387         if (!id_entry) {
 388                 dev_err(&pdev->dev, "no matching device entry\n");
 389                 return -ENODEV;
 390         }
 391
 392         omap_rtc_timer = platform_get_irq(pdev, 0);
 393         if (omap_rtc_timer <= 0)
 394                 return -ENOENT;
 395
 396         omap_rtc_alarm = platform_get_irq(pdev, 1);
 397         if (omap_rtc_alarm <= 0)
 398                 return -ENOENT;
 399
 400         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 401         rtc_base = devm_ioremap_resource(&pdev->dev, res);
 402         if (IS_ERR(rtc_base))
 403                 return PTR_ERR(rtc_base);
 404
 405         /* Enable the clock/module so that we can access the registers */
 406         pm_runtime_enable(&pdev->dev);
 407         pm_runtime_get_sync(&pdev->dev);
 408
 409         if (id_entry->driver_data & OMAP_RTC_HAS_KICKER) {
 410                 rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
 411                 rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
 412         }
 413
 414         /*
 415          * disable interrupts
 416          *
 417          * NOTE: ALARM2 is not cleared on AM3352 if rtc_write (writeb) is used
 418          */
 419         rtc_writel(0, OMAP_RTC_INTERRUPTS_REG);
 420
 421         /* enable RTC functional clock */
 422         if (id_entry->driver_data & OMAP_RTC_HAS_32KCLK_EN) {
 423                 reg = rtc_read(OMAP_RTC_OSC_REG);
 424                 rtc_writel(reg | OMAP_RTC_OSC_32KCLK_EN, OMAP_RTC_OSC_REG);
 425         }
 426
 427         /* clear old status */
 428         reg = rtc_read(OMAP_RTC_STATUS_REG);
 429         if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
 430                 dev_info(&pdev->dev, "RTC power up reset detected\n");
 431                 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
 432         }
 433         if (reg & (u8) OMAP_RTC_STATUS_ALARM)
 434                 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
 435
 436         /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
 437         reg = rtc_read(OMAP_RTC_CTRL_REG);
 438         if (reg & (u8) OMAP_RTC_CTRL_STOP)
 439                 dev_info(&pdev->dev, "already running\n");
 440
 441         /* force to 24 hour mode */
 442         new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
 443         new_ctrl |= OMAP_RTC_CTRL_STOP;
 444
 445         /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
 446          *
 447          *  - Device wake-up capability setting should come through chip
 448          *    init logic. OMAP1 boards should initialize the "wakeup capable"
 449          *    flag in the platform device if the board is wired right for
 450          *    being woken up by RTC alarm. For OMAP-L138, this capability
 451          *    is built into the SoC by the "Deep Sleep" capability.
 452          *
 453          *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
 454          *    rather than nPWRON_RESET, should forcibly enable split
 455          *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
 456          *    is write-only, and always reads as zero...)
 457          */
 458
 459         if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
 460                 dev_info(&pdev->dev, "split power mode\n");
 461
 462         if (reg != new_ctrl)
 463                 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
 464
 465         device_init_wakeup(&pdev->dev, true);
 466
 467         rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
 468                         &omap_rtc_ops, THIS_MODULE);
 469         if (IS_ERR(rtc)) {
 470                 ret = PTR_ERR(rtc);
 471                 goto err;
 472         }
 473         platform_set_drvdata(pdev, rtc);
 474
 475         /* handle periodic and alarm irqs */
 476         ret = devm_request_irq(&pdev->dev, omap_rtc_timer, rtc_irq, 0,
 477                         dev_name(&rtc->dev), rtc);
 478         if (ret)
 479                 goto err;
 480
 481         if (omap_rtc_timer != omap_rtc_alarm) {
 482                 ret = devm_request_irq(&pdev->dev, omap_rtc_alarm, rtc_irq, 0,
 483                                 dev_name(&rtc->dev), rtc);
 484                 if (ret)
 485                         goto err;
 486         }
 487
 488         return 0;
 489
 490 err:
 491         device_init_wakeup(&pdev->dev, false);
 492         if (id_entry->driver_data & OMAP_RTC_HAS_KICKER)
 493                 rtc_writel(0, OMAP_RTC_KICK0_REG);
 494         pm_runtime_put_sync(&pdev->dev);
 495         pm_runtime_disable(&pdev->dev);
 496
 497         return ret;
 498 }
 499
 500 static int __exit omap_rtc_remove(struct platform_device *pdev)
 501 {
 502         const struct platform_device_id *id_entry =
 503                                 platform_get_device_id(pdev);
 504
 505         device_init_wakeup(&pdev->dev, 0);
 506
 507         /* leave rtc running, but disable irqs */
 508         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
 509
 510         if (id_entry->driver_data & OMAP_RTC_HAS_KICKER)
 511                 rtc_writel(0, OMAP_RTC_KICK0_REG);
 512
 513         /* Disable the clock/module */
 514         pm_runtime_put_sync(&pdev->dev);
 515         pm_runtime_disable(&pdev->dev);
 516
 517         return 0;
 518 }
 519
 520 #ifdef CONFIG_PM_SLEEP
 521 static u8 irqstat;
 522
 523 static int omap_rtc_suspend(struct device *dev)
 524 {
 525         irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
 526
 527         /* FIXME the RTC alarm is not currently acting as a wakeup event
 528          * source on some platforms, and in fact this enable() call is just
 529          * saving a flag that's never used...
 530          */
 531         if (device_may_wakeup(dev))
 532                 enable_irq_wake(omap_rtc_alarm);
 533         else
 534                 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
 535
 536         /* Disable the clock/module */
 537         pm_runtime_put_sync(dev);
 538
 539         return 0;
 540 }
 541
 542 static int omap_rtc_resume(struct device *dev)
 543 {
 544         /* Enable the clock/module so that we can access the registers */
 545         pm_runtime_get_sync(dev);
 546
 547         if (device_may_wakeup(dev))
 548                 disable_irq_wake(omap_rtc_alarm);
 549         else
 550                 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
 551
 552         return 0;
 553 }
 554 #endif
 555
 556 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
 557
 558 static void omap_rtc_shutdown(struct platform_device *pdev)
 559 {
 560         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
 561 }
 562
 563 MODULE_ALIAS("platform:omap_rtc");
 564 static struct platform_driver omap_rtc_driver = {
 565         .remove         = __exit_p(omap_rtc_remove),
 566         .shutdown       = omap_rtc_shutdown,
 567         .driver         = {
 568                 .name   = DRIVER_NAME,
 569                 .owner  = THIS_MODULE,
 570                 .pm     = &omap_rtc_pm_ops,
 571                 .of_match_table = omap_rtc_of_match,
 572         },
 573         .id_table       = omap_rtc_devtype,
 574 };
 575
 576 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
 577
 578 MODULE_AUTHOR("George G. Davis (and others)");
 579 MODULE_LICENSE("GPL");