2 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/errno.h>
27 #include <linux/types.h>
35 /* -----------------------------------------------
36 * Helper functions to peek into tx and rx buffers
37 * ----------------------------------------------- */
38 static const char * const hex_digit = "0123456789ABCDEF";
40 static char quickhex(int i)
45 static void memdump(const void *pv, int num)
56 extern s32 spi_get_cfg(struct imx_spi_dev_t *dev);
58 static inline struct imx_spi_dev_t *to_imx_spi_slave(struct spi_slave *slave)
60 return container_of(slave, struct imx_spi_dev_t, slave);
63 static s32 spi_reset(struct spi_slave *slave)
65 u32 clk_src = mxc_get_clock(MXC_CSPI_CLK);
66 s32 pre_div = 0, post_div = 0, i, reg_ctrl, reg_config;
67 struct imx_spi_dev_t *dev = to_imx_spi_slave(slave);
68 struct spi_reg_t *reg = &(dev->reg);
71 printf("Error: desired clock is 0\n");
75 reg_ctrl = readl(dev->base + SPI_CON_REG);
77 writel(0, dev->base + SPI_CON_REG);
78 writel((reg_ctrl | 0x1), dev->base + SPI_CON_REG);
80 /* Control register setup */
81 if (clk_src > dev->freq) {
82 pre_div = clk_src / dev->freq;
84 post_div = pre_div / 16;
88 for (i = 0; i < 16; i++) {
89 if ((1 << i) >= post_div)
93 printf("Error: no divider can meet the freq: %d\n",
101 debug("pre_div = %d, post_div=%d\n", pre_div, post_div);
102 reg_ctrl = (reg_ctrl & ~(3 << 18)) | dev->ss << 18;
103 reg_ctrl = (reg_ctrl & ~(0xF << 12)) | pre_div << 12;
104 reg_ctrl = (reg_ctrl & ~(0xF << 8)) | post_div << 8;
105 reg_ctrl |= 1 << (dev->ss + 4); /* always set to master mode !!!! */
106 reg_ctrl &= ~0x1; /* disable spi */
108 reg_config = readl(dev->base + SPI_CFG_REG);
109 /* configuration register setup */
110 reg_config = (reg_config & ~(1 << ((dev->ss + 12)))) |
111 (dev->ss_pol << (dev->ss + 12));
112 reg_config = (reg_config & ~(1 << ((dev->ss + 20)))) |
113 (dev->in_sctl << (dev->ss + 20));
114 reg_config = (reg_config & ~(1 << ((dev->ss + 16)))) |
115 (dev->in_dctl << (dev->ss + 16));
116 reg_config = (reg_config & ~(1 << ((dev->ss + 8)))) |
117 (dev->ssctl << (dev->ss + 8));
118 reg_config = (reg_config & ~(1 << ((dev->ss + 4)))) |
119 (dev->sclkpol << (dev->ss + 4));
120 reg_config = (reg_config & ~(1 << ((dev->ss + 0)))) |
121 (dev->sclkpha << (dev->ss + 0));
123 debug("reg_ctrl = 0x%x\n", reg_ctrl);
124 writel(reg_ctrl, dev->base + SPI_CON_REG);
125 debug("reg_config = 0x%x\n", reg_config);
126 writel(reg_config, dev->base + SPI_CFG_REG);
128 /* save config register and control register */
129 reg->cfg_reg = reg_config;
130 reg->ctrl_reg = reg_ctrl;
132 /* clear interrupt reg */
133 writel(0, dev->base + SPI_INT_REG);
134 writel(3 << 6, dev->base + SPI_STAT_REG);
143 struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
144 unsigned int max_hz, unsigned int mode)
146 struct imx_spi_dev_t *imx_spi_slave = NULL;
148 if (!spi_cs_is_valid(bus, cs))
151 imx_spi_slave = (struct imx_spi_dev_t *)malloc(sizeof(struct imx_spi_dev_t));
155 imx_spi_slave->slave.bus = bus;
156 imx_spi_slave->slave.cs = cs;
158 spi_get_cfg(imx_spi_slave);
160 spi_io_init(imx_spi_slave);
162 spi_reset(&(imx_spi_slave->slave));
164 return &(imx_spi_slave->slave);
167 void spi_free_slave(struct spi_slave *slave)
169 struct imx_spi_dev_t *imx_spi_slave;
172 imx_spi_slave = to_imx_spi_slave(slave);
177 int spi_claim_bus(struct spi_slave *slave)
182 void spi_release_bus(struct spi_slave *slave)
190 * See include/spi.h and http://www.altera.com/literature/ds/ds_nios_spi.pdf
191 * for more informations.
193 int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
194 void *din, unsigned long flags)
196 s32 val = SPI_RETRY_TIMES;
201 s32 burst_bytes = bitlen >> 3;
203 struct imx_spi_dev_t *dev = to_imx_spi_slave(slave);
204 struct spi_reg_t *spi_reg = &(dev->reg);
209 if (burst_bytes > (MAX_SPI_BYTES)) {
210 printf("Error: maximum burst size is 0x%x bytes, asking 0x%x\n",
211 MAX_SPI_BYTES, burst_bytes);
215 if (flags & SPI_XFER_BEGIN) {
216 spi_cs_activate(slave);
218 if (spi_reg->ctrl_reg == 0) {
219 printf("Error: spi(base=0x%x) has not been initialized yet\n",
223 spi_reg->ctrl_reg = (spi_reg->ctrl_reg & ~0xFFF00000) | \
224 ((burst_bytes * 8 - 1) << 20);
226 writel(spi_reg->ctrl_reg | 0x1, dev->base + SPI_CON_REG);
227 writel(spi_reg->cfg_reg, dev->base + SPI_CFG_REG);
228 debug("ctrl_reg=0x%x, cfg_reg=0x%x\n",
229 readl(dev->base + SPI_CON_REG),
230 readl(dev->base + SPI_CFG_REG));
232 /* move data to the tx fifo */
234 for (p_buf = (u32 *)dout, len = burst_bytes; len > 0;
236 writel(*p_buf, dev->base + SPI_TX_DATA);
238 for (len = burst_bytes; len > 0; len -= 4)
239 writel(tmp, dev->base + SPI_TX_DATA);
242 reg = readl(dev->base + SPI_CON_REG);
243 reg |= (1 << 2); /* set xch bit */
244 debug("control reg = 0x%08x\n", reg);
245 writel(reg, dev->base + SPI_CON_REG);
247 /* poll on the TC bit (transfer complete) */
248 while ((val-- > 0) &&
249 (readl(dev->base + SPI_STAT_REG) & (1 << 7)) == 0) {
253 /* clear the TC bit */
254 writel(3 << 6, dev->base + SPI_STAT_REG);
256 printf("Error: re-tried %d times without response. Give up\n",
263 /* move data in the rx buf */
264 if (flags & SPI_XFER_END) {
266 for (p_buf = (u32 *)din, len = burst_bytes; len > 0;
268 *p_buf = readl(dev->base + SPI_RX_DATA);
270 for (len = burst_bytes; len > 0; len -= 4)
271 tmp = readl(dev->base + SPI_RX_DATA);
274 spi_cs_deactivate(slave);
280 spi_cs_deactivate(slave);
284 int spi_cs_is_valid(unsigned int bus, unsigned int cs)
289 void spi_cs_activate(struct spi_slave *slave)
291 struct imx_spi_dev_t *dev = to_imx_spi_slave(slave);
296 void spi_cs_deactivate(struct spi_slave *slave)
298 struct imx_spi_dev_t *dev = to_imx_spi_slave(slave);
300 writel(0, dev->base + SPI_CON_REG);