2 * Sonics Silicon Backplane
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
8 * Licensed under the GNU/GPL. See COPYING for details.
11 #include "ssb_private.h"
13 #include <linux/delay.h>
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/ssb/ssb_driver_gige.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/pci.h>
21 #include <pcmcia/cs_types.h>
22 #include <pcmcia/cs.h>
23 #include <pcmcia/cistpl.h>
24 #include <pcmcia/ds.h>
27 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
28 MODULE_LICENSE("GPL");
31 /* Temporary list of yet-to-be-attached buses */
32 static LIST_HEAD(attach_queue);
33 /* List if running buses */
34 static LIST_HEAD(buses);
35 /* Software ID counter */
36 static unsigned int next_busnumber;
37 /* buses_mutes locks the two buslists and the next_busnumber.
38 * Don't lock this directly, but use ssb_buses_[un]lock() below. */
39 static DEFINE_MUTEX(buses_mutex);
41 /* There are differences in the codeflow, if the bus is
42 * initialized from early boot, as various needed services
43 * are not available early. This is a mechanism to delay
44 * these initializations to after early boot has finished.
45 * It's also used to avoid mutex locking, as that's not
46 * available and needed early. */
47 static bool ssb_is_early_boot = 1;
49 static void ssb_buses_lock(void);
50 static void ssb_buses_unlock(void);
53 #ifdef CONFIG_SSB_PCIHOST
54 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
59 list_for_each_entry(bus, &buses, list) {
60 if (bus->bustype == SSB_BUSTYPE_PCI &&
61 bus->host_pci == pdev)
70 #endif /* CONFIG_SSB_PCIHOST */
72 #ifdef CONFIG_SSB_PCMCIAHOST
73 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
78 list_for_each_entry(bus, &buses, list) {
79 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
80 bus->host_pcmcia == pdev)
89 #endif /* CONFIG_SSB_PCMCIAHOST */
91 int ssb_for_each_bus_call(unsigned long data,
92 int (*func)(struct ssb_bus *bus, unsigned long data))
98 list_for_each_entry(bus, &buses, list) {
99 res = func(bus, data);
110 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
113 get_device(dev->dev);
117 static void ssb_device_put(struct ssb_device *dev)
120 put_device(dev->dev);
123 static int ssb_device_resume(struct device *dev)
125 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
126 struct ssb_driver *ssb_drv;
130 ssb_drv = drv_to_ssb_drv(dev->driver);
131 if (ssb_drv && ssb_drv->resume)
132 err = ssb_drv->resume(ssb_dev);
140 static int ssb_device_suspend(struct device *dev, pm_message_t state)
142 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
143 struct ssb_driver *ssb_drv;
147 ssb_drv = drv_to_ssb_drv(dev->driver);
148 if (ssb_drv && ssb_drv->suspend)
149 err = ssb_drv->suspend(ssb_dev, state);
157 int ssb_bus_resume(struct ssb_bus *bus)
161 /* Reset HW state information in memory, so that HW is
162 * completely reinitialized. */
163 bus->mapped_device = NULL;
164 #ifdef CONFIG_SSB_DRIVER_PCICORE
165 bus->pcicore.setup_done = 0;
168 err = ssb_bus_powerup(bus, 0);
171 err = ssb_pcmcia_hardware_setup(bus);
173 ssb_bus_may_powerdown(bus);
176 ssb_chipco_resume(&bus->chipco);
177 ssb_bus_may_powerdown(bus);
181 EXPORT_SYMBOL(ssb_bus_resume);
183 int ssb_bus_suspend(struct ssb_bus *bus)
185 ssb_chipco_suspend(&bus->chipco);
186 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
190 EXPORT_SYMBOL(ssb_bus_suspend);
192 #ifdef CONFIG_SSB_SPROM
193 int ssb_devices_freeze(struct ssb_bus *bus)
195 struct ssb_device *dev;
196 struct ssb_driver *drv;
199 pm_message_t state = PMSG_FREEZE;
201 /* First check that we are capable to freeze all devices. */
202 for (i = 0; i < bus->nr_devices; i++) {
203 dev = &(bus->devices[i]);
206 !device_is_registered(dev->dev))
208 drv = drv_to_ssb_drv(dev->dev->driver);
212 /* Nope, can't suspend this one. */
216 /* Now suspend all devices */
217 for (i = 0; i < bus->nr_devices; i++) {
218 dev = &(bus->devices[i]);
221 !device_is_registered(dev->dev))
223 drv = drv_to_ssb_drv(dev->dev->driver);
226 err = drv->suspend(dev, state);
228 ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
236 for (i--; i >= 0; i--) {
237 dev = &(bus->devices[i]);
240 !device_is_registered(dev->dev))
242 drv = drv_to_ssb_drv(dev->dev->driver);
251 int ssb_devices_thaw(struct ssb_bus *bus)
253 struct ssb_device *dev;
254 struct ssb_driver *drv;
258 for (i = 0; i < bus->nr_devices; i++) {
259 dev = &(bus->devices[i]);
262 !device_is_registered(dev->dev))
264 drv = drv_to_ssb_drv(dev->dev->driver);
267 if (SSB_WARN_ON(!drv->resume))
269 err = drv->resume(dev);
271 ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
278 #endif /* CONFIG_SSB_SPROM */
280 static void ssb_device_shutdown(struct device *dev)
282 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
283 struct ssb_driver *ssb_drv;
287 ssb_drv = drv_to_ssb_drv(dev->driver);
288 if (ssb_drv && ssb_drv->shutdown)
289 ssb_drv->shutdown(ssb_dev);
292 static int ssb_device_remove(struct device *dev)
294 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
295 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
297 if (ssb_drv && ssb_drv->remove)
298 ssb_drv->remove(ssb_dev);
299 ssb_device_put(ssb_dev);
304 static int ssb_device_probe(struct device *dev)
306 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
307 struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
310 ssb_device_get(ssb_dev);
311 if (ssb_drv && ssb_drv->probe)
312 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
314 ssb_device_put(ssb_dev);
319 static int ssb_match_devid(const struct ssb_device_id *tabid,
320 const struct ssb_device_id *devid)
322 if ((tabid->vendor != devid->vendor) &&
323 tabid->vendor != SSB_ANY_VENDOR)
325 if ((tabid->coreid != devid->coreid) &&
326 tabid->coreid != SSB_ANY_ID)
328 if ((tabid->revision != devid->revision) &&
329 tabid->revision != SSB_ANY_REV)
334 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
336 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
337 struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
338 const struct ssb_device_id *id;
340 for (id = ssb_drv->id_table;
341 id->vendor || id->coreid || id->revision;
343 if (ssb_match_devid(id, &ssb_dev->id))
344 return 1; /* found */
350 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
352 struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
357 return add_uevent_var(env,
358 "MODALIAS=ssb:v%04Xid%04Xrev%02X",
359 ssb_dev->id.vendor, ssb_dev->id.coreid,
360 ssb_dev->id.revision);
363 static struct bus_type ssb_bustype = {
365 .match = ssb_bus_match,
366 .probe = ssb_device_probe,
367 .remove = ssb_device_remove,
368 .shutdown = ssb_device_shutdown,
369 .suspend = ssb_device_suspend,
370 .resume = ssb_device_resume,
371 .uevent = ssb_device_uevent,
374 static void ssb_buses_lock(void)
376 /* See the comment at the ssb_is_early_boot definition */
377 if (!ssb_is_early_boot)
378 mutex_lock(&buses_mutex);
381 static void ssb_buses_unlock(void)
383 /* See the comment at the ssb_is_early_boot definition */
384 if (!ssb_is_early_boot)
385 mutex_unlock(&buses_mutex);
388 static void ssb_devices_unregister(struct ssb_bus *bus)
390 struct ssb_device *sdev;
393 for (i = bus->nr_devices - 1; i >= 0; i--) {
394 sdev = &(bus->devices[i]);
396 device_unregister(sdev->dev);
400 void ssb_bus_unregister(struct ssb_bus *bus)
403 ssb_devices_unregister(bus);
404 list_del(&bus->list);
407 ssb_pcmcia_exit(bus);
411 EXPORT_SYMBOL(ssb_bus_unregister);
413 static void ssb_release_dev(struct device *dev)
415 struct __ssb_dev_wrapper *devwrap;
417 devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
421 static int ssb_devices_register(struct ssb_bus *bus)
423 struct ssb_device *sdev;
425 struct __ssb_dev_wrapper *devwrap;
429 for (i = 0; i < bus->nr_devices; i++) {
430 sdev = &(bus->devices[i]);
432 /* We don't register SSB-system devices to the kernel,
433 * as the drivers for them are built into SSB. */
434 switch (sdev->id.coreid) {
435 case SSB_DEV_CHIPCOMMON:
440 case SSB_DEV_MIPS_3302:
445 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
447 ssb_printk(KERN_ERR PFX
448 "Could not allocate device\n");
453 devwrap->sdev = sdev;
455 dev->release = ssb_release_dev;
456 dev->bus = &ssb_bustype;
457 snprintf(dev->bus_id, sizeof(dev->bus_id),
458 "ssb%u:%d", bus->busnumber, dev_idx);
460 switch (bus->bustype) {
461 case SSB_BUSTYPE_PCI:
462 #ifdef CONFIG_SSB_PCIHOST
463 sdev->irq = bus->host_pci->irq;
464 dev->parent = &bus->host_pci->dev;
467 case SSB_BUSTYPE_PCMCIA:
468 #ifdef CONFIG_SSB_PCMCIAHOST
469 sdev->irq = bus->host_pcmcia->irq.AssignedIRQ;
470 dev->parent = &bus->host_pcmcia->dev;
473 case SSB_BUSTYPE_SSB:
478 err = device_register(dev);
480 ssb_printk(KERN_ERR PFX
481 "Could not register %s\n",
483 /* Set dev to NULL to not unregister
484 * dev on error unwinding. */
494 /* Unwind the already registered devices. */
495 ssb_devices_unregister(bus);
499 /* Needs ssb_buses_lock() */
500 static int ssb_attach_queued_buses(void)
502 struct ssb_bus *bus, *n;
504 int drop_them_all = 0;
506 list_for_each_entry_safe(bus, n, &attach_queue, list) {
508 list_del(&bus->list);
511 /* Can't init the PCIcore in ssb_bus_register(), as that
512 * is too early in boot for embedded systems
513 * (no udelay() available). So do it here in attach stage.
515 err = ssb_bus_powerup(bus, 0);
518 ssb_pcicore_init(&bus->pcicore);
519 ssb_bus_may_powerdown(bus);
521 err = ssb_devices_register(bus);
525 list_del(&bus->list);
528 list_move_tail(&bus->list, &buses);
534 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
536 struct ssb_bus *bus = dev->bus;
538 offset += dev->core_index * SSB_CORE_SIZE;
539 return readb(bus->mmio + offset);
542 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
544 struct ssb_bus *bus = dev->bus;
546 offset += dev->core_index * SSB_CORE_SIZE;
547 return readw(bus->mmio + offset);
550 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
552 struct ssb_bus *bus = dev->bus;
554 offset += dev->core_index * SSB_CORE_SIZE;
555 return readl(bus->mmio + offset);
558 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
560 struct ssb_bus *bus = dev->bus;
562 offset += dev->core_index * SSB_CORE_SIZE;
563 writeb(value, bus->mmio + offset);
566 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
568 struct ssb_bus *bus = dev->bus;
570 offset += dev->core_index * SSB_CORE_SIZE;
571 writew(value, bus->mmio + offset);
574 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
576 struct ssb_bus *bus = dev->bus;
578 offset += dev->core_index * SSB_CORE_SIZE;
579 writel(value, bus->mmio + offset);
582 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
583 static const struct ssb_bus_ops ssb_ssb_ops = {
584 .read8 = ssb_ssb_read8,
585 .read16 = ssb_ssb_read16,
586 .read32 = ssb_ssb_read32,
587 .write8 = ssb_ssb_write8,
588 .write16 = ssb_ssb_write16,
589 .write32 = ssb_ssb_write32,
592 static int ssb_fetch_invariants(struct ssb_bus *bus,
593 ssb_invariants_func_t get_invariants)
595 struct ssb_init_invariants iv;
598 memset(&iv, 0, sizeof(iv));
599 err = get_invariants(bus, &iv);
602 memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
603 memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
604 bus->has_cardbus_slot = iv.has_cardbus_slot;
609 static int ssb_bus_register(struct ssb_bus *bus,
610 ssb_invariants_func_t get_invariants,
611 unsigned long baseaddr)
615 spin_lock_init(&bus->bar_lock);
616 INIT_LIST_HEAD(&bus->list);
617 #ifdef CONFIG_SSB_EMBEDDED
618 spin_lock_init(&bus->gpio_lock);
621 /* Powerup the bus */
622 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
626 bus->busnumber = next_busnumber;
627 /* Scan for devices (cores) */
628 err = ssb_bus_scan(bus, baseaddr);
630 goto err_disable_xtal;
632 /* Init PCI-host device (if any) */
633 err = ssb_pci_init(bus);
636 /* Init PCMCIA-host device (if any) */
637 err = ssb_pcmcia_init(bus);
641 /* Initialize basic system devices (if available) */
642 err = ssb_bus_powerup(bus, 0);
644 goto err_pcmcia_exit;
645 ssb_chipcommon_init(&bus->chipco);
646 ssb_mipscore_init(&bus->mipscore);
647 err = ssb_fetch_invariants(bus, get_invariants);
649 ssb_bus_may_powerdown(bus);
650 goto err_pcmcia_exit;
652 ssb_bus_may_powerdown(bus);
654 /* Queue it for attach.
655 * See the comment at the ssb_is_early_boot definition. */
656 list_add_tail(&bus->list, &attach_queue);
657 if (!ssb_is_early_boot) {
658 /* This is not early boot, so we must attach the bus now */
659 err = ssb_attach_queued_buses();
670 list_del(&bus->list);
672 ssb_pcmcia_exit(bus);
679 ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
683 #ifdef CONFIG_SSB_PCIHOST
684 int ssb_bus_pcibus_register(struct ssb_bus *bus,
685 struct pci_dev *host_pci)
689 bus->bustype = SSB_BUSTYPE_PCI;
690 bus->host_pci = host_pci;
691 bus->ops = &ssb_pci_ops;
693 err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
695 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
696 "PCI device %s\n", host_pci->dev.bus_id);
701 EXPORT_SYMBOL(ssb_bus_pcibus_register);
702 #endif /* CONFIG_SSB_PCIHOST */
704 #ifdef CONFIG_SSB_PCMCIAHOST
705 int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
706 struct pcmcia_device *pcmcia_dev,
707 unsigned long baseaddr)
711 bus->bustype = SSB_BUSTYPE_PCMCIA;
712 bus->host_pcmcia = pcmcia_dev;
713 bus->ops = &ssb_pcmcia_ops;
715 err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
717 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
718 "PCMCIA device %s\n", pcmcia_dev->devname);
723 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
724 #endif /* CONFIG_SSB_PCMCIAHOST */
726 int ssb_bus_ssbbus_register(struct ssb_bus *bus,
727 unsigned long baseaddr,
728 ssb_invariants_func_t get_invariants)
732 bus->bustype = SSB_BUSTYPE_SSB;
733 bus->ops = &ssb_ssb_ops;
735 err = ssb_bus_register(bus, get_invariants, baseaddr);
737 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
738 "address 0x%08lX\n", baseaddr);
744 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
746 drv->drv.name = drv->name;
747 drv->drv.bus = &ssb_bustype;
748 drv->drv.owner = owner;
750 return driver_register(&drv->drv);
752 EXPORT_SYMBOL(__ssb_driver_register);
754 void ssb_driver_unregister(struct ssb_driver *drv)
756 driver_unregister(&drv->drv);
758 EXPORT_SYMBOL(ssb_driver_unregister);
760 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
762 struct ssb_bus *bus = dev->bus;
763 struct ssb_device *ent;
766 for (i = 0; i < bus->nr_devices; i++) {
767 ent = &(bus->devices[i]);
768 if (ent->id.vendor != dev->id.vendor)
770 if (ent->id.coreid != dev->id.coreid)
773 ent->devtypedata = data;
776 EXPORT_SYMBOL(ssb_set_devtypedata);
778 static u32 clkfactor_f6_resolve(u32 v)
780 /* map the magic values */
782 case SSB_CHIPCO_CLK_F6_2:
784 case SSB_CHIPCO_CLK_F6_3:
786 case SSB_CHIPCO_CLK_F6_4:
788 case SSB_CHIPCO_CLK_F6_5:
790 case SSB_CHIPCO_CLK_F6_6:
792 case SSB_CHIPCO_CLK_F6_7:
798 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
799 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
801 u32 n1, n2, clock, m1, m2, m3, mc;
803 n1 = (n & SSB_CHIPCO_CLK_N1);
804 n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
807 case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
808 if (m & SSB_CHIPCO_CLK_T6_MMASK)
809 return SSB_CHIPCO_CLK_T6_M0;
810 return SSB_CHIPCO_CLK_T6_M1;
811 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
812 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
813 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
814 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
815 n1 = clkfactor_f6_resolve(n1);
816 n2 += SSB_CHIPCO_CLK_F5_BIAS;
818 case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
819 n1 += SSB_CHIPCO_CLK_T2_BIAS;
820 n2 += SSB_CHIPCO_CLK_T2_BIAS;
821 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
822 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
824 case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
831 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
832 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
833 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
836 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
841 m1 = (m & SSB_CHIPCO_CLK_M1);
842 m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
843 m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
844 mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
847 case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
848 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
849 case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
850 case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
851 m1 = clkfactor_f6_resolve(m1);
852 if ((plltype == SSB_PLLTYPE_1) ||
853 (plltype == SSB_PLLTYPE_3))
854 m2 += SSB_CHIPCO_CLK_F5_BIAS;
856 m2 = clkfactor_f6_resolve(m2);
857 m3 = clkfactor_f6_resolve(m3);
860 case SSB_CHIPCO_CLK_MC_BYPASS:
862 case SSB_CHIPCO_CLK_MC_M1:
864 case SSB_CHIPCO_CLK_MC_M1M2:
865 return (clock / (m1 * m2));
866 case SSB_CHIPCO_CLK_MC_M1M2M3:
867 return (clock / (m1 * m2 * m3));
868 case SSB_CHIPCO_CLK_MC_M1M3:
869 return (clock / (m1 * m3));
873 m1 += SSB_CHIPCO_CLK_T2_BIAS;
874 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
875 m3 += SSB_CHIPCO_CLK_T2_BIAS;
876 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
877 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
878 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
880 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
882 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
884 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
893 /* Get the current speed the backplane is running at */
894 u32 ssb_clockspeed(struct ssb_bus *bus)
898 u32 clkctl_n, clkctl_m;
900 if (ssb_extif_available(&bus->extif))
901 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
902 &clkctl_n, &clkctl_m);
903 else if (bus->chipco.dev)
904 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
905 &clkctl_n, &clkctl_m);
909 if (bus->chip_id == 0x5365) {
912 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
913 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
919 EXPORT_SYMBOL(ssb_clockspeed);
921 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
923 u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
925 /* The REJECT bit changed position in TMSLOW between
926 * Backplane revisions. */
928 case SSB_IDLOW_SSBREV_22:
929 return SSB_TMSLOW_REJECT_22;
930 case SSB_IDLOW_SSBREV_23:
931 return SSB_TMSLOW_REJECT_23;
932 case SSB_IDLOW_SSBREV_24: /* TODO - find the proper REJECT bits */
933 case SSB_IDLOW_SSBREV_25: /* same here */
934 case SSB_IDLOW_SSBREV_26: /* same here */
935 case SSB_IDLOW_SSBREV_27: /* same here */
936 return SSB_TMSLOW_REJECT_23; /* this is a guess */
938 printk(KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
941 return (SSB_TMSLOW_REJECT_22 | SSB_TMSLOW_REJECT_23);
944 int ssb_device_is_enabled(struct ssb_device *dev)
949 reject = ssb_tmslow_reject_bitmask(dev);
950 val = ssb_read32(dev, SSB_TMSLOW);
951 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
953 return (val == SSB_TMSLOW_CLOCK);
955 EXPORT_SYMBOL(ssb_device_is_enabled);
957 static void ssb_flush_tmslow(struct ssb_device *dev)
959 /* Make _really_ sure the device has finished the TMSLOW
960 * register write transaction, as we risk running into
961 * a machine check exception otherwise.
962 * Do this by reading the register back to commit the
963 * PCI write and delay an additional usec for the device
964 * to react to the change. */
965 ssb_read32(dev, SSB_TMSLOW);
969 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
973 ssb_device_disable(dev, core_specific_flags);
974 ssb_write32(dev, SSB_TMSLOW,
975 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
976 SSB_TMSLOW_FGC | core_specific_flags);
977 ssb_flush_tmslow(dev);
979 /* Clear SERR if set. This is a hw bug workaround. */
980 if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
981 ssb_write32(dev, SSB_TMSHIGH, 0);
983 val = ssb_read32(dev, SSB_IMSTATE);
984 if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
985 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
986 ssb_write32(dev, SSB_IMSTATE, val);
989 ssb_write32(dev, SSB_TMSLOW,
990 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
991 core_specific_flags);
992 ssb_flush_tmslow(dev);
994 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
995 core_specific_flags);
996 ssb_flush_tmslow(dev);
998 EXPORT_SYMBOL(ssb_device_enable);
1000 /* Wait for a bit in a register to get set or unset.
1001 * timeout is in units of ten-microseconds */
1002 static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
1003 int timeout, int set)
1008 for (i = 0; i < timeout; i++) {
1009 val = ssb_read32(dev, reg);
1014 if (!(val & bitmask))
1019 printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1020 "register %04X to %s.\n",
1021 bitmask, reg, (set ? "set" : "clear"));
1026 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1030 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1033 reject = ssb_tmslow_reject_bitmask(dev);
1034 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1035 ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
1036 ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1037 ssb_write32(dev, SSB_TMSLOW,
1038 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1039 reject | SSB_TMSLOW_RESET |
1040 core_specific_flags);
1041 ssb_flush_tmslow(dev);
1043 ssb_write32(dev, SSB_TMSLOW,
1044 reject | SSB_TMSLOW_RESET |
1045 core_specific_flags);
1046 ssb_flush_tmslow(dev);
1048 EXPORT_SYMBOL(ssb_device_disable);
1050 u32 ssb_dma_translation(struct ssb_device *dev)
1052 switch (dev->bus->bustype) {
1053 case SSB_BUSTYPE_SSB:
1054 case SSB_BUSTYPE_PCMCIA:
1056 case SSB_BUSTYPE_PCI:
1061 EXPORT_SYMBOL(ssb_dma_translation);
1063 int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask)
1065 struct device *dev = ssb_dev->dev;
1067 #ifdef CONFIG_SSB_PCIHOST
1068 if (ssb_dev->bus->bustype == SSB_BUSTYPE_PCI &&
1069 !dma_supported(dev, mask))
1072 dev->coherent_dma_mask = mask;
1073 dev->dma_mask = &dev->coherent_dma_mask;
1077 EXPORT_SYMBOL(ssb_dma_set_mask);
1079 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1081 struct ssb_chipcommon *cc;
1084 /* On buses where more than one core may be working
1085 * at a time, we must not powerdown stuff if there are
1086 * still cores that may want to run. */
1087 if (bus->bustype == SSB_BUSTYPE_SSB)
1091 ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1092 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1096 #ifdef CONFIG_SSB_DEBUG
1097 bus->powered_up = 0;
1101 ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1104 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1106 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1108 struct ssb_chipcommon *cc;
1110 enum ssb_clkmode mode;
1112 err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1116 mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1117 ssb_chipco_set_clockmode(cc, mode);
1119 #ifdef CONFIG_SSB_DEBUG
1120 bus->powered_up = 1;
1124 ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1127 EXPORT_SYMBOL(ssb_bus_powerup);
1129 u32 ssb_admatch_base(u32 adm)
1133 switch (adm & SSB_ADM_TYPE) {
1135 base = (adm & SSB_ADM_BASE0);
1138 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1139 base = (adm & SSB_ADM_BASE1);
1142 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1143 base = (adm & SSB_ADM_BASE2);
1151 EXPORT_SYMBOL(ssb_admatch_base);
1153 u32 ssb_admatch_size(u32 adm)
1157 switch (adm & SSB_ADM_TYPE) {
1159 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1162 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1163 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1166 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1167 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1172 size = (1 << (size + 1));
1176 EXPORT_SYMBOL(ssb_admatch_size);
1178 static int __init ssb_modinit(void)
1182 /* See the comment at the ssb_is_early_boot definition */
1183 ssb_is_early_boot = 0;
1184 err = bus_register(&ssb_bustype);
1188 /* Maybe we already registered some buses at early boot.
1189 * Check for this and attach them
1192 err = ssb_attach_queued_buses();
1195 bus_unregister(&ssb_bustype);
1197 err = b43_pci_ssb_bridge_init();
1199 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1200 "initialization failed\n");
1201 /* don't fail SSB init because of this */
1204 err = ssb_gige_init();
1206 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1207 "driver initialization failed\n");
1208 /* don't fail SSB init because of this */
1214 /* ssb must be initialized after PCI but before the ssb drivers.
1215 * That means we must use some initcall between subsys_initcall
1216 * and device_initcall. */
1217 fs_initcall(ssb_modinit);
1219 static void __exit ssb_modexit(void)
1222 b43_pci_ssb_bridge_exit();
1223 bus_unregister(&ssb_bustype);
1225 module_exit(ssb_modexit)