drivers/ssb/main.c

   1 /*
   2  * Sonics Silicon Backplane
   3  * Subsystem core
   4  *
   5  * Copyright 2005, Broadcom Corporation
   6  * Copyright 2006, 2007, Michael Buesch <m@bues.ch>
   7  *
   8  * Licensed under the GNU/GPL. See COPYING for details.
   9  */
  10
  11 #include "ssb_private.h"
  12
  13 #include <linux/delay.h>
  14 #include <linux/io.h>
  15 #include <linux/module.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/ssb/ssb.h>
  18 #include <linux/ssb/ssb_regs.h>
  19 #include <linux/ssb/ssb_driver_gige.h>
  20 #include <linux/dma-mapping.h>
  21 #include <linux/pci.h>
  22 #include <linux/mmc/sdio_func.h>
  23 #include <linux/slab.h>
  24
  25 #include <pcmcia/cistpl.h>
  26 #include <pcmcia/ds.h>
  27
  28
  29 MODULE_DESCRIPTION("Sonics Silicon Backplane driver");
  30 MODULE_LICENSE("GPL");
  31
  32
  33 /* Temporary list of yet-to-be-attached buses */
  34 static LIST_HEAD(attach_queue);
  35 /* List if running buses */
  36 static LIST_HEAD(buses);
  37 /* Software ID counter */
  38 static unsigned int next_busnumber;
  39 /* buses_mutes locks the two buslists and the next_busnumber.
  40  * Don't lock this directly, but use ssb_buses_[un]lock() below. */
  41 static DEFINE_MUTEX(buses_mutex);
  42
  43 /* There are differences in the codeflow, if the bus is
  44  * initialized from early boot, as various needed services
  45  * are not available early. This is a mechanism to delay
  46  * these initializations to after early boot has finished.
  47  * It's also used to avoid mutex locking, as that's not
  48  * available and needed early. */
  49 static bool ssb_is_early_boot = 1;
  50
  51 static void ssb_buses_lock(void);
  52 static void ssb_buses_unlock(void);
  53
  54
  55 #ifdef CONFIG_SSB_PCIHOST
  56 struct ssb_bus *ssb_pci_dev_to_bus(struct pci_dev *pdev)
  57 {
  58         struct ssb_bus *bus;
  59
  60         ssb_buses_lock();
  61         list_for_each_entry(bus, &buses, list) {
  62                 if (bus->bustype == SSB_BUSTYPE_PCI &&
  63                     bus->host_pci == pdev)
  64                         goto found;
  65         }
  66         bus = NULL;
  67 found:
  68         ssb_buses_unlock();
  69
  70         return bus;
  71 }
  72 #endif /* CONFIG_SSB_PCIHOST */
  73
  74 #ifdef CONFIG_SSB_PCMCIAHOST
  75 struct ssb_bus *ssb_pcmcia_dev_to_bus(struct pcmcia_device *pdev)
  76 {
  77         struct ssb_bus *bus;
  78
  79         ssb_buses_lock();
  80         list_for_each_entry(bus, &buses, list) {
  81                 if (bus->bustype == SSB_BUSTYPE_PCMCIA &&
  82                     bus->host_pcmcia == pdev)
  83                         goto found;
  84         }
  85         bus = NULL;
  86 found:
  87         ssb_buses_unlock();
  88
  89         return bus;
  90 }
  91 #endif /* CONFIG_SSB_PCMCIAHOST */
  92
  93 #ifdef CONFIG_SSB_SDIOHOST
  94 struct ssb_bus *ssb_sdio_func_to_bus(struct sdio_func *func)
  95 {
  96         struct ssb_bus *bus;
  97
  98         ssb_buses_lock();
  99         list_for_each_entry(bus, &buses, list) {
 100                 if (bus->bustype == SSB_BUSTYPE_SDIO &&
 101                     bus->host_sdio == func)
 102                         goto found;
 103         }
 104         bus = NULL;
 105 found:
 106         ssb_buses_unlock();
 107
 108         return bus;
 109 }
 110 #endif /* CONFIG_SSB_SDIOHOST */
 111
 112 int ssb_for_each_bus_call(unsigned long data,
 113                           int (*func)(struct ssb_bus *bus, unsigned long data))
 114 {
 115         struct ssb_bus *bus;
 116         int res;
 117
 118         ssb_buses_lock();
 119         list_for_each_entry(bus, &buses, list) {
 120                 res = func(bus, data);
 121                 if (res >= 0) {
 122                         ssb_buses_unlock();
 123                         return res;
 124                 }
 125         }
 126         ssb_buses_unlock();
 127
 128         return -ENODEV;
 129 }
 130
 131 static struct ssb_device *ssb_device_get(struct ssb_device *dev)
 132 {
 133         if (dev)
 134                 get_device(dev->dev);
 135         return dev;
 136 }
 137
 138 static void ssb_device_put(struct ssb_device *dev)
 139 {
 140         if (dev)
 141                 put_device(dev->dev);
 142 }
 143
 144 static int ssb_device_resume(struct device *dev)
 145 {
 146         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 147         struct ssb_driver *ssb_drv;
 148         int err = 0;
 149
 150         if (dev->driver) {
 151                 ssb_drv = drv_to_ssb_drv(dev->driver);
 152                 if (ssb_drv && ssb_drv->resume)
 153                         err = ssb_drv->resume(ssb_dev);
 154                 if (err)
 155                         goto out;
 156         }
 157 out:
 158         return err;
 159 }
 160
 161 static int ssb_device_suspend(struct device *dev, pm_message_t state)
 162 {
 163         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 164         struct ssb_driver *ssb_drv;
 165         int err = 0;
 166
 167         if (dev->driver) {
 168                 ssb_drv = drv_to_ssb_drv(dev->driver);
 169                 if (ssb_drv && ssb_drv->suspend)
 170                         err = ssb_drv->suspend(ssb_dev, state);
 171                 if (err)
 172                         goto out;
 173         }
 174 out:
 175         return err;
 176 }
 177
 178 int ssb_bus_resume(struct ssb_bus *bus)
 179 {
 180         int err;
 181
 182         /* Reset HW state information in memory, so that HW is
 183          * completely reinitialized. */
 184         bus->mapped_device = NULL;
 185 #ifdef CONFIG_SSB_DRIVER_PCICORE
 186         bus->pcicore.setup_done = 0;
 187 #endif
 188
 189         err = ssb_bus_powerup(bus, 0);
 190         if (err)
 191                 return err;
 192         err = ssb_pcmcia_hardware_setup(bus);
 193         if (err) {
 194                 ssb_bus_may_powerdown(bus);
 195                 return err;
 196         }
 197         ssb_chipco_resume(&bus->chipco);
 198         ssb_bus_may_powerdown(bus);
 199
 200         return 0;
 201 }
 202 EXPORT_SYMBOL(ssb_bus_resume);
 203
 204 int ssb_bus_suspend(struct ssb_bus *bus)
 205 {
 206         ssb_chipco_suspend(&bus->chipco);
 207         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 208
 209         return 0;
 210 }
 211 EXPORT_SYMBOL(ssb_bus_suspend);
 212
 213 #ifdef CONFIG_SSB_SPROM
 214 /** ssb_devices_freeze - Freeze all devices on the bus.
 215  *
 216  * After freezing no device driver will be handling a device
 217  * on this bus anymore. ssb_devices_thaw() must be called after
 218  * a successful freeze to reactivate the devices.
 219  *
 220  * @bus: The bus.
 221  * @ctx: Context structure. Pass this to ssb_devices_thaw().
 222  */
 223 int ssb_devices_freeze(struct ssb_bus *bus, struct ssb_freeze_context *ctx)
 224 {
 225         struct ssb_device *sdev;
 226         struct ssb_driver *sdrv;
 227         unsigned int i;
 228
 229         memset(ctx, 0, sizeof(*ctx));
 230         ctx->bus = bus;
 231         SSB_WARN_ON(bus->nr_devices > ARRAY_SIZE(ctx->device_frozen));
 232
 233         for (i = 0; i < bus->nr_devices; i++) {
 234                 sdev = ssb_device_get(&bus->devices[i]);
 235
 236                 if (!sdev->dev || !sdev->dev->driver ||
 237                     !device_is_registered(sdev->dev)) {
 238                         ssb_device_put(sdev);
 239                         continue;
 240                 }
 241                 sdrv = drv_to_ssb_drv(sdev->dev->driver);
 242                 if (SSB_WARN_ON(!sdrv->remove))
 243                         continue;
 244                 sdrv->remove(sdev);
 245                 ctx->device_frozen[i] = 1;
 246         }
 247
 248         return 0;
 249 }
 250
 251 /** ssb_devices_thaw - Unfreeze all devices on the bus.
 252  *
 253  * This will re-attach the device drivers and re-init the devices.
 254  *
 255  * @ctx: The context structure from ssb_devices_freeze()
 256  */
 257 int ssb_devices_thaw(struct ssb_freeze_context *ctx)
 258 {
 259         struct ssb_bus *bus = ctx->bus;
 260         struct ssb_device *sdev;
 261         struct ssb_driver *sdrv;
 262         unsigned int i;
 263         int err, result = 0;
 264
 265         for (i = 0; i < bus->nr_devices; i++) {
 266                 if (!ctx->device_frozen[i])
 267                         continue;
 268                 sdev = &bus->devices[i];
 269
 270                 if (SSB_WARN_ON(!sdev->dev || !sdev->dev->driver))
 271                         continue;
 272                 sdrv = drv_to_ssb_drv(sdev->dev->driver);
 273                 if (SSB_WARN_ON(!sdrv || !sdrv->probe))
 274                         continue;
 275
 276                 err = sdrv->probe(sdev, &sdev->id);
 277                 if (err) {
 278                         ssb_printk(KERN_ERR PFX "Failed to thaw device %s\n",
 279                                    dev_name(sdev->dev));
 280                         result = err;
 281                 }
 282                 ssb_device_put(sdev);
 283         }
 284
 285         return result;
 286 }
 287 #endif /* CONFIG_SSB_SPROM */
 288
 289 static void ssb_device_shutdown(struct device *dev)
 290 {
 291         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 292         struct ssb_driver *ssb_drv;
 293
 294         if (!dev->driver)
 295                 return;
 296         ssb_drv = drv_to_ssb_drv(dev->driver);
 297         if (ssb_drv && ssb_drv->shutdown)
 298                 ssb_drv->shutdown(ssb_dev);
 299 }
 300
 301 static int ssb_device_remove(struct device *dev)
 302 {
 303         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 304         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 305
 306         if (ssb_drv && ssb_drv->remove)
 307                 ssb_drv->remove(ssb_dev);
 308         ssb_device_put(ssb_dev);
 309
 310         return 0;
 311 }
 312
 313 static int ssb_device_probe(struct device *dev)
 314 {
 315         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 316         struct ssb_driver *ssb_drv = drv_to_ssb_drv(dev->driver);
 317         int err = 0;
 318
 319         ssb_device_get(ssb_dev);
 320         if (ssb_drv && ssb_drv->probe)
 321                 err = ssb_drv->probe(ssb_dev, &ssb_dev->id);
 322         if (err)
 323                 ssb_device_put(ssb_dev);
 324
 325         return err;
 326 }
 327
 328 static int ssb_match_devid(const struct ssb_device_id *tabid,
 329                            const struct ssb_device_id *devid)
 330 {
 331         if ((tabid->vendor != devid->vendor) &&
 332             tabid->vendor != SSB_ANY_VENDOR)
 333                 return 0;
 334         if ((tabid->coreid != devid->coreid) &&
 335             tabid->coreid != SSB_ANY_ID)
 336                 return 0;
 337         if ((tabid->revision != devid->revision) &&
 338             tabid->revision != SSB_ANY_REV)
 339                 return 0;
 340         return 1;
 341 }
 342
 343 static int ssb_bus_match(struct device *dev, struct device_driver *drv)
 344 {
 345         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 346         struct ssb_driver *ssb_drv = drv_to_ssb_drv(drv);
 347         const struct ssb_device_id *id;
 348
 349         for (id = ssb_drv->id_table;
 350              id->vendor || id->coreid || id->revision;
 351              id++) {
 352                 if (ssb_match_devid(id, &ssb_dev->id))
 353                         return 1; /* found */
 354         }
 355
 356         return 0;
 357 }
 358
 359 static int ssb_device_uevent(struct device *dev, struct kobj_uevent_env *env)
 360 {
 361         struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
 362
 363         if (!dev)
 364                 return -ENODEV;
 365
 366         return add_uevent_var(env,
 367                              "MODALIAS=ssb:v%04Xid%04Xrev%02X",
 368                              ssb_dev->id.vendor, ssb_dev->id.coreid,
 369                              ssb_dev->id.revision);
 370 }
 371
 372 #define ssb_config_attr(attrib, field, format_string) \
 373 static ssize_t \
 374 attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
 375 { \
 376         return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
 377 }
 378
 379 ssb_config_attr(core_num, core_index, "%u\n")
 380 ssb_config_attr(coreid, id.coreid, "0x%04x\n")
 381 ssb_config_attr(vendor, id.vendor, "0x%04x\n")
 382 ssb_config_attr(revision, id.revision, "%u\n")
 383 ssb_config_attr(irq, irq, "%u\n")
 384 static ssize_t
 385 name_show(struct device *dev, struct device_attribute *attr, char *buf)
 386 {
 387         return sprintf(buf, "%s\n",
 388                        ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
 389 }
 390
 391 static struct device_attribute ssb_device_attrs[] = {
 392         __ATTR_RO(name),
 393         __ATTR_RO(core_num),
 394         __ATTR_RO(coreid),
 395         __ATTR_RO(vendor),
 396         __ATTR_RO(revision),
 397         __ATTR_RO(irq),
 398         __ATTR_NULL,
 399 };
 400
 401 static struct bus_type ssb_bustype = {
 402         .name           = "ssb",
 403         .match          = ssb_bus_match,
 404         .probe          = ssb_device_probe,
 405         .remove         = ssb_device_remove,
 406         .shutdown       = ssb_device_shutdown,
 407         .suspend        = ssb_device_suspend,
 408         .resume         = ssb_device_resume,
 409         .uevent         = ssb_device_uevent,
 410         .dev_attrs      = ssb_device_attrs,
 411 };
 412
 413 static void ssb_buses_lock(void)
 414 {
 415         /* See the comment at the ssb_is_early_boot definition */
 416         if (!ssb_is_early_boot)
 417                 mutex_lock(&buses_mutex);
 418 }
 419
 420 static void ssb_buses_unlock(void)
 421 {
 422         /* See the comment at the ssb_is_early_boot definition */
 423         if (!ssb_is_early_boot)
 424                 mutex_unlock(&buses_mutex);
 425 }
 426
 427 static void ssb_devices_unregister(struct ssb_bus *bus)
 428 {
 429         struct ssb_device *sdev;
 430         int i;
 431
 432         for (i = bus->nr_devices - 1; i >= 0; i--) {
 433                 sdev = &(bus->devices[i]);
 434                 if (sdev->dev)
 435                         device_unregister(sdev->dev);
 436         }
 437
 438 #ifdef CONFIG_SSB_EMBEDDED
 439         if (bus->bustype == SSB_BUSTYPE_SSB)
 440                 platform_device_unregister(bus->watchdog);
 441 #endif
 442 }
 443
 444 void ssb_bus_unregister(struct ssb_bus *bus)
 445 {
 446         ssb_buses_lock();
 447         ssb_devices_unregister(bus);
 448         list_del(&bus->list);
 449         ssb_buses_unlock();
 450
 451         ssb_pcmcia_exit(bus);
 452         ssb_pci_exit(bus);
 453         ssb_iounmap(bus);
 454 }
 455 EXPORT_SYMBOL(ssb_bus_unregister);
 456
 457 static void ssb_release_dev(struct device *dev)
 458 {
 459         struct __ssb_dev_wrapper *devwrap;
 460
 461         devwrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 462         kfree(devwrap);
 463 }
 464
 465 static int ssb_devices_register(struct ssb_bus *bus)
 466 {
 467         struct ssb_device *sdev;
 468         struct device *dev;
 469         struct __ssb_dev_wrapper *devwrap;
 470         int i, err = 0;
 471         int dev_idx = 0;
 472
 473         for (i = 0; i < bus->nr_devices; i++) {
 474                 sdev = &(bus->devices[i]);
 475
 476                 /* We don't register SSB-system devices to the kernel,
 477                  * as the drivers for them are built into SSB. */
 478                 switch (sdev->id.coreid) {
 479                 case SSB_DEV_CHIPCOMMON:
 480                 case SSB_DEV_PCI:
 481                 case SSB_DEV_PCIE:
 482                 case SSB_DEV_PCMCIA:
 483                 case SSB_DEV_MIPS:
 484                 case SSB_DEV_MIPS_3302:
 485                 case SSB_DEV_EXTIF:
 486                         continue;
 487                 }
 488
 489                 devwrap = kzalloc(sizeof(*devwrap), GFP_KERNEL);
 490                 if (!devwrap) {
 491                         ssb_printk(KERN_ERR PFX
 492                                    "Could not allocate device\n");
 493                         err = -ENOMEM;
 494                         goto error;
 495                 }
 496                 dev = &devwrap->dev;
 497                 devwrap->sdev = sdev;
 498
 499                 dev->release = ssb_release_dev;
 500                 dev->bus = &ssb_bustype;
 501                 dev_set_name(dev, "ssb%u:%d", bus->busnumber, dev_idx);
 502
 503                 switch (bus->bustype) {
 504                 case SSB_BUSTYPE_PCI:
 505 #ifdef CONFIG_SSB_PCIHOST
 506                         sdev->irq = bus->host_pci->irq;
 507                         dev->parent = &bus->host_pci->dev;
 508                         sdev->dma_dev = dev->parent;
 509 #endif
 510                         break;
 511                 case SSB_BUSTYPE_PCMCIA:
 512 #ifdef CONFIG_SSB_PCMCIAHOST
 513                         sdev->irq = bus->host_pcmcia->irq;
 514                         dev->parent = &bus->host_pcmcia->dev;
 515 #endif
 516                         break;
 517                 case SSB_BUSTYPE_SDIO:
 518 #ifdef CONFIG_SSB_SDIOHOST
 519                         dev->parent = &bus->host_sdio->dev;
 520 #endif
 521                         break;
 522                 case SSB_BUSTYPE_SSB:
 523                         dev->dma_mask = &dev->coherent_dma_mask;
 524                         sdev->dma_dev = dev;
 525                         break;
 526                 }
 527
 528                 sdev->dev = dev;
 529                 err = device_register(dev);
 530                 if (err) {
 531                         ssb_printk(KERN_ERR PFX
 532                                    "Could not register %s\n",
 533                                    dev_name(dev));
 534                         /* Set dev to NULL to not unregister
 535                          * dev on error unwinding. */
 536                         sdev->dev = NULL;
 537                         kfree(devwrap);
 538                         goto error;
 539                 }
 540                 dev_idx++;
 541         }
 542
 543         return 0;
 544 error:
 545         /* Unwind the already registered devices. */
 546         ssb_devices_unregister(bus);
 547         return err;
 548 }
 549
 550 /* Needs ssb_buses_lock() */
 551 static int __devinit ssb_attach_queued_buses(void)
 552 {
 553         struct ssb_bus *bus, *n;
 554         int err = 0;
 555         int drop_them_all = 0;
 556
 557         list_for_each_entry_safe(bus, n, &attach_queue, list) {
 558                 if (drop_them_all) {
 559                         list_del(&bus->list);
 560                         continue;
 561                 }
 562                 /* Can't init the PCIcore in ssb_bus_register(), as that
 563                  * is too early in boot for embedded systems
 564                  * (no udelay() available). So do it here in attach stage.
 565                  */
 566                 err = ssb_bus_powerup(bus, 0);
 567                 if (err)
 568                         goto error;
 569                 ssb_pcicore_init(&bus->pcicore);
 570                 if (bus->bustype == SSB_BUSTYPE_SSB)
 571                         ssb_watchdog_register(bus);
 572                 ssb_bus_may_powerdown(bus);
 573
 574                 err = ssb_devices_register(bus);
 575 error:
 576                 if (err) {
 577                         drop_them_all = 1;
 578                         list_del(&bus->list);
 579                         continue;
 580                 }
 581                 list_move_tail(&bus->list, &buses);
 582         }
 583
 584         return err;
 585 }
 586
 587 static u8 ssb_ssb_read8(struct ssb_device *dev, u16 offset)
 588 {
 589         struct ssb_bus *bus = dev->bus;
 590
 591         offset += dev->core_index * SSB_CORE_SIZE;
 592         return readb(bus->mmio + offset);
 593 }
 594
 595 static u16 ssb_ssb_read16(struct ssb_device *dev, u16 offset)
 596 {
 597         struct ssb_bus *bus = dev->bus;
 598
 599         offset += dev->core_index * SSB_CORE_SIZE;
 600         return readw(bus->mmio + offset);
 601 }
 602
 603 static u32 ssb_ssb_read32(struct ssb_device *dev, u16 offset)
 604 {
 605         struct ssb_bus *bus = dev->bus;
 606
 607         offset += dev->core_index * SSB_CORE_SIZE;
 608         return readl(bus->mmio + offset);
 609 }
 610
 611 #ifdef CONFIG_SSB_BLOCKIO
 612 static void ssb_ssb_block_read(struct ssb_device *dev, void *buffer,
 613                                size_t count, u16 offset, u8 reg_width)
 614 {
 615         struct ssb_bus *bus = dev->bus;
 616         void __iomem *addr;
 617
 618         offset += dev->core_index * SSB_CORE_SIZE;
 619         addr = bus->mmio + offset;
 620
 621         switch (reg_width) {
 622         case sizeof(u8): {
 623                 u8 *buf = buffer;
 624
 625                 while (count) {
 626                         *buf = __raw_readb(addr);
 627                         buf++;
 628                         count--;
 629                 }
 630                 break;
 631         }
 632         case sizeof(u16): {
 633                 __le16 *buf = buffer;
 634
 635                 SSB_WARN_ON(count & 1);
 636                 while (count) {
 637                         *buf = (__force __le16)__raw_readw(addr);
 638                         buf++;
 639                         count -= 2;
 640                 }
 641                 break;
 642         }
 643         case sizeof(u32): {
 644                 __le32 *buf = buffer;
 645
 646                 SSB_WARN_ON(count & 3);
 647                 while (count) {
 648                         *buf = (__force __le32)__raw_readl(addr);
 649                         buf++;
 650                         count -= 4;
 651                 }
 652                 break;
 653         }
 654         default:
 655                 SSB_WARN_ON(1);
 656         }
 657 }
 658 #endif /* CONFIG_SSB_BLOCKIO */
 659
 660 static void ssb_ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 661 {
 662         struct ssb_bus *bus = dev->bus;
 663
 664         offset += dev->core_index * SSB_CORE_SIZE;
 665         writeb(value, bus->mmio + offset);
 666 }
 667
 668 static void ssb_ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 669 {
 670         struct ssb_bus *bus = dev->bus;
 671
 672         offset += dev->core_index * SSB_CORE_SIZE;
 673         writew(value, bus->mmio + offset);
 674 }
 675
 676 static void ssb_ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 677 {
 678         struct ssb_bus *bus = dev->bus;
 679
 680         offset += dev->core_index * SSB_CORE_SIZE;
 681         writel(value, bus->mmio + offset);
 682 }
 683
 684 #ifdef CONFIG_SSB_BLOCKIO
 685 static void ssb_ssb_block_write(struct ssb_device *dev, const void *buffer,
 686                                 size_t count, u16 offset, u8 reg_width)
 687 {
 688         struct ssb_bus *bus = dev->bus;
 689         void __iomem *addr;
 690
 691         offset += dev->core_index * SSB_CORE_SIZE;
 692         addr = bus->mmio + offset;
 693
 694         switch (reg_width) {
 695         case sizeof(u8): {
 696                 const u8 *buf = buffer;
 697
 698                 while (count) {
 699                         __raw_writeb(*buf, addr);
 700                         buf++;
 701                         count--;
 702                 }
 703                 break;
 704         }
 705         case sizeof(u16): {
 706                 const __le16 *buf = buffer;
 707
 708                 SSB_WARN_ON(count & 1);
 709                 while (count) {
 710                         __raw_writew((__force u16)(*buf), addr);
 711                         buf++;
 712                         count -= 2;
 713                 }
 714                 break;
 715         }
 716         case sizeof(u32): {
 717                 const __le32 *buf = buffer;
 718
 719                 SSB_WARN_ON(count & 3);
 720                 while (count) {
 721                         __raw_writel((__force u32)(*buf), addr);
 722                         buf++;
 723                         count -= 4;
 724                 }
 725                 break;
 726         }
 727         default:
 728                 SSB_WARN_ON(1);
 729         }
 730 }
 731 #endif /* CONFIG_SSB_BLOCKIO */
 732
 733 /* Ops for the plain SSB bus without a host-device (no PCI or PCMCIA). */
 734 static const struct ssb_bus_ops ssb_ssb_ops = {
 735         .read8          = ssb_ssb_read8,
 736         .read16         = ssb_ssb_read16,
 737         .read32         = ssb_ssb_read32,
 738         .write8         = ssb_ssb_write8,
 739         .write16        = ssb_ssb_write16,
 740         .write32        = ssb_ssb_write32,
 741 #ifdef CONFIG_SSB_BLOCKIO
 742         .block_read     = ssb_ssb_block_read,
 743         .block_write    = ssb_ssb_block_write,
 744 #endif
 745 };
 746
 747 static int ssb_fetch_invariants(struct ssb_bus *bus,
 748                                 ssb_invariants_func_t get_invariants)
 749 {
 750         struct ssb_init_invariants iv;
 751         int err;
 752
 753         memset(&iv, 0, sizeof(iv));
 754         err = get_invariants(bus, &iv);
 755         if (err)
 756                 goto out;
 757         memcpy(&bus->boardinfo, &iv.boardinfo, sizeof(iv.boardinfo));
 758         memcpy(&bus->sprom, &iv.sprom, sizeof(iv.sprom));
 759         bus->has_cardbus_slot = iv.has_cardbus_slot;
 760 out:
 761         return err;
 762 }
 763
 764 static int __devinit ssb_bus_register(struct ssb_bus *bus,
 765                                       ssb_invariants_func_t get_invariants,
 766                                       unsigned long baseaddr)
 767 {
 768         int err;
 769
 770         spin_lock_init(&bus->bar_lock);
 771         INIT_LIST_HEAD(&bus->list);
 772 #ifdef CONFIG_SSB_EMBEDDED
 773         spin_lock_init(&bus->gpio_lock);
 774 #endif
 775
 776         /* Powerup the bus */
 777         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
 778         if (err)
 779                 goto out;
 780
 781         /* Init SDIO-host device (if any), before the scan */
 782         err = ssb_sdio_init(bus);
 783         if (err)
 784                 goto err_disable_xtal;
 785
 786         ssb_buses_lock();
 787         bus->busnumber = next_busnumber;
 788         /* Scan for devices (cores) */
 789         err = ssb_bus_scan(bus, baseaddr);
 790         if (err)
 791                 goto err_sdio_exit;
 792
 793         /* Init PCI-host device (if any) */
 794         err = ssb_pci_init(bus);
 795         if (err)
 796                 goto err_unmap;
 797         /* Init PCMCIA-host device (if any) */
 798         err = ssb_pcmcia_init(bus);
 799         if (err)
 800                 goto err_pci_exit;
 801
 802         /* Initialize basic system devices (if available) */
 803         err = ssb_bus_powerup(bus, 0);
 804         if (err)
 805                 goto err_pcmcia_exit;
 806         ssb_chipcommon_init(&bus->chipco);
 807         ssb_mipscore_init(&bus->mipscore);
 808         err = ssb_fetch_invariants(bus, get_invariants);
 809         if (err) {
 810                 ssb_bus_may_powerdown(bus);
 811                 goto err_pcmcia_exit;
 812         }
 813         ssb_bus_may_powerdown(bus);
 814
 815         /* Queue it for attach.
 816          * See the comment at the ssb_is_early_boot definition. */
 817         list_add_tail(&bus->list, &attach_queue);
 818         if (!ssb_is_early_boot) {
 819                 /* This is not early boot, so we must attach the bus now */
 820                 err = ssb_attach_queued_buses();
 821                 if (err)
 822                         goto err_dequeue;
 823         }
 824         next_busnumber++;
 825         ssb_buses_unlock();
 826
 827 out:
 828         return err;
 829
 830 err_dequeue:
 831         list_del(&bus->list);
 832 err_pcmcia_exit:
 833         ssb_pcmcia_exit(bus);
 834 err_pci_exit:
 835         ssb_pci_exit(bus);
 836 err_unmap:
 837         ssb_iounmap(bus);
 838 err_sdio_exit:
 839         ssb_sdio_exit(bus);
 840 err_disable_xtal:
 841         ssb_buses_unlock();
 842         ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
 843         return err;
 844 }
 845
 846 #ifdef CONFIG_SSB_PCIHOST
 847 int __devinit ssb_bus_pcibus_register(struct ssb_bus *bus,
 848                                       struct pci_dev *host_pci)
 849 {
 850         int err;
 851
 852         bus->bustype = SSB_BUSTYPE_PCI;
 853         bus->host_pci = host_pci;
 854         bus->ops = &ssb_pci_ops;
 855
 856         err = ssb_bus_register(bus, ssb_pci_get_invariants, 0);
 857         if (!err) {
 858                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 859                            "PCI device %s\n", dev_name(&host_pci->dev));
 860         } else {
 861                 ssb_printk(KERN_ERR PFX "Failed to register PCI version"
 862                            " of SSB with error %d\n", err);
 863         }
 864
 865         return err;
 866 }
 867 EXPORT_SYMBOL(ssb_bus_pcibus_register);
 868 #endif /* CONFIG_SSB_PCIHOST */
 869
 870 #ifdef CONFIG_SSB_PCMCIAHOST
 871 int __devinit ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 872                                          struct pcmcia_device *pcmcia_dev,
 873                                          unsigned long baseaddr)
 874 {
 875         int err;
 876
 877         bus->bustype = SSB_BUSTYPE_PCMCIA;
 878         bus->host_pcmcia = pcmcia_dev;
 879         bus->ops = &ssb_pcmcia_ops;
 880
 881         err = ssb_bus_register(bus, ssb_pcmcia_get_invariants, baseaddr);
 882         if (!err) {
 883                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 884                            "PCMCIA device %s\n", pcmcia_dev->devname);
 885         }
 886
 887         return err;
 888 }
 889 EXPORT_SYMBOL(ssb_bus_pcmciabus_register);
 890 #endif /* CONFIG_SSB_PCMCIAHOST */
 891
 892 #ifdef CONFIG_SSB_SDIOHOST
 893 int __devinit ssb_bus_sdiobus_register(struct ssb_bus *bus,
 894                                        struct sdio_func *func,
 895                                        unsigned int quirks)
 896 {
 897         int err;
 898
 899         bus->bustype = SSB_BUSTYPE_SDIO;
 900         bus->host_sdio = func;
 901         bus->ops = &ssb_sdio_ops;
 902         bus->quirks = quirks;
 903
 904         err = ssb_bus_register(bus, ssb_sdio_get_invariants, ~0);
 905         if (!err) {
 906                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
 907                            "SDIO device %s\n", sdio_func_id(func));
 908         }
 909
 910         return err;
 911 }
 912 EXPORT_SYMBOL(ssb_bus_sdiobus_register);
 913 #endif /* CONFIG_SSB_PCMCIAHOST */
 914
 915 int __devinit ssb_bus_ssbbus_register(struct ssb_bus *bus,
 916                                       unsigned long baseaddr,
 917                                       ssb_invariants_func_t get_invariants)
 918 {
 919         int err;
 920
 921         bus->bustype = SSB_BUSTYPE_SSB;
 922         bus->ops = &ssb_ssb_ops;
 923
 924         err = ssb_bus_register(bus, get_invariants, baseaddr);
 925         if (!err) {
 926                 ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found at "
 927                            "address 0x%08lX\n", baseaddr);
 928         }
 929
 930         return err;
 931 }
 932
 933 int __ssb_driver_register(struct ssb_driver *drv, struct module *owner)
 934 {
 935         drv->drv.name = drv->name;
 936         drv->drv.bus = &ssb_bustype;
 937         drv->drv.owner = owner;
 938
 939         return driver_register(&drv->drv);
 940 }
 941 EXPORT_SYMBOL(__ssb_driver_register);
 942
 943 void ssb_driver_unregister(struct ssb_driver *drv)
 944 {
 945         driver_unregister(&drv->drv);
 946 }
 947 EXPORT_SYMBOL(ssb_driver_unregister);
 948
 949 void ssb_set_devtypedata(struct ssb_device *dev, void *data)
 950 {
 951         struct ssb_bus *bus = dev->bus;
 952         struct ssb_device *ent;
 953         int i;
 954
 955         for (i = 0; i < bus->nr_devices; i++) {
 956                 ent = &(bus->devices[i]);
 957                 if (ent->id.vendor != dev->id.vendor)
 958                         continue;
 959                 if (ent->id.coreid != dev->id.coreid)
 960                         continue;
 961
 962                 ent->devtypedata = data;
 963         }
 964 }
 965 EXPORT_SYMBOL(ssb_set_devtypedata);
 966
 967 static u32 clkfactor_f6_resolve(u32 v)
 968 {
 969         /* map the magic values */
 970         switch (v) {
 971         case SSB_CHIPCO_CLK_F6_2:
 972                 return 2;
 973         case SSB_CHIPCO_CLK_F6_3:
 974                 return 3;
 975         case SSB_CHIPCO_CLK_F6_4:
 976                 return 4;
 977         case SSB_CHIPCO_CLK_F6_5:
 978                 return 5;
 979         case SSB_CHIPCO_CLK_F6_6:
 980                 return 6;
 981         case SSB_CHIPCO_CLK_F6_7:
 982                 return 7;
 983         }
 984         return 0;
 985 }
 986
 987 /* Calculate the speed the backplane would run at a given set of clockcontrol values */
 988 u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
 989 {
 990         u32 n1, n2, clock, m1, m2, m3, mc;
 991
 992         n1 = (n & SSB_CHIPCO_CLK_N1);
 993         n2 = ((n & SSB_CHIPCO_CLK_N2) >> SSB_CHIPCO_CLK_N2_SHIFT);
 994
 995         switch (plltype) {
 996         case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
 997                 if (m & SSB_CHIPCO_CLK_T6_MMASK)
 998                         return SSB_CHIPCO_CLK_T6_M1;
 999                 return SSB_CHIPCO_CLK_T6_M0;
1000         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1001         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1002         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1003         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1004                 n1 = clkfactor_f6_resolve(n1);
1005                 n2 += SSB_CHIPCO_CLK_F5_BIAS;
1006                 break;
1007         case SSB_PLLTYPE_2: /* 48Mhz, 4 dividers */
1008                 n1 += SSB_CHIPCO_CLK_T2_BIAS;
1009                 n2 += SSB_CHIPCO_CLK_T2_BIAS;
1010                 SSB_WARN_ON(!((n1 >= 2) && (n1 <= 7)));
1011                 SSB_WARN_ON(!((n2 >= 5) && (n2 <= 23)));
1012                 break;
1013         case SSB_PLLTYPE_5: /* 25Mhz, 4 dividers */
1014                 return 100000000;
1015         default:
1016                 SSB_WARN_ON(1);
1017         }
1018
1019         switch (plltype) {
1020         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1021         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1022                 clock = SSB_CHIPCO_CLK_BASE2 * n1 * n2;
1023                 break;
1024         default:
1025                 clock = SSB_CHIPCO_CLK_BASE1 * n1 * n2;
1026         }
1027         if (!clock)
1028                 return 0;
1029
1030         m1 = (m & SSB_CHIPCO_CLK_M1);
1031         m2 = ((m & SSB_CHIPCO_CLK_M2) >> SSB_CHIPCO_CLK_M2_SHIFT);
1032         m3 = ((m & SSB_CHIPCO_CLK_M3) >> SSB_CHIPCO_CLK_M3_SHIFT);
1033         mc = ((m & SSB_CHIPCO_CLK_MC) >> SSB_CHIPCO_CLK_MC_SHIFT);
1034
1035         switch (plltype) {
1036         case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
1037         case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
1038         case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
1039         case SSB_PLLTYPE_7: /* 25Mhz, 4 dividers */
1040                 m1 = clkfactor_f6_resolve(m1);
1041                 if ((plltype == SSB_PLLTYPE_1) ||
1042                     (plltype == SSB_PLLTYPE_3))
1043                         m2 += SSB_CHIPCO_CLK_F5_BIAS;
1044                 else
1045                         m2 = clkfactor_f6_resolve(m2);
1046                 m3 = clkfactor_f6_resolve(m3);
1047
1048                 switch (mc) {
1049                 case SSB_CHIPCO_CLK_MC_BYPASS:
1050                         return clock;
1051                 case SSB_CHIPCO_CLK_MC_M1:
1052                         return (clock / m1);
1053                 case SSB_CHIPCO_CLK_MC_M1M2:
1054                         return (clock / (m1 * m2));
1055                 case SSB_CHIPCO_CLK_MC_M1M2M3:
1056                         return (clock / (m1 * m2 * m3));
1057                 case SSB_CHIPCO_CLK_MC_M1M3:
1058                         return (clock / (m1 * m3));
1059                 }
1060                 return 0;
1061         case SSB_PLLTYPE_2:
1062                 m1 += SSB_CHIPCO_CLK_T2_BIAS;
1063                 m2 += SSB_CHIPCO_CLK_T2M2_BIAS;
1064                 m3 += SSB_CHIPCO_CLK_T2_BIAS;
1065                 SSB_WARN_ON(!((m1 >= 2) && (m1 <= 7)));
1066                 SSB_WARN_ON(!((m2 >= 3) && (m2 <= 10)));
1067                 SSB_WARN_ON(!((m3 >= 2) && (m3 <= 7)));
1068
1069                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M1BYP))
1070                         clock /= m1;
1071                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M2BYP))
1072                         clock /= m2;
1073                 if (!(mc & SSB_CHIPCO_CLK_T2MC_M3BYP))
1074                         clock /= m3;
1075                 return clock;
1076         default:
1077                 SSB_WARN_ON(1);
1078         }
1079         return 0;
1080 }
1081
1082 /* Get the current speed the backplane is running at */
1083 u32 ssb_clockspeed(struct ssb_bus *bus)
1084 {
1085         u32 rate;
1086         u32 plltype;
1087         u32 clkctl_n, clkctl_m;
1088
1089         if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
1090                 return ssb_pmu_get_controlclock(&bus->chipco);
1091
1092         if (ssb_extif_available(&bus->extif))
1093                 ssb_extif_get_clockcontrol(&bus->extif, &plltype,
1094                                            &clkctl_n, &clkctl_m);
1095         else if (bus->chipco.dev)
1096                 ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
1097                                             &clkctl_n, &clkctl_m);
1098         else
1099                 return 0;
1100
1101         if (bus->chip_id == 0x5365) {
1102                 rate = 100000000;
1103         } else {
1104                 rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
1105                 if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
1106                         rate /= 2;
1107         }
1108
1109         return rate;
1110 }
1111 EXPORT_SYMBOL(ssb_clockspeed);
1112
1113 static u32 ssb_tmslow_reject_bitmask(struct ssb_device *dev)
1114 {
1115         u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
1116
1117         /* The REJECT bit seems to be different for Backplane rev 2.3 */
1118         switch (rev) {
1119         case SSB_IDLOW_SSBREV_22:
1120         case SSB_IDLOW_SSBREV_24:
1121         case SSB_IDLOW_SSBREV_26:
1122                 return SSB_TMSLOW_REJECT;
1123         case SSB_IDLOW_SSBREV_23:
1124                 return SSB_TMSLOW_REJECT_23;
1125         case SSB_IDLOW_SSBREV_25:     /* TODO - find the proper REJECT bit */
1126         case SSB_IDLOW_SSBREV_27:     /* same here */
1127                 return SSB_TMSLOW_REJECT;       /* this is a guess */
1128         default:
1129                 WARN(1, KERN_INFO "ssb: Backplane Revision 0x%.8X\n", rev);
1130         }
1131         return (SSB_TMSLOW_REJECT | SSB_TMSLOW_REJECT_23);
1132 }
1133
1134 int ssb_device_is_enabled(struct ssb_device *dev)
1135 {
1136         u32 val;
1137         u32 reject;
1138
1139         reject = ssb_tmslow_reject_bitmask(dev);
1140         val = ssb_read32(dev, SSB_TMSLOW);
1141         val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject;
1142
1143         return (val == SSB_TMSLOW_CLOCK);
1144 }
1145 EXPORT_SYMBOL(ssb_device_is_enabled);
1146
1147 static void ssb_flush_tmslow(struct ssb_device *dev)
1148 {
1149         /* Make _really_ sure the device has finished the TMSLOW
1150          * register write transaction, as we risk running into
1151          * a machine check exception otherwise.
1152          * Do this by reading the register back to commit the
1153          * PCI write and delay an additional usec for the device
1154          * to react to the change. */
1155         ssb_read32(dev, SSB_TMSLOW);
1156         udelay(1);
1157 }
1158
1159 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags)
1160 {
1161         u32 val;
1162
1163         ssb_device_disable(dev, core_specific_flags);
1164         ssb_write32(dev, SSB_TMSLOW,
1165                     SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK |
1166                     SSB_TMSLOW_FGC | core_specific_flags);
1167         ssb_flush_tmslow(dev);
1168
1169         /* Clear SERR if set. This is a hw bug workaround. */
1170         if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_SERR)
1171                 ssb_write32(dev, SSB_TMSHIGH, 0);
1172
1173         val = ssb_read32(dev, SSB_IMSTATE);
1174         if (val & (SSB_IMSTATE_IBE | SSB_IMSTATE_TO)) {
1175                 val &= ~(SSB_IMSTATE_IBE | SSB_IMSTATE_TO);
1176                 ssb_write32(dev, SSB_IMSTATE, val);
1177         }
1178
1179         ssb_write32(dev, SSB_TMSLOW,
1180                     SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC |
1181                     core_specific_flags);
1182         ssb_flush_tmslow(dev);
1183
1184         ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK |
1185                     core_specific_flags);
1186         ssb_flush_tmslow(dev);
1187 }
1188 EXPORT_SYMBOL(ssb_device_enable);
1189
1190 /* Wait for bitmask in a register to get set or cleared.
1191  * timeout is in units of ten-microseconds */
1192 static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
1193                          int timeout, int set)
1194 {
1195         int i;
1196         u32 val;
1197
1198         for (i = 0; i < timeout; i++) {
1199                 val = ssb_read32(dev, reg);
1200                 if (set) {
1201                         if ((val & bitmask) == bitmask)
1202                                 return 0;
1203                 } else {
1204                         if (!(val & bitmask))
1205                                 return 0;
1206                 }
1207                 udelay(10);
1208         }
1209         printk(KERN_ERR PFX "Timeout waiting for bitmask %08X on "
1210                             "register %04X to %s.\n",
1211                bitmask, reg, (set ? "set" : "clear"));
1212
1213         return -ETIMEDOUT;
1214 }
1215
1216 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
1217 {
1218         u32 reject, val;
1219
1220         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
1221                 return;
1222
1223         reject = ssb_tmslow_reject_bitmask(dev);
1224
1225         if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
1226                 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
1227                 ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
1228                 ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
1229
1230                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1231                         val = ssb_read32(dev, SSB_IMSTATE);
1232                         val |= SSB_IMSTATE_REJECT;
1233                         ssb_write32(dev, SSB_IMSTATE, val);
1234                         ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
1235                                       0);
1236                 }
1237
1238                 ssb_write32(dev, SSB_TMSLOW,
1239                         SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
1240                         reject | SSB_TMSLOW_RESET |
1241                         core_specific_flags);
1242                 ssb_flush_tmslow(dev);
1243
1244                 if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
1245                         val = ssb_read32(dev, SSB_IMSTATE);
1246                         val &= ~SSB_IMSTATE_REJECT;
1247                         ssb_write32(dev, SSB_IMSTATE, val);
1248                 }
1249         }
1250
1251         ssb_write32(dev, SSB_TMSLOW,
1252                     reject | SSB_TMSLOW_RESET |
1253                     core_specific_flags);
1254         ssb_flush_tmslow(dev);
1255 }
1256 EXPORT_SYMBOL(ssb_device_disable);
1257
1258 /* Some chipsets need routing known for PCIe and 64-bit DMA */
1259 static bool ssb_dma_translation_special_bit(struct ssb_device *dev)
1260 {
1261         u16 chip_id = dev->bus->chip_id;
1262
1263         if (dev->id.coreid == SSB_DEV_80211) {
1264                 return (chip_id == 0x4322 || chip_id == 43221 ||
1265                         chip_id == 43231 || chip_id == 43222);
1266         }
1267
1268         return 0;
1269 }
1270
1271 u32 ssb_dma_translation(struct ssb_device *dev)
1272 {
1273         switch (dev->bus->bustype) {
1274         case SSB_BUSTYPE_SSB:
1275                 return 0;
1276         case SSB_BUSTYPE_PCI:
1277                 if (pci_is_pcie(dev->bus->host_pci) &&
1278                     ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) {
1279                         return SSB_PCIE_DMA_H32;
1280                 } else {
1281                         if (ssb_dma_translation_special_bit(dev))
1282                                 return SSB_PCIE_DMA_H32;
1283                         else
1284                                 return SSB_PCI_DMA;
1285                 }
1286         default:
1287                 __ssb_dma_not_implemented(dev);
1288         }
1289         return 0;
1290 }
1291 EXPORT_SYMBOL(ssb_dma_translation);
1292
1293 int ssb_bus_may_powerdown(struct ssb_bus *bus)
1294 {
1295         struct ssb_chipcommon *cc;
1296         int err = 0;
1297
1298         /* On buses where more than one core may be working
1299          * at a time, we must not powerdown stuff if there are
1300          * still cores that may want to run. */
1301         if (bus->bustype == SSB_BUSTYPE_SSB)
1302                 goto out;
1303
1304         cc = &bus->chipco;
1305
1306         if (!cc->dev)
1307                 goto out;
1308         if (cc->dev->id.revision < 5)
1309                 goto out;
1310
1311         ssb_chipco_set_clockmode(cc, SSB_CLKMODE_SLOW);
1312         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 0);
1313         if (err)
1314                 goto error;
1315 out:
1316 #ifdef CONFIG_SSB_DEBUG
1317         bus->powered_up = 0;
1318 #endif
1319         return err;
1320 error:
1321         ssb_printk(KERN_ERR PFX "Bus powerdown failed\n");
1322         goto out;
1323 }
1324 EXPORT_SYMBOL(ssb_bus_may_powerdown);
1325
1326 int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
1327 {
1328         int err;
1329         enum ssb_clkmode mode;
1330
1331         err = ssb_pci_xtal(bus, SSB_GPIO_XTAL | SSB_GPIO_PLL, 1);
1332         if (err)
1333                 goto error;
1334
1335 #ifdef CONFIG_SSB_DEBUG
1336         bus->powered_up = 1;
1337 #endif
1338
1339         mode = dynamic_pctl ? SSB_CLKMODE_DYNAMIC : SSB_CLKMODE_FAST;
1340         ssb_chipco_set_clockmode(&bus->chipco, mode);
1341
1342         return 0;
1343 error:
1344         ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
1345         return err;
1346 }
1347 EXPORT_SYMBOL(ssb_bus_powerup);
1348
1349 static void ssb_broadcast_value(struct ssb_device *dev,
1350                                 u32 address, u32 data)
1351 {
1352 #ifdef CONFIG_SSB_DRIVER_PCICORE
1353         /* This is used for both, PCI and ChipCommon core, so be careful. */
1354         BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
1355         BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
1356 #endif
1357
1358         ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
1359         ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
1360         ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
1361         ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
1362 }
1363
1364 void ssb_commit_settings(struct ssb_bus *bus)
1365 {
1366         struct ssb_device *dev;
1367
1368 #ifdef CONFIG_SSB_DRIVER_PCICORE
1369         dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
1370 #else
1371         dev = bus->chipco.dev;
1372 #endif
1373         if (WARN_ON(!dev))
1374                 return;
1375         /* This forces an update of the cached registers. */
1376         ssb_broadcast_value(dev, 0xFD8, 0);
1377 }
1378 EXPORT_SYMBOL(ssb_commit_settings);
1379
1380 u32 ssb_admatch_base(u32 adm)
1381 {
1382         u32 base = 0;
1383
1384         switch (adm & SSB_ADM_TYPE) {
1385         case SSB_ADM_TYPE0:
1386                 base = (adm & SSB_ADM_BASE0);
1387                 break;
1388         case SSB_ADM_TYPE1:
1389                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1390                 base = (adm & SSB_ADM_BASE1);
1391                 break;
1392         case SSB_ADM_TYPE2:
1393                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1394                 base = (adm & SSB_ADM_BASE2);
1395                 break;
1396         default:
1397                 SSB_WARN_ON(1);
1398         }
1399
1400         return base;
1401 }
1402 EXPORT_SYMBOL(ssb_admatch_base);
1403
1404 u32 ssb_admatch_size(u32 adm)
1405 {
1406         u32 size = 0;
1407
1408         switch (adm & SSB_ADM_TYPE) {
1409         case SSB_ADM_TYPE0:
1410                 size = ((adm & SSB_ADM_SZ0) >> SSB_ADM_SZ0_SHIFT);
1411                 break;
1412         case SSB_ADM_TYPE1:
1413                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1414                 size = ((adm & SSB_ADM_SZ1) >> SSB_ADM_SZ1_SHIFT);
1415                 break;
1416         case SSB_ADM_TYPE2:
1417                 SSB_WARN_ON(adm & SSB_ADM_NEG); /* unsupported */
1418                 size = ((adm & SSB_ADM_SZ2) >> SSB_ADM_SZ2_SHIFT);
1419                 break;
1420         default:
1421                 SSB_WARN_ON(1);
1422         }
1423         size = (1 << (size + 1));
1424
1425         return size;
1426 }
1427 EXPORT_SYMBOL(ssb_admatch_size);
1428
1429 static int __init ssb_modinit(void)
1430 {
1431         int err;
1432
1433         /* See the comment at the ssb_is_early_boot definition */
1434         ssb_is_early_boot = 0;
1435         err = bus_register(&ssb_bustype);
1436         if (err)
1437                 return err;
1438
1439         /* Maybe we already registered some buses at early boot.
1440          * Check for this and attach them
1441          */
1442         ssb_buses_lock();
1443         err = ssb_attach_queued_buses();
1444         ssb_buses_unlock();
1445         if (err) {
1446                 bus_unregister(&ssb_bustype);
1447                 goto out;
1448         }
1449
1450         err = b43_pci_ssb_bridge_init();
1451         if (err) {
1452                 ssb_printk(KERN_ERR "Broadcom 43xx PCI-SSB-bridge "
1453                            "initialization failed\n");
1454                 /* don't fail SSB init because of this */
1455                 err = 0;
1456         }
1457         err = ssb_gige_init();
1458         if (err) {
1459                 ssb_printk(KERN_ERR "SSB Broadcom Gigabit Ethernet "
1460                            "driver initialization failed\n");
1461                 /* don't fail SSB init because of this */
1462                 err = 0;
1463         }
1464 out:
1465         return err;
1466 }
1467 /* ssb must be initialized after PCI but before the ssb drivers.
1468  * That means we must use some initcall between subsys_initcall
1469  * and device_initcall. */
1470 fs_initcall(ssb_modinit);
1471
1472 static void __exit ssb_modexit(void)
1473 {
1474         ssb_gige_exit();
1475         b43_pci_ssb_bridge_exit();
1476         bus_unregister(&ssb_bustype);
1477 }
1478 module_exit(ssb_modexit)