2 comedi/drivers/amplc_pci230.c
3 Driver for Amplicon PCI230 and PCI260 Multifunction I/O boards.
5 Copyright (C) 2001 Allan Willcox <allanwillcox@ozemail.com.au>
7 COMEDI - Linux Control and Measurement Device Interface
8 Copyright (C) 2000 David A. Schleef <ds@schleef.org>
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
22 Description: Amplicon PCI230, PCI260 Multifunction I/O boards
23 Author: Allan Willcox <allanwillcox@ozemail.com.au>,
24 Steve D Sharples <steve.sharples@nottingham.ac.uk>,
25 Ian Abbott <abbotti@mev.co.uk>
26 Updated: Wed, 22 Oct 2008 12:34:49 +0100
27 Devices: [Amplicon] PCI230 (pci230 or amplc_pci230),
28 PCI230+ (pci230+ or amplc_pci230),
29 PCI260 (pci260 or amplc_pci230), PCI260+ (pci260+ or amplc_pci230)
32 Configuration options:
33 [0] - PCI bus of device (optional).
34 [1] - PCI slot of device (optional).
35 If bus/slot is not specified, the first available PCI device
38 Configuring a "amplc_pci230" will match any supported card and it will
39 choose the best match, picking the "+" models if possible. Configuring
40 a "pci230" will match a PCI230 or PCI230+ card and it will be treated as
41 a PCI230. Configuring a "pci260" will match a PCI260 or PCI260+ card
42 and it will be treated as a PCI260. Configuring a "pci230+" will match
43 a PCI230+ card. Configuring a "pci260+" will match a PCI260+ card.
56 The AI subdevice has 16 single-ended channels or 8 differential
59 The PCI230 and PCI260 cards have 12-bit resolution. The PCI230+ and
60 PCI260+ cards have 16-bit resolution.
62 For differential mode, use inputs 2N and 2N+1 for channel N (e.g. use
63 inputs 14 and 15 for channel 7). If the card is physically a PCI230
64 or PCI260 then it actually uses a "pseudo-differential" mode where the
65 inputs are sampled a few microseconds apart. The PCI230+ and PCI260+
66 use true differential sampling. Another difference is that if the
67 card is physically a PCI230 or PCI260, the inverting input is 2N,
68 whereas for a PCI230+ or PCI260+ the inverting input is 2N+1. So if a
69 PCI230 is physically replaced by a PCI230+ (or a PCI260 with a
70 PCI260+) and differential mode is used, the differential inputs need
71 to be physically swapped on the connector.
73 The following input ranges are supported:
85 +=========+==============+===========+============+==========+
86 |start_src|scan_begin_src|convert_src|scan_end_src| stop_src |
87 +=========+==============+===========+============+==========+
88 |TRIG_NOW | TRIG_FOLLOW |TRIG_TIMER | TRIG_COUNT |TRIG_NONE |
89 |TRIG_INT | |TRIG_EXT(3)| |TRIG_COUNT|
91 | |--------------|-----------| | |
92 | | TRIG_TIMER(1)|TRIG_TIMER | | |
93 | | TRIG_EXT(2) | | | |
95 +---------+--------------+-----------+------------+----------+
97 Note 1: If AI command and AO command are used simultaneously, only
98 one may have scan_begin_src == TRIG_TIMER.
100 Note 2: For PCI230 and PCI230+, scan_begin_src == TRIG_EXT uses
101 DIO channel 16 (pin 49) which will need to be configured as
102 a digital input. For PCI260+, the EXTTRIG/EXTCONVCLK input
103 (pin 17) is used instead. For PCI230, scan_begin_src ==
104 TRIG_EXT is not supported. The trigger is a rising edge
107 Note 3: For convert_src == TRIG_EXT, the EXTTRIG/EXTCONVCLK input
108 (pin 25 on PCI230(+), pin 17 on PCI260(+)) is used. The
109 convert_arg value is interpreted as follows:
111 convert_arg == (CR_EDGE | 0) => rising edge
112 convert_arg == (CR_EDGE | CR_INVERT | 0) => falling edge
113 convert_arg == 0 => falling edge (backwards compatibility)
114 convert_arg == 1 => rising edge (backwards compatibility)
116 All entries in the channel list must use the same analogue reference.
117 If the analogue reference is not AREF_DIFF (not differential) each
118 pair of channel numbers (0 and 1, 2 and 3, etc.) must use the same
119 input range. The input ranges used in the sequence must be all
120 bipolar (ranges 0 to 3) or all unipolar (ranges 4 to 6). The channel
121 sequence must consist of 1 or more identical subsequences. Within the
122 subsequence, channels must be in ascending order with no repeated
123 channels. For example, the following sequences are valid: 0 1 2 3
124 (single valid subsequence), 0 2 3 5 0 2 3 5 (repeated valid
125 subsequence), 1 1 1 1 (repeated valid subsequence). The following
126 sequences are invalid: 0 3 2 1 (invalid subsequence), 0 2 3 5 0 2 3
127 (incompletely repeated subsequence). Some versions of the PCI230+ and
128 PCI260+ have a bug that requires a subsequence longer than one entry
129 long to include channel 0.
133 The AO subdevice has 2 channels with 12-bit resolution.
135 The following output ranges are supported:
142 +=========+==============+===========+============+==========+
143 |start_src|scan_begin_src|convert_src|scan_end_src| stop_src |
144 +=========+==============+===========+============+==========+
145 |TRIG_INT | TRIG_TIMER(1)| TRIG_NOW | TRIG_COUNT |TRIG_NONE |
146 | | TRIG_EXT(2) | | |TRIG_COUNT|
148 +---------+--------------+-----------+------------+----------+
150 Note 1: If AI command and AO command are used simultaneously, only
151 one may have scan_begin_src == TRIG_TIMER.
153 Note 2: scan_begin_src == TRIG_EXT is only supported if the card is
154 configured as a PCI230+ and is only supported on later
155 versions of the card. As a card configured as a PCI230+ is
156 not guaranteed to support external triggering, please consider
157 this support to be a bonus. It uses the EXTTRIG/ EXTCONVCLK
158 input (PCI230+ pin 25). Triggering will be on the rising edge
159 unless the CR_INVERT flag is set in scan_begin_arg.
161 The channels in the channel sequence must be in ascending order with
162 no repeats. All entries in the channel sequence must use the same
167 The DIO subdevice is a 8255 chip providing 24 DIO channels. The DIO
168 channels are configurable as inputs or outputs in four groups:
170 Port A - channels 0 to 7
171 Port B - channels 8 to 15
172 Port CL - channels 16 to 19
173 Port CH - channels 20 to 23
175 Only mode 0 of the 8255 chip is supported.
177 Bit 0 of port C (DIO channel 16) is also used as an external scan
178 trigger input for AI commands on PCI230 and PCI230+, so would need to
179 be configured as an input to use it for that purpose.
182 Extra triggered scan functionality, interrupt bug-fix added by Steve Sharples.
183 Support for PCI230+/260+, more triggered scan functionality, and workarounds
184 for (or detection of) various hardware problems added by Ian Abbott.
187 #include <linux/module.h>
188 #include <linux/pci.h>
189 #include <linux/delay.h>
190 #include <linux/interrupt.h>
192 #include "../comedidev.h"
194 #include "comedi_fc.h"
198 /* PCI230 PCI configuration register information */
199 #define PCI_DEVICE_ID_PCI230 0x0000
200 #define PCI_DEVICE_ID_PCI260 0x0006
201 #define PCI_DEVICE_ID_INVALID 0xffff
203 #define PCI230_IO1_SIZE 32 /* Size of I/O space 1 */
204 #define PCI230_IO2_SIZE 16 /* Size of I/O space 2 */
206 /* PCI230 i/o space 1 registers. */
207 #define PCI230_PPI_X_BASE 0x00 /* User PPI (82C55) base */
208 #define PCI230_PPI_X_A 0x00 /* User PPI (82C55) port A */
209 #define PCI230_PPI_X_B 0x01 /* User PPI (82C55) port B */
210 #define PCI230_PPI_X_C 0x02 /* User PPI (82C55) port C */
211 #define PCI230_PPI_X_CMD 0x03 /* User PPI (82C55) control word */
212 #define PCI230_Z2_CT_BASE 0x14 /* 82C54 counter/timer base */
213 #define PCI230_Z2_CT0 0x14 /* 82C54 counter/timer 0 */
214 #define PCI230_Z2_CT1 0x15 /* 82C54 counter/timer 1 */
215 #define PCI230_Z2_CT2 0x16 /* 82C54 counter/timer 2 */
216 #define PCI230_Z2_CTC 0x17 /* 82C54 counter/timer control word */
217 #define PCI230_ZCLK_SCE 0x1A /* Group Z Clock Configuration */
218 #define PCI230_ZGAT_SCE 0x1D /* Group Z Gate Configuration */
219 #define PCI230_INT_SCE 0x1E /* Interrupt source mask (w) */
220 #define PCI230_INT_STAT 0x1E /* Interrupt status (r) */
222 /* PCI230 i/o space 2 registers. */
223 #define PCI230_DACCON 0x00 /* DAC control */
224 #define PCI230_DACOUT1 0x02 /* DAC channel 0 (w) */
225 #define PCI230_DACOUT2 0x04 /* DAC channel 1 (w) (not FIFO mode) */
226 #define PCI230_ADCDATA 0x08 /* ADC data (r) */
227 #define PCI230_ADCSWTRIG 0x08 /* ADC software trigger (w) */
228 #define PCI230_ADCCON 0x0A /* ADC control */
229 #define PCI230_ADCEN 0x0C /* ADC channel enable bits */
230 #define PCI230_ADCG 0x0E /* ADC gain control bits */
231 /* PCI230+ i/o space 2 additional registers. */
232 #define PCI230P_ADCTRIG 0x10 /* ADC start acquisition trigger */
233 #define PCI230P_ADCTH 0x12 /* ADC analog trigger threshold */
234 #define PCI230P_ADCFFTH 0x14 /* ADC FIFO interrupt threshold */
235 #define PCI230P_ADCFFLEV 0x16 /* ADC FIFO level (r) */
236 #define PCI230P_ADCPTSC 0x18 /* ADC pre-trigger sample count (r) */
237 #define PCI230P_ADCHYST 0x1A /* ADC analog trigger hysteresys */
238 #define PCI230P_EXTFUNC 0x1C /* Extended functions */
239 #define PCI230P_HWVER 0x1E /* Hardware version (r) */
240 /* PCI230+ hardware version 2 onwards. */
241 #define PCI230P2_DACDATA 0x02 /* DAC data (FIFO mode) (w) */
242 #define PCI230P2_DACSWTRIG 0x02 /* DAC soft trigger (FIFO mode) (r) */
243 #define PCI230P2_DACEN 0x06 /* DAC channel enable (FIFO mode) */
245 /* Convertor related constants. */
246 #define PCI230_DAC_SETTLE 5 /* Analogue output settling time in µs */
247 /* (DAC itself is 1µs nominally). */
248 #define PCI230_ADC_SETTLE 1 /* Analogue input settling time in µs */
249 /* (ADC itself is 1.6µs nominally but we poll
251 #define PCI230_MUX_SETTLE 10 /* ADC MUX settling time in µS */
252 /* - 10µs for se, 20µs de. */
254 /* DACCON read-write values. */
255 #define PCI230_DAC_OR_UNI (0<<0) /* Output range unipolar */
256 #define PCI230_DAC_OR_BIP (1<<0) /* Output range bipolar */
257 #define PCI230_DAC_OR_MASK (1<<0)
258 /* The following applies only if DAC FIFO support is enabled in the EXTFUNC
259 * register (and only for PCI230+ hardware version 2 onwards). */
260 #define PCI230P2_DAC_FIFO_EN (1<<8) /* FIFO enable */
261 /* The following apply only if the DAC FIFO is enabled (and only for PCI230+
262 * hardware version 2 onwards). */
263 #define PCI230P2_DAC_TRIG_NONE (0<<2) /* No trigger */
264 #define PCI230P2_DAC_TRIG_SW (1<<2) /* Software trigger trigger */
265 #define PCI230P2_DAC_TRIG_EXTP (2<<2) /* EXTTRIG +ve edge trigger */
266 #define PCI230P2_DAC_TRIG_EXTN (3<<2) /* EXTTRIG -ve edge trigger */
267 #define PCI230P2_DAC_TRIG_Z2CT0 (4<<2) /* CT0-OUT +ve edge trigger */
268 #define PCI230P2_DAC_TRIG_Z2CT1 (5<<2) /* CT1-OUT +ve edge trigger */
269 #define PCI230P2_DAC_TRIG_Z2CT2 (6<<2) /* CT2-OUT +ve edge trigger */
270 #define PCI230P2_DAC_TRIG_MASK (7<<2)
271 #define PCI230P2_DAC_FIFO_WRAP (1<<7) /* FIFO wraparound mode */
272 #define PCI230P2_DAC_INT_FIFO_EMPTY (0<<9) /* FIFO interrupt empty */
273 #define PCI230P2_DAC_INT_FIFO_NEMPTY (1<<9)
274 #define PCI230P2_DAC_INT_FIFO_NHALF (2<<9) /* FIFO intr not half full */
275 #define PCI230P2_DAC_INT_FIFO_HALF (3<<9)
276 #define PCI230P2_DAC_INT_FIFO_NFULL (4<<9) /* FIFO interrupt not full */
277 #define PCI230P2_DAC_INT_FIFO_FULL (5<<9)
278 #define PCI230P2_DAC_INT_FIFO_MASK (7<<9)
280 /* DACCON read-only values. */
281 #define PCI230_DAC_BUSY (1<<1) /* DAC busy. */
282 /* The following apply only if the DAC FIFO is enabled (and only for PCI230+
283 * hardware version 2 onwards). */
284 #define PCI230P2_DAC_FIFO_UNDERRUN_LATCHED (1<<5) /* Underrun error */
285 #define PCI230P2_DAC_FIFO_EMPTY (1<<13) /* FIFO empty */
286 #define PCI230P2_DAC_FIFO_FULL (1<<14) /* FIFO full */
287 #define PCI230P2_DAC_FIFO_HALF (1<<15) /* FIFO half full */
289 /* DACCON write-only, transient values. */
290 /* The following apply only if the DAC FIFO is enabled (and only for PCI230+
291 * hardware version 2 onwards). */
292 #define PCI230P2_DAC_FIFO_UNDERRUN_CLEAR (1<<5) /* Clear underrun */
293 #define PCI230P2_DAC_FIFO_RESET (1<<12) /* FIFO reset */
295 /* PCI230+ hardware version 2 DAC FIFO levels. */
296 #define PCI230P2_DAC_FIFOLEVEL_HALF 512
297 #define PCI230P2_DAC_FIFOLEVEL_FULL 1024
298 /* Free space in DAC FIFO. */
299 #define PCI230P2_DAC_FIFOROOM_EMPTY PCI230P2_DAC_FIFOLEVEL_FULL
300 #define PCI230P2_DAC_FIFOROOM_ONETOHALF \
301 (PCI230P2_DAC_FIFOLEVEL_FULL - PCI230P2_DAC_FIFOLEVEL_HALF)
302 #define PCI230P2_DAC_FIFOROOM_HALFTOFULL 1
303 #define PCI230P2_DAC_FIFOROOM_FULL 0
305 /* ADCCON read/write values. */
306 #define PCI230_ADC_TRIG_NONE (0<<0) /* No trigger */
307 #define PCI230_ADC_TRIG_SW (1<<0) /* Software trigger trigger */
308 #define PCI230_ADC_TRIG_EXTP (2<<0) /* EXTTRIG +ve edge trigger */
309 #define PCI230_ADC_TRIG_EXTN (3<<0) /* EXTTRIG -ve edge trigger */
310 #define PCI230_ADC_TRIG_Z2CT0 (4<<0) /* CT0-OUT +ve edge trigger */
311 #define PCI230_ADC_TRIG_Z2CT1 (5<<0) /* CT1-OUT +ve edge trigger */
312 #define PCI230_ADC_TRIG_Z2CT2 (6<<0) /* CT2-OUT +ve edge trigger */
313 #define PCI230_ADC_TRIG_MASK (7<<0)
314 #define PCI230_ADC_IR_UNI (0<<3) /* Input range unipolar */
315 #define PCI230_ADC_IR_BIP (1<<3) /* Input range bipolar */
316 #define PCI230_ADC_IR_MASK (1<<3)
317 #define PCI230_ADC_IM_SE (0<<4) /* Input mode single ended */
318 #define PCI230_ADC_IM_DIF (1<<4) /* Input mode differential */
319 #define PCI230_ADC_IM_MASK (1<<4)
320 #define PCI230_ADC_FIFO_EN (1<<8) /* FIFO enable */
321 #define PCI230_ADC_INT_FIFO_EMPTY (0<<9)
322 #define PCI230_ADC_INT_FIFO_NEMPTY (1<<9) /* FIFO interrupt not empty */
323 #define PCI230_ADC_INT_FIFO_NHALF (2<<9)
324 #define PCI230_ADC_INT_FIFO_HALF (3<<9) /* FIFO interrupt half full */
325 #define PCI230_ADC_INT_FIFO_NFULL (4<<9)
326 #define PCI230_ADC_INT_FIFO_FULL (5<<9) /* FIFO interrupt full */
327 #define PCI230P_ADC_INT_FIFO_THRESH (7<<9) /* FIFO interrupt threshold */
328 #define PCI230_ADC_INT_FIFO_MASK (7<<9)
330 /* ADCCON write-only, transient values. */
331 #define PCI230_ADC_FIFO_RESET (1<<12) /* FIFO reset */
332 #define PCI230_ADC_GLOB_RESET (1<<13) /* Global reset */
334 /* ADCCON read-only values. */
335 #define PCI230_ADC_BUSY (1<<15) /* ADC busy */
336 #define PCI230_ADC_FIFO_EMPTY (1<<12) /* FIFO empty */
337 #define PCI230_ADC_FIFO_FULL (1<<13) /* FIFO full */
338 #define PCI230_ADC_FIFO_HALF (1<<14) /* FIFO half full */
339 #define PCI230_ADC_FIFO_FULL_LATCHED (1<<5) /* Indicates overrun occurred */
341 /* PCI230 ADC FIFO levels. */
342 #define PCI230_ADC_FIFOLEVEL_HALFFULL 2049 /* Value for FIFO half full */
343 #define PCI230_ADC_FIFOLEVEL_FULL 4096 /* FIFO size */
345 /* Value to write to ADCSWTRIG to trigger ADC conversion in software trigger
346 * mode. Can be anything. */
347 #define PCI230_ADC_CONV 0xffff
349 /* PCI230+ EXTFUNC values. */
350 #define PCI230P_EXTFUNC_GAT_EXTTRIG (1<<0)
351 /* Route EXTTRIG pin to external gate inputs. */
352 /* PCI230+ hardware version 2 values. */
353 #define PCI230P2_EXTFUNC_DACFIFO (1<<1)
354 /* Allow DAC FIFO to be enabled. */
357 * Counter/timer clock input configuration sources.
359 #define CLK_CLK 0 /* reserved (channel-specific clock) */
360 #define CLK_10MHZ 1 /* internal 10 MHz clock */
361 #define CLK_1MHZ 2 /* internal 1 MHz clock */
362 #define CLK_100KHZ 3 /* internal 100 kHz clock */
363 #define CLK_10KHZ 4 /* internal 10 kHz clock */
364 #define CLK_1KHZ 5 /* internal 1 kHz clock */
365 #define CLK_OUTNM1 6 /* output of channel-1 modulo total */
366 #define CLK_EXT 7 /* external clock */
367 /* Macro to construct clock input configuration register value. */
368 #define CLK_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
369 /* Timebases in ns. */
370 #define TIMEBASE_10MHZ 100
371 #define TIMEBASE_1MHZ 1000
372 #define TIMEBASE_100KHZ 10000
373 #define TIMEBASE_10KHZ 100000
374 #define TIMEBASE_1KHZ 1000000
377 * Counter/timer gate input configuration sources.
379 #define GAT_VCC 0 /* VCC (i.e. enabled) */
380 #define GAT_GND 1 /* GND (i.e. disabled) */
381 #define GAT_EXT 2 /* external gate input (PPCn on PCI230) */
382 #define GAT_NOUTNM2 3 /* inverted output of channel-2 modulo total */
383 /* Macro to construct gate input configuration register value. */
384 #define GAT_CONFIG(chan, src) ((((chan) & 3) << 3) | ((src) & 7))
387 * Summary of CLK_OUTNM1 and GAT_NOUTNM2 connections for PCI230 and PCI260:
389 * Channel's Channel's
390 * clock input gate input
391 * Channel CLK_OUTNM1 GAT_NOUTNM2
392 * ------- ---------- -----------
393 * Z2-CT0 Z2-CT2-OUT /Z2-CT1-OUT
394 * Z2-CT1 Z2-CT0-OUT /Z2-CT2-OUT
395 * Z2-CT2 Z2-CT1-OUT /Z2-CT0-OUT
398 /* Interrupt enables/status register values. */
399 #define PCI230_INT_DISABLE 0
400 #define PCI230_INT_PPI_C0 (1<<0)
401 #define PCI230_INT_PPI_C3 (1<<1)
402 #define PCI230_INT_ADC (1<<2)
403 #define PCI230_INT_ZCLK_CT1 (1<<5)
404 /* For PCI230+ hardware version 2 when DAC FIFO enabled. */
405 #define PCI230P2_INT_DAC (1<<4)
407 #define PCI230_TEST_BIT(val, n) ((val>>n)&1)
408 /* Assumes bits numbered with zero offset, ie. 0-15 */
410 /* (Potentially) shared resources and their owners */
412 RES_Z2CT0, /* Z2-CT0 */
413 RES_Z2CT1, /* Z2-CT1 */
414 RES_Z2CT2, /* Z2-CT2 */
415 NUM_RESOURCES /* Number of (potentially) shared resources. */
419 OWNER_NONE, /* Not owned */
420 OWNER_AICMD, /* Owned by AI command */
421 OWNER_AOCMD /* Owned by AO command */
428 /* Combine old and new bits. */
429 #define COMBINE(old, new, mask) (((old) & ~(mask)) | ((new) & (mask)))
431 /* Current CPU. XXX should this be hard_smp_processor_id()? */
432 #define THISCPU smp_processor_id()
434 /* State flags for atomic bit operations */
435 #define AI_CMD_STARTED 0
436 #define AO_CMD_STARTED 1
439 * Board descriptions for the two boards supported.
442 struct pci230_board {
450 unsigned int min_hwver; /* Minimum hardware version supported. */
452 static const struct pci230_board pci230_boards[] = {
455 .id = PCI_DEVICE_ID_PCI230,
465 .id = PCI_DEVICE_ID_PCI260,
475 .id = PCI_DEVICE_ID_PCI230,
484 .id = PCI_DEVICE_ID_PCI260,
492 .name = "amplc_pci230", /* Wildcard matches any above */
493 .id = PCI_DEVICE_ID_INVALID,
497 /* this structure is for data unique to this hardware driver. If
498 several hardware drivers keep similar information in this structure,
499 feel free to suggest moving the variable to the struct comedi_device struct. */
500 struct pci230_private {
501 spinlock_t isr_spinlock; /* Interrupt spin lock */
502 spinlock_t res_spinlock; /* Shared resources spin lock */
503 spinlock_t ai_stop_spinlock; /* Spin lock for stopping AI command */
504 spinlock_t ao_stop_spinlock; /* Spin lock for stopping AO command */
505 unsigned long state; /* State flags */
506 unsigned long iobase1; /* PCI230's I/O space 1 */
507 unsigned int ao_readback[2]; /* Used for AO readback */
508 unsigned int ai_scan_count; /* Number of analogue input scans
510 unsigned int ai_scan_pos; /* Current position within analogue
512 unsigned int ao_scan_count; /* Number of analogue output scans
514 int intr_cpuid; /* ID of CPU running interrupt routine. */
515 unsigned short hwver; /* Hardware version (for '+' models). */
516 unsigned short adccon; /* ADCCON register value. */
517 unsigned short daccon; /* DACCON register value. */
518 unsigned short adcfifothresh; /* ADC FIFO programmable interrupt
519 * level threshold (PCI230+/260+). */
520 unsigned short adcg; /* ADCG register value. */
521 unsigned char int_en; /* Interrupt enables bits. */
522 unsigned char ai_continuous; /* Flag set when cmd->stop_src ==
523 * TRIG_NONE - user chooses to stop
524 * continuous conversion by
526 unsigned char ao_continuous; /* Flag set when cmd->stop_src ==
527 * TRIG_NONE - user chooses to stop
528 * continuous conversion by
530 unsigned char ai_bipolar; /* Set if bipolar input range so we
531 * know to mangle it. */
532 unsigned char ao_bipolar; /* Set if bipolar output range so we
533 * know to mangle it. */
534 unsigned char ier; /* Copy of interrupt enables/status register. */
535 unsigned char intr_running; /* Flag set in interrupt routine. */
536 unsigned char res_owner[NUM_RESOURCES]; /* Shared resource owners. */
539 /* PCI230 clock source periods in ns */
540 static const unsigned int pci230_timebase[8] = {
541 [CLK_10MHZ] = TIMEBASE_10MHZ,
542 [CLK_1MHZ] = TIMEBASE_1MHZ,
543 [CLK_100KHZ] = TIMEBASE_100KHZ,
544 [CLK_10KHZ] = TIMEBASE_10KHZ,
545 [CLK_1KHZ] = TIMEBASE_1KHZ,
548 /* PCI230 analogue input range table */
549 static const struct comedi_lrange pci230_ai_range = { 7, {
560 /* PCI230 analogue gain bits for each input range. */
561 static const unsigned char pci230_ai_gain[7] = { 0, 1, 2, 3, 1, 2, 3 };
563 /* PCI230 adccon bipolar flag for each analogue input range. */
564 static const unsigned char pci230_ai_bipolar[7] = { 1, 1, 1, 1, 0, 0, 0 };
566 /* PCI230 analogue output range table */
567 static const struct comedi_lrange pci230_ao_range = { 2, {
573 /* PCI230 daccon bipolar flag for each analogue output range. */
574 static const unsigned char pci230_ao_bipolar[2] = { 0, 1 };
576 static unsigned short pci230_ai_read(struct comedi_device *dev)
578 const struct pci230_board *thisboard = comedi_board(dev);
579 struct pci230_private *devpriv = dev->private;
583 data = inw(dev->iobase + PCI230_ADCDATA);
584 /* PCI230 is 12 bit - stored in upper bits of 16 bit register (lower
585 * four bits reserved for expansion). */
586 /* PCI230+ is 16 bit AI. */
587 data = data >> (16 - thisboard->ai_bits);
589 /* If a bipolar range was specified, mangle it (twos
590 * complement->straight binary). */
591 if (devpriv->ai_bipolar)
592 data ^= 1 << (thisboard->ai_bits - 1);
597 static inline unsigned short pci230_ao_mangle_datum(struct comedi_device *dev,
598 unsigned short datum)
600 const struct pci230_board *thisboard = comedi_board(dev);
601 struct pci230_private *devpriv = dev->private;
603 /* If a bipolar range was specified, mangle it (straight binary->twos
605 if (devpriv->ao_bipolar)
606 datum ^= 1 << (thisboard->ao_bits - 1);
608 /* PCI230 is 12 bit - stored in upper bits of 16 bit register (lower
609 * four bits reserved for expansion). */
610 /* PCI230+ is also 12 bit AO. */
611 datum <<= (16 - thisboard->ao_bits);
615 static inline void pci230_ao_write_nofifo(struct comedi_device *dev,
616 unsigned short datum,
619 struct pci230_private *devpriv = dev->private;
621 /* Store unmangled datum to be read back later. */
622 devpriv->ao_readback[chan] = datum;
624 /* Write mangled datum to appropriate DACOUT register. */
625 outw(pci230_ao_mangle_datum(dev, datum), dev->iobase + (((chan) == 0)
631 static inline void pci230_ao_write_fifo(struct comedi_device *dev,
632 unsigned short datum, unsigned int chan)
634 struct pci230_private *devpriv = dev->private;
636 /* Store unmangled datum to be read back later. */
637 devpriv->ao_readback[chan] = datum;
639 /* Write mangled datum to appropriate DACDATA register. */
640 outw(pci230_ao_mangle_datum(dev, datum),
641 dev->iobase + PCI230P2_DACDATA);
644 static int get_resources(struct comedi_device *dev, unsigned int res_mask,
647 struct pci230_private *devpriv = dev->private;
651 unsigned int claimed;
652 unsigned long irqflags;
656 spin_lock_irqsave(&devpriv->res_spinlock, irqflags);
657 for (b = 1, i = 0; (i < NUM_RESOURCES)
658 && (res_mask != 0); b <<= 1, i++) {
659 if ((res_mask & b) != 0) {
661 if (devpriv->res_owner[i] == OWNER_NONE) {
662 devpriv->res_owner[i] = owner;
664 } else if (devpriv->res_owner[i] != owner) {
665 for (b = 1, i = 0; claimed != 0; b <<= 1, i++) {
666 if ((claimed & b) != 0) {
667 devpriv->res_owner[i]
677 spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags);
681 static inline int get_one_resource(struct comedi_device *dev,
682 unsigned int resource, unsigned char owner)
684 return get_resources(dev, (1U << resource), owner);
687 static void put_resources(struct comedi_device *dev, unsigned int res_mask,
690 struct pci230_private *devpriv = dev->private;
693 unsigned long irqflags;
695 spin_lock_irqsave(&devpriv->res_spinlock, irqflags);
696 for (b = 1, i = 0; (i < NUM_RESOURCES)
697 && (res_mask != 0); b <<= 1, i++) {
698 if ((res_mask & b) != 0) {
700 if (devpriv->res_owner[i] == owner)
701 devpriv->res_owner[i] = OWNER_NONE;
705 spin_unlock_irqrestore(&devpriv->res_spinlock, irqflags);
708 static inline void put_one_resource(struct comedi_device *dev,
709 unsigned int resource, unsigned char owner)
711 put_resources(dev, (1U << resource), owner);
714 static inline void put_all_resources(struct comedi_device *dev,
717 put_resources(dev, (1U << NUM_RESOURCES) - 1, owner);
720 static unsigned int divide_ns(uint64_t ns, unsigned int timebase,
721 unsigned int round_mode)
727 rem = do_div(div, timebase);
728 round_mode &= TRIG_ROUND_MASK;
729 switch (round_mode) {
731 case TRIG_ROUND_NEAREST:
732 div += (rem + (timebase / 2)) / timebase;
734 case TRIG_ROUND_DOWN:
737 div += (rem + timebase - 1) / timebase;
740 return div > UINT_MAX ? UINT_MAX : (unsigned int)div;
743 /* Given desired period in ns, returns the required internal clock source
744 * and gets the initial count. */
745 static unsigned int pci230_choose_clk_count(uint64_t ns, unsigned int *count,
746 unsigned int round_mode)
748 unsigned int clk_src, cnt;
750 for (clk_src = CLK_10MHZ;; clk_src++) {
751 cnt = divide_ns(ns, pci230_timebase[clk_src], round_mode);
752 if ((cnt <= 65536) || (clk_src == CLK_1KHZ))
760 static void pci230_ns_to_single_timer(unsigned int *ns, unsigned int round)
763 unsigned int clk_src;
765 clk_src = pci230_choose_clk_count(*ns, &count, round);
766 *ns = count * pci230_timebase[clk_src];
770 static void pci230_ct_setup_ns_mode(struct comedi_device *dev, unsigned int ct,
771 unsigned int mode, uint64_t ns,
774 struct pci230_private *devpriv = dev->private;
775 unsigned int clk_src;
779 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, ct, mode);
780 /* Determine clock source and count. */
781 clk_src = pci230_choose_clk_count(ns, &count, round);
782 /* Program clock source. */
783 outb(CLK_CONFIG(ct, clk_src), devpriv->iobase1 + PCI230_ZCLK_SCE);
784 /* Set initial count. */
788 i8254_write(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, ct, count);
791 static void pci230_cancel_ct(struct comedi_device *dev, unsigned int ct)
793 struct pci230_private *devpriv = dev->private;
795 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, ct,
797 /* Counter ct, 8254 mode 1, initial count not written. */
801 * COMEDI_SUBD_AI instruction;
803 static int pci230_ai_rinsn(struct comedi_device *dev,
804 struct comedi_subdevice *s, struct comedi_insn *insn,
807 struct pci230_private *devpriv = dev->private;
809 unsigned int chan, range, aref;
810 unsigned int gainshift;
812 unsigned short adccon, adcen;
814 /* Unpack channel and range. */
815 chan = CR_CHAN(insn->chanspec);
816 range = CR_RANGE(insn->chanspec);
817 aref = CR_AREF(insn->chanspec);
818 if (aref == AREF_DIFF) {
820 if (chan >= s->n_chan / 2) {
821 dev_dbg(dev->class_dev,
822 "%s: differential channel number out of range 0 to %u\n",
823 __func__, (s->n_chan / 2) - 1);
828 /* Use Z2-CT2 as a conversion trigger instead of the built-in
829 * software trigger, as otherwise triggering of differential channels
830 * doesn't work properly for some versions of PCI230/260. Also set
831 * FIFO mode because the ADC busy bit only works for software triggers.
833 adccon = PCI230_ADC_TRIG_Z2CT2 | PCI230_ADC_FIFO_EN;
834 /* Set Z2-CT2 output low to avoid any false triggers. */
835 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE0);
836 devpriv->ai_bipolar = pci230_ai_bipolar[range];
837 if (aref == AREF_DIFF) {
839 gainshift = chan * 2;
840 if (devpriv->hwver == 0) {
841 /* Original PCI230/260 expects both inputs of the
842 * differential channel to be enabled. */
843 adcen = 3 << gainshift;
845 /* PCI230+/260+ expects only one input of the
846 * differential channel to be enabled. */
847 adcen = 1 << gainshift;
849 adccon |= PCI230_ADC_IM_DIF;
853 gainshift = chan & ~1;
854 adccon |= PCI230_ADC_IM_SE;
856 devpriv->adcg = (devpriv->adcg & ~(3 << gainshift))
857 | (pci230_ai_gain[range] << gainshift);
858 if (devpriv->ai_bipolar)
859 adccon |= PCI230_ADC_IR_BIP;
861 adccon |= PCI230_ADC_IR_UNI;
864 /* Enable only this channel in the scan list - otherwise by default
865 * we'll get one sample from each channel. */
866 outw(adcen, dev->iobase + PCI230_ADCEN);
868 /* Set gain for channel. */
869 outw(devpriv->adcg, dev->iobase + PCI230_ADCG);
871 /* Specify uni/bip, se/diff, conversion source, and reset FIFO. */
872 devpriv->adccon = adccon;
873 outw(adccon | PCI230_ADC_FIFO_RESET, dev->iobase + PCI230_ADCCON);
875 /* Convert n samples */
876 for (n = 0; n < insn->n; n++) {
877 /* Trigger conversion by toggling Z2-CT2 output (finish with
879 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, 2,
881 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, 2,
885 /* wait for conversion to end */
886 for (i = 0; i < TIMEOUT; i++) {
887 status = inw(dev->iobase + PCI230_ADCCON);
888 if (!(status & PCI230_ADC_FIFO_EMPTY))
893 dev_err(dev->class_dev, "timeout\n");
898 data[n] = pci230_ai_read(dev);
901 /* return the number of samples read/written */
906 * COMEDI_SUBD_AO instructions;
908 static int pci230_ao_winsn(struct comedi_device *dev,
909 struct comedi_subdevice *s, struct comedi_insn *insn,
912 struct pci230_private *devpriv = dev->private;
916 /* Unpack channel and range. */
917 chan = CR_CHAN(insn->chanspec);
918 range = CR_RANGE(insn->chanspec);
920 /* Set range - see analogue output range table; 0 => unipolar 10V,
921 * 1 => bipolar +/-10V range scale */
922 devpriv->ao_bipolar = pci230_ao_bipolar[range];
923 outw(range, dev->iobase + PCI230_DACCON);
925 /* Writing a list of values to an AO channel is probably not
926 * very useful, but that's how the interface is defined. */
927 for (i = 0; i < insn->n; i++) {
928 /* Write value to DAC and store it. */
929 pci230_ao_write_nofifo(dev, data[i], chan);
932 /* return the number of samples read/written */
936 /* AO subdevices should have a read insn as well as a write insn.
937 * Usually this means copying a value stored in devpriv. */
938 static int pci230_ao_rinsn(struct comedi_device *dev,
939 struct comedi_subdevice *s, struct comedi_insn *insn,
942 struct pci230_private *devpriv = dev->private;
944 int chan = CR_CHAN(insn->chanspec);
946 for (i = 0; i < insn->n; i++)
947 data[i] = devpriv->ao_readback[chan];
952 static int pci230_ao_cmdtest(struct comedi_device *dev,
953 struct comedi_subdevice *s, struct comedi_cmd *cmd)
955 const struct pci230_board *thisboard = comedi_board(dev);
956 struct pci230_private *devpriv = dev->private;
960 /* Step 1 : check if triggers are trivially valid */
962 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT);
964 tmp = TRIG_TIMER | TRIG_INT;
965 if ((thisboard->min_hwver > 0) && (devpriv->hwver >= 2)) {
967 * For PCI230+ hardware version 2 onwards, allow external
968 * trigger from EXTTRIG/EXTCONVCLK input (PCI230+ pin 25).
970 * FIXME: The permitted scan_begin_src values shouldn't depend
971 * on devpriv->hwver (the detected card's actual hardware
972 * version). They should only depend on thisboard->min_hwver
973 * (the static capabilities of the configured card). To fix
974 * it, a new card model, e.g. "pci230+2" would have to be
975 * defined with min_hwver set to 2. It doesn't seem worth it
976 * for this alone. At the moment, please consider
977 * scan_begin_src==TRIG_EXT support to be a bonus rather than a
982 err |= cfc_check_trigger_src(&cmd->scan_begin_src, tmp);
984 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
985 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
986 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
991 /* Step 2a : make sure trigger sources are unique */
993 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
994 err |= cfc_check_trigger_is_unique(cmd->stop_src);
996 /* Step 2b : and mutually compatible */
1001 /* Step 3: check if arguments are trivially valid */
1003 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1005 #define MAX_SPEED_AO 8000 /* 8000 ns => 125 kHz */
1006 #define MIN_SPEED_AO 4294967295u /* 4294967295ns = 4.29s */
1007 /*- Comedi limit due to unsigned int cmd. Driver limit
1008 * = 2^16 (16bit * counter) * 1000000ns (1kHz onboard
1009 * clock) = 65.536s */
1011 switch (cmd->scan_begin_src) {
1013 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1015 err |= cfc_check_trigger_arg_max(&cmd->scan_begin_arg,
1019 /* External trigger - for PCI230+ hardware version 2 onwards. */
1020 /* Trigger number must be 0. */
1021 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) {
1022 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1026 /* The only flags allowed are CR_EDGE and CR_INVERT. The
1027 * CR_EDGE flag is ignored. */
1028 if ((cmd->scan_begin_arg
1029 & (CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT))) != 0) {
1030 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1032 ~(CR_EDGE | CR_INVERT));
1037 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1041 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1043 if (cmd->stop_src == TRIG_NONE)
1044 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1049 /* Step 4: fix up any arguments.
1050 * "argument conflict" returned by comedilib to user mode process
1053 if (cmd->scan_begin_src == TRIG_TIMER) {
1054 tmp = cmd->scan_begin_arg;
1055 pci230_ns_to_single_timer(&cmd->scan_begin_arg,
1056 cmd->flags & TRIG_ROUND_MASK);
1057 if (tmp != cmd->scan_begin_arg)
1064 /* Step 5: check channel list if it exists. */
1066 if (cmd->chanlist && cmd->chanlist_len > 0) {
1069 range_err = (1 << 1)
1071 unsigned int errors;
1073 unsigned int chan, prev_chan;
1074 unsigned int range, first_range;
1076 prev_chan = CR_CHAN(cmd->chanlist[0]);
1077 first_range = CR_RANGE(cmd->chanlist[0]);
1079 for (n = 1; n < cmd->chanlist_len; n++) {
1080 chan = CR_CHAN(cmd->chanlist[n]);
1081 range = CR_RANGE(cmd->chanlist[n]);
1082 /* Channel numbers must strictly increase. */
1083 if (chan < prev_chan)
1086 /* Ranges must be the same. */
1087 if (range != first_range)
1088 errors |= range_err;
1094 if ((errors & seq_err) != 0) {
1095 dev_dbg(dev->class_dev,
1096 "%s: channel numbers must increase\n",
1099 if ((errors & range_err) != 0) {
1100 dev_dbg(dev->class_dev,
1101 "%s: channels must have the same range\n",
1113 static void pci230_ao_stop(struct comedi_device *dev,
1114 struct comedi_subdevice *s)
1116 struct pci230_private *devpriv = dev->private;
1117 unsigned long irqflags;
1118 unsigned char intsrc;
1120 struct comedi_cmd *cmd;
1122 spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags);
1123 started = test_and_clear_bit(AO_CMD_STARTED, &devpriv->state);
1124 spin_unlock_irqrestore(&devpriv->ao_stop_spinlock, irqflags);
1127 cmd = &s->async->cmd;
1128 if (cmd->scan_begin_src == TRIG_TIMER) {
1129 /* Stop scan rate generator. */
1130 pci230_cancel_ct(dev, 1);
1132 /* Determine interrupt source. */
1133 if (devpriv->hwver < 2) {
1134 /* Not using DAC FIFO. Using CT1 interrupt. */
1135 intsrc = PCI230_INT_ZCLK_CT1;
1137 /* Using DAC FIFO interrupt. */
1138 intsrc = PCI230P2_INT_DAC;
1140 /* Disable interrupt and wait for interrupt routine to finish running
1141 * unless we are called from the interrupt routine. */
1142 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
1143 devpriv->int_en &= ~intsrc;
1144 while (devpriv->intr_running && devpriv->intr_cpuid != THISCPU) {
1145 spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
1146 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
1148 if (devpriv->ier != devpriv->int_en) {
1149 devpriv->ier = devpriv->int_en;
1150 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE);
1152 spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
1153 if (devpriv->hwver >= 2) {
1154 /* Using DAC FIFO. Reset FIFO, clear underrun error,
1156 devpriv->daccon &= PCI230_DAC_OR_MASK;
1157 outw(devpriv->daccon | PCI230P2_DAC_FIFO_RESET
1158 | PCI230P2_DAC_FIFO_UNDERRUN_CLEAR,
1159 dev->iobase + PCI230_DACCON);
1161 /* Release resources. */
1162 put_all_resources(dev, OWNER_AOCMD);
1165 static void pci230_handle_ao_nofifo(struct comedi_device *dev,
1166 struct comedi_subdevice *s)
1168 struct pci230_private *devpriv = dev->private;
1169 unsigned short data;
1171 struct comedi_async *async = s->async;
1172 struct comedi_cmd *cmd = &async->cmd;
1174 if (!devpriv->ao_continuous && (devpriv->ao_scan_count == 0))
1176 for (i = 0; i < cmd->chanlist_len; i++) {
1177 /* Read sample from Comedi's circular buffer. */
1178 ret = comedi_buf_get(s->async, &data);
1180 s->async->events |= COMEDI_CB_OVERFLOW;
1181 pci230_ao_stop(dev, s);
1182 comedi_error(dev, "AO buffer underrun");
1185 /* Write value to DAC. */
1186 pci230_ao_write_nofifo(dev, data, CR_CHAN(cmd->chanlist[i]));
1188 async->events |= COMEDI_CB_BLOCK | COMEDI_CB_EOS;
1189 if (!devpriv->ao_continuous) {
1190 devpriv->ao_scan_count--;
1191 if (devpriv->ao_scan_count == 0) {
1192 /* End of acquisition. */
1193 async->events |= COMEDI_CB_EOA;
1194 pci230_ao_stop(dev, s);
1199 /* Loads DAC FIFO (if using it) from buffer. */
1200 /* Returns 0 if AO finished due to completion or error, 1 if still going. */
1201 static int pci230_handle_ao_fifo(struct comedi_device *dev,
1202 struct comedi_subdevice *s)
1204 struct pci230_private *devpriv = dev->private;
1205 struct comedi_async *async = s->async;
1206 struct comedi_cmd *cmd = &async->cmd;
1207 unsigned int num_scans;
1209 unsigned short dacstat;
1211 unsigned int bytes_per_scan;
1212 unsigned int events = 0;
1215 /* Get DAC FIFO status. */
1216 dacstat = inw(dev->iobase + PCI230_DACCON);
1217 /* Determine number of scans available in buffer. */
1218 bytes_per_scan = cmd->chanlist_len * sizeof(short);
1219 num_scans = comedi_buf_read_n_available(async) / bytes_per_scan;
1220 if (!devpriv->ao_continuous) {
1221 /* Fixed number of scans. */
1222 if (num_scans > devpriv->ao_scan_count)
1223 num_scans = devpriv->ao_scan_count;
1224 if (devpriv->ao_scan_count == 0) {
1225 /* End of acquisition. */
1226 events |= COMEDI_CB_EOA;
1230 /* Check for FIFO underrun. */
1231 if ((dacstat & PCI230P2_DAC_FIFO_UNDERRUN_LATCHED) != 0) {
1232 comedi_error(dev, "AO FIFO underrun");
1233 events |= COMEDI_CB_OVERFLOW | COMEDI_CB_ERROR;
1235 /* Check for buffer underrun if FIFO less than half full
1236 * (otherwise there will be loads of "DAC FIFO not half full"
1238 if ((num_scans == 0)
1239 && ((dacstat & PCI230P2_DAC_FIFO_HALF) == 0)) {
1240 comedi_error(dev, "AO buffer underrun");
1241 events |= COMEDI_CB_OVERFLOW | COMEDI_CB_ERROR;
1245 /* Determine how much room is in the FIFO (in samples). */
1246 if ((dacstat & PCI230P2_DAC_FIFO_FULL) != 0)
1247 room = PCI230P2_DAC_FIFOROOM_FULL;
1248 else if ((dacstat & PCI230P2_DAC_FIFO_HALF) != 0)
1249 room = PCI230P2_DAC_FIFOROOM_HALFTOFULL;
1250 else if ((dacstat & PCI230P2_DAC_FIFO_EMPTY) != 0)
1251 room = PCI230P2_DAC_FIFOROOM_EMPTY;
1253 room = PCI230P2_DAC_FIFOROOM_ONETOHALF;
1254 /* Convert room to number of scans that can be added. */
1255 room /= cmd->chanlist_len;
1256 /* Determine number of scans to process. */
1257 if (num_scans > room)
1259 /* Process scans. */
1260 for (n = 0; n < num_scans; n++) {
1261 for (i = 0; i < cmd->chanlist_len; i++) {
1262 unsigned short datum;
1264 comedi_buf_get(async, &datum);
1265 pci230_ao_write_fifo(dev, datum,
1266 CR_CHAN(cmd->chanlist[i]));
1269 events |= COMEDI_CB_EOS | COMEDI_CB_BLOCK;
1270 if (!devpriv->ao_continuous) {
1271 devpriv->ao_scan_count -= num_scans;
1272 if (devpriv->ao_scan_count == 0) {
1273 /* All data for the command has been written
1274 * to FIFO. Set FIFO interrupt trigger level
1276 devpriv->daccon = (devpriv->daccon
1278 ~PCI230P2_DAC_INT_FIFO_MASK)
1279 | PCI230P2_DAC_INT_FIFO_EMPTY;
1280 outw(devpriv->daccon,
1281 dev->iobase + PCI230_DACCON);
1284 /* Check if FIFO underrun occurred while writing to FIFO. */
1285 dacstat = inw(dev->iobase + PCI230_DACCON);
1286 if ((dacstat & PCI230P2_DAC_FIFO_UNDERRUN_LATCHED) != 0) {
1287 comedi_error(dev, "AO FIFO underrun");
1288 events |= COMEDI_CB_OVERFLOW | COMEDI_CB_ERROR;
1291 if ((events & (COMEDI_CB_EOA | COMEDI_CB_ERROR | COMEDI_CB_OVERFLOW))
1293 /* Stopping AO due to completion or error. */
1294 pci230_ao_stop(dev, s);
1299 async->events |= events;
1303 static int pci230_ao_inttrig_scan_begin(struct comedi_device *dev,
1304 struct comedi_subdevice *s,
1305 unsigned int trig_num)
1307 struct pci230_private *devpriv = dev->private;
1308 unsigned long irqflags;
1313 spin_lock_irqsave(&devpriv->ao_stop_spinlock, irqflags);
1314 if (test_bit(AO_CMD_STARTED, &devpriv->state)) {
1316 if (devpriv->hwver < 2) {
1317 /* Not using DAC FIFO. */
1318 spin_unlock_irqrestore(&devpriv->ao_stop_spinlock,
1320 pci230_handle_ao_nofifo(dev, s);
1321 comedi_event(dev, s);
1323 /* Using DAC FIFO. */
1324 /* Read DACSWTRIG register to trigger conversion. */
1325 inw(dev->iobase + PCI230P2_DACSWTRIG);
1326 spin_unlock_irqrestore(&devpriv->ao_stop_spinlock,
1329 /* Delay. Should driver be responsible for this? */
1330 /* XXX TODO: See if DAC busy bit can be used. */
1333 spin_unlock_irqrestore(&devpriv->ao_stop_spinlock, irqflags);
1339 static void pci230_ao_start(struct comedi_device *dev,
1340 struct comedi_subdevice *s)
1342 struct pci230_private *devpriv = dev->private;
1343 struct comedi_async *async = s->async;
1344 struct comedi_cmd *cmd = &async->cmd;
1345 unsigned long irqflags;
1347 set_bit(AO_CMD_STARTED, &devpriv->state);
1348 if (!devpriv->ao_continuous && (devpriv->ao_scan_count == 0)) {
1349 /* An empty acquisition! */
1350 async->events |= COMEDI_CB_EOA;
1351 pci230_ao_stop(dev, s);
1352 comedi_event(dev, s);
1354 if (devpriv->hwver >= 2) {
1355 /* Using DAC FIFO. */
1356 unsigned short scantrig;
1359 /* Preload FIFO data. */
1360 run = pci230_handle_ao_fifo(dev, s);
1361 comedi_event(dev, s);
1366 /* Set scan trigger source. */
1367 switch (cmd->scan_begin_src) {
1369 scantrig = PCI230P2_DAC_TRIG_Z2CT1;
1372 /* Trigger on EXTTRIG/EXTCONVCLK pin. */
1373 if ((cmd->scan_begin_arg & CR_INVERT) == 0) {
1375 scantrig = PCI230P2_DAC_TRIG_EXTP;
1378 scantrig = PCI230P2_DAC_TRIG_EXTN;
1382 scantrig = PCI230P2_DAC_TRIG_SW;
1385 /* Shouldn't get here. */
1386 scantrig = PCI230P2_DAC_TRIG_NONE;
1389 devpriv->daccon = (devpriv->daccon
1390 & ~PCI230P2_DAC_TRIG_MASK) |
1392 outw(devpriv->daccon, dev->iobase + PCI230_DACCON);
1395 switch (cmd->scan_begin_src) {
1397 if (devpriv->hwver < 2) {
1398 /* Not using DAC FIFO. */
1399 /* Enable CT1 timer interrupt. */
1400 spin_lock_irqsave(&devpriv->isr_spinlock,
1402 devpriv->int_en |= PCI230_INT_ZCLK_CT1;
1403 devpriv->ier |= PCI230_INT_ZCLK_CT1;
1405 devpriv->iobase1 + PCI230_INT_SCE);
1406 spin_unlock_irqrestore(&devpriv->isr_spinlock,
1409 /* Set CT1 gate high to start counting. */
1410 outb(GAT_CONFIG(1, GAT_VCC),
1411 devpriv->iobase1 + PCI230_ZGAT_SCE);
1414 async->inttrig = pci230_ao_inttrig_scan_begin;
1417 if (devpriv->hwver >= 2) {
1418 /* Using DAC FIFO. Enable DAC FIFO interrupt. */
1419 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
1420 devpriv->int_en |= PCI230P2_INT_DAC;
1421 devpriv->ier |= PCI230P2_INT_DAC;
1422 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE);
1423 spin_unlock_irqrestore(&devpriv->isr_spinlock,
1429 static int pci230_ao_inttrig_start(struct comedi_device *dev,
1430 struct comedi_subdevice *s,
1431 unsigned int trig_num)
1436 s->async->inttrig = NULL;
1437 pci230_ao_start(dev, s);
1442 static int pci230_ao_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
1444 struct pci230_private *devpriv = dev->private;
1445 unsigned short daccon;
1448 /* Get the command. */
1449 struct comedi_cmd *cmd = &s->async->cmd;
1451 if (cmd->scan_begin_src == TRIG_TIMER) {
1453 if (!get_one_resource(dev, RES_Z2CT1, OWNER_AOCMD))
1458 /* Get number of scans required. */
1459 if (cmd->stop_src == TRIG_COUNT) {
1460 devpriv->ao_scan_count = cmd->stop_arg;
1461 devpriv->ao_continuous = 0;
1463 /* TRIG_NONE, user calls cancel. */
1464 devpriv->ao_scan_count = 0;
1465 devpriv->ao_continuous = 1;
1468 /* Set range - see analogue output range table; 0 => unipolar 10V,
1469 * 1 => bipolar +/-10V range scale */
1470 range = CR_RANGE(cmd->chanlist[0]);
1471 devpriv->ao_bipolar = pci230_ao_bipolar[range];
1472 daccon = devpriv->ao_bipolar ? PCI230_DAC_OR_BIP : PCI230_DAC_OR_UNI;
1473 /* Use DAC FIFO for hardware version 2 onwards. */
1474 if (devpriv->hwver >= 2) {
1475 unsigned short dacen;
1479 for (i = 0; i < cmd->chanlist_len; i++)
1480 dacen |= 1 << CR_CHAN(cmd->chanlist[i]);
1482 /* Set channel scan list. */
1483 outw(dacen, dev->iobase + PCI230P2_DACEN);
1486 * Set DAC scan source to 'none'.
1487 * Set DAC FIFO interrupt trigger level to 'not half full'.
1488 * Reset DAC FIFO and clear underrun.
1490 * N.B. DAC FIFO interrupts are currently disabled.
1492 daccon |= PCI230P2_DAC_FIFO_EN | PCI230P2_DAC_FIFO_RESET
1493 | PCI230P2_DAC_FIFO_UNDERRUN_CLEAR
1494 | PCI230P2_DAC_TRIG_NONE | PCI230P2_DAC_INT_FIFO_NHALF;
1498 outw(daccon, dev->iobase + PCI230_DACCON);
1499 /* Preserve most of DACCON apart from write-only, transient bits. */
1500 devpriv->daccon = daccon
1501 & ~(PCI230P2_DAC_FIFO_RESET | PCI230P2_DAC_FIFO_UNDERRUN_CLEAR);
1503 if (cmd->scan_begin_src == TRIG_TIMER) {
1504 /* Set the counter timer 1 to the specified scan frequency. */
1505 /* cmd->scan_begin_arg is sampling period in ns */
1506 /* gate it off for now. */
1507 outb(GAT_CONFIG(1, GAT_GND),
1508 devpriv->iobase1 + PCI230_ZGAT_SCE);
1509 pci230_ct_setup_ns_mode(dev, 1, I8254_MODE3,
1510 cmd->scan_begin_arg,
1511 cmd->flags & TRIG_ROUND_MASK);
1514 /* N.B. cmd->start_src == TRIG_INT */
1515 s->async->inttrig = pci230_ao_inttrig_start;
1520 static int pci230_ao_cancel(struct comedi_device *dev,
1521 struct comedi_subdevice *s)
1523 pci230_ao_stop(dev, s);
1527 static int pci230_ai_check_scan_period(struct comedi_cmd *cmd)
1529 unsigned int min_scan_period, chanlist_len;
1532 chanlist_len = cmd->chanlist_len;
1533 if (cmd->chanlist_len == 0)
1536 min_scan_period = chanlist_len * cmd->convert_arg;
1537 if ((min_scan_period < chanlist_len)
1538 || (min_scan_period < cmd->convert_arg)) {
1539 /* Arithmetic overflow. */
1540 min_scan_period = UINT_MAX;
1543 if (cmd->scan_begin_arg < min_scan_period) {
1544 cmd->scan_begin_arg = min_scan_period;
1551 static int pci230_ai_cmdtest(struct comedi_device *dev,
1552 struct comedi_subdevice *s, struct comedi_cmd *cmd)
1554 const struct pci230_board *thisboard = comedi_board(dev);
1555 struct pci230_private *devpriv = dev->private;
1559 /* Step 1 : check if triggers are trivially valid */
1561 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_INT);
1563 tmp = TRIG_FOLLOW | TRIG_TIMER | TRIG_INT;
1564 if ((thisboard->have_dio) || (thisboard->min_hwver > 0)) {
1566 * Unfortunately, we cannot trigger a scan off an external
1567 * source on the PCI260 board, since it uses the PPIC0 (DIO)
1568 * input, which isn't present on the PCI260. For PCI260+
1569 * we can use the EXTTRIG/EXTCONVCLK input on pin 17 instead.
1573 err |= cfc_check_trigger_src(&cmd->scan_begin_src, tmp);
1574 err |= cfc_check_trigger_src(&cmd->convert_src,
1575 TRIG_TIMER | TRIG_INT | TRIG_EXT);
1576 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
1577 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
1582 /* Step 2a : make sure trigger sources are unique */
1584 err |= cfc_check_trigger_is_unique(cmd->start_src);
1585 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
1586 err |= cfc_check_trigger_is_unique(cmd->convert_src);
1587 err |= cfc_check_trigger_is_unique(cmd->stop_src);
1589 /* Step 2b : and mutually compatible */
1592 * If scan_begin_src is not TRIG_FOLLOW, then a monostable will be
1593 * set up to generate a fixed number of timed conversion pulses.
1595 if ((cmd->scan_begin_src != TRIG_FOLLOW)
1596 && (cmd->convert_src != TRIG_TIMER))
1602 /* Step 3: check if arguments are trivially valid */
1604 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1606 #define MAX_SPEED_AI_SE 3200 /* PCI230 SE: 3200 ns => 312.5 kHz */
1607 #define MAX_SPEED_AI_DIFF 8000 /* PCI230 DIFF: 8000 ns => 125 kHz */
1608 #define MAX_SPEED_AI_PLUS 4000 /* PCI230+: 4000 ns => 250 kHz */
1609 #define MIN_SPEED_AI 4294967295u /* 4294967295ns = 4.29s */
1610 /*- Comedi limit due to unsigned int cmd. Driver limit
1611 * = 2^16 (16bit * counter) * 1000000ns (1kHz onboard
1612 * clock) = 65.536s */
1614 if (cmd->convert_src == TRIG_TIMER) {
1615 unsigned int max_speed_ai;
1617 if (devpriv->hwver == 0) {
1618 /* PCI230 or PCI260. Max speed depends whether
1619 * single-ended or pseudo-differential. */
1620 if (cmd->chanlist && (cmd->chanlist_len > 0)) {
1621 /* Peek analogue reference of first channel. */
1622 if (CR_AREF(cmd->chanlist[0]) == AREF_DIFF)
1623 max_speed_ai = MAX_SPEED_AI_DIFF;
1625 max_speed_ai = MAX_SPEED_AI_SE;
1628 /* No channel list. Assume single-ended. */
1629 max_speed_ai = MAX_SPEED_AI_SE;
1632 /* PCI230+ or PCI260+. */
1633 max_speed_ai = MAX_SPEED_AI_PLUS;
1636 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
1638 err |= cfc_check_trigger_arg_max(&cmd->convert_arg,
1640 } else if (cmd->convert_src == TRIG_EXT) {
1644 * convert_arg == (CR_EDGE | 0)
1645 * => trigger on +ve edge.
1646 * convert_arg == (CR_EDGE | CR_INVERT | 0)
1647 * => trigger on -ve edge.
1649 if ((cmd->convert_arg & CR_FLAGS_MASK) != 0) {
1650 /* Trigger number must be 0. */
1651 if ((cmd->convert_arg & ~CR_FLAGS_MASK) != 0) {
1652 cmd->convert_arg = COMBINE(cmd->convert_arg, 0,
1656 /* The only flags allowed are CR_INVERT and CR_EDGE.
1657 * CR_EDGE is required. */
1658 if ((cmd->convert_arg & (CR_FLAGS_MASK & ~CR_INVERT))
1660 /* Set CR_EDGE, preserve CR_INVERT. */
1661 cmd->convert_arg = COMBINE(cmd->start_arg,
1668 /* Backwards compatibility with previous versions. */
1669 /* convert_arg == 0 => trigger on -ve edge. */
1670 /* convert_arg == 1 => trigger on +ve edge. */
1671 err |= cfc_check_trigger_arg_max(&cmd->convert_arg, 1);
1674 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
1677 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1679 if (cmd->stop_src == TRIG_NONE)
1680 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1682 if (cmd->scan_begin_src == TRIG_EXT) {
1683 /* external "trigger" to begin each scan
1684 * scan_begin_arg==0 => use PPC0 input -> gate of CT0 -> gate
1685 * of CT2 (sample convert trigger is CT2) */
1686 if ((cmd->scan_begin_arg & ~CR_FLAGS_MASK) != 0) {
1687 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1691 /* The only flag allowed is CR_EDGE, which is ignored. */
1692 if ((cmd->scan_begin_arg & CR_FLAGS_MASK & ~CR_EDGE) != 0) {
1693 cmd->scan_begin_arg = COMBINE(cmd->scan_begin_arg, 0,
1694 CR_FLAGS_MASK & ~CR_EDGE);
1697 } else if (cmd->scan_begin_src == TRIG_TIMER) {
1698 /* N.B. cmd->convert_arg is also TRIG_TIMER */
1699 if (!pci230_ai_check_scan_period(cmd))
1703 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
1709 /* Step 4: fix up any arguments.
1710 * "argument conflict" returned by comedilib to user mode process
1713 if (cmd->convert_src == TRIG_TIMER) {
1714 tmp = cmd->convert_arg;
1715 pci230_ns_to_single_timer(&cmd->convert_arg,
1716 cmd->flags & TRIG_ROUND_MASK);
1717 if (tmp != cmd->convert_arg)
1721 if (cmd->scan_begin_src == TRIG_TIMER) {
1722 /* N.B. cmd->convert_arg is also TRIG_TIMER */
1723 tmp = cmd->scan_begin_arg;
1724 pci230_ns_to_single_timer(&cmd->scan_begin_arg,
1725 cmd->flags & TRIG_ROUND_MASK);
1726 if (!pci230_ai_check_scan_period(cmd)) {
1727 /* Was below minimum required. Round up. */
1728 pci230_ns_to_single_timer(&cmd->scan_begin_arg,
1730 pci230_ai_check_scan_period(cmd);
1732 if (tmp != cmd->scan_begin_arg)
1739 /* Step 5: check channel list if it exists. */
1741 if (cmd->chanlist && cmd->chanlist_len > 0) {
1744 rangepair_err = 1 << 1,
1745 polarity_err = 1 << 2,
1747 diffchan_err = 1 << 4,
1748 buggy_chan0_err = 1 << 5
1750 unsigned int errors;
1751 unsigned int chan, prev_chan;
1752 unsigned int range, prev_range;
1753 unsigned int polarity, prev_polarity;
1754 unsigned int aref, prev_aref;
1755 unsigned int subseq_len;
1760 prev_chan = prev_aref = prev_range = prev_polarity = 0;
1761 for (n = 0; n < cmd->chanlist_len; n++) {
1762 chan = CR_CHAN(cmd->chanlist[n]);
1763 range = CR_RANGE(cmd->chanlist[n]);
1764 aref = CR_AREF(cmd->chanlist[n]);
1765 polarity = pci230_ai_bipolar[range];
1766 /* Only the first half of the channels are available if
1767 * differential. (These are remapped in software. In
1768 * hardware, only the even channels are available.) */
1769 if ((aref == AREF_DIFF)
1770 && (chan >= (s->n_chan / 2))) {
1771 errors |= diffchan_err;
1774 /* Channel numbers must strictly increase or
1775 * subsequence must repeat exactly. */
1776 if ((chan <= prev_chan)
1777 && (subseq_len == 0)) {
1780 if ((subseq_len > 0)
1781 && (cmd->chanlist[n] !=
1782 cmd->chanlist[n % subseq_len])) {
1785 /* Channels must have same AREF. */
1786 if (aref != prev_aref)
1789 /* Channel ranges must have same polarity. */
1790 if (polarity != prev_polarity)
1791 errors |= polarity_err;
1793 /* Single-ended channel pairs must have same
1795 if ((aref != AREF_DIFF)
1796 && (((chan ^ prev_chan) & ~1) == 0)
1797 && (range != prev_range)) {
1798 errors |= rangepair_err;
1804 prev_polarity = polarity;
1806 if (subseq_len == 0) {
1807 /* Subsequence is whole sequence. */
1810 /* If channel list is a repeating subsequence, need a whole
1811 * number of repeats. */
1812 if ((n % subseq_len) != 0)
1815 if ((devpriv->hwver > 0) && (devpriv->hwver < 4)) {
1817 * Buggy PCI230+ or PCI260+ requires channel 0 to be
1818 * (first) in the sequence if the sequence contains
1819 * more than one channel. Hardware versions 1 and 2
1820 * have the bug. There is no hardware version 3.
1822 * Actually, there are two firmwares that report
1823 * themselves as hardware version 1 (the boards
1824 * have different ADC chips with slightly different
1825 * timing requirements, which was supposed to be
1826 * invisible to software). The first one doesn't
1827 * seem to have the bug, but the second one
1828 * does, and we can't tell them apart!
1830 if ((subseq_len > 1)
1831 && (CR_CHAN(cmd->chanlist[0]) != 0)) {
1832 errors |= buggy_chan0_err;
1837 if ((errors & seq_err) != 0) {
1838 dev_dbg(dev->class_dev,
1839 "%s: channel numbers must increase or sequence must repeat exactly\n",
1842 if ((errors & rangepair_err) != 0) {
1843 dev_dbg(dev->class_dev,
1844 "%s: single-ended channel pairs must have the same range\n",
1847 if ((errors & polarity_err) != 0) {
1848 dev_dbg(dev->class_dev,
1849 "%s: channel sequence ranges must be all bipolar or all unipolar\n",
1852 if ((errors & aref_err) != 0) {
1853 dev_dbg(dev->class_dev,
1854 "%s: channel sequence analogue references must be all the same (single-ended or differential)\n",
1857 if ((errors & diffchan_err) != 0) {
1858 dev_dbg(dev->class_dev,
1859 "%s: differential channel number out of range 0 to %u\n",
1860 __func__, (s->n_chan / 2) - 1);
1862 if ((errors & buggy_chan0_err) != 0) {
1863 dev_info(dev->class_dev,
1864 "amplc_pci230: ai_cmdtest: Buggy PCI230+/260+ h/w version %u requires first channel of multi-channel sequence to be 0 (corrected in h/w version 4)\n",
1876 static void pci230_ai_update_fifo_trigger_level(struct comedi_device *dev,
1877 struct comedi_subdevice *s)
1879 struct pci230_private *devpriv = dev->private;
1880 struct comedi_cmd *cmd = &s->async->cmd;
1881 unsigned int scanlen = cmd->scan_end_arg;
1883 unsigned short triglev;
1884 unsigned short adccon;
1886 if ((cmd->flags & TRIG_WAKE_EOS) != 0) {
1887 /* Wake at end of scan. */
1888 wake = scanlen - devpriv->ai_scan_pos;
1890 if (devpriv->ai_continuous
1891 || (devpriv->ai_scan_count >= PCI230_ADC_FIFOLEVEL_HALFFULL)
1892 || (scanlen >= PCI230_ADC_FIFOLEVEL_HALFFULL)) {
1893 wake = PCI230_ADC_FIFOLEVEL_HALFFULL;
1895 wake = (devpriv->ai_scan_count * scanlen)
1896 - devpriv->ai_scan_pos;
1899 if (wake >= PCI230_ADC_FIFOLEVEL_HALFFULL) {
1900 triglev = PCI230_ADC_INT_FIFO_HALF;
1902 if ((wake > 1) && (devpriv->hwver > 0)) {
1903 /* PCI230+/260+ programmable FIFO interrupt level. */
1904 if (devpriv->adcfifothresh != wake) {
1905 devpriv->adcfifothresh = wake;
1906 outw(wake, dev->iobase + PCI230P_ADCFFTH);
1908 triglev = PCI230P_ADC_INT_FIFO_THRESH;
1910 triglev = PCI230_ADC_INT_FIFO_NEMPTY;
1913 adccon = (devpriv->adccon & ~PCI230_ADC_INT_FIFO_MASK) | triglev;
1914 if (adccon != devpriv->adccon) {
1915 devpriv->adccon = adccon;
1916 outw(adccon, dev->iobase + PCI230_ADCCON);
1920 static int pci230_ai_inttrig_convert(struct comedi_device *dev,
1921 struct comedi_subdevice *s,
1922 unsigned int trig_num)
1924 struct pci230_private *devpriv = dev->private;
1925 unsigned long irqflags;
1930 spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags);
1931 if (test_bit(AI_CMD_STARTED, &devpriv->state)) {
1932 unsigned int delayus;
1934 /* Trigger conversion by toggling Z2-CT2 output. Finish
1935 * with output high. */
1936 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, 2,
1938 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, 2,
1940 /* Delay. Should driver be responsible for this? An
1941 * alternative would be to wait until conversion is complete,
1942 * but we can't tell when it's complete because the ADC busy
1943 * bit has a different meaning when FIFO enabled (and when
1944 * FIFO not enabled, it only works for software triggers). */
1945 if (((devpriv->adccon & PCI230_ADC_IM_MASK)
1946 == PCI230_ADC_IM_DIF)
1947 && (devpriv->hwver == 0)) {
1948 /* PCI230/260 in differential mode */
1951 /* single-ended or PCI230+/260+ */
1954 spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags);
1957 spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags);
1963 static int pci230_ai_inttrig_scan_begin(struct comedi_device *dev,
1964 struct comedi_subdevice *s,
1965 unsigned int trig_num)
1967 struct pci230_private *devpriv = dev->private;
1968 unsigned long irqflags;
1974 spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags);
1975 if (test_bit(AI_CMD_STARTED, &devpriv->state)) {
1976 /* Trigger scan by waggling CT0 gate source. */
1977 zgat = GAT_CONFIG(0, GAT_GND);
1978 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE);
1979 zgat = GAT_CONFIG(0, GAT_VCC);
1980 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE);
1982 spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags);
1987 static void pci230_ai_stop(struct comedi_device *dev,
1988 struct comedi_subdevice *s)
1990 struct pci230_private *devpriv = dev->private;
1991 unsigned long irqflags;
1992 struct comedi_cmd *cmd;
1995 spin_lock_irqsave(&devpriv->ai_stop_spinlock, irqflags);
1996 started = test_and_clear_bit(AI_CMD_STARTED, &devpriv->state);
1997 spin_unlock_irqrestore(&devpriv->ai_stop_spinlock, irqflags);
2000 cmd = &s->async->cmd;
2001 if (cmd->convert_src == TRIG_TIMER) {
2002 /* Stop conversion rate generator. */
2003 pci230_cancel_ct(dev, 2);
2005 if (cmd->scan_begin_src != TRIG_FOLLOW) {
2006 /* Stop scan period monostable. */
2007 pci230_cancel_ct(dev, 0);
2009 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
2010 /* Disable ADC interrupt and wait for interrupt routine to finish
2011 * running unless we are called from the interrupt routine. */
2012 devpriv->int_en &= ~PCI230_INT_ADC;
2013 while (devpriv->intr_running && devpriv->intr_cpuid != THISCPU) {
2014 spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
2015 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
2017 if (devpriv->ier != devpriv->int_en) {
2018 devpriv->ier = devpriv->int_en;
2019 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE);
2021 spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
2022 /* Reset FIFO, disable FIFO and set start conversion source to none.
2023 * Keep se/diff and bip/uni settings */
2024 devpriv->adccon = (devpriv->adccon & (PCI230_ADC_IR_MASK
2025 | PCI230_ADC_IM_MASK)) |
2026 PCI230_ADC_TRIG_NONE;
2027 outw(devpriv->adccon | PCI230_ADC_FIFO_RESET,
2028 dev->iobase + PCI230_ADCCON);
2029 /* Release resources. */
2030 put_all_resources(dev, OWNER_AICMD);
2033 static void pci230_ai_start(struct comedi_device *dev,
2034 struct comedi_subdevice *s)
2036 struct pci230_private *devpriv = dev->private;
2037 unsigned long irqflags;
2038 unsigned short conv;
2039 struct comedi_async *async = s->async;
2040 struct comedi_cmd *cmd = &async->cmd;
2042 set_bit(AI_CMD_STARTED, &devpriv->state);
2043 if (!devpriv->ai_continuous && (devpriv->ai_scan_count == 0)) {
2044 /* An empty acquisition! */
2045 async->events |= COMEDI_CB_EOA;
2046 pci230_ai_stop(dev, s);
2047 comedi_event(dev, s);
2049 /* Enable ADC FIFO trigger level interrupt. */
2050 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
2051 devpriv->int_en |= PCI230_INT_ADC;
2052 devpriv->ier |= PCI230_INT_ADC;
2053 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE);
2054 spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
2056 /* Update conversion trigger source which is currently set
2057 * to CT2 output, which is currently stuck high. */
2058 switch (cmd->convert_src) {
2060 conv = PCI230_ADC_TRIG_NONE;
2063 /* Using CT2 output. */
2064 conv = PCI230_ADC_TRIG_Z2CT2;
2067 if ((cmd->convert_arg & CR_EDGE) != 0) {
2068 if ((cmd->convert_arg & CR_INVERT) == 0) {
2069 /* Trigger on +ve edge. */
2070 conv = PCI230_ADC_TRIG_EXTP;
2072 /* Trigger on -ve edge. */
2073 conv = PCI230_ADC_TRIG_EXTN;
2076 /* Backwards compatibility. */
2077 if (cmd->convert_arg != 0) {
2078 /* Trigger on +ve edge. */
2079 conv = PCI230_ADC_TRIG_EXTP;
2081 /* Trigger on -ve edge. */
2082 conv = PCI230_ADC_TRIG_EXTN;
2087 /* Use CT2 output for software trigger due to problems
2088 * in differential mode on PCI230/260. */
2089 conv = PCI230_ADC_TRIG_Z2CT2;
2092 devpriv->adccon = (devpriv->adccon & ~PCI230_ADC_TRIG_MASK)
2094 outw(devpriv->adccon, dev->iobase + PCI230_ADCCON);
2095 if (cmd->convert_src == TRIG_INT)
2096 async->inttrig = pci230_ai_inttrig_convert;
2098 /* Update FIFO interrupt trigger level, which is currently
2100 pci230_ai_update_fifo_trigger_level(dev, s);
2101 if (cmd->convert_src == TRIG_TIMER) {
2102 /* Update timer gates. */
2105 if (cmd->scan_begin_src != TRIG_FOLLOW) {
2106 /* Conversion timer CT2 needs to be gated by
2107 * inverted output of monostable CT2. */
2108 zgat = GAT_CONFIG(2, GAT_NOUTNM2);
2110 /* Conversion timer CT2 needs to be gated on
2112 zgat = GAT_CONFIG(2, GAT_VCC);
2114 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE);
2115 if (cmd->scan_begin_src != TRIG_FOLLOW) {
2116 /* Set monostable CT0 trigger source. */
2117 switch (cmd->scan_begin_src) {
2119 zgat = GAT_CONFIG(0, GAT_VCC);
2123 * For CT0 on PCI230, the external
2124 * trigger (gate) signal comes from
2125 * PPC0, which is channel 16 of the DIO
2126 * subdevice. The application needs to
2127 * configure this as an input in order
2128 * to use it as an external scan
2131 zgat = GAT_CONFIG(0, GAT_EXT);
2135 * Monostable CT0 triggered by rising
2136 * edge on inverted output of CT1
2137 * (falling edge on CT1).
2139 zgat = GAT_CONFIG(0, GAT_NOUTNM2);
2143 * Monostable CT0 is triggered by
2144 * inttrig function waggling the CT0
2147 zgat = GAT_CONFIG(0, GAT_VCC);
2150 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE);
2151 switch (cmd->scan_begin_src) {
2153 /* Scan period timer CT1 needs to be
2154 * gated on to start counting. */
2155 zgat = GAT_CONFIG(1, GAT_VCC);
2156 outb(zgat, devpriv->iobase1
2161 pci230_ai_inttrig_scan_begin;
2165 } else if (cmd->convert_src != TRIG_INT) {
2166 /* No longer need Z2-CT2. */
2167 put_one_resource(dev, RES_Z2CT2, OWNER_AICMD);
2172 static int pci230_ai_inttrig_start(struct comedi_device *dev,
2173 struct comedi_subdevice *s,
2174 unsigned int trig_num)
2179 s->async->inttrig = NULL;
2180 pci230_ai_start(dev, s);
2185 static void pci230_handle_ai(struct comedi_device *dev,
2186 struct comedi_subdevice *s)
2188 struct pci230_private *devpriv = dev->private;
2189 unsigned int events = 0;
2190 unsigned int status_fifo;
2193 unsigned int fifoamount;
2194 struct comedi_async *async = s->async;
2195 unsigned int scanlen = async->cmd.scan_end_arg;
2197 /* Determine number of samples to read. */
2198 if (devpriv->ai_continuous) {
2199 todo = PCI230_ADC_FIFOLEVEL_HALFFULL;
2200 } else if (devpriv->ai_scan_count == 0) {
2202 } else if ((devpriv->ai_scan_count > PCI230_ADC_FIFOLEVEL_HALFFULL)
2203 || (scanlen > PCI230_ADC_FIFOLEVEL_HALFFULL)) {
2204 todo = PCI230_ADC_FIFOLEVEL_HALFFULL;
2206 todo = (devpriv->ai_scan_count * scanlen)
2207 - devpriv->ai_scan_pos;
2208 if (todo > PCI230_ADC_FIFOLEVEL_HALFFULL)
2209 todo = PCI230_ADC_FIFOLEVEL_HALFFULL;
2214 for (i = 0; i < todo; i++) {
2215 if (fifoamount == 0) {
2216 /* Read FIFO state. */
2217 status_fifo = inw(dev->iobase + PCI230_ADCCON);
2218 if ((status_fifo & PCI230_ADC_FIFO_FULL_LATCHED) != 0) {
2219 /* Report error otherwise FIFO overruns will go
2220 * unnoticed by the caller. */
2221 comedi_error(dev, "AI FIFO overrun");
2222 events |= COMEDI_CB_OVERFLOW | COMEDI_CB_ERROR;
2224 } else if ((status_fifo & PCI230_ADC_FIFO_EMPTY) != 0) {
2227 } else if ((status_fifo & PCI230_ADC_FIFO_HALF) != 0) {
2228 /* FIFO half full. */
2229 fifoamount = PCI230_ADC_FIFOLEVEL_HALFFULL;
2231 /* FIFO not empty. */
2232 if (devpriv->hwver > 0) {
2233 /* Read PCI230+/260+ ADC FIFO level. */
2234 fifoamount = inw(dev->iobase
2235 + PCI230P_ADCFFLEV);
2236 if (fifoamount == 0) {
2237 /* Shouldn't happen. */
2245 /* Read sample and store in Comedi's circular buffer. */
2246 if (comedi_buf_put(async, pci230_ai_read(dev)) == 0) {
2247 events |= COMEDI_CB_ERROR | COMEDI_CB_OVERFLOW;
2248 comedi_error(dev, "AI buffer overflow");
2252 devpriv->ai_scan_pos++;
2253 if (devpriv->ai_scan_pos == scanlen) {
2255 devpriv->ai_scan_pos = 0;
2256 devpriv->ai_scan_count--;
2257 async->events |= COMEDI_CB_EOS;
2260 if (!devpriv->ai_continuous && (devpriv->ai_scan_count == 0)) {
2261 /* End of acquisition. */
2262 events |= COMEDI_CB_EOA;
2264 /* More samples required, tell Comedi to block. */
2265 events |= COMEDI_CB_BLOCK;
2267 async->events |= events;
2268 if ((async->events & (COMEDI_CB_EOA | COMEDI_CB_ERROR |
2269 COMEDI_CB_OVERFLOW)) != 0) {
2270 /* disable hardware conversions */
2271 pci230_ai_stop(dev, s);
2273 /* update FIFO interrupt trigger level */
2274 pci230_ai_update_fifo_trigger_level(dev, s);
2278 static int pci230_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
2280 struct pci230_private *devpriv = dev->private;
2281 unsigned int i, chan, range, diff;
2282 unsigned int res_mask;
2283 unsigned short adccon, adcen;
2286 /* Get the command. */
2287 struct comedi_async *async = s->async;
2288 struct comedi_cmd *cmd = &async->cmd;
2291 * Determine which shared resources are needed.
2294 /* Need Z2-CT2 to supply a conversion trigger source at a high
2295 * logic level, even if not doing timed conversions. */
2296 res_mask |= (1U << RES_Z2CT2);
2297 if (cmd->scan_begin_src != TRIG_FOLLOW) {
2298 /* Using Z2-CT0 monostable to gate Z2-CT2 conversion timer */
2299 res_mask |= (1U << RES_Z2CT0);
2300 if (cmd->scan_begin_src == TRIG_TIMER) {
2301 /* Using Z2-CT1 for scan frequency */
2302 res_mask |= (1U << RES_Z2CT1);
2305 /* Claim resources. */
2306 if (!get_resources(dev, res_mask, OWNER_AICMD))
2310 /* Get number of scans required. */
2311 if (cmd->stop_src == TRIG_COUNT) {
2312 devpriv->ai_scan_count = cmd->stop_arg;
2313 devpriv->ai_continuous = 0;
2315 /* TRIG_NONE, user calls cancel. */
2316 devpriv->ai_scan_count = 0;
2317 devpriv->ai_continuous = 1;
2319 devpriv->ai_scan_pos = 0; /* Position within scan. */
2322 * - Set channel scan list.
2323 * - Set channel gains.
2324 * - Enable and reset FIFO, specify uni/bip, se/diff, and set
2325 * start conversion source to point to something at a high logic
2326 * level (we use the output of counter/timer 2 for this purpose.
2327 * - PAUSE to allow things to settle down.
2328 * - Reset the FIFO again because it needs resetting twice and there
2329 * may have been a false conversion trigger on some versions of
2330 * PCI230/260 due to the start conversion source being set to a
2332 * - Enable ADC FIFO level interrupt.
2333 * - Set actual conversion trigger source and FIFO interrupt trigger
2335 * - If convert_src is TRIG_TIMER, set up the timers.
2338 adccon = PCI230_ADC_FIFO_EN;
2341 if (CR_AREF(cmd->chanlist[0]) == AREF_DIFF) {
2342 /* Differential - all channels must be differential. */
2344 adccon |= PCI230_ADC_IM_DIF;
2346 /* Single ended - all channels must be single-ended. */
2348 adccon |= PCI230_ADC_IM_SE;
2351 range = CR_RANGE(cmd->chanlist[0]);
2352 devpriv->ai_bipolar = pci230_ai_bipolar[range];
2353 if (devpriv->ai_bipolar)
2354 adccon |= PCI230_ADC_IR_BIP;
2356 adccon |= PCI230_ADC_IR_UNI;
2358 for (i = 0; i < cmd->chanlist_len; i++) {
2359 unsigned int gainshift;
2361 chan = CR_CHAN(cmd->chanlist[i]);
2362 range = CR_RANGE(cmd->chanlist[i]);
2364 gainshift = 2 * chan;
2365 if (devpriv->hwver == 0) {
2366 /* Original PCI230/260 expects both inputs of
2367 * the differential channel to be enabled. */
2368 adcen |= 3 << gainshift;
2370 /* PCI230+/260+ expects only one input of the
2371 * differential channel to be enabled. */
2372 adcen |= 1 << gainshift;
2375 gainshift = (chan & ~1);
2378 devpriv->adcg = (devpriv->adcg & ~(3 << gainshift))
2379 | (pci230_ai_gain[range] << gainshift);
2382 /* Set channel scan list. */
2383 outw(adcen, dev->iobase + PCI230_ADCEN);
2385 /* Set channel gains. */
2386 outw(devpriv->adcg, dev->iobase + PCI230_ADCG);
2388 /* Set counter/timer 2 output high for use as the initial start
2389 * conversion source. */
2390 i8254_set_mode(devpriv->iobase1 + PCI230_Z2_CT_BASE, 0, 2, I8254_MODE1);
2392 /* Temporarily use CT2 output as conversion trigger source and
2393 * temporarily set FIFO interrupt trigger level to 'full'. */
2394 adccon |= PCI230_ADC_INT_FIFO_FULL | PCI230_ADC_TRIG_Z2CT2;
2396 /* Enable and reset FIFO, specify FIFO trigger level full, specify
2397 * uni/bip, se/diff, and temporarily set the start conversion source
2398 * to CT2 output. Note that CT2 output is currently high, and this
2399 * will produce a false conversion trigger on some versions of the
2400 * PCI230/260, but that will be dealt with later. */
2401 devpriv->adccon = adccon;
2402 outw(adccon | PCI230_ADC_FIFO_RESET, dev->iobase + PCI230_ADCCON);
2405 /* Failure to include this will result in the first few channels'-worth
2406 * of data being corrupt, normally manifesting itself by large negative
2407 * voltages. It seems the board needs time to settle between the first
2408 * FIFO reset (above) and the second FIFO reset (below). Setting the
2409 * channel gains and scan list _before_ the first FIFO reset also
2410 * helps, though only slightly. */
2413 /* Reset FIFO again. */
2414 outw(adccon | PCI230_ADC_FIFO_RESET, dev->iobase + PCI230_ADCCON);
2416 if (cmd->convert_src == TRIG_TIMER) {
2417 /* Set up CT2 as conversion timer, but gate it off for now.
2418 * Note, counter/timer output 2 can be monitored on the
2419 * connector: PCI230 pin 21, PCI260 pin 18. */
2420 zgat = GAT_CONFIG(2, GAT_GND);
2421 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE);
2422 /* Set counter/timer 2 to the specified conversion period. */
2423 pci230_ct_setup_ns_mode(dev, 2, I8254_MODE3, cmd->convert_arg,
2424 cmd->flags & TRIG_ROUND_MASK);
2425 if (cmd->scan_begin_src != TRIG_FOLLOW) {
2427 * Set up monostable on CT0 output for scan timing. A
2428 * rising edge on the trigger (gate) input of CT0 will
2429 * trigger the monostable, causing its output to go low
2430 * for the configured period. The period depends on
2431 * the conversion period and the number of conversions
2434 * Set the trigger high before setting up the
2435 * monostable to stop it triggering. The trigger
2436 * source will be changed later.
2438 zgat = GAT_CONFIG(0, GAT_VCC);
2439 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE);
2440 pci230_ct_setup_ns_mode(dev, 0, I8254_MODE1,
2441 ((uint64_t) cmd->convert_arg
2442 * cmd->scan_end_arg),
2444 if (cmd->scan_begin_src == TRIG_TIMER) {
2446 * Monostable on CT0 will be triggered by
2447 * output of CT1 at configured scan frequency.
2449 * Set up CT1 but gate it off for now.
2451 zgat = GAT_CONFIG(1, GAT_GND);
2452 outb(zgat, devpriv->iobase1 + PCI230_ZGAT_SCE);
2453 pci230_ct_setup_ns_mode(dev, 1, I8254_MODE3,
2454 cmd->scan_begin_arg,
2462 if (cmd->start_src == TRIG_INT) {
2463 s->async->inttrig = pci230_ai_inttrig_start;
2466 pci230_ai_start(dev, s);
2472 static int pci230_ai_cancel(struct comedi_device *dev,
2473 struct comedi_subdevice *s)
2475 pci230_ai_stop(dev, s);
2479 /* Interrupt handler */
2480 static irqreturn_t pci230_interrupt(int irq, void *d)
2482 unsigned char status_int, valid_status_int;
2483 struct comedi_device *dev = (struct comedi_device *)d;
2484 struct pci230_private *devpriv = dev->private;
2485 struct comedi_subdevice *s;
2486 unsigned long irqflags;
2488 /* Read interrupt status/enable register. */
2489 status_int = inb(devpriv->iobase1 + PCI230_INT_STAT);
2491 if (status_int == PCI230_INT_DISABLE)
2495 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
2496 valid_status_int = devpriv->int_en & status_int;
2497 /* Disable triggered interrupts.
2498 * (Only those interrupts that need re-enabling, are, later in the
2500 devpriv->ier = devpriv->int_en & ~status_int;
2501 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE);
2502 devpriv->intr_running = 1;
2503 devpriv->intr_cpuid = THISCPU;
2504 spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
2507 * Check the source of interrupt and handle it.
2508 * The PCI230 can cope with concurrent ADC, DAC, PPI C0 and C3
2509 * interrupts. However, at present (Comedi-0.7.60) does not allow
2510 * concurrent execution of commands, instructions or a mixture of the
2514 if ((valid_status_int & PCI230_INT_ZCLK_CT1) != 0) {
2515 s = dev->write_subdev;
2516 pci230_handle_ao_nofifo(dev, s);
2517 comedi_event(dev, s);
2520 if ((valid_status_int & PCI230P2_INT_DAC) != 0) {
2521 s = dev->write_subdev;
2522 pci230_handle_ao_fifo(dev, s);
2523 comedi_event(dev, s);
2526 if ((valid_status_int & PCI230_INT_ADC) != 0) {
2527 s = dev->read_subdev;
2528 pci230_handle_ai(dev, s);
2529 comedi_event(dev, s);
2532 /* Reenable interrupts. */
2533 spin_lock_irqsave(&devpriv->isr_spinlock, irqflags);
2534 if (devpriv->ier != devpriv->int_en) {
2535 devpriv->ier = devpriv->int_en;
2536 outb(devpriv->ier, devpriv->iobase1 + PCI230_INT_SCE);
2538 devpriv->intr_running = 0;
2539 spin_unlock_irqrestore(&devpriv->isr_spinlock, irqflags);
2544 /* Check if PCI device matches a specific board. */
2545 static bool pci230_match_pci_board(const struct pci230_board *board,
2546 struct pci_dev *pci_dev)
2548 /* assume pci_dev->device != PCI_DEVICE_ID_INVALID */
2549 if (board->id != pci_dev->device)
2551 if (board->min_hwver == 0)
2553 /* Looking for a '+' model. First check length of registers. */
2554 if (pci_resource_len(pci_dev, 3) < 32)
2555 return false; /* Not a '+' model. */
2556 /* TODO: temporarily enable PCI device and read the hardware version
2557 * register. For now, assume it's okay. */
2561 /* Look for board matching PCI device. */
2562 static const struct pci230_board *pci230_find_pci_board(struct pci_dev *pci_dev)
2566 for (i = 0; i < ARRAY_SIZE(pci230_boards); i++)
2567 if (pci230_match_pci_board(&pci230_boards[i], pci_dev))
2568 return &pci230_boards[i];
2572 /* Look for PCI device matching requested board name, bus and slot. */
2573 static struct pci_dev *pci230_find_pci_dev(struct comedi_device *dev,
2574 struct comedi_devconfig *it)
2576 const struct pci230_board *thisboard = comedi_board(dev);
2577 struct pci_dev *pci_dev = NULL;
2578 int bus = it->options[0];
2579 int slot = it->options[1];
2581 for_each_pci_dev(pci_dev) {
2582 /* Check vendor ID (same for all supported PCI boards). */
2583 if (pci_dev->vendor != PCI_VENDOR_ID_AMPLICON)
2585 /* If bus/slot specified, check them. */
2586 if ((bus || slot) &&
2587 (bus != pci_dev->bus->number ||
2588 slot != PCI_SLOT(pci_dev->devfn)))
2590 if (thisboard->id == PCI_DEVICE_ID_INVALID) {
2591 /* Wildcard board matches any supported PCI board. */
2592 const struct pci230_board *foundboard;
2594 foundboard = pci230_find_pci_board(pci_dev);
2595 if (foundboard == NULL)
2597 /* Replace wildcard board_ptr. */
2598 dev->board_ptr = foundboard;
2600 /* Need to match a specific board. */
2601 if (!pci230_match_pci_board(thisboard, pci_dev))
2606 dev_err(dev->class_dev,
2607 "No supported board found! (req. bus %d, slot %d)\n",
2612 static int pci230_alloc_private(struct comedi_device *dev)
2614 struct pci230_private *devpriv;
2616 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
2620 spin_lock_init(&devpriv->isr_spinlock);
2621 spin_lock_init(&devpriv->res_spinlock);
2622 spin_lock_init(&devpriv->ai_stop_spinlock);
2623 spin_lock_init(&devpriv->ao_stop_spinlock);
2627 /* Common part of attach and auto_attach. */
2628 static int pci230_attach_common(struct comedi_device *dev,
2629 struct pci_dev *pci_dev)
2631 const struct pci230_board *thisboard = comedi_board(dev);
2632 struct pci230_private *devpriv = dev->private;
2633 struct comedi_subdevice *s;
2634 unsigned long iobase1, iobase2;
2635 /* PCI230's I/O spaces 1 and 2 respectively. */
2638 comedi_set_hw_dev(dev, &pci_dev->dev);
2640 dev->board_name = thisboard->name;
2642 rc = comedi_pci_enable(dev);
2646 /* Read base addresses of the PCI230's two I/O regions from PCI
2647 * configuration register. */
2648 iobase1 = pci_resource_start(pci_dev, 2);
2649 iobase2 = pci_resource_start(pci_dev, 3);
2650 dev_dbg(dev->class_dev,
2651 "%s I/O region 1 0x%04lx I/O region 2 0x%04lx\n",
2652 dev->board_name, iobase1, iobase2);
2653 devpriv->iobase1 = iobase1;
2654 dev->iobase = iobase2;
2655 /* Read bits of DACCON register - only the output range. */
2656 devpriv->daccon = inw(dev->iobase + PCI230_DACCON) & PCI230_DAC_OR_MASK;
2657 /* Read hardware version register and set extended function register
2659 if (pci_resource_len(pci_dev, 3) >= 32) {
2660 unsigned short extfunc = 0;
2662 devpriv->hwver = inw(dev->iobase + PCI230P_HWVER);
2663 if (devpriv->hwver < thisboard->min_hwver) {
2664 dev_err(dev->class_dev,
2665 "%s - bad hardware version - got %u, need %u\n",
2666 dev->board_name, devpriv->hwver,
2667 thisboard->min_hwver);
2670 if (devpriv->hwver > 0) {
2671 if (!thisboard->have_dio) {
2672 /* No DIO ports. Route counters' external gates
2673 * to the EXTTRIG signal (PCI260+ pin 17).
2674 * (Otherwise, they would be routed to DIO
2675 * inputs PC0, PC1 and PC2 which don't exist
2677 extfunc |= PCI230P_EXTFUNC_GAT_EXTTRIG;
2679 if ((thisboard->ao_chans > 0)
2680 && (devpriv->hwver >= 2)) {
2681 /* Enable DAC FIFO functionality. */
2682 extfunc |= PCI230P2_EXTFUNC_DACFIFO;
2685 outw(extfunc, dev->iobase + PCI230P_EXTFUNC);
2686 if ((extfunc & PCI230P2_EXTFUNC_DACFIFO) != 0) {
2687 /* Temporarily enable DAC FIFO, reset it and disable
2688 * FIFO wraparound. */
2689 outw(devpriv->daccon | PCI230P2_DAC_FIFO_EN
2690 | PCI230P2_DAC_FIFO_RESET,
2691 dev->iobase + PCI230_DACCON);
2692 /* Clear DAC FIFO channel enable register. */
2693 outw(0, dev->iobase + PCI230P2_DACEN);
2694 /* Disable DAC FIFO. */
2695 outw(devpriv->daccon, dev->iobase + PCI230_DACCON);
2698 /* Disable board's interrupts. */
2699 outb(0, devpriv->iobase1 + PCI230_INT_SCE);
2700 /* Set ADC to a reasonable state. */
2702 devpriv->adccon = PCI230_ADC_TRIG_NONE | PCI230_ADC_IM_SE
2703 | PCI230_ADC_IR_BIP;
2704 outw(1 << 0, dev->iobase + PCI230_ADCEN);
2705 outw(devpriv->adcg, dev->iobase + PCI230_ADCG);
2706 outw(devpriv->adccon | PCI230_ADC_FIFO_RESET,
2707 dev->iobase + PCI230_ADCCON);
2708 /* Register the interrupt handler. */
2709 irq_hdl = request_irq(pci_dev->irq, pci230_interrupt,
2710 IRQF_SHARED, "amplc_pci230", dev);
2712 dev_warn(dev->class_dev,
2713 "unable to register irq %u, commands will not be available\n",
2716 dev->irq = pci_dev->irq;
2717 dev_dbg(dev->class_dev, "registered irq %u\n", pci_dev->irq);
2720 rc = comedi_alloc_subdevices(dev, 3);
2724 s = &dev->subdevices[0];
2725 /* analog input subdevice */
2726 s->type = COMEDI_SUBD_AI;
2727 s->subdev_flags = SDF_READABLE | SDF_DIFF | SDF_GROUND;
2728 s->n_chan = thisboard->ai_chans;
2729 s->maxdata = (1 << thisboard->ai_bits) - 1;
2730 s->range_table = &pci230_ai_range;
2731 s->insn_read = &pci230_ai_rinsn;
2732 s->len_chanlist = 256; /* but there are restrictions. */
2733 /* Only register commands if the interrupt handler is installed. */
2735 dev->read_subdev = s;
2736 s->subdev_flags |= SDF_CMD_READ;
2737 s->do_cmd = &pci230_ai_cmd;
2738 s->do_cmdtest = &pci230_ai_cmdtest;
2739 s->cancel = pci230_ai_cancel;
2741 s = &dev->subdevices[1];
2742 /* analog output subdevice */
2743 if (thisboard->ao_chans > 0) {
2744 s->type = COMEDI_SUBD_AO;
2745 s->subdev_flags = SDF_WRITABLE | SDF_GROUND;
2746 s->n_chan = thisboard->ao_chans;
2747 s->maxdata = (1 << thisboard->ao_bits) - 1;
2748 s->range_table = &pci230_ao_range;
2749 s->insn_write = &pci230_ao_winsn;
2750 s->insn_read = &pci230_ao_rinsn;
2751 s->len_chanlist = thisboard->ao_chans;
2752 /* Only register commands if the interrupt handler is
2755 dev->write_subdev = s;
2756 s->subdev_flags |= SDF_CMD_WRITE;
2757 s->do_cmd = &pci230_ao_cmd;
2758 s->do_cmdtest = &pci230_ao_cmdtest;
2759 s->cancel = pci230_ao_cancel;
2762 s->type = COMEDI_SUBD_UNUSED;
2764 s = &dev->subdevices[2];
2765 /* digital i/o subdevice */
2766 if (thisboard->have_dio) {
2767 rc = subdev_8255_init(dev, s, NULL,
2768 (devpriv->iobase1 + PCI230_PPI_X_BASE));
2772 s->type = COMEDI_SUBD_UNUSED;
2774 dev_info(dev->class_dev, "attached\n");
2778 static int pci230_attach(struct comedi_device *dev, struct comedi_devconfig *it)
2780 const struct pci230_board *thisboard = comedi_board(dev);
2781 struct pci_dev *pci_dev;
2784 dev_info(dev->class_dev, "amplc_pci230: attach %s %d,%d\n",
2785 thisboard->name, it->options[0], it->options[1]);
2787 rc = pci230_alloc_private(dev);
2791 pci_dev = pci230_find_pci_dev(dev, it);
2794 return pci230_attach_common(dev, pci_dev);
2797 static int pci230_auto_attach(struct comedi_device *dev,
2798 unsigned long context_unused)
2800 struct pci_dev *pci_dev = comedi_to_pci_dev(dev);
2803 dev_info(dev->class_dev, "amplc_pci230: attach pci %s\n",
2806 rc = pci230_alloc_private(dev);
2810 dev->board_ptr = pci230_find_pci_board(pci_dev);
2811 if (dev->board_ptr == NULL) {
2812 dev_err(dev->class_dev,
2813 "amplc_pci230: BUG! cannot determine board type!\n");
2817 * Need to 'get' the PCI device to match the 'put' in pci230_detach().
2818 * TODO: Remove the pci_dev_get() and matching pci_dev_put() once
2819 * support for manual attachment of PCI devices via pci230_attach()
2822 pci_dev_get(pci_dev);
2823 return pci230_attach_common(dev, pci_dev);
2826 static void pci230_detach(struct comedi_device *dev)
2828 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2831 free_irq(dev->irq, dev);
2832 comedi_pci_disable(dev);
2834 pci_dev_put(pcidev);
2837 static struct comedi_driver amplc_pci230_driver = {
2838 .driver_name = "amplc_pci230",
2839 .module = THIS_MODULE,
2840 .attach = pci230_attach,
2841 .auto_attach = pci230_auto_attach,
2842 .detach = pci230_detach,
2843 .board_name = &pci230_boards[0].name,
2844 .offset = sizeof(pci230_boards[0]),
2845 .num_names = ARRAY_SIZE(pci230_boards),
2848 static int amplc_pci230_pci_probe(struct pci_dev *dev,
2849 const struct pci_device_id *id)
2851 return comedi_pci_auto_config(dev, &lc_pci230_driver,
2855 static DEFINE_PCI_DEVICE_TABLE(amplc_pci230_pci_table) = {
2856 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI230) },
2857 { PCI_DEVICE(PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_PCI260) },
2860 MODULE_DEVICE_TABLE(pci, amplc_pci230_pci_table);
2862 static struct pci_driver amplc_pci230_pci_driver = {
2863 .name = "amplc_pci230",
2864 .id_table = amplc_pci230_pci_table,
2865 .probe = amplc_pci230_pci_probe,
2866 .remove = comedi_pci_auto_unconfig,
2868 module_comedi_pci_driver(amplc_pci230_driver, amplc_pci230_pci_driver);
2870 MODULE_AUTHOR("Comedi http://www.comedi.org");
2871 MODULE_DESCRIPTION("Comedi low-level driver");
2872 MODULE_LICENSE("GPL");