2 * AD7792/AD7793 SPI ADC driver
4 * Copyright 2011-2012 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/err.h>
17 #include <linux/sched.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/trigger.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
31 * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
32 * In order to avoid contentions on the SPI bus, it's therefore necessary
33 * to use spi bus locking.
35 * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
38 struct ad7793_chip_info {
39 struct iio_chan_spec channel[7];
43 struct spi_device *spi;
44 struct iio_trigger *trig;
45 const struct ad7793_chip_info *chip_info;
46 struct regulator *reg;
47 struct ad7793_platform_data *pdata;
48 wait_queue_head_t wq_data_avail;
54 u32 scale_avail[8][2];
57 * DMA (thus cache coherency maintenance) requires the
58 * transfer buffers to live in their own cache lines.
60 u8 data[4] ____cacheline_aligned;
63 enum ad7793_supported_device_ids {
68 static int __ad7793_write_reg(struct ad7793_state *st, bool locked,
69 bool cs_change, unsigned char reg,
70 unsigned size, unsigned val)
73 struct spi_transfer t = {
76 .cs_change = cs_change,
80 data[0] = AD7793_COMM_WRITE | AD7793_COMM_ADDR(reg);
100 spi_message_add_tail(&t, &m);
103 return spi_sync_locked(st->spi, &m);
105 return spi_sync(st->spi, &m);
108 static int ad7793_write_reg(struct ad7793_state *st,
109 unsigned reg, unsigned size, unsigned val)
111 return __ad7793_write_reg(st, false, false, reg, size, val);
114 static int __ad7793_read_reg(struct ad7793_state *st, bool locked,
115 bool cs_change, unsigned char reg,
116 int *val, unsigned size)
120 struct spi_transfer t[] = {
127 .cs_change = cs_change,
130 struct spi_message m;
132 data[0] = AD7793_COMM_READ | AD7793_COMM_ADDR(reg);
134 spi_message_init(&m);
135 spi_message_add_tail(&t[0], &m);
136 spi_message_add_tail(&t[1], &m);
139 ret = spi_sync_locked(st->spi, &m);
141 ret = spi_sync(st->spi, &m);
148 *val = data[0] << 16 | data[1] << 8 | data[2];
151 *val = data[0] << 8 | data[1];
163 static int ad7793_read_reg(struct ad7793_state *st,
164 unsigned reg, int *val, unsigned size)
166 return __ad7793_read_reg(st, 0, 0, reg, val, size);
169 static int ad7793_read(struct ad7793_state *st, unsigned ch,
170 unsigned len, int *val)
173 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
174 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
175 AD7793_MODE_SEL(AD7793_MODE_SINGLE);
177 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
179 spi_bus_lock(st->spi->master);
182 ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
183 sizeof(st->mode), st->mode);
188 enable_irq(st->spi->irq);
189 wait_event_interruptible(st->wq_data_avail, st->done);
191 ret = __ad7793_read_reg(st, 1, 0, AD7793_REG_DATA, val, len);
193 spi_bus_unlock(st->spi->master);
198 static int ad7793_calibrate(struct ad7793_state *st, unsigned mode, unsigned ch)
202 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) | AD7793_CONF_CHAN(ch);
203 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) | AD7793_MODE_SEL(mode);
205 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
207 spi_bus_lock(st->spi->master);
210 ret = __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
211 sizeof(st->mode), st->mode);
216 enable_irq(st->spi->irq);
217 wait_event_interruptible(st->wq_data_avail, st->done);
219 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
220 AD7793_MODE_SEL(AD7793_MODE_IDLE);
222 ret = __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
223 sizeof(st->mode), st->mode);
225 spi_bus_unlock(st->spi->master);
230 static const u8 ad7793_calib_arr[6][2] = {
231 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
232 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
233 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
234 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
235 {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
236 {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
239 static int ad7793_calibrate_all(struct ad7793_state *st)
243 for (i = 0; i < ARRAY_SIZE(ad7793_calib_arr); i++) {
244 ret = ad7793_calibrate(st, ad7793_calib_arr[i][0],
245 ad7793_calib_arr[i][1]);
252 dev_err(&st->spi->dev, "Calibration failed\n");
256 static int ad7793_setup(struct ad7793_state *st)
259 unsigned long long scale_uv;
262 /* reset the serial interface */
263 ret = spi_write(st->spi, (u8 *)&ret, sizeof(ret));
266 msleep(1); /* Wait for at least 500us */
268 /* write/read test for device presence */
269 ret = ad7793_read_reg(st, AD7793_REG_ID, &id, 1);
273 id &= AD7793_ID_MASK;
275 if (!((id == AD7792_ID) || (id == AD7793_ID))) {
276 dev_err(&st->spi->dev, "device ID query failed\n");
280 st->mode = (st->pdata->mode & ~AD7793_MODE_SEL(-1)) |
281 AD7793_MODE_SEL(AD7793_MODE_IDLE);
282 st->conf = st->pdata->conf & ~AD7793_CONF_CHAN(-1);
284 ret = ad7793_write_reg(st, AD7793_REG_MODE, sizeof(st->mode), st->mode);
288 ret = ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
292 ret = ad7793_write_reg(st, AD7793_REG_IO,
293 sizeof(st->pdata->io), st->pdata->io);
297 ret = ad7793_calibrate_all(st);
301 /* Populate available ADC input ranges */
302 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
303 scale_uv = ((u64)st->int_vref_mv * 100000000)
304 >> (st->chip_info->channel[0].scan_type.realbits -
305 (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
308 st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
309 st->scale_avail[i][0] = scale_uv;
314 dev_err(&st->spi->dev, "setup failed\n");
318 static int ad7793_ring_preenable(struct iio_dev *indio_dev)
320 struct ad7793_state *st = iio_priv(indio_dev);
324 if (bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
326 ret = iio_sw_buffer_preenable(indio_dev);
330 channel = find_first_bit(indio_dev->active_scan_mask,
331 indio_dev->masklength);
333 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
334 AD7793_MODE_SEL(AD7793_MODE_CONT);
335 st->conf = (st->conf & ~AD7793_CONF_CHAN(-1)) |
336 AD7793_CONF_CHAN(indio_dev->channels[channel].address);
338 ad7793_write_reg(st, AD7793_REG_CONF, sizeof(st->conf), st->conf);
340 spi_bus_lock(st->spi->master);
341 __ad7793_write_reg(st, 1, 1, AD7793_REG_MODE,
342 sizeof(st->mode), st->mode);
345 enable_irq(st->spi->irq);
350 static int ad7793_ring_postdisable(struct iio_dev *indio_dev)
352 struct ad7793_state *st = iio_priv(indio_dev);
354 st->mode = (st->mode & ~AD7793_MODE_SEL(-1)) |
355 AD7793_MODE_SEL(AD7793_MODE_IDLE);
358 wait_event_interruptible(st->wq_data_avail, st->done);
361 disable_irq_nosync(st->spi->irq);
363 __ad7793_write_reg(st, 1, 0, AD7793_REG_MODE,
364 sizeof(st->mode), st->mode);
366 return spi_bus_unlock(st->spi->master);
370 * ad7793_trigger_handler() bh of trigger launched polling to ring buffer
373 static irqreturn_t ad7793_trigger_handler(int irq, void *p)
375 struct iio_poll_func *pf = p;
376 struct iio_dev *indio_dev = pf->indio_dev;
377 struct iio_buffer *ring = indio_dev->buffer;
378 struct ad7793_state *st = iio_priv(indio_dev);
380 s32 *dat32 = (s32 *)dat64;
382 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
383 __ad7793_read_reg(st, 1, 1, AD7793_REG_DATA,
385 indio_dev->channels[0].scan_type.realbits/8);
387 /* Guaranteed to be aligned with 8 byte boundary */
388 if (indio_dev->scan_timestamp)
389 dat64[1] = pf->timestamp;
391 ring->access->store_to(ring, (u8 *)dat64, pf->timestamp);
393 iio_trigger_notify_done(indio_dev->trig);
395 enable_irq(st->spi->irq);
400 static const struct iio_buffer_setup_ops ad7793_ring_setup_ops = {
401 .preenable = &ad7793_ring_preenable,
402 .postenable = &iio_triggered_buffer_postenable,
403 .predisable = &iio_triggered_buffer_predisable,
404 .postdisable = &ad7793_ring_postdisable,
405 .validate_scan_mask = &iio_validate_scan_mask_onehot,
408 static int ad7793_register_ring_funcs_and_init(struct iio_dev *indio_dev)
410 return iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
411 &ad7793_trigger_handler, &ad7793_ring_setup_ops);
414 static void ad7793_ring_cleanup(struct iio_dev *indio_dev)
416 iio_triggered_buffer_cleanup(indio_dev);
420 * ad7793_data_rdy_trig_poll() the event handler for the data rdy trig
422 static irqreturn_t ad7793_data_rdy_trig_poll(int irq, void *private)
424 struct ad7793_state *st = iio_priv(private);
427 wake_up_interruptible(&st->wq_data_avail);
428 disable_irq_nosync(irq);
430 iio_trigger_poll(st->trig, iio_get_time_ns());
435 static struct iio_trigger_ops ad7793_trigger_ops = {
436 .owner = THIS_MODULE,
439 static int ad7793_probe_trigger(struct iio_dev *indio_dev)
441 struct ad7793_state *st = iio_priv(indio_dev);
444 st->trig = iio_trigger_alloc("%s-dev%d",
445 spi_get_device_id(st->spi)->name,
447 if (st->trig == NULL) {
451 st->trig->ops = &ad7793_trigger_ops;
453 ret = request_irq(st->spi->irq,
454 ad7793_data_rdy_trig_poll,
456 spi_get_device_id(st->spi)->name,
459 goto error_free_trig;
461 disable_irq_nosync(st->spi->irq);
463 st->trig->dev.parent = &st->spi->dev;
464 st->trig->private_data = indio_dev;
466 ret = iio_trigger_register(st->trig);
468 /* select default trigger */
469 indio_dev->trig = st->trig;
476 free_irq(st->spi->irq, indio_dev);
478 iio_trigger_free(st->trig);
483 static void ad7793_remove_trigger(struct iio_dev *indio_dev)
485 struct ad7793_state *st = iio_priv(indio_dev);
487 iio_trigger_unregister(st->trig);
488 free_irq(st->spi->irq, indio_dev);
489 iio_trigger_free(st->trig);
492 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
493 17, 16, 12, 10, 8, 6, 4};
495 static ssize_t ad7793_read_frequency(struct device *dev,
496 struct device_attribute *attr,
499 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
500 struct ad7793_state *st = iio_priv(indio_dev);
502 return sprintf(buf, "%d\n",
503 sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
506 static ssize_t ad7793_write_frequency(struct device *dev,
507 struct device_attribute *attr,
511 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
512 struct ad7793_state *st = iio_priv(indio_dev);
516 mutex_lock(&indio_dev->mlock);
517 if (iio_buffer_enabled(indio_dev)) {
518 mutex_unlock(&indio_dev->mlock);
521 mutex_unlock(&indio_dev->mlock);
523 ret = strict_strtol(buf, 10, &lval);
529 for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
530 if (lval == sample_freq_avail[i]) {
531 mutex_lock(&indio_dev->mlock);
532 st->mode &= ~AD7793_MODE_RATE(-1);
533 st->mode |= AD7793_MODE_RATE(i);
534 ad7793_write_reg(st, AD7793_REG_MODE,
535 sizeof(st->mode), st->mode);
536 mutex_unlock(&indio_dev->mlock);
540 return ret ? ret : len;
543 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
544 ad7793_read_frequency,
545 ad7793_write_frequency);
547 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
548 "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
550 static ssize_t ad7793_show_scale_available(struct device *dev,
551 struct device_attribute *attr, char *buf)
553 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
554 struct ad7793_state *st = iio_priv(indio_dev);
557 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
558 len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
559 st->scale_avail[i][1]);
561 len += sprintf(buf + len, "\n");
566 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available, in-in_scale_available,
567 S_IRUGO, ad7793_show_scale_available, NULL, 0);
569 static struct attribute *ad7793_attributes[] = {
570 &iio_dev_attr_sampling_frequency.dev_attr.attr,
571 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
572 &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
576 static const struct attribute_group ad7793_attribute_group = {
577 .attrs = ad7793_attributes,
580 static int ad7793_read_raw(struct iio_dev *indio_dev,
581 struct iio_chan_spec const *chan,
586 struct ad7793_state *st = iio_priv(indio_dev);
588 unsigned long long scale_uv;
589 bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
592 case IIO_CHAN_INFO_RAW:
593 mutex_lock(&indio_dev->mlock);
594 if (iio_buffer_enabled(indio_dev))
597 ret = ad7793_read(st, chan->address,
598 chan->scan_type.realbits / 8, &smpl);
599 mutex_unlock(&indio_dev->mlock);
604 *val = (smpl >> chan->scan_type.shift) &
605 ((1 << (chan->scan_type.realbits)) - 1);
608 *val -= (1 << (chan->scan_type.realbits - 1));
612 case IIO_CHAN_INFO_SCALE:
613 switch (chan->type) {
615 if (chan->differential) {
617 scale_avail[(st->conf >> 8) & 0x7][0];
619 scale_avail[(st->conf >> 8) & 0x7][1];
620 return IIO_VAL_INT_PLUS_NANO;
622 /* 1170mV / 2^23 * 6 */
623 scale_uv = (1170ULL * 100000000ULL * 6ULL)
624 >> (chan->scan_type.realbits -
629 /* Always uses unity gain and internal ref */
630 scale_uv = (2500ULL * 100000000ULL)
631 >> (chan->scan_type.realbits -
638 *val2 = do_div(scale_uv, 100000000) * 10;
641 return IIO_VAL_INT_PLUS_NANO;
646 static int ad7793_write_raw(struct iio_dev *indio_dev,
647 struct iio_chan_spec const *chan,
652 struct ad7793_state *st = iio_priv(indio_dev);
656 mutex_lock(&indio_dev->mlock);
657 if (iio_buffer_enabled(indio_dev)) {
658 mutex_unlock(&indio_dev->mlock);
663 case IIO_CHAN_INFO_SCALE:
665 for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
666 if (val2 == st->scale_avail[i][1]) {
668 st->conf &= ~AD7793_CONF_GAIN(-1);
669 st->conf |= AD7793_CONF_GAIN(i);
671 if (tmp != st->conf) {
672 ad7793_write_reg(st, AD7793_REG_CONF,
675 ad7793_calibrate_all(st);
684 mutex_unlock(&indio_dev->mlock);
688 static int ad7793_validate_trigger(struct iio_dev *indio_dev,
689 struct iio_trigger *trig)
691 if (indio_dev->trig != trig)
697 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
698 struct iio_chan_spec const *chan,
701 return IIO_VAL_INT_PLUS_NANO;
704 static const struct iio_info ad7793_info = {
705 .read_raw = &ad7793_read_raw,
706 .write_raw = &ad7793_write_raw,
707 .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
708 .attrs = &ad7793_attribute_group,
709 .validate_trigger = ad7793_validate_trigger,
710 .driver_module = THIS_MODULE,
713 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
721 .address = AD7793_CH_AIN1P_AIN1M,
722 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
723 IIO_CHAN_INFO_SCALE_SHARED_BIT,
725 .scan_type = IIO_ST('s', 24, 32, 0)
733 .address = AD7793_CH_AIN2P_AIN2M,
734 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
735 IIO_CHAN_INFO_SCALE_SHARED_BIT,
737 .scan_type = IIO_ST('s', 24, 32, 0)
745 .address = AD7793_CH_AIN3P_AIN3M,
746 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
747 IIO_CHAN_INFO_SCALE_SHARED_BIT,
749 .scan_type = IIO_ST('s', 24, 32, 0)
754 .extend_name = "shorted",
758 .address = AD7793_CH_AIN1M_AIN1M,
759 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
760 IIO_CHAN_INFO_SCALE_SHARED_BIT,
762 .scan_type = IIO_ST('s', 24, 32, 0)
768 .address = AD7793_CH_TEMP,
769 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
770 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
772 .scan_type = IIO_ST('s', 24, 32, 0),
776 .extend_name = "supply",
779 .address = AD7793_CH_AVDD_MONITOR,
780 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
781 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
783 .scan_type = IIO_ST('s', 24, 32, 0),
785 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
794 .address = AD7793_CH_AIN1P_AIN1M,
795 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
796 IIO_CHAN_INFO_SCALE_SHARED_BIT,
798 .scan_type = IIO_ST('s', 16, 32, 0)
806 .address = AD7793_CH_AIN2P_AIN2M,
807 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
808 IIO_CHAN_INFO_SCALE_SHARED_BIT,
810 .scan_type = IIO_ST('s', 16, 32, 0)
818 .address = AD7793_CH_AIN3P_AIN3M,
819 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
820 IIO_CHAN_INFO_SCALE_SHARED_BIT,
822 .scan_type = IIO_ST('s', 16, 32, 0)
827 .extend_name = "shorted",
831 .address = AD7793_CH_AIN1M_AIN1M,
832 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
833 IIO_CHAN_INFO_SCALE_SHARED_BIT,
835 .scan_type = IIO_ST('s', 16, 32, 0)
841 .address = AD7793_CH_TEMP,
842 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
843 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
845 .scan_type = IIO_ST('s', 16, 32, 0),
849 .extend_name = "supply",
852 .address = AD7793_CH_AVDD_MONITOR,
853 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
854 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
856 .scan_type = IIO_ST('s', 16, 32, 0),
858 .channel[6] = IIO_CHAN_SOFT_TIMESTAMP(6),
862 static int __devinit ad7793_probe(struct spi_device *spi)
864 struct ad7793_platform_data *pdata = spi->dev.platform_data;
865 struct ad7793_state *st;
866 struct iio_dev *indio_dev;
867 int ret, voltage_uv = 0;
870 dev_err(&spi->dev, "no platform data?\n");
875 dev_err(&spi->dev, "no IRQ?\n");
879 indio_dev = iio_device_alloc(sizeof(*st));
880 if (indio_dev == NULL)
883 st = iio_priv(indio_dev);
885 st->reg = regulator_get(&spi->dev, "vcc");
886 if (!IS_ERR(st->reg)) {
887 ret = regulator_enable(st->reg);
891 voltage_uv = regulator_get_voltage(st->reg);
895 &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
899 if (pdata && pdata->vref_mv)
900 st->int_vref_mv = pdata->vref_mv;
902 st->int_vref_mv = voltage_uv / 1000;
904 st->int_vref_mv = 2500; /* Build-in ref */
906 spi_set_drvdata(spi, indio_dev);
909 indio_dev->dev.parent = &spi->dev;
910 indio_dev->name = spi_get_device_id(spi)->name;
911 indio_dev->modes = INDIO_DIRECT_MODE;
912 indio_dev->channels = st->chip_info->channel;
913 indio_dev->num_channels = 7;
914 indio_dev->info = &ad7793_info;
916 init_waitqueue_head(&st->wq_data_avail);
918 ret = ad7793_register_ring_funcs_and_init(indio_dev);
920 goto error_disable_reg;
922 ret = ad7793_probe_trigger(indio_dev);
924 goto error_unreg_ring;
926 ret = ad7793_setup(st);
928 goto error_remove_trigger;
930 ret = iio_device_register(indio_dev);
932 goto error_remove_trigger;
936 error_remove_trigger:
937 ad7793_remove_trigger(indio_dev);
939 ad7793_ring_cleanup(indio_dev);
941 if (!IS_ERR(st->reg))
942 regulator_disable(st->reg);
944 if (!IS_ERR(st->reg))
945 regulator_put(st->reg);
947 iio_device_free(indio_dev);
952 static int ad7793_remove(struct spi_device *spi)
954 struct iio_dev *indio_dev = spi_get_drvdata(spi);
955 struct ad7793_state *st = iio_priv(indio_dev);
957 iio_device_unregister(indio_dev);
958 ad7793_remove_trigger(indio_dev);
959 ad7793_ring_cleanup(indio_dev);
961 if (!IS_ERR(st->reg)) {
962 regulator_disable(st->reg);
963 regulator_put(st->reg);
966 iio_device_free(indio_dev);
971 static const struct spi_device_id ad7793_id[] = {
972 {"ad7792", ID_AD7792},
973 {"ad7793", ID_AD7793},
976 MODULE_DEVICE_TABLE(spi, ad7793_id);
978 static struct spi_driver ad7793_driver = {
981 .owner = THIS_MODULE,
983 .probe = ad7793_probe,
984 .remove = __devexit_p(ad7793_remove),
985 .id_table = ad7793_id,
987 module_spi_driver(ad7793_driver);
989 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
990 MODULE_DESCRIPTION("Analog Devices AD7792/3 ADC");
991 MODULE_LICENSE("GPL v2");