4 * lirc_serial - Device driver that records pulse- and pause-lengths
5 * (space-lengths) between DDCD event on a serial port.
7 * Copyright (C) 1996,97 Ralph Metzler <rjkm@thp.uni-koeln.de>
8 * Copyright (C) 1998 Trent Piepho <xyzzy@u.washington.edu>
9 * Copyright (C) 1998 Ben Pfaff <blp@gnu.org>
10 * Copyright (C) 1999 Christoph Bartelmus <lirc@bartelmus.de>
11 * Copyright (C) 2007 Andrei Tanas <andrei@tanas.ca> (suspend/resume support)
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 * Steve's changes to improve transmission fidelity:
30 * - for systems with the rdtsc instruction and the clock counter, a
31 * send_pule that times the pulses directly using the counter.
32 * This means that the LIRC_SERIAL_TRANSMITTER_LATENCY fudge is
33 * not needed. Measurement shows very stable waveform, even where
34 * PCI activity slows the access to the UART, which trips up other
36 * - For other system, non-integer-microsecond pulse/space lengths,
37 * done using fixed point binary. So, much more accurate carrier
39 * - fine tuned transmitter latency, taking advantage of fractional
40 * microseconds in previous change
41 * - Fixed bug in the way transmitter latency was accounted for by
42 * tuning the pulse lengths down - the send_pulse routine ignored
43 * this overhead as it timed the overall pulse length - so the
44 * pulse frequency was right but overall pulse length was too
45 * long. Fixed by accounting for latency on each pulse/space
48 * Steve Davies <steve@daviesfam.org> July 2001
51 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
53 #include <linux/module.h>
54 #include <linux/errno.h>
55 #include <linux/signal.h>
56 #include <linux/sched.h>
58 #include <linux/interrupt.h>
59 #include <linux/ioport.h>
60 #include <linux/kernel.h>
61 #include <linux/serial_reg.h>
62 #include <linux/time.h>
63 #include <linux/string.h>
64 #include <linux/types.h>
65 #include <linux/wait.h>
67 #include <linux/delay.h>
68 #include <linux/poll.h>
69 #include <linux/platform_device.h>
70 #include <linux/gpio.h>
72 #include <linux/irq.h>
73 #include <linux/fcntl.h>
74 #include <linux/spinlock.h>
76 /* From Intel IXP42X Developer's Manual (#252480-005): */
77 /* ftp://download.intel.com/design/network/manuals/25248005.pdf */
78 #define UART_IE_IXP42X_UUE 0x40 /* IXP42X UART Unit enable */
79 #define UART_IE_IXP42X_RTOIE 0x10 /* IXP42X Receiver Data Timeout int.enable */
81 #include <media/lirc.h>
82 #include <media/lirc_dev.h>
84 #define LIRC_DRIVER_NAME "lirc_serial"
88 int signal_pin_change;
91 long (*send_pulse)(unsigned long length);
92 void (*send_space)(long length);
97 #define LIRC_HOMEBREW 0
99 #define LIRC_IRDEO_REMOTE 2
100 #define LIRC_ANIMAX 3
104 /*** module parameters ***/
110 static bool softcarrier = true;
111 static bool share_irq;
112 static int sense = -1; /* -1 = auto, 0 = active high, 1 = active low */
113 static bool txsense; /* 0 = active high, 1 = active low */
115 /* forward declarations */
116 static long send_pulse_irdeo(unsigned long length);
117 static long send_pulse_homebrew(unsigned long length);
118 static void send_space_irdeo(long length);
119 static void send_space_homebrew(long length);
121 static struct lirc_serial hardware[] = {
123 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_HOMEBREW].lock),
124 .signal_pin = UART_MSR_DCD,
125 .signal_pin_change = UART_MSR_DDCD,
126 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
127 .off = (UART_MCR_RTS | UART_MCR_OUT2),
128 .send_pulse = send_pulse_homebrew,
129 .send_space = send_space_homebrew,
130 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
131 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
132 LIRC_CAN_SET_SEND_CARRIER |
133 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
135 .features = LIRC_CAN_REC_MODE2
140 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO].lock),
141 .signal_pin = UART_MSR_DSR,
142 .signal_pin_change = UART_MSR_DDSR,
144 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
145 .send_pulse = send_pulse_irdeo,
146 .send_space = send_space_irdeo,
147 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
148 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
151 [LIRC_IRDEO_REMOTE] = {
152 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IRDEO_REMOTE].lock),
153 .signal_pin = UART_MSR_DSR,
154 .signal_pin_change = UART_MSR_DDSR,
155 .on = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
156 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
157 .send_pulse = send_pulse_irdeo,
158 .send_space = send_space_irdeo,
159 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
160 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
164 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_ANIMAX].lock),
165 .signal_pin = UART_MSR_DCD,
166 .signal_pin_change = UART_MSR_DDCD,
168 .off = (UART_MCR_RTS | UART_MCR_DTR | UART_MCR_OUT2),
171 .features = LIRC_CAN_REC_MODE2
175 .lock = __SPIN_LOCK_UNLOCKED(hardware[LIRC_IGOR].lock),
176 .signal_pin = UART_MSR_DSR,
177 .signal_pin_change = UART_MSR_DDSR,
178 .on = (UART_MCR_RTS | UART_MCR_OUT2 | UART_MCR_DTR),
179 .off = (UART_MCR_RTS | UART_MCR_OUT2),
180 .send_pulse = send_pulse_homebrew,
181 .send_space = send_space_homebrew,
182 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
183 .features = (LIRC_CAN_SET_SEND_DUTY_CYCLE |
184 LIRC_CAN_SET_SEND_CARRIER |
185 LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2)
187 .features = LIRC_CAN_REC_MODE2
192 #define RS_ISR_PASS_LIMIT 256
195 * A long pulse code from a remote might take up to 300 bytes. The
196 * daemon should read the bytes as soon as they are generated, so take
197 * the number of keys you think you can push before the daemon runs
198 * and multiply by 300. The driver will warn you if you overrun this
199 * buffer. If you have a slow computer or non-busmastering IDE disks,
200 * maybe you will need to increase this.
203 /* This MUST be a power of two! It has to be larger than 1 as well. */
207 static struct timeval lasttv = {0, 0};
209 static struct lirc_buffer rbuf;
211 static unsigned int freq = 38000;
212 static unsigned int duty_cycle = 50;
214 /* Initialized in init_timing_params() */
215 static unsigned long period;
216 static unsigned long pulse_width;
217 static unsigned long space_width;
219 #if defined(__i386__)
222 * Linux I/O port programming mini-HOWTO
223 * Author: Riku Saikkonen <Riku.Saikkonen@hut.fi>
224 * v, 28 December 1997
227 * Actually, a port I/O instruction on most ports in the 0-0x3ff range
228 * takes almost exactly 1 microsecond, so if you're, for example, using
229 * the parallel port directly, just do additional inb()s from that port
233 /* transmitter latency 1.5625us 0x1.90 - this figure arrived at from
234 * comment above plus trimming to match actual measured frequency.
235 * This will be sensitive to cpu speed, though hopefully most of the 1.5us
236 * is spent in the uart access. Still - for reference test machine was a
237 * 1.13GHz Athlon system - Steve
241 * changed from 400 to 450 as this works better on slower machines;
242 * faster machines will use the rdtsc code anyway
244 #define LIRC_SERIAL_TRANSMITTER_LATENCY 450
248 /* does anybody have information on other platforms ? */
250 #define LIRC_SERIAL_TRANSMITTER_LATENCY 256
252 #endif /* __i386__ */
254 * FIXME: should we be using hrtimers instead of this
255 * LIRC_SERIAL_TRANSMITTER_LATENCY nonsense?
258 /* fetch serial input packet (1 byte) from register offset */
259 static u8 sinp(int offset)
262 /* the register is memory-mapped */
265 return inb(io + offset);
268 /* write serial output packet (1 byte) of value to register offset */
269 static void soutp(int offset, u8 value)
272 /* the register is memory-mapped */
275 outb(value, io + offset);
281 soutp(UART_MCR, hardware[type].off);
283 soutp(UART_MCR, hardware[type].on);
286 static void off(void)
289 soutp(UART_MCR, hardware[type].on);
291 soutp(UART_MCR, hardware[type].off);
294 #ifndef MAX_UDELAY_MS
295 #define MAX_UDELAY_US 5000
297 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
300 static void safe_udelay(unsigned long usecs)
302 while (usecs > MAX_UDELAY_US) {
303 udelay(MAX_UDELAY_US);
304 usecs -= MAX_UDELAY_US;
311 * This is an overflow/precision juggle, complicated in that we can't
312 * do long long divide in the kernel
316 * When we use the rdtsc instruction to measure clocks, we keep the
317 * pulse and space widths as clock cycles. As this is CPU speed
318 * dependent, the widths must be calculated in init_port and ioctl
322 static int init_timing_params(unsigned int new_duty_cycle,
323 unsigned int new_freq)
325 __u64 loops_per_sec, work;
327 duty_cycle = new_duty_cycle;
330 loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
333 /* How many clocks in a microsecond?, avoiding long long divide */
334 work = loops_per_sec;
335 work *= 4295; /* 4295 = 2^32 / 1e6 */
338 * Carrier period in clocks, approach good up to 32GHz clock,
339 * gets carrier frequency within 8Hz
341 period = loops_per_sec >> 3;
342 period /= (freq >> 3);
344 /* Derive pulse and space from the period */
345 pulse_width = period * duty_cycle / 100;
346 space_width = period - pulse_width;
347 pr_debug("in init_timing_params, freq=%d, duty_cycle=%d, clk/jiffy=%ld, pulse=%ld, space=%ld, conv_us_to_clocks=%ld\n",
348 freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
349 pulse_width, space_width, conv_us_to_clocks);
352 #else /* ! USE_RDTSC */
353 static int init_timing_params(unsigned int new_duty_cycle,
354 unsigned int new_freq)
357 * period, pulse/space width are kept with 8 binary places -
358 * IE multiplied by 256.
360 if (256 * 1000000L / new_freq * new_duty_cycle / 100 <=
361 LIRC_SERIAL_TRANSMITTER_LATENCY)
363 if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <=
364 LIRC_SERIAL_TRANSMITTER_LATENCY)
366 duty_cycle = new_duty_cycle;
368 period = 256 * 1000000L / freq;
369 pulse_width = period * duty_cycle / 100;
370 space_width = period - pulse_width;
371 pr_debug("in init_timing_params, freq=%d pulse=%ld, space=%ld\n",
372 freq, pulse_width, space_width);
375 #endif /* USE_RDTSC */
378 /* return value: space length delta */
380 static long send_pulse_irdeo(unsigned long length)
384 unsigned char output;
385 unsigned char chunk, shifted;
387 /* how many bits have to be sent ? */
388 rawbits = length * 1152 / 10000;
393 for (i = 0, output = 0x7f; rawbits > 0; rawbits -= 3) {
394 shifted = chunk << (i * 3);
396 output &= (~shifted);
399 soutp(UART_TX, output);
400 while (!(sinp(UART_LSR) & UART_LSR_THRE))
407 soutp(UART_TX, output);
408 while (!(sinp(UART_LSR) & UART_LSR_TEMT))
413 ret = (-rawbits) * 10000 / 1152;
415 ret = (3 - i) * 3 * 10000 / 1152 + (-rawbits) * 10000 / 1152;
420 /* Version using udelay() */
423 * here we use fixed point arithmetic, with 8
424 * fractional bits. that gets us within 0.1% or so of the right average
425 * frequency, albeit with some jitter in pulse length - Steve
427 * This should use ndelay instead.
430 /* To match 8 fractional bits used for pulse/space length */
432 static long send_pulse_homebrew_softcarrier(unsigned long length)
435 unsigned long actual, target, d;
439 actual = 0; target = 0; flag = 0;
440 while (actual < length) {
443 target += space_width;
446 target += pulse_width;
448 d = (target - actual -
449 LIRC_SERIAL_TRANSMITTER_LATENCY + 128) >> 8;
451 * Note - we've checked in ioctl that the pulse/space
452 * widths are big enough so that d is > 0
455 actual += (d << 8) + LIRC_SERIAL_TRANSMITTER_LATENCY;
458 return (actual-length) >> 8;
461 static long send_pulse_homebrew(unsigned long length)
467 return send_pulse_homebrew_softcarrier(length);
474 static void send_space_irdeo(long length)
482 static void send_space_homebrew(long length)
490 static void rbwrite(int l)
492 if (lirc_buffer_full(&rbuf)) {
493 /* no new signals will be accepted */
494 pr_debug("Buffer overrun\n");
497 lirc_buffer_write(&rbuf, (void *)&l);
500 static void frbwrite(int l)
502 /* simple noise filter */
503 static int pulse, space;
504 static unsigned int ptr;
506 if (ptr > 0 && (l & PULSE_BIT)) {
507 pulse += l & PULSE_MASK;
510 rbwrite(pulse | PULSE_BIT);
516 if (!(l & PULSE_BIT)) {
526 if (space > PULSE_MASK)
529 if (space > PULSE_MASK)
535 rbwrite(pulse | PULSE_BIT);
543 static irqreturn_t lirc_irq_handler(int i, void *blah)
550 static int last_dcd = -1;
552 if ((sinp(UART_IIR) & UART_IIR_NO_INT)) {
553 /* not our interrupt */
560 status = sinp(UART_MSR);
561 if (counter > RS_ISR_PASS_LIMIT) {
562 pr_warn("AIEEEE: We're caught!\n");
565 if ((status & hardware[type].signal_pin_change)
567 /* get current time */
568 do_gettimeofday(&tv);
570 /* New mode, written by Trent Piepho
571 <xyzzy@u.washington.edu>. */
574 * The old format was not very portable.
575 * We now use an int to pass pulses
576 * and spaces to user space.
578 * If PULSE_BIT is set a pulse has been
579 * received, otherwise a space has been
580 * received. The driver needs to know if your
581 * receiver is active high or active low, or
582 * the space/pulse sense could be
583 * inverted. The bits denoted by PULSE_MASK are
584 * the length in microseconds. Lengths greater
585 * than or equal to 16 seconds are clamped to
586 * PULSE_MASK. All other bits are unused.
587 * This is a much simpler interface for user
588 * programs, as well as eliminating "out of
589 * phase" errors with space/pulse
593 /* calc time since last interrupt in microseconds */
594 dcd = (status & hardware[type].signal_pin) ? 1 : 0;
596 if (dcd == last_dcd) {
597 pr_warn("ignoring spike: %d %d %lx %lx %lx %lx\n",
599 tv.tv_sec, lasttv.tv_sec,
600 (unsigned long)tv.tv_usec,
601 (unsigned long)lasttv.tv_usec);
605 deltv = tv.tv_sec-lasttv.tv_sec;
606 if (tv.tv_sec < lasttv.tv_sec ||
607 (tv.tv_sec == lasttv.tv_sec &&
608 tv.tv_usec < lasttv.tv_usec)) {
609 pr_warn("AIEEEE: your clock just jumped backwards\n");
610 pr_warn("%d %d %lx %lx %lx %lx\n",
612 tv.tv_sec, lasttv.tv_sec,
613 (unsigned long)tv.tv_usec,
614 (unsigned long)lasttv.tv_usec);
616 } else if (deltv > 15) {
617 data = PULSE_MASK; /* really long time */
620 pr_warn("AIEEEE: %d %d %lx %lx %lx %lx\n",
622 tv.tv_sec, lasttv.tv_sec,
623 (unsigned long)tv.tv_usec,
624 (unsigned long)lasttv.tv_usec);
626 * detecting pulse while this
629 sense = sense ? 0 : 1;
632 data = (int) (deltv*1000000 +
635 frbwrite(dcd^sense ? data : (data|PULSE_BIT));
638 wake_up_interruptible(&rbuf.wait_poll);
640 } while (!(sinp(UART_IIR) & UART_IIR_NO_INT)); /* still pending ? */
645 static int hardware_init_port(void)
647 u8 scratch, scratch2, scratch3;
650 * This is a simple port existence test, borrowed from the autoconfig
651 * function in drivers/serial/8250.c
653 scratch = sinp(UART_IER);
658 scratch2 = sinp(UART_IER) & 0x0f;
659 soutp(UART_IER, 0x0f);
663 scratch3 = sinp(UART_IER) & 0x0f;
664 soutp(UART_IER, scratch);
665 if (scratch2 != 0 || scratch3 != 0x0f) {
666 /* we fail, there's nothing here */
667 pr_err("port existence test failed, cannot continue\n");
674 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
676 /* First of all, disable all interrupts */
677 soutp(UART_IER, sinp(UART_IER) &
678 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
680 /* Clear registers. */
686 /* Set line for power source */
689 /* Clear registers again to be sure. */
697 case LIRC_IRDEO_REMOTE:
698 /* setup port to 7N1 @ 115200 Baud */
699 /* 7N1+start = 9 bits at 115200 ~ 3 bits at 38kHz */
702 soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
703 /* Set divisor to 1 => 115200 Baud */
706 /* Set DLAB 0 + 7N1 */
707 soutp(UART_LCR, UART_LCR_WLEN7);
708 /* THR interrupt already disabled at this point */
717 static int lirc_serial_probe(struct platform_device *dev)
719 int i, nlow, nhigh, result;
721 result = devm_request_irq(&dev->dev, irq, lirc_irq_handler,
722 (share_irq ? IRQF_SHARED : 0),
723 LIRC_DRIVER_NAME, &hardware);
725 if (result == -EBUSY)
726 dev_err(&dev->dev, "IRQ %d busy\n", irq);
727 else if (result == -EINVAL)
728 dev_err(&dev->dev, "Bad irq number or handler\n");
732 /* Reserve io region. */
734 * Future MMAP-Developers: Attention!
735 * For memory mapped I/O you *might* need to use ioremap() first,
736 * for the NSLU2 it's done in boot code.
739 && (devm_request_mem_region(&dev->dev, iommap, 8 << ioshift,
740 LIRC_DRIVER_NAME) == NULL))
742 && (devm_request_region(&dev->dev, io, 8,
743 LIRC_DRIVER_NAME) == NULL))) {
744 dev_err(&dev->dev, "port %04x already in use\n", io);
745 dev_warn(&dev->dev, "use 'setserial /dev/ttySX uart none'\n");
747 "or compile the serial port driver as module and\n");
748 dev_warn(&dev->dev, "make sure this module is loaded first\n");
752 result = hardware_init_port();
756 /* Initialize pulse/space widths */
757 init_timing_params(duty_cycle, freq);
759 /* If pin is high, then this must be an active low receiver. */
761 /* wait 1/2 sec for the power supply */
765 * probe 9 times every 0.04s, collect "votes" for
770 for (i = 0; i < 9; i++) {
771 if (sinp(UART_MSR) & hardware[type].signal_pin)
777 sense = nlow >= nhigh ? 1 : 0;
778 dev_info(&dev->dev, "auto-detected active %s receiver\n",
779 sense ? "low" : "high");
781 dev_info(&dev->dev, "Manually using active %s receiver\n",
782 sense ? "low" : "high");
784 dev_dbg(&dev->dev, "Interrupt %d, port %04x obtained\n", irq, io);
788 static int set_use_inc(void *data)
792 /* initialize timestamp */
793 do_gettimeofday(&lasttv);
795 spin_lock_irqsave(&hardware[type].lock, flags);
798 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
800 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
802 spin_unlock_irqrestore(&hardware[type].lock, flags);
807 static void set_use_dec(void *data)
808 { unsigned long flags;
810 spin_lock_irqsave(&hardware[type].lock, flags);
813 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
815 /* First of all, disable all interrupts */
816 soutp(UART_IER, sinp(UART_IER) &
817 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
818 spin_unlock_irqrestore(&hardware[type].lock, flags);
821 static ssize_t lirc_write(struct file *file, const char __user *buf,
822 size_t n, loff_t *ppos)
829 if (!(hardware[type].features & LIRC_CAN_SEND_PULSE))
832 count = n / sizeof(int);
833 if (n % sizeof(int) || count % 2 == 0)
835 wbuf = memdup_user(buf, n);
837 return PTR_ERR(wbuf);
838 spin_lock_irqsave(&hardware[type].lock, flags);
839 if (type == LIRC_IRDEO) {
843 for (i = 0; i < count; i++) {
845 hardware[type].send_space(wbuf[i] - delta);
847 delta = hardware[type].send_pulse(wbuf[i]);
850 spin_unlock_irqrestore(&hardware[type].lock, flags);
855 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
858 u32 __user *uptr = (u32 __user *)arg;
862 case LIRC_GET_SEND_MODE:
863 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
866 result = put_user(LIRC_SEND2MODE
867 (hardware[type].features&LIRC_CAN_SEND_MASK),
873 case LIRC_SET_SEND_MODE:
874 if (!(hardware[type].features&LIRC_CAN_SEND_MASK))
877 result = get_user(value, uptr);
880 /* only LIRC_MODE_PULSE supported */
881 if (value != LIRC_MODE_PULSE)
885 case LIRC_GET_LENGTH:
888 case LIRC_SET_SEND_DUTY_CYCLE:
889 pr_debug("SET_SEND_DUTY_CYCLE\n");
890 if (!(hardware[type].features&LIRC_CAN_SET_SEND_DUTY_CYCLE))
893 result = get_user(value, uptr);
896 if (value <= 0 || value > 100)
898 return init_timing_params(value, freq);
900 case LIRC_SET_SEND_CARRIER:
901 pr_debug("SET_SEND_CARRIER\n");
902 if (!(hardware[type].features&LIRC_CAN_SET_SEND_CARRIER))
905 result = get_user(value, uptr);
908 if (value > 500000 || value < 20000)
910 return init_timing_params(duty_cycle, value);
913 return lirc_dev_fop_ioctl(filep, cmd, arg);
918 static const struct file_operations lirc_fops = {
919 .owner = THIS_MODULE,
921 .unlocked_ioctl = lirc_ioctl,
923 .compat_ioctl = lirc_ioctl,
925 .read = lirc_dev_fop_read,
926 .poll = lirc_dev_fop_poll,
927 .open = lirc_dev_fop_open,
928 .release = lirc_dev_fop_close,
932 static struct lirc_driver driver = {
933 .name = LIRC_DRIVER_NAME,
940 .set_use_inc = set_use_inc,
941 .set_use_dec = set_use_dec,
944 .owner = THIS_MODULE,
947 static struct platform_device *lirc_serial_dev;
949 static int lirc_serial_suspend(struct platform_device *dev,
953 soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
955 /* Disable all interrupts */
956 soutp(UART_IER, sinp(UART_IER) &
957 (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
959 /* Clear registers. */
968 /* twisty maze... need a forward-declaration here... */
969 static void lirc_serial_exit(void);
971 static int lirc_serial_resume(struct platform_device *dev)
976 result = hardware_init_port();
980 spin_lock_irqsave(&hardware[type].lock, flags);
981 /* Enable Interrupt */
982 do_gettimeofday(&lasttv);
983 soutp(UART_IER, sinp(UART_IER)|UART_IER_MSI);
986 lirc_buffer_clear(&rbuf);
988 spin_unlock_irqrestore(&hardware[type].lock, flags);
993 static struct platform_driver lirc_serial_driver = {
994 .probe = lirc_serial_probe,
995 .suspend = lirc_serial_suspend,
996 .resume = lirc_serial_resume,
998 .name = "lirc_serial",
1002 static int __init lirc_serial_init(void)
1006 /* Init read buffer. */
1007 result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN);
1011 result = platform_driver_register(&lirc_serial_driver);
1013 printk("lirc register returned %d\n", result);
1014 goto exit_buffer_free;
1017 lirc_serial_dev = platform_device_alloc("lirc_serial", 0);
1018 if (!lirc_serial_dev) {
1020 goto exit_driver_unregister;
1023 result = platform_device_add(lirc_serial_dev);
1025 goto exit_device_put;
1030 platform_device_put(lirc_serial_dev);
1031 exit_driver_unregister:
1032 platform_driver_unregister(&lirc_serial_driver);
1034 lirc_buffer_free(&rbuf);
1038 static void lirc_serial_exit(void)
1040 platform_device_unregister(lirc_serial_dev);
1041 platform_driver_unregister(&lirc_serial_driver);
1042 lirc_buffer_free(&rbuf);
1045 static int __init lirc_serial_init_module(void)
1052 case LIRC_IRDEO_REMOTE:
1055 /* if nothing specified, use ttyS0/com1 and irq 4 */
1056 io = io ? io : 0x3f8;
1057 irq = irq ? irq : 4;
1066 hardware[type].features &=
1067 ~(LIRC_CAN_SET_SEND_DUTY_CYCLE|
1068 LIRC_CAN_SET_SEND_CARRIER);
1073 /* make sure sense is either -1, 0, or 1 */
1077 result = lirc_serial_init();
1081 driver.features = hardware[type].features;
1082 driver.dev = &lirc_serial_dev->dev;
1083 driver.minor = lirc_register_driver(&driver);
1084 if (driver.minor < 0) {
1085 pr_err("register_chrdev failed!\n");
1087 return driver.minor;
1092 static void __exit lirc_serial_exit_module(void)
1094 lirc_unregister_driver(driver.minor);
1096 pr_debug("cleaned up module\n");
1100 module_init(lirc_serial_init_module);
1101 module_exit(lirc_serial_exit_module);
1103 MODULE_DESCRIPTION("Infra-red receiver driver for serial ports.");
1104 MODULE_AUTHOR("Ralph Metzler, Trent Piepho, Ben Pfaff, "
1105 "Christoph Bartelmus, Andrei Tanas");
1106 MODULE_LICENSE("GPL");
1108 module_param(type, int, S_IRUGO);
1109 MODULE_PARM_DESC(type, "Hardware type (0 = home-brew, 1 = IRdeo,"
1110 " 2 = IRdeo Remote, 3 = AnimaX, 4 = IgorPlug,"
1111 " 5 = NSLU2 RX:CTS2/TX:GreenLED)");
1113 module_param(io, int, S_IRUGO);
1114 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1116 /* some architectures (e.g. intel xscale) have memory mapped registers */
1117 module_param(iommap, bool, S_IRUGO);
1118 MODULE_PARM_DESC(iommap, "physical base for memory mapped I/O"
1119 " (0 = no memory mapped io)");
1122 * some architectures (e.g. intel xscale) align the 8bit serial registers
1123 * on 32bit word boundaries.
1124 * See linux-kernel/drivers/tty/serial/8250/8250.c serial_in()/out()
1126 module_param(ioshift, int, S_IRUGO);
1127 MODULE_PARM_DESC(ioshift, "shift I/O register offset (0 = no shift)");
1129 module_param(irq, int, S_IRUGO);
1130 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1132 module_param(share_irq, bool, S_IRUGO);
1133 MODULE_PARM_DESC(share_irq, "Share interrupts (0 = off, 1 = on)");
1135 module_param(sense, int, S_IRUGO);
1136 MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit"
1137 " (0 = active high, 1 = active low )");
1139 #ifdef CONFIG_LIRC_SERIAL_TRANSMITTER
1140 module_param(txsense, bool, S_IRUGO);
1141 MODULE_PARM_DESC(txsense, "Sense of transmitter circuit"
1142 " (0 = active high, 1 = active low )");
1145 module_param(softcarrier, bool, S_IRUGO);
1146 MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)");