1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 ******************************************************************************/
22 #define MAX_DOZE_WAITING_TIMES_9x 64
24 #define MAX_PRECMD_CNT 16
25 #define MAX_RFDEPENDCMD_CNT 16
26 #define MAX_POSTCMD_CNT 16
28 #define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
29 #define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
30 #define RadioA_ArrayLength RadioA_ArrayLengthPciE
31 #define RadioB_ArrayLength RadioB_ArrayLengthPciE
32 #define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
33 #define RadioC_ArrayLength RadioC_ArrayLengthPciE
34 #define RadioD_ArrayLength RadioD_ArrayLengthPciE
35 #define PHY_REGArrayLength PHY_REGArrayLengthPciE
36 #define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
38 #define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG
39 #define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array
40 #define Rtl819XRadioA_Array Rtl8192PciERadioA_Array
41 #define Rtl819XRadioB_Array Rtl8192PciERadioB_Array
42 #define Rtl819XRadioC_Array Rtl8192PciERadioC_Array
43 #define Rtl819XRadioD_Array Rtl8192PciERadioD_Array
44 #define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array
45 #define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray
46 #define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray
52 CmdID_SetTxPowerLevel,
55 CmdID_WritePortUshort,
60 /*--------------------------------Define structure--------------------------------*/
62 enum sw_chnl_cmd_id CmdID;
68 extern u32 rtl819XMACPHY_Array_PG[];
69 extern u32 rtl819XPHY_REG_1T2RArray[];
70 extern u32 rtl819XAGCTAB_Array[];
71 extern u32 rtl819XRadioA_Array[];
72 extern u32 rtl819XRadioB_Array[];
73 extern u32 rtl819XRadioC_Array[];
74 extern u32 rtl819XRadioD_Array[];
81 HW90_BLOCK_MAXIMUM = 4,
84 enum rf90_radio_path {
92 #define bMaskByte0 0xff
93 #define bMaskByte1 0xff00
94 #define bMaskByte2 0xff0000
95 #define bMaskByte3 0xff000000
96 #define bMaskHWord 0xffff0000
97 #define bMaskLWord 0x0000ffff
98 #define bMaskDWord 0xffffffff
100 extern u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device* dev, u32 eRFPath);
101 extern void rtl8192_setBBreg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask, u32 dwData);
102 extern u32 rtl8192_QueryBBReg(struct net_device* dev, u32 dwRegAddr, u32 dwBitMask);
103 extern void rtl8192_phy_SetRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask, u32 Data);
104 extern u32 rtl8192_phy_QueryRFReg(struct net_device* dev, enum rf90_radio_path eRFPath, u32 RegAddr, u32 BitMask);
105 extern void rtl8192_phy_configmac(struct net_device* dev);
106 extern void rtl8192_phyConfigBB(struct net_device* dev, u8 ConfigType);
107 extern bool rtl8192_phy_checkBBAndRF(struct net_device* dev, enum hw90_block CheckBlock, enum rf90_radio_path eRFPath);
108 extern bool rtl8192_BBConfig(struct net_device* dev);
109 extern void rtl8192_phy_getTxPower(struct net_device* dev);
110 extern void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel);
111 extern bool rtl8192_phy_RFConfig(struct net_device* dev);
112 extern void rtl8192_phy_updateInitGain(struct net_device* dev);
113 extern u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device* dev, enum rf90_radio_path eRFPath);
115 extern u8 rtl8192_phy_SwChnl(struct net_device* dev, u8 channel);
116 extern void rtl8192_SetBWMode(struct net_device *dev, enum ht_channel_width Bandwidth, enum ht_extchnl_offset Offset);
117 extern void rtl8192_SwChnl_WorkItem(struct net_device *dev);
118 extern void rtl8192_SetBWModeWorkItem(struct net_device *dev);
119 extern void InitialGain819xPci(struct net_device *dev, u8 Operation);
121 extern void PHY_SetRtl8192eRfOff(struct net_device *dev);
125 struct net_device* dev,
126 RT_RF_POWER_STATE eRFPowerState
128 #define PHY_SetRFPowerState SetRFPowerState
130 extern void PHY_ScanOperationBackup8192(struct net_device* dev,u8 Operation);