1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 ******************************************************************************/
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/sched.h>
34 #include <linux/types.h>
35 #include <linux/interrupt.h>
36 #include <linux/slab.h>
37 #include <linux/netdevice.h>
38 #include <linux/pci.h>
39 #include <linux/etherdevice.h>
40 #include <linux/delay.h>
41 #include <linux/rtnetlink.h>
42 #include <linux/wireless.h>
43 #include <linux/timer.h>
44 #include <linux/proc_fs.h>
45 #include <linux/if_arp.h>
46 #include <linux/random.h>
47 #include <linux/version.h>
53 #include "r8192E_firmware.h"
54 #include "r8192E_hw.h"
56 #include "r8190P_def.h"
57 #include "r8192E_dev.h"
59 #include "rtl_debug.h"
60 #include "rtl_eeprom.h"
65 #define DRV_COPYRIGHT "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
66 #define DRV_AUTHOR "<wlanfae@realtek.com>"
67 #define DRV_VERSION "0014.0401.2010"
69 #define DRV_NAME "rtl819xE"
71 #define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8190P)||\
72 (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192E))
73 #define IS_HARDWARE_TYPE_8192SE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192SE)
74 #define IS_HARDWARE_TYPE_8192CE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192CE)
75 #define IS_HARDWARE_TYPE_8192CU(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192CU)
76 #define IS_HARDWARE_TYPE_8192DE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192DE)
77 #define IS_HARDWARE_TYPE_8192DU(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192DU)
79 #define RTL_PCI_DEVICE(vend, dev, cfg) \
80 .vendor = (vend), .device = (dev), \
81 .subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
82 .driver_data = (kernel_ulong_t)&(cfg)
84 #define irqreturn_type irqreturn_t
86 #define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
88 #define RTL_MAX_SCAN_SIZE 128
90 #define RTL_RATE_MAX 30
92 #define TOTAL_CAM_ENTRY 32
93 #define CAM_CONTENT_COUNT 8
96 #define BIT(_i) (1<<(_i))
99 #define IS_NIC_DOWN(priv) (!(priv)->up)
101 #define IS_ADAPTER_SENDS_BEACON(dev) 0
103 #define IS_UNDER_11N_AES_MODE(_rtllib) ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
104 (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
106 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
107 #define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
108 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
109 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
110 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
111 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10
112 #define HAL_HW_PCI_REVISION_ID_8192CE 0x1
113 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
114 #define HAL_HW_PCI_REVISION_ID_8192DE 0x0
115 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
117 #define HAL_HW_PCI_8180_DEVICE_ID 0x8180
118 #define HAL_HW_PCI_8185_DEVICE_ID 0x8185
119 #define HAL_HW_PCI_8188_DEVICE_ID 0x8188
120 #define HAL_HW_PCI_8198_DEVICE_ID 0x8198
121 #define HAL_HW_PCI_8190_DEVICE_ID 0x8190
122 #define HAL_HW_PCI_8192_DEVICE_ID 0x8192
123 #define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
124 #define HAL_HW_PCI_8174_DEVICE_ID 0x8174
125 #define HAL_HW_PCI_8173_DEVICE_ID 0x8173
126 #define HAL_HW_PCI_8172_DEVICE_ID 0x8172
127 #define HAL_HW_PCI_8171_DEVICE_ID 0x8171
128 #define HAL_HW_PCI_0045_DEVICE_ID 0x0045
129 #define HAL_HW_PCI_0046_DEVICE_ID 0x0046
130 #define HAL_HW_PCI_0044_DEVICE_ID 0x0044
131 #define HAL_HW_PCI_0047_DEVICE_ID 0x0047
132 #define HAL_HW_PCI_700F_DEVICE_ID 0x700F
133 #define HAL_HW_PCI_701F_DEVICE_ID 0x701F
134 #define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
135 #define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
136 #define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
137 #define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
138 #define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
139 #define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
140 #define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
141 #define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
143 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R
145 #define RTLLIB_WATCH_DOG_TIME 2000
147 #define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
148 #define MAX_FIRMWARE_INFORMATION_SIZE 32
149 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
150 #define ENCRYPTION_MAX_OVERHEAD 128
151 #define MAX_FRAGMENT_COUNT 8
152 #define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
156 #define DEFAULT_FRAG_THRESHOLD 2342U
157 #define MIN_FRAG_THRESHOLD 256U
158 #define DEFAULT_BEACONINTERVAL 0x64U
160 #define DEFAULT_SSID ""
161 #define DEFAULT_RETRY_RTS 7
162 #define DEFAULT_RETRY_DATA 7
163 #define PRISM_HDR_SIZE 64
165 #define PHY_RSSI_SLID_WIN_MAX 100
167 #define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
169 #define TxBBGainTableLength 37
170 #define CCKTxBBGainTableLength 23
172 #define CHANNEL_PLAN_LEN 10
175 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4
176 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
178 #define MAX_TX_QUEUE 9
180 #define MAX_RX_QUEUE 1
182 #define MAX_RX_COUNT 64
183 #define MAX_TX_QUEUE_COUNT 9
185 enum RTL819x_PHY_PARAM {
186 RTL819X_PHY_MACPHY_REG = 0,
187 RTL819X_PHY_MACPHY_REG_PG = 1,
188 RTL8188C_PHY_MACREG =2,
189 RTL8192C_PHY_MACREG =3,
191 RTL819X_PHY_REG_1T2R = 5,
192 RTL819X_PHY_REG_to1T1R = 6,
193 RTL819X_PHY_REG_to1T2R = 7,
194 RTL819X_PHY_REG_to2T2R = 8,
195 RTL819X_PHY_REG_PG = 9,
196 RTL819X_AGC_TAB = 10,
197 RTL819X_PHY_RADIO_A =11,
198 RTL819X_PHY_RADIO_A_1T =12,
199 RTL819X_PHY_RADIO_A_2T =13,
200 RTL819X_PHY_RADIO_B =14,
201 RTL819X_PHY_RADIO_B_GM =15,
202 RTL819X_PHY_RADIO_C =16,
203 RTL819X_PHY_RADIO_D =17,
204 RTL819X_EEPROM_MAP =18,
205 RTL819X_EFUSE_MAP =19,
227 COMP_POWER_TRACKING = BIT18,
230 COMP_FIRMWARE = BIT21,
254 enum rt_eeprom_type {
261 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
262 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
263 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
264 TXCMD_SET_TX_DURATION = 0xFF900003,
265 TXCMD_SET_RX_RSSI = 0xFF900004,
266 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
270 enum rt_rf_type_819xu {
292 enum rt_customer_id {
294 RT_CID_8187_ALPHA0 = 1,
295 RT_CID_8187_SERCOMM_PS = 2,
296 RT_CID_8187_HW_LED = 3,
297 RT_CID_8187_NETGEAR = 4,
299 RT_CID_819x_CAMEO = 6,
300 RT_CID_819x_RUNTOP = 7,
301 RT_CID_819x_Senao = 8,
303 RT_CID_819x_Netcore = 10,
304 RT_CID_Nettronix = 11,
308 RT_CID_819x_ALPHA = 15,
309 RT_CID_819x_Sitecom = 16,
311 RT_CID_819x_Lenovo = 18,
312 RT_CID_819x_QMI = 19,
313 RT_CID_819x_Edimax_Belkin = 20,
314 RT_CID_819x_Sercomm_Belkin = 21,
315 RT_CID_819x_CAMEO1 = 22,
316 RT_CID_819x_MSI = 23,
317 RT_CID_819x_Acer = 24,
319 RT_CID_819x_CLEVO = 28,
320 RT_CID_819x_Arcadyan_Belkin = 29,
321 RT_CID_819x_SAMSUNG = 30,
322 RT_CID_819x_WNC_COREGA = 31,
326 RESET_TYPE_NORESET = 0x00,
327 RESET_TYPE_NORMAL = 0x01,
328 RESET_TYPE_SILENT = 0x02
331 enum ic_inferiority_8192s {
332 IC_INFERIORITY_A = 0,
333 IC_INFERIORITY_B = 1,
336 enum pci_bridge_vendor {
337 PCI_BRIDGE_VENDOR_INTEL = 0x0,
338 PCI_BRIDGE_VENDOR_ATI,
339 PCI_BRIDGE_VENDOR_AMD,
340 PCI_BRIDGE_VENDOR_SIS ,
341 PCI_BRIDGE_VENDOR_UNKNOWN,
342 PCI_BRIDGE_VENDOR_MAX ,
352 struct rtl_reg_debug {
358 unsigned char length;
360 unsigned char buf[0xff];
369 struct rt_smooth_data_4rf {
370 char elements[4][100];
380 unsigned long rxframgment;
381 unsigned long rxcmdpkt[4];
382 unsigned long rxurberr;
383 unsigned long rxstaterr;
384 unsigned long rxdatacrcerr;
385 unsigned long rxmgmtcrcerr;
386 unsigned long rxcrcerrmin;
387 unsigned long rxcrcerrmid;
388 unsigned long rxcrcerrmax;
389 unsigned long received_rate_histogram[4][32];
390 unsigned long received_preamble_GI[2][32];
391 unsigned long rx_AMPDUsize_histogram[5];
392 unsigned long rx_AMPDUnum_histogram[5];
393 unsigned long numpacket_matchbssid;
394 unsigned long numpacket_toself;
395 unsigned long num_process_phyinfo;
396 unsigned long numqry_phystatus;
397 unsigned long numqry_phystatusCCK;
398 unsigned long numqry_phystatusHT;
399 unsigned long received_bwtype[5];
400 unsigned long txnperr;
401 unsigned long txnpdrop;
402 unsigned long txresumed;
403 unsigned long rxoverflow;
405 unsigned long txnpokint;
407 unsigned long shints;
408 unsigned long txoverflow;
409 unsigned long txlpokint;
410 unsigned long txlpdrop;
411 unsigned long txlperr;
412 unsigned long txbeokint;
413 unsigned long txbedrop;
414 unsigned long txbeerr;
415 unsigned long txbkokint;
416 unsigned long txbkdrop;
417 unsigned long txbkerr;
418 unsigned long txviokint;
419 unsigned long txvidrop;
420 unsigned long txvierr;
421 unsigned long txvookint;
422 unsigned long txvodrop;
423 unsigned long txvoerr;
424 unsigned long txbeaconokint;
425 unsigned long txbeacondrop;
426 unsigned long txbeaconerr;
427 unsigned long txmanageokint;
428 unsigned long txmanagedrop;
429 unsigned long txmanageerr;
430 unsigned long txcmdpktokint;
431 unsigned long txdatapkt;
432 unsigned long txfeedback;
433 unsigned long txfeedbackok;
434 unsigned long txoktotal;
435 unsigned long txokbytestotal;
436 unsigned long txokinperiod;
437 unsigned long txmulticast;
438 unsigned long txbytesmulticast;
439 unsigned long txbroadcast;
440 unsigned long txbytesbroadcast;
441 unsigned long txunicast;
442 unsigned long txbytesunicast;
443 unsigned long rxbytesunicast;
444 unsigned long txfeedbackfail;
445 unsigned long txerrtotal;
446 unsigned long txerrbytestotal;
447 unsigned long txerrmulticast;
448 unsigned long txerrbroadcast;
449 unsigned long txerrunicast;
450 unsigned long txretrycount;
451 unsigned long txfeedbackretry;
453 unsigned long slide_signal_strength[100];
454 unsigned long slide_evm[100];
455 unsigned long slide_rssi_total;
456 unsigned long slide_evm_total;
457 long signal_strength;
459 long last_signal_strength_inpercent;
460 long recv_signal_power;
461 u8 rx_rssi_percentage[4];
462 u8 rx_evm_percentage[2];
464 struct rt_tx_rahis txrate;
465 u32 Slide_Beacon_pwdb[100];
466 u32 Slide_Beacon_Total;
467 struct rt_smooth_data_4rf cck_adc_pwdb;
468 u32 CurrentShowTxate;
471 struct channel_access_setting {
480 enum two_port_status {
481 TWO_PORT_STATUS__DEFAULT_ONLY,
482 TWO_PORT_STATUS__EXTENSION_ONLY,
483 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
484 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
485 TWO_PORT_STATUS__ADHOC,
486 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
489 struct txbbgain_struct {
490 long txbb_iq_amplifygain;
495 u8 ccktxbb_valuearray[8];
510 struct tx_ring * next;
513 struct rtl8192_tx_ring {
514 struct tx_desc *desc;
517 unsigned int entries;
518 struct sk_buff_head queue;
525 void (* get_eeprom_size)(struct net_device* dev);
526 void (* init_adapter_variable)(struct net_device* dev);
527 void (* init_before_adapter_start)(struct net_device* dev);
528 bool (* initialize_adapter)(struct net_device* dev);
529 void (*link_change)(struct net_device* dev);
530 void (* tx_fill_descriptor)(struct net_device* dev, struct tx_desc *tx_desc, struct cb_desc *cb_desc, struct sk_buff *skb);
531 void (* tx_fill_cmd_descriptor)(struct net_device* dev, struct tx_desc_cmd * entry, struct cb_desc *cb_desc, struct sk_buff *skb);
532 bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats* stats, struct rx_desc *pdesc, struct sk_buff* skb);
533 bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, struct rx_desc *pdesc);
534 void (* stop_adapter)(struct net_device *dev, bool reset);
535 void (* update_ratr_table)(struct net_device* dev);
536 void (* irq_enable)(struct net_device* dev);
537 void (* irq_disable)(struct net_device* dev);
538 void (* irq_clear)(struct net_device* dev);
539 void (* rx_enable)(struct net_device* dev);
540 void (* tx_enable)(struct net_device* dev);
541 void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
542 bool (* TxCheckStuckHandler)(struct net_device* dev);
543 bool (* RxCheckStuckHandler)(struct net_device* dev);
547 struct pci_dev *pdev;
548 struct pci_dev *bridge_pdev;
551 bool bfirst_after_down;
552 bool initialized_at_probe;
553 bool being_init_adapter;
554 bool bDriverIsGoingToUnload;
561 struct delayed_work update_beacon_wq;
562 struct delayed_work watch_dog_wq;
563 struct delayed_work txpower_tracking_wq;
564 struct delayed_work rfpath_check_wq;
565 struct delayed_work gpio_change_rf_wq;
566 struct delayed_work initialgain_operate_wq;
567 struct delayed_work check_hw_scan_wq;
568 struct delayed_work hw_scan_simu_wq;
569 struct delayed_work start_hw_scan_wq;
571 struct workqueue_struct *priv_wq;
573 struct channel_access_setting ChannelAccessSetting;
575 struct mp_adapter NdisAdapter;
577 struct rtl819x_ops *ops;
578 struct rtllib_device *rtllib;
580 struct work_struct reset_wq;
582 struct log_int_8190 InterruptLog;
584 enum rt_customer_id CustomerID;
587 enum rt_rf_type_819xu rf_chip;
588 enum ic_inferiority_8192s IC_Class;
589 enum ht_channel_width CurrentChannelBW;
590 struct bb_reg_definition PHYRegDef[4];
591 struct rate_adaptive rate_adaptive;
593 struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
594 struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
596 struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
598 enum acm_method AcmMethod;
600 struct rt_firmware *pFirmware;
601 enum rtl819x_loopback LoopbackMode;
602 enum firmware_source firmware_source;
604 struct timer_list watch_dog_timer;
605 struct timer_list fsync_timer;
606 struct timer_list gpio_polling_timer;
608 spinlock_t fw_scan_lock;
610 spinlock_t irq_th_lock;
612 spinlock_t rf_ps_lock;
614 spinlock_t rt_h2c_lock;
618 struct sk_buff_head rx_queue;
619 struct sk_buff_head skb_queue;
621 struct tasklet_struct irq_rx_tasklet;
622 struct tasklet_struct irq_tx_tasklet;
623 struct tasklet_struct irq_prepare_beacon_tasklet;
625 struct semaphore wx_sem;
626 struct semaphore rf_sem;
629 struct rt_stats stats;
630 struct iw_statistics wstats;
631 struct proc_dir_entry *dir_dev;
633 short (*rf_set_sens)(struct net_device *dev,short sens);
634 u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
635 void (*rf_close)(struct net_device *dev);
636 void (*rf_init)(struct net_device *dev);
638 struct rx_desc *rx_ring[MAX_RX_QUEUE];
639 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
640 dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
641 unsigned int rx_idx[MAX_RX_QUEUE];
647 u16 EarlyRxThreshold;
655 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
659 atomic_t tx_pending[0x10];
673 /**********************************************************/
675 enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
677 struct work_struct qos_activate;
697 enum nic_t card_8192;
698 u8 card_8192_version;
704 char nick[IW_ESSID_MAX_SIZE + 1];
709 bool bTKIPinNmodeFromReg;
710 bool bWEPinNmodeFromReg;
714 u8 check_roaming_cnt;
716 bool bIgnoreSilentReset;
717 u32 SilentResetRxSoltNum;
718 u32 SilentResetRxSlotIndex;
719 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
725 u8 nrxAMPDU_aggr_num;
727 u32 last_rxdesc_tsf_high;
728 u32 last_rxdesc_tsf_low;
733 u8 dot11CurrentPreambleMode;
740 u16 FirmwareSubVersion;
742 bool AutoloadFailFlag;
747 u8 RegSupportPciASPM;
755 u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
757 u8 EfuseUsedPercentage;
764 u8 eeprom_CustomerID;
765 u16 eeprom_ChannelPlan;
769 u8 EEPROMPwrGroup[2][3];
772 u8 EEPROMTxPowerLevelCCK[14];
773 u8 EEPROMTxPowerLevelOFDM24G[14];
774 u8 EEPROMTxPowerLevelOFDM5G[24];
775 u8 EEPROMRfACCKChnl1TxPwLevel[3];
776 u8 EEPROMRfAOfdmChnlTxPwLevel[3];
777 u8 EEPROMRfCCCKChnl1TxPwLevel[3];
778 u8 EEPROMRfCOfdmChnlTxPwLevel[3];
779 u16 EEPROMTxPowerDiff;
781 u8 EEPROMThermalMeter;
785 u8 EEPROMBluetoothCoexist;
786 u8 EEPROMBluetoothType;
787 u8 EEPROMBluetoothAntNum;
788 u8 EEPROMBluetoothAntIsolation;
789 u8 EEPROMBluetoothRadioShared;
792 u8 EEPROMSupportWoWLAN;
795 u8 EEPROMHT2T_TxPwr[6];
798 u8 EEPROMTxPowerLevelCCK_V1[3];
799 u8 EEPROMLegacyHTTxPowerDiff;
812 u8 SetBWModeInProgress;
818 bool brfpath_rxenable[4];
820 bool bTXPowerDataReadFromEEPORM;
824 bool bChnlPlanFromHW;
828 bool bInPowerSaveMode;
831 bool aspm_clkreq_enable;
832 u32 pci_bridge_vendor;
833 u8 RegHostPciASPMSetting;
834 u8 RegDevicePciASPMSetting;
836 bool RFChangeInProgress;
837 bool SetRFPowerStateInProgress;
858 u32 IQK_MAC_backup[3];
860 bool SetFwCmdInProgress;
865 bool bInformFWDriverControlDM;
866 u8 PwrGroupHT20[2][14];
867 u8 PwrGroupHT40[2][14];
870 long EntryMinUndecoratedSmoothedPWDB;
871 long EntryMaxUndecoratedSmoothedPWDB;
872 u8 DynamicTxHighPowerLvl;
875 struct false_alarm_stats FalseAlmCnt;
883 u8 CCKPresentAttentuation_20Mdefault;
884 u8 CCKPresentAttentuation_40Mdefault;
885 char CCKPresentAttentuation_difference;
886 char CCKPresentAttentuation;
888 long undecorated_smoothed_pwdb;
889 long undecorated_smoothed_cck_adc_pwdb[4];
891 u32 MCSTxPowerLevelOriginalOffset[6];
892 u32 CCKTxPowerLevelOriginalOffset;
893 u8 TxPowerLevelCCK[14];
894 u8 TxPowerLevelCCK_A[14];
895 u8 TxPowerLevelCCK_C[14];
896 u8 TxPowerLevelOFDM24G[14];
897 u8 TxPowerLevelOFDM5G[14];
898 u8 TxPowerLevelOFDM24G_A[14];
899 u8 TxPowerLevelOFDM24G_C[14];
900 u8 LegacyHTTxPowerDiff;
904 u8 RfTxPwrLevelCck[2][14];
905 u8 RfTxPwrLevelOfdm1T[2][14];
906 u8 RfTxPwrLevelOfdm2T[2][14];
907 u8 AntennaTxPwDiff[3];
908 u8 TxPwrHt20Diff[2][14];
909 u8 TxPwrLegacyHtDiff[2][14];
913 u8 CurrentCckTxPwrIdx;
914 u8 CurrentOfdm24GTxPwrIdx;
916 bool bdynamic_txpower;
917 bool bDynamicTxHighPower;
918 bool bDynamicTxLowPower;
919 bool bLastDTPFlag_High;
920 bool bLastDTPFlag_Low;
922 bool bstore_last_dtpflag;
923 bool bstart_txctrl_bydtp;
925 u8 rfa_txpowertrackingindex;
926 u8 rfa_txpowertrackingindex_real;
927 u8 rfa_txpowertracking_default;
928 u8 rfc_txpowertrackingindex;
929 u8 rfc_txpowertrackingindex_real;
930 u8 rfc_txpowertracking_default;
931 bool btxpower_tracking;
934 u8 TxPowerTrackControl;
936 bool btxpower_trackingInit;
941 u8 Record_CCK_20Mindex;
942 u8 Record_CCK_40Mindex;
944 struct init_gain initgain_backup;
945 u8 DefaultInitialGain[4];
946 bool bis_any_nonbepkts;
947 bool bcurrent_turbo_EDCA;
948 bool bis_cur_rdlstate;
955 bool bfsync_processing;
957 u32 rateCountDiffRecord;
958 u32 ContiuneDiffCount;
964 bool bDMInitialGainEnable;
965 bool MutualAuthenticationFail;
967 bool bDisableFrameBursting;
972 u32 txpower_checkcnt;
973 u32 txpower_tracking_callback_cnt;
974 u8 thermal_read_val[40];
975 u8 thermal_readback_index;
976 u32 ccktxpower_adjustcnt_not_ch14;
977 u32 ccktxpower_adjustcnt_ch14;
979 enum reset_type ResetProgress;
980 bool bForcedSilentReset;
981 bool bDisableNormalResetCheck;
985 bool bResetInProgress;
988 u8 InitialGainOperateType;
1010 u8 PwrDomainProtect;
1016 extern const struct ethtool_ops rtl819x_ethtool_ops;
1018 void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1019 short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
1021 u8 read_nic_io_byte(struct net_device *dev, int x);
1022 u32 read_nic_io_dword(struct net_device *dev, int x);
1023 u16 read_nic_io_word(struct net_device *dev, int x) ;
1024 void write_nic_io_byte(struct net_device *dev, int x,u8 y);
1025 void write_nic_io_word(struct net_device *dev, int x,u16 y);
1026 void write_nic_io_dword(struct net_device *dev, int x,u32 y);
1028 u8 read_nic_byte(struct net_device *dev, int x);
1029 u32 read_nic_dword(struct net_device *dev, int x);
1030 u16 read_nic_word(struct net_device *dev, int x) ;
1031 void write_nic_byte(struct net_device *dev, int x,u8 y);
1032 void write_nic_word(struct net_device *dev, int x,u16 y);
1033 void write_nic_dword(struct net_device *dev, int x,u32 y);
1035 void force_pci_posting(struct net_device *dev);
1037 void rtl8192_rx_enable(struct net_device *);
1038 void rtl8192_tx_enable(struct net_device *);
1040 int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
1041 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
1042 void rtl8192_data_hard_stop(struct net_device *dev);
1043 void rtl8192_data_hard_resume(struct net_device *dev);
1044 void rtl8192_restart(void *data);
1045 void rtl819x_watchdog_wqcallback(void *data);
1046 void rtl8192_hw_sleep_wq (void *data);
1047 void watch_dog_timer_callback(unsigned long data);
1048 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1049 void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1050 int rtl8192_down(struct net_device *dev,bool shutdownrf);
1051 int rtl8192_up(struct net_device *dev);
1052 void rtl8192_commit(struct net_device *dev);
1053 void rtl8192_set_chan(struct net_device *dev,short ch);
1055 void check_rfctrl_gpio_timer(unsigned long data);
1057 void rtl8192_hw_wakeup_wq(void *data);
1058 irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1060 short rtl8192_pci_initdescring(struct net_device *dev);
1062 void rtl8192_cancel_deferred_work(struct r8192_priv * priv);
1064 int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
1066 short rtl8192_is_tx_queue_empty(struct net_device *dev);
1067 void rtl8192_irq_disable(struct net_device *dev);
1069 void rtl8192_tx_timeout(struct net_device *dev);
1070 void rtl8192_pci_resetdescring(struct net_device *dev);
1071 void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
1072 void rtl8192_irq_enable(struct net_device *dev);
1073 void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
1074 void rtl8192_update_cap(struct net_device* dev, u16 cap);
1075 void rtl8192_irq_disable(struct net_device *dev);
1077 void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
1078 long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index );
1079 void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1080 u8 rtl819x_evm_dbtopercentage(char value);
1081 void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1082 u8 rtl819x_query_rxpwrpercentage( char antpower );
1083 void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
1085 bool NicIFEnableNIC(struct net_device* dev);
1086 bool NicIFDisableNIC(struct net_device* dev);
1089 MgntActSet_RF_State(
1090 struct net_device* dev,
1091 enum rt_rf_power_state StateToSet,
1092 RT_RF_CHANGE_SOURCE ChangeSource,
1096 ActUpdateChannelAccessSetting(
1097 struct net_device* dev,
1098 enum wireless_mode WirelessMode,
1099 struct channel_access_setting *ChnlAccessSetting