1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24 ******************************************************************************/
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/init.h>
32 #include <linux/ioport.h>
33 #include <linux/sched.h>
34 #include <linux/types.h>
35 #include <linux/interrupt.h>
36 #include <linux/slab.h>
37 #include <linux/netdevice.h>
38 #include <linux/pci.h>
39 #include <linux/etherdevice.h>
40 #include <linux/delay.h>
41 #include <linux/rtnetlink.h>
42 #include <linux/wireless.h>
43 #include <linux/timer.h>
44 #include <linux/proc_fs.h>
45 #include <linux/if_arp.h>
46 #include <linux/random.h>
47 #include <linux/version.h>
53 #include "r8192E_firmware.h"
54 #include "r8192E_hw.h"
56 #include "r8190P_def.h"
57 #include "r8192E_dev.h"
59 #include "rtl_debug.h"
60 #include "rtl_eeprom.h"
65 #define DRV_COPYRIGHT "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
66 #define DRV_AUTHOR "<wlanfae@realtek.com>"
67 #define DRV_VERSION "0014.0401.2010"
69 #define DRV_NAME "rtl819xE"
71 #define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8190P)||\
72 (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192E))
73 #define IS_HARDWARE_TYPE_8192SE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192SE)
74 #define IS_HARDWARE_TYPE_8192CE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192CE)
75 #define IS_HARDWARE_TYPE_8192CU(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192CU)
76 #define IS_HARDWARE_TYPE_8192DE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192DE)
77 #define IS_HARDWARE_TYPE_8192DU(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192DU)
79 #define RTL_PCI_DEVICE(vend, dev, cfg) \
80 .vendor = (vend), .device = (dev), \
81 .subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
82 .driver_data = (kernel_ulong_t)&(cfg)
83 typedef irqreturn_t irqreturn_type;
86 #define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
88 #define RTL_MAX_SCAN_SIZE 128
90 #define RTL_RATE_MAX 30
92 #define TOTAL_CAM_ENTRY 32
93 #define CAM_CONTENT_COUNT 8
96 #define BIT(_i) (1<<(_i))
99 #define IS_NIC_DOWN(priv) (!(priv)->up)
101 #define IS_ADAPTER_SENDS_BEACON(dev) 0
103 #define IS_UNDER_11N_AES_MODE(_rtllib) ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
104 (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
106 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
107 #define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
108 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
109 #define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
110 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
111 #define HAL_HW_PCI_REVISION_ID_8192SE 0x10
112 #define HAL_HW_PCI_REVISION_ID_8192CE 0x1
113 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
114 #define HAL_HW_PCI_REVISION_ID_8192DE 0x0
115 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
117 #define HAL_HW_PCI_8180_DEVICE_ID 0x8180
118 #define HAL_HW_PCI_8185_DEVICE_ID 0x8185
119 #define HAL_HW_PCI_8188_DEVICE_ID 0x8188
120 #define HAL_HW_PCI_8198_DEVICE_ID 0x8198
121 #define HAL_HW_PCI_8190_DEVICE_ID 0x8190
122 #define HAL_HW_PCI_8192_DEVICE_ID 0x8192
123 #define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
124 #define HAL_HW_PCI_8174_DEVICE_ID 0x8174
125 #define HAL_HW_PCI_8173_DEVICE_ID 0x8173
126 #define HAL_HW_PCI_8172_DEVICE_ID 0x8172
127 #define HAL_HW_PCI_8171_DEVICE_ID 0x8171
128 #define HAL_HW_PCI_0045_DEVICE_ID 0x0045
129 #define HAL_HW_PCI_0046_DEVICE_ID 0x0046
130 #define HAL_HW_PCI_0044_DEVICE_ID 0x0044
131 #define HAL_HW_PCI_0047_DEVICE_ID 0x0047
132 #define HAL_HW_PCI_700F_DEVICE_ID 0x700F
133 #define HAL_HW_PCI_701F_DEVICE_ID 0x701F
134 #define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
135 #define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
136 #define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
137 #define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
138 #define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
139 #define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
140 #define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
141 #define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
143 #define RTL819X_DEFAULT_RF_TYPE RF_1T2R
145 #define RTLLIB_WATCH_DOG_TIME 2000
147 #define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
148 #define MAX_FIRMWARE_INFORMATION_SIZE 32
149 #define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
150 #define ENCRYPTION_MAX_OVERHEAD 128
151 #define MAX_FRAGMENT_COUNT 8
152 #define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
156 #define DEFAULT_FRAG_THRESHOLD 2342U
157 #define MIN_FRAG_THRESHOLD 256U
158 #define DEFAULT_BEACONINTERVAL 0x64U
160 #define DEFAULT_SSID ""
161 #define DEFAULT_RETRY_RTS 7
162 #define DEFAULT_RETRY_DATA 7
163 #define PRISM_HDR_SIZE 64
165 #define PHY_RSSI_SLID_WIN_MAX 100
167 #define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
169 #define TxBBGainTableLength 37
170 #define CCKTxBBGainTableLength 23
172 #define CHANNEL_PLAN_LEN 10
175 #define NIC_SEND_HANG_THRESHOLD_NORMAL 4
176 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
178 #define MAX_TX_QUEUE 9
180 #define MAX_RX_QUEUE 1
182 #define MAX_RX_COUNT 64
183 #define MAX_TX_QUEUE_COUNT 9
185 enum RTL819x_PHY_PARAM {
186 RTL819X_PHY_MACPHY_REG = 0,
187 RTL819X_PHY_MACPHY_REG_PG = 1,
188 RTL8188C_PHY_MACREG =2,
189 RTL8192C_PHY_MACREG =3,
191 RTL819X_PHY_REG_1T2R = 5,
192 RTL819X_PHY_REG_to1T1R = 6,
193 RTL819X_PHY_REG_to1T2R = 7,
194 RTL819X_PHY_REG_to2T2R = 8,
195 RTL819X_PHY_REG_PG = 9,
196 RTL819X_AGC_TAB = 10,
197 RTL819X_PHY_RADIO_A =11,
198 RTL819X_PHY_RADIO_A_1T =12,
199 RTL819X_PHY_RADIO_A_2T =13,
200 RTL819X_PHY_RADIO_B =14,
201 RTL819X_PHY_RADIO_B_GM =15,
202 RTL819X_PHY_RADIO_C =16,
203 RTL819X_PHY_RADIO_D =17,
204 RTL819X_EEPROM_MAP =18,
205 RTL819X_EFUSE_MAP =19,
227 COMP_POWER_TRACKING = BIT18,
230 COMP_FIRMWARE = BIT21,
254 enum rt_eeprom_type {
260 typedef enum _DCMD_TXCMD_OP{
261 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
262 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
263 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
264 TXCMD_SET_TX_DURATION = 0xFF900003,
265 TXCMD_SET_RX_RSSI = 0xFF900004,
266 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
270 typedef enum _RT_RF_TYPE_819xU{
277 } RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
279 typedef enum _RF_STEP_E
286 typedef enum _RT_STATUS{
291 } RT_STATUS,*PRT_STATUS;
293 typedef enum _RT_CUSTOMER_ID
296 RT_CID_8187_ALPHA0 = 1,
297 RT_CID_8187_SERCOMM_PS = 2,
298 RT_CID_8187_HW_LED = 3,
299 RT_CID_8187_NETGEAR = 4,
301 RT_CID_819x_CAMEO = 6,
302 RT_CID_819x_RUNTOP = 7,
303 RT_CID_819x_Senao = 8,
305 RT_CID_819x_Netcore = 10,
306 RT_CID_Nettronix = 11,
310 RT_CID_819x_ALPHA = 15,
311 RT_CID_819x_Sitecom = 16,
313 RT_CID_819x_Lenovo = 18,
314 RT_CID_819x_QMI = 19,
315 RT_CID_819x_Edimax_Belkin = 20,
316 RT_CID_819x_Sercomm_Belkin = 21,
317 RT_CID_819x_CAMEO1 = 22,
318 RT_CID_819x_MSI = 23,
319 RT_CID_819x_Acer = 24,
321 RT_CID_819x_CLEVO = 28,
322 RT_CID_819x_Arcadyan_Belkin = 29,
323 RT_CID_819x_SAMSUNG = 30,
324 RT_CID_819x_WNC_COREGA = 31,
325 } RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
327 typedef enum _RESET_TYPE {
328 RESET_TYPE_NORESET = 0x00,
329 RESET_TYPE_NORMAL = 0x01,
330 RESET_TYPE_SILENT = 0x02
333 typedef enum _IC_INFERIORITY_8192S{
334 IC_INFERIORITY_A = 0,
335 IC_INFERIORITY_B = 1,
336 } IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S;
338 typedef enum _PCI_BRIDGE_VENDOR {
339 PCI_BRIDGE_VENDOR_INTEL = 0x0,
340 PCI_BRIDGE_VENDOR_ATI,
341 PCI_BRIDGE_VENDOR_AMD,
342 PCI_BRIDGE_VENDOR_SIS ,
343 PCI_BRIDGE_VENDOR_UNKNOWN,
344 PCI_BRIDGE_VENDOR_MAX ,
354 struct rtl_reg_debug {
360 unsigned char length;
362 unsigned char buf[0xff];
371 struct rt_smooth_data_4rf {
372 char elements[4][100];
382 unsigned long rxframgment;
383 unsigned long rxcmdpkt[4];
384 unsigned long rxurberr;
385 unsigned long rxstaterr;
386 unsigned long rxdatacrcerr;
387 unsigned long rxmgmtcrcerr;
388 unsigned long rxcrcerrmin;
389 unsigned long rxcrcerrmid;
390 unsigned long rxcrcerrmax;
391 unsigned long received_rate_histogram[4][32];
392 unsigned long received_preamble_GI[2][32];
393 unsigned long rx_AMPDUsize_histogram[5];
394 unsigned long rx_AMPDUnum_histogram[5];
395 unsigned long numpacket_matchbssid;
396 unsigned long numpacket_toself;
397 unsigned long num_process_phyinfo;
398 unsigned long numqry_phystatus;
399 unsigned long numqry_phystatusCCK;
400 unsigned long numqry_phystatusHT;
401 unsigned long received_bwtype[5];
402 unsigned long txnperr;
403 unsigned long txnpdrop;
404 unsigned long txresumed;
405 unsigned long rxoverflow;
407 unsigned long txnpokint;
409 unsigned long shints;
410 unsigned long txoverflow;
411 unsigned long txlpokint;
412 unsigned long txlpdrop;
413 unsigned long txlperr;
414 unsigned long txbeokint;
415 unsigned long txbedrop;
416 unsigned long txbeerr;
417 unsigned long txbkokint;
418 unsigned long txbkdrop;
419 unsigned long txbkerr;
420 unsigned long txviokint;
421 unsigned long txvidrop;
422 unsigned long txvierr;
423 unsigned long txvookint;
424 unsigned long txvodrop;
425 unsigned long txvoerr;
426 unsigned long txbeaconokint;
427 unsigned long txbeacondrop;
428 unsigned long txbeaconerr;
429 unsigned long txmanageokint;
430 unsigned long txmanagedrop;
431 unsigned long txmanageerr;
432 unsigned long txcmdpktokint;
433 unsigned long txdatapkt;
434 unsigned long txfeedback;
435 unsigned long txfeedbackok;
436 unsigned long txoktotal;
437 unsigned long txokbytestotal;
438 unsigned long txokinperiod;
439 unsigned long txmulticast;
440 unsigned long txbytesmulticast;
441 unsigned long txbroadcast;
442 unsigned long txbytesbroadcast;
443 unsigned long txunicast;
444 unsigned long txbytesunicast;
445 unsigned long rxbytesunicast;
446 unsigned long txfeedbackfail;
447 unsigned long txerrtotal;
448 unsigned long txerrbytestotal;
449 unsigned long txerrmulticast;
450 unsigned long txerrbroadcast;
451 unsigned long txerrunicast;
452 unsigned long txretrycount;
453 unsigned long txfeedbackretry;
455 unsigned long slide_signal_strength[100];
456 unsigned long slide_evm[100];
457 unsigned long slide_rssi_total;
458 unsigned long slide_evm_total;
459 long signal_strength;
461 long last_signal_strength_inpercent;
462 long recv_signal_power;
463 u8 rx_rssi_percentage[4];
464 u8 rx_evm_percentage[2];
466 struct rt_tx_rahis txrate;
467 u32 Slide_Beacon_pwdb[100];
468 u32 Slide_Beacon_Total;
469 struct rt_smooth_data_4rf cck_adc_pwdb;
470 u32 CurrentShowTxate;
473 struct channel_access_setting {
482 typedef enum _TWO_PORT_STATUS
484 TWO_PORT_STATUS__DEFAULT_ONLY,
485 TWO_PORT_STATUS__EXTENSION_ONLY,
486 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
487 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
488 TWO_PORT_STATUS__ADHOC,
489 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
492 struct txbbgain_struct {
493 long txbb_iq_amplifygain;
498 u8 ccktxbb_valuearray[8];
513 struct tx_ring * next;
516 struct rtl8192_tx_ring {
517 struct tx_desc *desc;
520 unsigned int entries;
521 struct sk_buff_head queue;
528 void (* get_eeprom_size)(struct net_device* dev);
529 void (* init_adapter_variable)(struct net_device* dev);
530 void (* init_before_adapter_start)(struct net_device* dev);
531 bool (* initialize_adapter)(struct net_device* dev);
532 void (*link_change)(struct net_device* dev);
533 void (* tx_fill_descriptor)(struct net_device* dev, struct tx_desc *tx_desc, struct cb_desc *cb_desc, struct sk_buff *skb);
534 void (* tx_fill_cmd_descriptor)(struct net_device* dev, struct tx_desc_cmd * entry, struct cb_desc *cb_desc, struct sk_buff *skb);
535 bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats* stats, struct rx_desc *pdesc, struct sk_buff* skb);
536 bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, struct rx_desc *pdesc);
537 void (* stop_adapter)(struct net_device *dev, bool reset);
538 void (* update_ratr_table)(struct net_device* dev);
539 void (* irq_enable)(struct net_device* dev);
540 void (* irq_disable)(struct net_device* dev);
541 void (* irq_clear)(struct net_device* dev);
542 void (* rx_enable)(struct net_device* dev);
543 void (* tx_enable)(struct net_device* dev);
544 void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
545 bool (* TxCheckStuckHandler)(struct net_device* dev);
546 bool (* RxCheckStuckHandler)(struct net_device* dev);
550 struct pci_dev *pdev;
551 struct pci_dev *bridge_pdev;
554 bool bfirst_after_down;
555 bool initialized_at_probe;
556 bool being_init_adapter;
557 bool bDriverIsGoingToUnload;
564 struct delayed_work update_beacon_wq;
565 struct delayed_work watch_dog_wq;
566 struct delayed_work txpower_tracking_wq;
567 struct delayed_work rfpath_check_wq;
568 struct delayed_work gpio_change_rf_wq;
569 struct delayed_work initialgain_operate_wq;
570 struct delayed_work check_hw_scan_wq;
571 struct delayed_work hw_scan_simu_wq;
572 struct delayed_work start_hw_scan_wq;
574 struct workqueue_struct *priv_wq;
576 struct channel_access_setting ChannelAccessSetting;
578 struct mp_adapter NdisAdapter;
580 struct rtl819x_ops *ops;
581 struct rtllib_device *rtllib;
583 struct work_struct reset_wq;
585 struct log_int_8190 InterruptLog;
587 RT_CUSTOMER_ID CustomerID;
590 RT_RF_TYPE_819xU rf_chip;
591 IC_INFERIORITY_8192S IC_Class;
592 enum ht_channel_width CurrentChannelBW;
593 struct bb_reg_definition PHYRegDef[4];
594 struct rate_adaptive rate_adaptive;
596 struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
597 struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
599 struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
601 enum acm_method AcmMethod;
603 struct rt_firmware *pFirmware;
604 enum rtl819x_loopback LoopbackMode;
605 enum firmware_source firmware_source;
607 struct timer_list watch_dog_timer;
608 struct timer_list fsync_timer;
609 struct timer_list gpio_polling_timer;
611 spinlock_t fw_scan_lock;
613 spinlock_t irq_th_lock;
615 spinlock_t rf_ps_lock;
617 spinlock_t rt_h2c_lock;
621 struct sk_buff_head rx_queue;
622 struct sk_buff_head skb_queue;
624 struct tasklet_struct irq_rx_tasklet;
625 struct tasklet_struct irq_tx_tasklet;
626 struct tasklet_struct irq_prepare_beacon_tasklet;
628 struct semaphore wx_sem;
629 struct semaphore rf_sem;
632 struct rt_stats stats;
633 struct iw_statistics wstats;
634 struct proc_dir_entry *dir_dev;
636 short (*rf_set_sens)(struct net_device *dev,short sens);
637 u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
638 void (*rf_close)(struct net_device *dev);
639 void (*rf_init)(struct net_device *dev);
641 struct rx_desc *rx_ring[MAX_RX_QUEUE];
642 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
643 dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
644 unsigned int rx_idx[MAX_RX_QUEUE];
648 u32 LastRxDescTSFHigh;
649 u32 LastRxDescTSFLow;
651 u16 EarlyRxThreshold;
659 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
663 atomic_t tx_pending[0x10];
677 /**********************************************************/
679 enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
681 struct work_struct qos_activate;
701 enum nic_t card_8192;
702 u8 card_8192_version;
708 char nick[IW_ESSID_MAX_SIZE + 1];
713 bool bTKIPinNmodeFromReg;
714 bool bWEPinNmodeFromReg;
718 u8 check_roaming_cnt;
720 bool bIgnoreSilentReset;
721 u32 SilentResetRxSoltNum;
722 u32 SilentResetRxSlotIndex;
723 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
729 u8 nrxAMPDU_aggr_num;
731 u32 last_rxdesc_tsf_high;
732 u32 last_rxdesc_tsf_low;
737 u8 dot11CurrentPreambleMode;
744 u16 FirmwareSubVersion;
746 bool AutoloadFailFlag;
751 u8 RegSupportPciASPM;
759 u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
761 u8 EfuseUsedPercentage;
768 u8 eeprom_CustomerID;
769 u16 eeprom_ChannelPlan;
773 u8 EEPROMPwrGroup[2][3];
776 u8 EEPROMTxPowerLevelCCK[14];
777 u8 EEPROMTxPowerLevelOFDM24G[14];
778 u8 EEPROMTxPowerLevelOFDM5G[24];
779 u8 EEPROMRfACCKChnl1TxPwLevel[3];
780 u8 EEPROMRfAOfdmChnlTxPwLevel[3];
781 u8 EEPROMRfCCCKChnl1TxPwLevel[3];
782 u8 EEPROMRfCOfdmChnlTxPwLevel[3];
783 u16 EEPROMTxPowerDiff;
785 u8 EEPROMThermalMeter;
789 u8 EEPROMBluetoothCoexist;
790 u8 EEPROMBluetoothType;
791 u8 EEPROMBluetoothAntNum;
792 u8 EEPROMBluetoothAntIsolation;
793 u8 EEPROMBluetoothRadioShared;
796 u8 EEPROMSupportWoWLAN;
799 u8 EEPROMHT2T_TxPwr[6];
802 u8 EEPROMTxPowerLevelCCK_V1[3];
803 u8 EEPROMLegacyHTTxPowerDiff;
816 u8 SetBWModeInProgress;
822 bool brfpath_rxenable[4];
824 bool bTXPowerDataReadFromEEPORM;
828 bool bChnlPlanFromHW;
832 bool bInPowerSaveMode;
835 bool aspm_clkreq_enable;
836 u32 pci_bridge_vendor;
837 u8 RegHostPciASPMSetting;
838 u8 RegDevicePciASPMSetting;
840 bool RFChangeInProgress;
841 bool SetRFPowerStateInProgress;
862 u32 IQK_MAC_backup[3];
864 bool SetFwCmdInProgress;
869 bool bInformFWDriverControlDM;
870 u8 PwrGroupHT20[2][14];
871 u8 PwrGroupHT40[2][14];
874 long EntryMinUndecoratedSmoothedPWDB;
875 long EntryMaxUndecoratedSmoothedPWDB;
876 u8 DynamicTxHighPowerLvl;
879 struct false_alarm_stats FalseAlmCnt;
887 u8 CCKPresentAttentuation_20Mdefault;
888 u8 CCKPresentAttentuation_40Mdefault;
889 char CCKPresentAttentuation_difference;
890 char CCKPresentAttentuation;
892 long undecorated_smoothed_pwdb;
893 long undecorated_smoothed_cck_adc_pwdb[4];
895 u32 MCSTxPowerLevelOriginalOffset[6];
896 u32 CCKTxPowerLevelOriginalOffset;
897 u8 TxPowerLevelCCK[14];
898 u8 TxPowerLevelCCK_A[14];
899 u8 TxPowerLevelCCK_C[14];
900 u8 TxPowerLevelOFDM24G[14];
901 u8 TxPowerLevelOFDM5G[14];
902 u8 TxPowerLevelOFDM24G_A[14];
903 u8 TxPowerLevelOFDM24G_C[14];
904 u8 LegacyHTTxPowerDiff;
908 u8 RfTxPwrLevelCck[2][14];
909 u8 RfTxPwrLevelOfdm1T[2][14];
910 u8 RfTxPwrLevelOfdm2T[2][14];
911 u8 AntennaTxPwDiff[3];
912 u8 TxPwrHt20Diff[2][14];
913 u8 TxPwrLegacyHtDiff[2][14];
917 u8 CurrentCckTxPwrIdx;
918 u8 CurrentOfdm24GTxPwrIdx;
920 bool bdynamic_txpower;
921 bool bDynamicTxHighPower;
922 bool bDynamicTxLowPower;
923 bool bLastDTPFlag_High;
924 bool bLastDTPFlag_Low;
926 bool bstore_last_dtpflag;
927 bool bstart_txctrl_bydtp;
929 u8 rfa_txpowertrackingindex;
930 u8 rfa_txpowertrackingindex_real;
931 u8 rfa_txpowertracking_default;
932 u8 rfc_txpowertrackingindex;
933 u8 rfc_txpowertrackingindex_real;
934 u8 rfc_txpowertracking_default;
935 bool btxpower_tracking;
938 u8 TxPowerTrackControl;
940 bool btxpower_trackingInit;
945 u8 Record_CCK_20Mindex;
946 u8 Record_CCK_40Mindex;
948 struct init_gain initgain_backup;
949 u8 DefaultInitialGain[4];
950 bool bis_any_nonbepkts;
951 bool bcurrent_turbo_EDCA;
952 bool bis_cur_rdlstate;
959 bool bfsync_processing;
961 u32 rateCountDiffRecord;
962 u32 ContiuneDiffCount;
968 bool bDMInitialGainEnable;
969 bool MutualAuthenticationFail;
971 bool bDisableFrameBursting;
976 u32 txpower_checkcnt;
977 u32 txpower_tracking_callback_cnt;
978 u8 thermal_read_val[40];
979 u8 thermal_readback_index;
980 u32 ccktxpower_adjustcnt_not_ch14;
981 u32 ccktxpower_adjustcnt_ch14;
983 RESET_TYPE ResetProgress;
984 bool bForcedSilentReset;
985 bool bDisableNormalResetCheck;
989 bool bResetInProgress;
992 u8 InitialGainOperateType;
1014 u8 PwrDomainProtect;
1020 extern const struct ethtool_ops rtl819x_ethtool_ops;
1022 void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1023 short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
1025 u8 read_nic_io_byte(struct net_device *dev, int x);
1026 u32 read_nic_io_dword(struct net_device *dev, int x);
1027 u16 read_nic_io_word(struct net_device *dev, int x) ;
1028 void write_nic_io_byte(struct net_device *dev, int x,u8 y);
1029 void write_nic_io_word(struct net_device *dev, int x,u16 y);
1030 void write_nic_io_dword(struct net_device *dev, int x,u32 y);
1032 u8 read_nic_byte(struct net_device *dev, int x);
1033 u32 read_nic_dword(struct net_device *dev, int x);
1034 u16 read_nic_word(struct net_device *dev, int x) ;
1035 void write_nic_byte(struct net_device *dev, int x,u8 y);
1036 void write_nic_word(struct net_device *dev, int x,u16 y);
1037 void write_nic_dword(struct net_device *dev, int x,u32 y);
1039 void force_pci_posting(struct net_device *dev);
1041 void rtl8192_rx_enable(struct net_device *);
1042 void rtl8192_tx_enable(struct net_device *);
1044 int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
1045 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
1046 void rtl8192_data_hard_stop(struct net_device *dev);
1047 void rtl8192_data_hard_resume(struct net_device *dev);
1048 void rtl8192_restart(void *data);
1049 void rtl819x_watchdog_wqcallback(void *data);
1050 void rtl8192_hw_sleep_wq (void *data);
1051 void watch_dog_timer_callback(unsigned long data);
1052 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1053 void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1054 int rtl8192_down(struct net_device *dev,bool shutdownrf);
1055 int rtl8192_up(struct net_device *dev);
1056 void rtl8192_commit(struct net_device *dev);
1057 void rtl8192_set_chan(struct net_device *dev,short ch);
1059 void check_rfctrl_gpio_timer(unsigned long data);
1061 void rtl8192_hw_wakeup_wq(void *data);
1062 irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1064 short rtl8192_pci_initdescring(struct net_device *dev);
1066 void rtl8192_cancel_deferred_work(struct r8192_priv * priv);
1068 int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
1070 short rtl8192_is_tx_queue_empty(struct net_device *dev);
1071 void rtl8192_irq_disable(struct net_device *dev);
1073 void rtl8192_tx_timeout(struct net_device *dev);
1074 void rtl8192_pci_resetdescring(struct net_device *dev);
1075 void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
1076 void rtl8192_irq_enable(struct net_device *dev);
1077 void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
1078 void rtl8192_update_cap(struct net_device* dev, u16 cap);
1079 void rtl8192_irq_disable(struct net_device *dev);
1081 void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
1082 long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index );
1083 void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1084 u8 rtl819x_evm_dbtopercentage(char value);
1085 void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1086 u8 rtl819x_query_rxpwrpercentage( char antpower );
1087 void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
1089 bool NicIFEnableNIC(struct net_device* dev);
1090 bool NicIFDisableNIC(struct net_device* dev);
1093 MgntActSet_RF_State(
1094 struct net_device* dev,
1095 RT_RF_POWER_STATE StateToSet,
1096 RT_RF_CHANGE_SOURCE ChangeSource,
1100 ActUpdateChannelAccessSetting(
1101 struct net_device* dev,
1102 WIRELESS_MODE WirelessMode,
1103 struct channel_access_setting *ChnlAccessSetting