2 * ci.h - common structures, functions, and macros of the ChipIdea driver
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #ifndef __DRIVERS_USB_CHIPIDEA_CI_H
14 #define __DRIVERS_USB_CHIPIDEA_CI_H
16 #include <linux/list.h>
17 #include <linux/irqreturn.h>
18 #include <linux/usb/gadget.h>
20 /******************************************************************************
22 *****************************************************************************/
23 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
24 #define CI13XXX_PAGE_SIZE 4096ul /* page size for TD's */
27 /******************************************************************************
29 *****************************************************************************/
30 /* Extension of usb_ep */
38 struct list_head queue;
39 struct ci13xxx_qh *ptr;
44 /* global resources */
47 struct device *device;
48 struct dma_pool *td_pool;
58 * struct ci_role_driver - host/gadget role driver
59 * start: start this role
60 * stop: stop this role
61 * irq: irq handler for this role
62 * name: role name string (host/gadget)
64 struct ci_role_driver {
65 int (*start)(struct ci13xxx *);
66 void (*stop)(struct ci13xxx *);
67 irqreturn_t (*irq)(struct ci13xxx *);
72 unsigned lpm; /* is LPM? */
73 void __iomem *abs; /* bus map offset */
74 void __iomem *cap; /* bus map offset + CAP offset */
75 void __iomem *op; /* bus map offset + OP offset */
76 size_t size; /* bank size */
77 void __iomem **regmap;
80 /* CI13XXX UDC descriptor & global resources */
82 spinlock_t lock; /* ctrl register bank access */
83 void __iomem *regs; /* registers address space */
85 struct dma_pool *qh_pool; /* DMA pool for queue heads */
86 struct dma_pool *td_pool; /* DMA pool for transfer descs */
87 struct usb_request *status; /* ep0 status request */
90 struct usb_gadget gadget; /* USB slave device */
91 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */
92 u32 ep0_dir; /* ep0 direction */
93 struct ci13xxx_ep *ep0out, *ep0in;
94 unsigned hw_ep_max; /* number of hw endpoints */
98 u8 remote_wakeup; /* Is remote wakeup feature
99 enabled by the host? */
100 u8 suspended; /* suspended by the host */
101 u8 test_mode; /* the selected test mode */
103 struct hw_bank hw_bank;
105 struct usb_gadget_driver *driver; /* 3rd party gadget driver */
106 struct ci13xxx_udc_driver *udc_driver; /* device controller driver */
107 int vbus_active; /* is VBUS active */
108 struct usb_phy *transceiver; /* Transceiver struct */
109 struct ci_role_driver *roles[CI_ROLE_END];
112 struct work_struct work;
113 struct workqueue_struct *wq;
116 static inline struct ci_role_driver *ci_role(struct ci13xxx *ci)
118 BUG_ON(ci->role >= CI_ROLE_END || !ci->roles[ci->role]);
119 return ci->roles[ci->role];
122 static inline int ci_role_start(struct ci13xxx *ci, enum ci_role role)
126 if (role >= CI_ROLE_END)
129 if (!ci->roles[role])
132 ret = ci->roles[role]->start(ci);
138 static inline void ci_role_stop(struct ci13xxx *ci)
140 enum ci_role role = ci->role;
142 if (role == CI_ROLE_END)
145 ci->role = CI_ROLE_END;
147 ci->roles[role]->stop(ci);
150 /******************************************************************************
152 *****************************************************************************/
154 #define REG_BITS (32)
156 /* register indices */
162 CAP_LAST = CAP_TESTMODE,
178 /* endptctrl1..15 follow */
179 OP_LAST = OP_ENDPTCTRL + ENDPT_MAX / 2,
183 * ffs_nr: find first (least significant) bit set
184 * @x: the word to search
186 * This function returns bit number (instead of position)
188 static inline int ffs_nr(u32 x)
196 * hw_read: reads from a hw register
197 * @reg: register index
198 * @mask: bitfield mask
200 * This function returns register contents
202 static inline u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask)
204 return ioread32(udc->hw_bank.regmap[reg]) & mask;
208 * hw_write: writes to a hw register
209 * @reg: register index
210 * @mask: bitfield mask
213 static inline void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
217 data = (ioread32(udc->hw_bank.regmap[reg]) & ~mask)
220 iowrite32(data, udc->hw_bank.regmap[reg]);
224 * hw_test_and_clear: tests & clears a hw register
225 * @reg: register index
226 * @mask: bitfield mask
228 * This function returns register contents
230 static inline u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg,
233 u32 val = ioread32(udc->hw_bank.regmap[reg]) & mask;
235 iowrite32(val, udc->hw_bank.regmap[reg]);
240 * hw_test_and_write: tests & writes a hw register
241 * @reg: register index
242 * @mask: bitfield mask
245 * This function returns register contents
247 static inline u32 hw_test_and_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
250 u32 val = hw_read(udc, reg, ~0);
252 hw_write(udc, reg, mask, data);
253 return (val & mask) >> ffs_nr(mask);
256 int hw_device_reset(struct ci13xxx *ci);
258 int hw_port_test_set(struct ci13xxx *ci, u8 mode);
260 u8 hw_port_test_get(struct ci13xxx *ci);
262 #endif /* __DRIVERS_USB_CHIPIDEA_CI_H */