2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 static unsigned int quirks;
44 module_param(quirks, uint, S_IRUGO);
45 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
47 /* TODO: copied from ehci-hcd.c - can this be refactored? */
49 * xhci_handshake - spin reading hc until handshake completes or fails
50 * @ptr: address of hc register to be read
51 * @mask: bits to look at in result of read
52 * @done: value of those bits when handshake succeeds
53 * @usec: timeout in microseconds
55 * Returns negative errno, or zero on success
57 * Success happens when the "mask" bits have the specified value (hardware
58 * handshake done). There are two failure modes: "usec" have passed (major
59 * hardware flakeout), or the register reads as all-ones (hardware removed).
61 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
62 u32 mask, u32 done, int usec)
68 if (result == ~(u32)0) /* card removed */
80 * Disable interrupts and begin the xHCI halting process.
82 void xhci_quiesce(struct xhci_hcd *xhci)
89 halted = readl(&xhci->op_regs->status) & STS_HALT;
93 cmd = readl(&xhci->op_regs->command);
95 writel(cmd, &xhci->op_regs->command);
99 * Force HC into halt state.
101 * Disable any IRQs and clear the run/stop bit.
102 * HC will complete any current and actively pipelined transactions, and
103 * should halt within 16 ms of the run/stop bit being cleared.
104 * Read HC Halted bit in the status register to see when the HC is finished.
106 int xhci_halt(struct xhci_hcd *xhci)
109 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
112 ret = xhci_handshake(xhci, &xhci->op_regs->status,
113 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
115 xhci->xhc_state |= XHCI_STATE_HALTED;
116 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
118 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
124 * Set the run bit and wait for the host to be running.
126 static int xhci_start(struct xhci_hcd *xhci)
131 temp = readl(&xhci->op_regs->command);
133 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
135 writel(temp, &xhci->op_regs->command);
138 * Wait for the HCHalted Status bit to be 0 to indicate the host is
141 ret = xhci_handshake(xhci, &xhci->op_regs->status,
142 STS_HALT, 0, XHCI_MAX_HALT_USEC);
143 if (ret == -ETIMEDOUT)
144 xhci_err(xhci, "Host took too long to start, "
145 "waited %u microseconds.\n",
148 xhci->xhc_state &= ~XHCI_STATE_HALTED;
155 * This resets pipelines, timers, counters, state machines, etc.
156 * Transactions will be terminated immediately, and operational registers
157 * will be set to their defaults.
159 int xhci_reset(struct xhci_hcd *xhci)
165 state = readl(&xhci->op_regs->status);
166 if ((state & STS_HALT) == 0) {
167 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
171 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
172 command = readl(&xhci->op_regs->command);
173 command |= CMD_RESET;
174 writel(command, &xhci->op_regs->command);
176 ret = xhci_handshake(xhci, &xhci->op_regs->command,
177 CMD_RESET, 0, 10 * 1000 * 1000);
181 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
182 "Wait for controller to be ready for doorbell rings");
184 * xHCI cannot write to any doorbells or operational registers other
185 * than status until the "Controller Not Ready" flag is cleared.
187 ret = xhci_handshake(xhci, &xhci->op_regs->status,
188 STS_CNR, 0, 10 * 1000 * 1000);
190 for (i = 0; i < 2; ++i) {
191 xhci->bus_state[i].port_c_suspend = 0;
192 xhci->bus_state[i].suspended_ports = 0;
193 xhci->bus_state[i].resuming_ports = 0;
200 static int xhci_free_msi(struct xhci_hcd *xhci)
204 if (!xhci->msix_entries)
207 for (i = 0; i < xhci->msix_count; i++)
208 if (xhci->msix_entries[i].vector)
209 free_irq(xhci->msix_entries[i].vector,
217 static int xhci_setup_msi(struct xhci_hcd *xhci)
220 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
222 ret = pci_enable_msi(pdev);
224 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
225 "failed to allocate MSI entry");
229 ret = request_irq(pdev->irq, xhci_msi_irq,
230 0, "xhci_hcd", xhci_to_hcd(xhci));
232 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
233 "disable MSI interrupt");
234 pci_disable_msi(pdev);
242 * free all IRQs request
244 static void xhci_free_irq(struct xhci_hcd *xhci)
246 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
249 /* return if using legacy interrupt */
250 if (xhci_to_hcd(xhci)->irq > 0)
253 ret = xhci_free_msi(xhci);
257 free_irq(pdev->irq, xhci_to_hcd(xhci));
265 static int xhci_setup_msix(struct xhci_hcd *xhci)
268 struct usb_hcd *hcd = xhci_to_hcd(xhci);
269 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
272 * calculate number of msi-x vectors supported.
273 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
274 * with max number of interrupters based on the xhci HCSPARAMS1.
275 * - num_online_cpus: maximum msi-x vectors per CPUs core.
276 * Add additional 1 vector to ensure always available interrupt.
278 xhci->msix_count = min(num_online_cpus() + 1,
279 HCS_MAX_INTRS(xhci->hcs_params1));
282 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
284 if (!xhci->msix_entries) {
285 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
289 for (i = 0; i < xhci->msix_count; i++) {
290 xhci->msix_entries[i].entry = i;
291 xhci->msix_entries[i].vector = 0;
294 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
296 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
297 "Failed to enable MSI-X");
301 for (i = 0; i < xhci->msix_count; i++) {
302 ret = request_irq(xhci->msix_entries[i].vector,
304 0, "xhci_hcd", xhci_to_hcd(xhci));
309 hcd->msix_enabled = 1;
313 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
315 pci_disable_msix(pdev);
317 kfree(xhci->msix_entries);
318 xhci->msix_entries = NULL;
322 /* Free any IRQs and disable MSI-X */
323 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
325 struct usb_hcd *hcd = xhci_to_hcd(xhci);
326 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
328 if (xhci->quirks & XHCI_PLAT)
333 if (xhci->msix_entries) {
334 pci_disable_msix(pdev);
335 kfree(xhci->msix_entries);
336 xhci->msix_entries = NULL;
338 pci_disable_msi(pdev);
341 hcd->msix_enabled = 0;
345 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
349 if (xhci->msix_entries) {
350 for (i = 0; i < xhci->msix_count; i++)
351 synchronize_irq(xhci->msix_entries[i].vector);
355 static int xhci_try_enable_msi(struct usb_hcd *hcd)
357 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
358 struct pci_dev *pdev;
361 /* The xhci platform device has set up IRQs through usb_add_hcd. */
362 if (xhci->quirks & XHCI_PLAT)
365 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
367 * Some Fresco Logic host controllers advertise MSI, but fail to
368 * generate interrupts. Don't even try to enable MSI.
370 if (xhci->quirks & XHCI_BROKEN_MSI)
373 /* unregister the legacy interrupt */
375 free_irq(hcd->irq, hcd);
378 ret = xhci_setup_msix(xhci);
380 /* fall back to msi*/
381 ret = xhci_setup_msi(xhci);
384 /* hcd->irq is 0, we have MSI */
388 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
393 if (!strlen(hcd->irq_descr))
394 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
395 hcd->driver->description, hcd->self.busnum);
397 /* fall back to legacy interrupt*/
398 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
399 hcd->irq_descr, hcd);
401 xhci_err(xhci, "request interrupt %d failed\n",
405 hcd->irq = pdev->irq;
411 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
416 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
420 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
426 static void compliance_mode_recovery(unsigned long arg)
428 struct xhci_hcd *xhci;
433 xhci = (struct xhci_hcd *)arg;
435 for (i = 0; i < xhci->num_usb3_ports; i++) {
436 temp = readl(xhci->usb3_ports[i]);
437 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
439 * Compliance Mode Detected. Letting USB Core
440 * handle the Warm Reset
442 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
443 "Compliance mode detected->port %d",
445 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
446 "Attempting compliance mode recovery");
447 hcd = xhci->shared_hcd;
449 if (hcd->state == HC_STATE_SUSPENDED)
450 usb_hcd_resume_root_hub(hcd);
452 usb_hcd_poll_rh_status(hcd);
456 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
457 mod_timer(&xhci->comp_mode_recovery_timer,
458 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
462 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
463 * that causes ports behind that hardware to enter compliance mode sometimes.
464 * The quirk creates a timer that polls every 2 seconds the link state of
465 * each host controller's port and recovers it by issuing a Warm reset
466 * if Compliance mode is detected, otherwise the port will become "dead" (no
467 * device connections or disconnections will be detected anymore). Becasue no
468 * status event is generated when entering compliance mode (per xhci spec),
469 * this quirk is needed on systems that have the failing hardware installed.
471 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
473 xhci->port_status_u0 = 0;
474 init_timer(&xhci->comp_mode_recovery_timer);
476 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
477 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
478 xhci->comp_mode_recovery_timer.expires = jiffies +
479 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
481 set_timer_slack(&xhci->comp_mode_recovery_timer,
482 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
483 add_timer(&xhci->comp_mode_recovery_timer);
484 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
485 "Compliance mode recovery timer initialized");
489 * This function identifies the systems that have installed the SN65LVPE502CP
490 * USB3.0 re-driver and that need the Compliance Mode Quirk.
492 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
494 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
496 const char *dmi_product_name, *dmi_sys_vendor;
498 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
499 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
500 if (!dmi_product_name || !dmi_sys_vendor)
503 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
506 if (strstr(dmi_product_name, "Z420") ||
507 strstr(dmi_product_name, "Z620") ||
508 strstr(dmi_product_name, "Z820") ||
509 strstr(dmi_product_name, "Z1 Workstation"))
515 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
517 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
522 * Initialize memory for HCD and xHC (one-time init).
524 * Program the PAGESIZE register, initialize the device context array, create
525 * device contexts (?), set up a command ring segment (or two?), create event
526 * ring (one for now).
528 int xhci_init(struct usb_hcd *hcd)
530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
533 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
534 spin_lock_init(&xhci->lock);
535 if (xhci->hci_version == 0x95 && link_quirk) {
536 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
537 "QUIRK: Not clearing Link TRB chain bits.");
538 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
540 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
541 "xHCI doesn't need link TRB QUIRK");
543 retval = xhci_mem_init(xhci, GFP_KERNEL);
544 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
546 /* Initializing Compliance Mode Recovery Data If Needed */
547 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
548 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
549 compliance_mode_recovery_timer_init(xhci);
555 /*-------------------------------------------------------------------------*/
558 static int xhci_run_finished(struct xhci_hcd *xhci)
560 if (xhci_start(xhci)) {
564 xhci->shared_hcd->state = HC_STATE_RUNNING;
565 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
567 if (xhci->quirks & XHCI_NEC_HOST)
568 xhci_ring_cmd_db(xhci);
570 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
571 "Finished xhci_run for USB3 roothub");
576 * Start the HC after it was halted.
578 * This function is called by the USB core when the HC driver is added.
579 * Its opposite is xhci_stop().
581 * xhci_init() must be called once before this function can be called.
582 * Reset the HC, enable device slot contexts, program DCBAAP, and
583 * set command ring pointer and event ring pointer.
585 * Setup MSI-X vectors and enable interrupts.
587 int xhci_run(struct usb_hcd *hcd)
592 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
594 /* Start the xHCI host controller running only after the USB 2.0 roothub
598 hcd->uses_new_polling = 1;
599 if (!usb_hcd_is_primary_hcd(hcd))
600 return xhci_run_finished(xhci);
602 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
604 ret = xhci_try_enable_msi(hcd);
608 xhci_dbg(xhci, "Command ring memory map follows:\n");
609 xhci_debug_ring(xhci, xhci->cmd_ring);
610 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
611 xhci_dbg_cmd_ptrs(xhci);
613 xhci_dbg(xhci, "ERST memory map follows:\n");
614 xhci_dbg_erst(xhci, &xhci->erst);
615 xhci_dbg(xhci, "Event ring:\n");
616 xhci_debug_ring(xhci, xhci->event_ring);
617 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
618 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
619 temp_64 &= ~ERST_PTR_MASK;
620 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
621 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
623 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
624 "// Set the interrupt modulation register");
625 temp = readl(&xhci->ir_set->irq_control);
626 temp &= ~ER_IRQ_INTERVAL_MASK;
628 writel(temp, &xhci->ir_set->irq_control);
630 /* Set the HCD state before we enable the irqs */
631 temp = readl(&xhci->op_regs->command);
633 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
634 "// Enable interrupts, cmd = 0x%x.", temp);
635 writel(temp, &xhci->op_regs->command);
637 temp = readl(&xhci->ir_set->irq_pending);
638 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
639 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
640 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
641 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
642 xhci_print_ir_set(xhci, 0);
644 if (xhci->quirks & XHCI_NEC_HOST) {
645 struct xhci_command *command;
646 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
649 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
650 TRB_TYPE(TRB_NEC_GET_FW));
652 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
653 "Finished xhci_run for USB2 roothub");
657 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
659 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
661 spin_lock_irq(&xhci->lock);
664 /* The shared_hcd is going to be deallocated shortly (the USB core only
665 * calls this function when allocation fails in usb_add_hcd(), or
666 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
668 xhci->shared_hcd = NULL;
669 spin_unlock_irq(&xhci->lock);
675 * This function is called by the USB core when the HC driver is removed.
676 * Its opposite is xhci_run().
678 * Disable device contexts, disable IRQs, and quiesce the HC.
679 * Reset the HC, finish any completed transactions, and cleanup memory.
681 void xhci_stop(struct usb_hcd *hcd)
684 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
686 if (!usb_hcd_is_primary_hcd(hcd)) {
687 xhci_only_stop_hcd(xhci->shared_hcd);
691 spin_lock_irq(&xhci->lock);
692 /* Make sure the xHC is halted for a USB3 roothub
693 * (xhci_stop() could be called as part of failed init).
697 spin_unlock_irq(&xhci->lock);
699 xhci_cleanup_msix(xhci);
701 /* Deleting Compliance Mode Recovery Timer */
702 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
703 (!(xhci_all_ports_seen_u0(xhci)))) {
704 del_timer_sync(&xhci->comp_mode_recovery_timer);
705 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
706 "%s: compliance mode recovery timer deleted",
710 if (xhci->quirks & XHCI_AMD_PLL_FIX)
713 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
714 "// Disabling event ring interrupts");
715 temp = readl(&xhci->op_regs->status);
716 writel(temp & ~STS_EINT, &xhci->op_regs->status);
717 temp = readl(&xhci->ir_set->irq_pending);
718 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
719 xhci_print_ir_set(xhci, 0);
721 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
722 xhci_mem_cleanup(xhci);
723 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
724 "xhci_stop completed - status = %x",
725 readl(&xhci->op_regs->status));
729 * Shutdown HC (not bus-specific)
731 * This is called when the machine is rebooting or halting. We assume that the
732 * machine will be powered off, and the HC's internal state will be reset.
733 * Don't bother to free memory.
735 * This will only ever be called with the main usb_hcd (the USB3 roothub).
737 void xhci_shutdown(struct usb_hcd *hcd)
739 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
741 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
742 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
744 spin_lock_irq(&xhci->lock);
746 /* Workaround for spurious wakeups at shutdown with HSW */
747 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
749 spin_unlock_irq(&xhci->lock);
751 xhci_cleanup_msix(xhci);
753 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
754 "xhci_shutdown completed - status = %x",
755 readl(&xhci->op_regs->status));
757 /* Yet another workaround for spurious wakeups at shutdown with HSW */
758 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
759 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
763 static void xhci_save_registers(struct xhci_hcd *xhci)
765 xhci->s3.command = readl(&xhci->op_regs->command);
766 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
767 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
768 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
769 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
770 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
771 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
772 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
773 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
776 static void xhci_restore_registers(struct xhci_hcd *xhci)
778 writel(xhci->s3.command, &xhci->op_regs->command);
779 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
780 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
781 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
782 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
783 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
784 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
785 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
786 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
789 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
793 /* step 2: initialize command ring buffer */
794 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
795 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
796 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
797 xhci->cmd_ring->dequeue) &
798 (u64) ~CMD_RING_RSVD_BITS) |
799 xhci->cmd_ring->cycle_state;
800 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
801 "// Setting command ring address to 0x%llx",
802 (long unsigned long) val_64);
803 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
807 * The whole command ring must be cleared to zero when we suspend the host.
809 * The host doesn't save the command ring pointer in the suspend well, so we
810 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
811 * aligned, because of the reserved bits in the command ring dequeue pointer
812 * register. Therefore, we can't just set the dequeue pointer back in the
813 * middle of the ring (TRBs are 16-byte aligned).
815 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
817 struct xhci_ring *ring;
818 struct xhci_segment *seg;
820 ring = xhci->cmd_ring;
824 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
825 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
826 cpu_to_le32(~TRB_CYCLE);
828 } while (seg != ring->deq_seg);
830 /* Reset the software enqueue and dequeue pointers */
831 ring->deq_seg = ring->first_seg;
832 ring->dequeue = ring->first_seg->trbs;
833 ring->enq_seg = ring->deq_seg;
834 ring->enqueue = ring->dequeue;
836 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
838 * Ring is now zeroed, so the HW should look for change of ownership
839 * when the cycle bit is set to 1.
841 ring->cycle_state = 1;
844 * Reset the hardware dequeue pointer.
845 * Yes, this will need to be re-written after resume, but we're paranoid
846 * and want to make sure the hardware doesn't access bogus memory
847 * because, say, the BIOS or an SMI started the host without changing
848 * the command ring pointers.
850 xhci_set_cmd_ring_deq(xhci);
854 * Stop HC (not bus-specific)
856 * This is called when the machine transition into S3/S4 mode.
859 int xhci_suspend(struct xhci_hcd *xhci)
862 unsigned int delay = XHCI_MAX_HALT_USEC;
863 struct usb_hcd *hcd = xhci_to_hcd(xhci);
866 if (hcd->state != HC_STATE_SUSPENDED ||
867 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
870 /* Don't poll the roothubs on bus suspend. */
871 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
872 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
873 del_timer_sync(&hcd->rh_timer);
875 spin_lock_irq(&xhci->lock);
876 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
877 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
878 /* step 1: stop endpoint */
879 /* skipped assuming that port suspend has done */
881 /* step 2: clear Run/Stop bit */
882 command = readl(&xhci->op_regs->command);
884 writel(command, &xhci->op_regs->command);
886 /* Some chips from Fresco Logic need an extraordinary delay */
887 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
889 if (xhci_handshake(xhci, &xhci->op_regs->status,
890 STS_HALT, STS_HALT, delay)) {
891 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
892 spin_unlock_irq(&xhci->lock);
895 xhci_clear_command_ring(xhci);
897 /* step 3: save registers */
898 xhci_save_registers(xhci);
900 /* step 4: set CSS flag */
901 command = readl(&xhci->op_regs->command);
903 writel(command, &xhci->op_regs->command);
904 if (xhci_handshake(xhci, &xhci->op_regs->status,
905 STS_SAVE, 0, 10 * 1000)) {
906 xhci_warn(xhci, "WARN: xHC save state timeout\n");
907 spin_unlock_irq(&xhci->lock);
910 spin_unlock_irq(&xhci->lock);
913 * Deleting Compliance Mode Recovery Timer because the xHCI Host
914 * is about to be suspended.
916 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
917 (!(xhci_all_ports_seen_u0(xhci)))) {
918 del_timer_sync(&xhci->comp_mode_recovery_timer);
919 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
920 "%s: compliance mode recovery timer deleted",
924 /* step 5: remove core well power */
925 /* synchronize irq when using MSI-X */
926 xhci_msix_sync_irqs(xhci);
932 * start xHC (not bus-specific)
934 * This is called when the machine transition from S3/S4 mode.
937 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
939 u32 command, temp = 0;
940 struct usb_hcd *hcd = xhci_to_hcd(xhci);
941 struct usb_hcd *secondary_hcd;
943 bool comp_timer_running = false;
945 /* Wait a bit if either of the roothubs need to settle from the
946 * transition into bus suspend.
948 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
950 xhci->bus_state[1].next_statechange))
953 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
954 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
956 spin_lock_irq(&xhci->lock);
957 if (xhci->quirks & XHCI_RESET_ON_RESUME)
961 /* step 1: restore register */
962 xhci_restore_registers(xhci);
963 /* step 2: initialize command ring buffer */
964 xhci_set_cmd_ring_deq(xhci);
965 /* step 3: restore state and start state*/
966 /* step 3: set CRS flag */
967 command = readl(&xhci->op_regs->command);
969 writel(command, &xhci->op_regs->command);
970 if (xhci_handshake(xhci, &xhci->op_regs->status,
971 STS_RESTORE, 0, 10 * 1000)) {
972 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
973 spin_unlock_irq(&xhci->lock);
976 temp = readl(&xhci->op_regs->status);
979 /* If restore operation fails, re-initialize the HC during resume */
980 if ((temp & STS_SRE) || hibernated) {
982 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
983 !(xhci_all_ports_seen_u0(xhci))) {
984 del_timer_sync(&xhci->comp_mode_recovery_timer);
985 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
986 "Compliance Mode Recovery Timer deleted!");
989 /* Let the USB core know _both_ roothubs lost power. */
990 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
991 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
993 xhci_dbg(xhci, "Stop HCD\n");
996 spin_unlock_irq(&xhci->lock);
997 xhci_cleanup_msix(xhci);
999 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1000 temp = readl(&xhci->op_regs->status);
1001 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1002 temp = readl(&xhci->ir_set->irq_pending);
1003 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1004 xhci_print_ir_set(xhci, 0);
1006 xhci_dbg(xhci, "cleaning up memory\n");
1007 xhci_mem_cleanup(xhci);
1008 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1009 readl(&xhci->op_regs->status));
1011 /* USB core calls the PCI reinit and start functions twice:
1012 * first with the primary HCD, and then with the secondary HCD.
1013 * If we don't do the same, the host will never be started.
1015 if (!usb_hcd_is_primary_hcd(hcd))
1016 secondary_hcd = hcd;
1018 secondary_hcd = xhci->shared_hcd;
1020 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1021 retval = xhci_init(hcd->primary_hcd);
1024 comp_timer_running = true;
1026 xhci_dbg(xhci, "Start the primary HCD\n");
1027 retval = xhci_run(hcd->primary_hcd);
1029 xhci_dbg(xhci, "Start the secondary HCD\n");
1030 retval = xhci_run(secondary_hcd);
1032 hcd->state = HC_STATE_SUSPENDED;
1033 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1037 /* step 4: set Run/Stop bit */
1038 command = readl(&xhci->op_regs->command);
1040 writel(command, &xhci->op_regs->command);
1041 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1044 /* step 5: walk topology and initialize portsc,
1045 * portpmsc and portli
1047 /* this is done in bus_resume */
1049 /* step 6: restart each of the previously
1050 * Running endpoints by ringing their doorbells
1053 spin_unlock_irq(&xhci->lock);
1057 usb_hcd_resume_root_hub(hcd);
1058 usb_hcd_resume_root_hub(xhci->shared_hcd);
1062 * If system is subject to the Quirk, Compliance Mode Timer needs to
1063 * be re-initialized Always after a system resume. Ports are subject
1064 * to suffer the Compliance Mode issue again. It doesn't matter if
1065 * ports have entered previously to U0 before system's suspension.
1067 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1068 compliance_mode_recovery_timer_init(xhci);
1070 /* Re-enable port polling. */
1071 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1072 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1073 usb_hcd_poll_rh_status(hcd);
1077 #endif /* CONFIG_PM */
1079 /*-------------------------------------------------------------------------*/
1082 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1083 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1084 * value to right shift 1 for the bitmask.
1086 * Index = (epnum * 2) + direction - 1,
1087 * where direction = 0 for OUT, 1 for IN.
1088 * For control endpoints, the IN index is used (OUT index is unused), so
1089 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1091 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1094 if (usb_endpoint_xfer_control(desc))
1095 index = (unsigned int) (usb_endpoint_num(desc)*2);
1097 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1098 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1102 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1103 * address from the XHCI endpoint index.
1105 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1107 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1108 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1109 return direction | number;
1112 /* Find the flag for this endpoint (for use in the control context). Use the
1113 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1116 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1118 return 1 << (xhci_get_endpoint_index(desc) + 1);
1121 /* Find the flag for this endpoint (for use in the control context). Use the
1122 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1125 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1127 return 1 << (ep_index + 1);
1130 /* Compute the last valid endpoint context index. Basically, this is the
1131 * endpoint index plus one. For slot contexts with more than valid endpoint,
1132 * we find the most significant bit set in the added contexts flags.
1133 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1134 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1136 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1138 return fls(added_ctxs) - 1;
1141 /* Returns 1 if the arguments are OK;
1142 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1144 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1145 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1147 struct xhci_hcd *xhci;
1148 struct xhci_virt_device *virt_dev;
1150 if (!hcd || (check_ep && !ep) || !udev) {
1151 pr_debug("xHCI %s called with invalid args\n", func);
1154 if (!udev->parent) {
1155 pr_debug("xHCI %s called for root hub\n", func);
1159 xhci = hcd_to_xhci(hcd);
1160 if (check_virt_dev) {
1161 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1162 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1167 virt_dev = xhci->devs[udev->slot_id];
1168 if (virt_dev->udev != udev) {
1169 xhci_dbg(xhci, "xHCI %s called with udev and "
1170 "virt_dev does not match\n", func);
1175 if (xhci->xhc_state & XHCI_STATE_HALTED)
1181 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1182 struct usb_device *udev, struct xhci_command *command,
1183 bool ctx_change, bool must_succeed);
1186 * Full speed devices may have a max packet size greater than 8 bytes, but the
1187 * USB core doesn't know that until it reads the first 8 bytes of the
1188 * descriptor. If the usb_device's max packet size changes after that point,
1189 * we need to issue an evaluate context command and wait on it.
1191 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1192 unsigned int ep_index, struct urb *urb)
1194 struct xhci_container_ctx *out_ctx;
1195 struct xhci_input_control_ctx *ctrl_ctx;
1196 struct xhci_ep_ctx *ep_ctx;
1197 struct xhci_command *command;
1198 int max_packet_size;
1199 int hw_max_packet_size;
1202 out_ctx = xhci->devs[slot_id]->out_ctx;
1203 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1204 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1205 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1206 if (hw_max_packet_size != max_packet_size) {
1207 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1208 "Max Packet Size for ep 0 changed.");
1209 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1210 "Max packet size in usb_device = %d",
1212 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1213 "Max packet size in xHCI HW = %d",
1214 hw_max_packet_size);
1215 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1216 "Issuing evaluate context command.");
1218 /* Set up the input context flags for the command */
1219 /* FIXME: This won't work if a non-default control endpoint
1220 * changes max packet sizes.
1223 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1227 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1228 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
1230 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1233 goto command_cleanup;
1235 /* Set up the modified control endpoint 0 */
1236 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1237 xhci->devs[slot_id]->out_ctx, ep_index);
1239 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1240 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1241 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1243 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1244 ctrl_ctx->drop_flags = 0;
1246 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1247 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1248 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1249 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1251 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1254 /* Clean up the input context for later use by bandwidth
1257 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1259 kfree(command->completion);
1266 * non-error returns are a promise to giveback() the urb later
1267 * we drop ownership so next owner (or urb unlink) can get it
1269 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1271 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1272 struct xhci_td *buffer;
1273 unsigned long flags;
1275 unsigned int slot_id, ep_index;
1276 struct urb_priv *urb_priv;
1279 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1280 true, true, __func__) <= 0)
1283 slot_id = urb->dev->slot_id;
1284 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1286 if (!HCD_HW_ACCESSIBLE(hcd)) {
1287 if (!in_interrupt())
1288 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1293 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1294 size = urb->number_of_packets;
1298 urb_priv = kzalloc(sizeof(struct urb_priv) +
1299 size * sizeof(struct xhci_td *), mem_flags);
1303 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1309 for (i = 0; i < size; i++) {
1310 urb_priv->td[i] = buffer;
1314 urb_priv->length = size;
1315 urb_priv->td_cnt = 0;
1316 urb->hcpriv = urb_priv;
1318 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1319 /* Check to see if the max packet size for the default control
1320 * endpoint changed during FS device enumeration
1322 if (urb->dev->speed == USB_SPEED_FULL) {
1323 ret = xhci_check_maxpacket(xhci, slot_id,
1326 xhci_urb_free_priv(xhci, urb_priv);
1332 /* We have a spinlock and interrupts disabled, so we must pass
1333 * atomic context to this function, which may allocate memory.
1335 spin_lock_irqsave(&xhci->lock, flags);
1336 if (xhci->xhc_state & XHCI_STATE_DYING)
1338 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1342 spin_unlock_irqrestore(&xhci->lock, flags);
1343 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1344 spin_lock_irqsave(&xhci->lock, flags);
1345 if (xhci->xhc_state & XHCI_STATE_DYING)
1347 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1348 EP_GETTING_STREAMS) {
1349 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1350 "is transitioning to using streams.\n");
1352 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1353 EP_GETTING_NO_STREAMS) {
1354 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1355 "is transitioning to "
1356 "not having streams.\n");
1359 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1364 spin_unlock_irqrestore(&xhci->lock, flags);
1365 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1366 spin_lock_irqsave(&xhci->lock, flags);
1367 if (xhci->xhc_state & XHCI_STATE_DYING)
1369 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1373 spin_unlock_irqrestore(&xhci->lock, flags);
1375 spin_lock_irqsave(&xhci->lock, flags);
1376 if (xhci->xhc_state & XHCI_STATE_DYING)
1378 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1382 spin_unlock_irqrestore(&xhci->lock, flags);
1387 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1388 "non-responsive xHCI host.\n",
1389 urb->ep->desc.bEndpointAddress, urb);
1392 xhci_urb_free_priv(xhci, urb_priv);
1394 spin_unlock_irqrestore(&xhci->lock, flags);
1398 /* Get the right ring for the given URB.
1399 * If the endpoint supports streams, boundary check the URB's stream ID.
1400 * If the endpoint doesn't support streams, return the singular endpoint ring.
1402 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1405 unsigned int slot_id;
1406 unsigned int ep_index;
1407 unsigned int stream_id;
1408 struct xhci_virt_ep *ep;
1410 slot_id = urb->dev->slot_id;
1411 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1412 stream_id = urb->stream_id;
1413 ep = &xhci->devs[slot_id]->eps[ep_index];
1414 /* Common case: no streams */
1415 if (!(ep->ep_state & EP_HAS_STREAMS))
1418 if (stream_id == 0) {
1420 "WARN: Slot ID %u, ep index %u has streams, "
1421 "but URB has no stream ID.\n",
1426 if (stream_id < ep->stream_info->num_streams)
1427 return ep->stream_info->stream_rings[stream_id];
1430 "WARN: Slot ID %u, ep index %u has "
1431 "stream IDs 1 to %u allocated, "
1432 "but stream ID %u is requested.\n",
1434 ep->stream_info->num_streams - 1,
1440 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1441 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1442 * should pick up where it left off in the TD, unless a Set Transfer Ring
1443 * Dequeue Pointer is issued.
1445 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1446 * the ring. Since the ring is a contiguous structure, they can't be physically
1447 * removed. Instead, there are two options:
1449 * 1) If the HC is in the middle of processing the URB to be canceled, we
1450 * simply move the ring's dequeue pointer past those TRBs using the Set
1451 * Transfer Ring Dequeue Pointer command. This will be the common case,
1452 * when drivers timeout on the last submitted URB and attempt to cancel.
1454 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1455 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1456 * HC will need to invalidate the any TRBs it has cached after the stop
1457 * endpoint command, as noted in the xHCI 0.95 errata.
1459 * 3) The TD may have completed by the time the Stop Endpoint Command
1460 * completes, so software needs to handle that case too.
1462 * This function should protect against the TD enqueueing code ringing the
1463 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1464 * It also needs to account for multiple cancellations on happening at the same
1465 * time for the same endpoint.
1467 * Note that this function can be called in any context, or so says
1468 * usb_hcd_unlink_urb()
1470 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1472 unsigned long flags;
1475 struct xhci_hcd *xhci;
1476 struct urb_priv *urb_priv;
1478 unsigned int ep_index;
1479 struct xhci_ring *ep_ring;
1480 struct xhci_virt_ep *ep;
1481 struct xhci_command *command;
1483 xhci = hcd_to_xhci(hcd);
1484 spin_lock_irqsave(&xhci->lock, flags);
1485 /* Make sure the URB hasn't completed or been unlinked already */
1486 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1487 if (ret || !urb->hcpriv)
1489 temp = readl(&xhci->op_regs->status);
1490 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1491 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1492 "HW died, freeing TD.");
1493 urb_priv = urb->hcpriv;
1494 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1495 td = urb_priv->td[i];
1496 if (!list_empty(&td->td_list))
1497 list_del_init(&td->td_list);
1498 if (!list_empty(&td->cancelled_td_list))
1499 list_del_init(&td->cancelled_td_list);
1502 usb_hcd_unlink_urb_from_ep(hcd, urb);
1503 spin_unlock_irqrestore(&xhci->lock, flags);
1504 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1505 xhci_urb_free_priv(xhci, urb_priv);
1508 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1509 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1510 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1511 "Ep 0x%x: URB %p to be canceled on "
1512 "non-responsive xHCI host.",
1513 urb->ep->desc.bEndpointAddress, urb);
1514 /* Let the stop endpoint command watchdog timer (which set this
1515 * state) finish cleaning up the endpoint TD lists. We must
1516 * have caught it in the middle of dropping a lock and giving
1522 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1523 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1524 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1530 urb_priv = urb->hcpriv;
1531 i = urb_priv->td_cnt;
1532 if (i < urb_priv->length)
1533 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1534 "Cancel URB %p, dev %s, ep 0x%x, "
1535 "starting at offset 0x%llx",
1536 urb, urb->dev->devpath,
1537 urb->ep->desc.bEndpointAddress,
1538 (unsigned long long) xhci_trb_virt_to_dma(
1539 urb_priv->td[i]->start_seg,
1540 urb_priv->td[i]->first_trb));
1542 for (; i < urb_priv->length; i++) {
1543 td = urb_priv->td[i];
1544 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1547 /* Queue a stop endpoint command, but only if this is
1548 * the first cancellation to be handled.
1550 if (!(ep->ep_state & EP_HALT_PENDING)) {
1551 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1552 ep->ep_state |= EP_HALT_PENDING;
1553 ep->stop_cmds_pending++;
1554 ep->stop_cmd_timer.expires = jiffies +
1555 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1556 add_timer(&ep->stop_cmd_timer);
1557 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1559 xhci_ring_cmd_db(xhci);
1562 spin_unlock_irqrestore(&xhci->lock, flags);
1566 /* Drop an endpoint from a new bandwidth configuration for this device.
1567 * Only one call to this function is allowed per endpoint before
1568 * check_bandwidth() or reset_bandwidth() must be called.
1569 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1570 * add the endpoint to the schedule with possibly new parameters denoted by a
1571 * different endpoint descriptor in usb_host_endpoint.
1572 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1575 * The USB core will not allow URBs to be queued to an endpoint that is being
1576 * disabled, so there's no need for mutual exclusion to protect
1577 * the xhci->devs[slot_id] structure.
1579 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1580 struct usb_host_endpoint *ep)
1582 struct xhci_hcd *xhci;
1583 struct xhci_container_ctx *in_ctx, *out_ctx;
1584 struct xhci_input_control_ctx *ctrl_ctx;
1585 struct xhci_slot_ctx *slot_ctx;
1586 unsigned int last_ctx;
1587 unsigned int ep_index;
1588 struct xhci_ep_ctx *ep_ctx;
1590 u32 new_add_flags, new_drop_flags, new_slot_info;
1593 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1596 xhci = hcd_to_xhci(hcd);
1597 if (xhci->xhc_state & XHCI_STATE_DYING)
1600 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1601 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1602 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1603 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1604 __func__, drop_flag);
1608 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1609 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1610 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1612 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1617 ep_index = xhci_get_endpoint_index(&ep->desc);
1618 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1619 /* If the HC already knows the endpoint is disabled,
1620 * or the HCD has noted it is disabled, ignore this request
1622 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1623 cpu_to_le32(EP_STATE_DISABLED)) ||
1624 le32_to_cpu(ctrl_ctx->drop_flags) &
1625 xhci_get_endpoint_flag(&ep->desc)) {
1626 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1631 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1632 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1634 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1635 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1637 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1638 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1639 /* Update the last valid endpoint context, if we deleted the last one */
1640 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1641 LAST_CTX(last_ctx)) {
1642 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1643 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1645 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1647 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1649 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1650 (unsigned int) ep->desc.bEndpointAddress,
1652 (unsigned int) new_drop_flags,
1653 (unsigned int) new_add_flags,
1654 (unsigned int) new_slot_info);
1658 /* Add an endpoint to a new possible bandwidth configuration for this device.
1659 * Only one call to this function is allowed per endpoint before
1660 * check_bandwidth() or reset_bandwidth() must be called.
1661 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1662 * add the endpoint to the schedule with possibly new parameters denoted by a
1663 * different endpoint descriptor in usb_host_endpoint.
1664 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1667 * The USB core will not allow URBs to be queued to an endpoint until the
1668 * configuration or alt setting is installed in the device, so there's no need
1669 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1671 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1672 struct usb_host_endpoint *ep)
1674 struct xhci_hcd *xhci;
1675 struct xhci_container_ctx *in_ctx, *out_ctx;
1676 unsigned int ep_index;
1677 struct xhci_slot_ctx *slot_ctx;
1678 struct xhci_input_control_ctx *ctrl_ctx;
1680 unsigned int last_ctx;
1681 u32 new_add_flags, new_drop_flags, new_slot_info;
1682 struct xhci_virt_device *virt_dev;
1685 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1687 /* So we won't queue a reset ep command for a root hub */
1691 xhci = hcd_to_xhci(hcd);
1692 if (xhci->xhc_state & XHCI_STATE_DYING)
1695 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1696 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1697 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1698 /* FIXME when we have to issue an evaluate endpoint command to
1699 * deal with ep0 max packet size changing once we get the
1702 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1703 __func__, added_ctxs);
1707 virt_dev = xhci->devs[udev->slot_id];
1708 in_ctx = virt_dev->in_ctx;
1709 out_ctx = virt_dev->out_ctx;
1710 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1712 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1717 ep_index = xhci_get_endpoint_index(&ep->desc);
1718 /* If this endpoint is already in use, and the upper layers are trying
1719 * to add it again without dropping it, reject the addition.
1721 if (virt_dev->eps[ep_index].ring &&
1722 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1723 xhci_get_endpoint_flag(&ep->desc))) {
1724 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1725 "without dropping it.\n",
1726 (unsigned int) ep->desc.bEndpointAddress);
1730 /* If the HCD has already noted the endpoint is enabled,
1731 * ignore this request.
1733 if (le32_to_cpu(ctrl_ctx->add_flags) &
1734 xhci_get_endpoint_flag(&ep->desc)) {
1735 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1741 * Configuration and alternate setting changes must be done in
1742 * process context, not interrupt context (or so documenation
1743 * for usb_set_interface() and usb_set_configuration() claim).
1745 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1746 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1747 __func__, ep->desc.bEndpointAddress);
1751 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1752 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1754 /* If xhci_endpoint_disable() was called for this endpoint, but the
1755 * xHC hasn't been notified yet through the check_bandwidth() call,
1756 * this re-adds a new state for the endpoint from the new endpoint
1757 * descriptors. We must drop and re-add this endpoint, so we leave the
1760 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1762 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1763 /* Update the last valid endpoint context, if we just added one past */
1764 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1765 LAST_CTX(last_ctx)) {
1766 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1767 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1769 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1771 /* Store the usb_device pointer for later use */
1774 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1775 (unsigned int) ep->desc.bEndpointAddress,
1777 (unsigned int) new_drop_flags,
1778 (unsigned int) new_add_flags,
1779 (unsigned int) new_slot_info);
1783 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1785 struct xhci_input_control_ctx *ctrl_ctx;
1786 struct xhci_ep_ctx *ep_ctx;
1787 struct xhci_slot_ctx *slot_ctx;
1790 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1792 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1797 /* When a device's add flag and drop flag are zero, any subsequent
1798 * configure endpoint command will leave that endpoint's state
1799 * untouched. Make sure we don't leave any old state in the input
1800 * endpoint contexts.
1802 ctrl_ctx->drop_flags = 0;
1803 ctrl_ctx->add_flags = 0;
1804 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1805 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1806 /* Endpoint 0 is always valid */
1807 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1808 for (i = 1; i < 31; ++i) {
1809 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1810 ep_ctx->ep_info = 0;
1811 ep_ctx->ep_info2 = 0;
1813 ep_ctx->tx_info = 0;
1817 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1818 struct usb_device *udev, u32 *cmd_status)
1822 switch (*cmd_status) {
1824 dev_warn(&udev->dev, "Not enough host controller resources "
1825 "for new device state.\n");
1827 /* FIXME: can we allocate more resources for the HC? */
1830 case COMP_2ND_BW_ERR:
1831 dev_warn(&udev->dev, "Not enough bandwidth "
1832 "for new device state.\n");
1834 /* FIXME: can we go back to the old state? */
1837 /* the HCD set up something wrong */
1838 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1840 "and endpoint is not disabled.\n");
1844 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1845 "configure command.\n");
1849 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1850 "Successful Endpoint Configure command");
1854 xhci_err(xhci, "ERROR: unexpected command completion "
1855 "code 0x%x.\n", *cmd_status);
1862 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1863 struct usb_device *udev, u32 *cmd_status)
1866 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1868 switch (*cmd_status) {
1870 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1871 "context command.\n");
1875 dev_warn(&udev->dev, "WARN: slot not enabled for"
1876 "evaluate context command.\n");
1879 case COMP_CTX_STATE:
1880 dev_warn(&udev->dev, "WARN: invalid context state for "
1881 "evaluate context command.\n");
1882 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1886 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1887 "context command.\n");
1891 /* Max Exit Latency too large error */
1892 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1896 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1897 "Successful evaluate context command");
1901 xhci_err(xhci, "ERROR: unexpected command completion "
1902 "code 0x%x.\n", *cmd_status);
1909 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1910 struct xhci_input_control_ctx *ctrl_ctx)
1912 u32 valid_add_flags;
1913 u32 valid_drop_flags;
1915 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1916 * (bit 1). The default control endpoint is added during the Address
1917 * Device command and is never removed until the slot is disabled.
1919 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1920 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1922 /* Use hweight32 to count the number of ones in the add flags, or
1923 * number of endpoints added. Don't count endpoints that are changed
1924 * (both added and dropped).
1926 return hweight32(valid_add_flags) -
1927 hweight32(valid_add_flags & valid_drop_flags);
1930 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1931 struct xhci_input_control_ctx *ctrl_ctx)
1933 u32 valid_add_flags;
1934 u32 valid_drop_flags;
1936 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1937 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1939 return hweight32(valid_drop_flags) -
1940 hweight32(valid_add_flags & valid_drop_flags);
1944 * We need to reserve the new number of endpoints before the configure endpoint
1945 * command completes. We can't subtract the dropped endpoints from the number
1946 * of active endpoints until the command completes because we can oversubscribe
1947 * the host in this case:
1949 * - the first configure endpoint command drops more endpoints than it adds
1950 * - a second configure endpoint command that adds more endpoints is queued
1951 * - the first configure endpoint command fails, so the config is unchanged
1952 * - the second command may succeed, even though there isn't enough resources
1954 * Must be called with xhci->lock held.
1956 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1957 struct xhci_input_control_ctx *ctrl_ctx)
1961 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1962 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1963 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1964 "Not enough ep ctxs: "
1965 "%u active, need to add %u, limit is %u.",
1966 xhci->num_active_eps, added_eps,
1967 xhci->limit_active_eps);
1970 xhci->num_active_eps += added_eps;
1971 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1972 "Adding %u ep ctxs, %u now active.", added_eps,
1973 xhci->num_active_eps);
1978 * The configure endpoint was failed by the xHC for some other reason, so we
1979 * need to revert the resources that failed configuration would have used.
1981 * Must be called with xhci->lock held.
1983 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1984 struct xhci_input_control_ctx *ctrl_ctx)
1988 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1989 xhci->num_active_eps -= num_failed_eps;
1990 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1991 "Removing %u failed ep ctxs, %u now active.",
1993 xhci->num_active_eps);
1997 * Now that the command has completed, clean up the active endpoint count by
1998 * subtracting out the endpoints that were dropped (but not changed).
2000 * Must be called with xhci->lock held.
2002 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2003 struct xhci_input_control_ctx *ctrl_ctx)
2005 u32 num_dropped_eps;
2007 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2008 xhci->num_active_eps -= num_dropped_eps;
2009 if (num_dropped_eps)
2010 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2011 "Removing %u dropped ep ctxs, %u now active.",
2013 xhci->num_active_eps);
2016 static unsigned int xhci_get_block_size(struct usb_device *udev)
2018 switch (udev->speed) {
2020 case USB_SPEED_FULL:
2022 case USB_SPEED_HIGH:
2024 case USB_SPEED_SUPER:
2026 case USB_SPEED_UNKNOWN:
2027 case USB_SPEED_WIRELESS:
2029 /* Should never happen */
2035 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2037 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2039 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2044 /* If we are changing a LS/FS device under a HS hub,
2045 * make sure (if we are activating a new TT) that the HS bus has enough
2046 * bandwidth for this new TT.
2048 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2049 struct xhci_virt_device *virt_dev,
2052 struct xhci_interval_bw_table *bw_table;
2053 struct xhci_tt_bw_info *tt_info;
2055 /* Find the bandwidth table for the root port this TT is attached to. */
2056 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2057 tt_info = virt_dev->tt_info;
2058 /* If this TT already had active endpoints, the bandwidth for this TT
2059 * has already been added. Removing all periodic endpoints (and thus
2060 * making the TT enactive) will only decrease the bandwidth used.
2064 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2065 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2069 /* Not sure why we would have no new active endpoints...
2071 * Maybe because of an Evaluate Context change for a hub update or a
2072 * control endpoint 0 max packet size change?
2073 * FIXME: skip the bandwidth calculation in that case.
2078 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2079 struct xhci_virt_device *virt_dev)
2081 unsigned int bw_reserved;
2083 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2084 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2087 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2088 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2095 * This algorithm is a very conservative estimate of the worst-case scheduling
2096 * scenario for any one interval. The hardware dynamically schedules the
2097 * packets, so we can't tell which microframe could be the limiting factor in
2098 * the bandwidth scheduling. This only takes into account periodic endpoints.
2100 * Obviously, we can't solve an NP complete problem to find the minimum worst
2101 * case scenario. Instead, we come up with an estimate that is no less than
2102 * the worst case bandwidth used for any one microframe, but may be an
2105 * We walk the requirements for each endpoint by interval, starting with the
2106 * smallest interval, and place packets in the schedule where there is only one
2107 * possible way to schedule packets for that interval. In order to simplify
2108 * this algorithm, we record the largest max packet size for each interval, and
2109 * assume all packets will be that size.
2111 * For interval 0, we obviously must schedule all packets for each interval.
2112 * The bandwidth for interval 0 is just the amount of data to be transmitted
2113 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2114 * the number of packets).
2116 * For interval 1, we have two possible microframes to schedule those packets
2117 * in. For this algorithm, if we can schedule the same number of packets for
2118 * each possible scheduling opportunity (each microframe), we will do so. The
2119 * remaining number of packets will be saved to be transmitted in the gaps in
2120 * the next interval's scheduling sequence.
2122 * As we move those remaining packets to be scheduled with interval 2 packets,
2123 * we have to double the number of remaining packets to transmit. This is
2124 * because the intervals are actually powers of 2, and we would be transmitting
2125 * the previous interval's packets twice in this interval. We also have to be
2126 * sure that when we look at the largest max packet size for this interval, we
2127 * also look at the largest max packet size for the remaining packets and take
2128 * the greater of the two.
2130 * The algorithm continues to evenly distribute packets in each scheduling
2131 * opportunity, and push the remaining packets out, until we get to the last
2132 * interval. Then those packets and their associated overhead are just added
2133 * to the bandwidth used.
2135 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2136 struct xhci_virt_device *virt_dev,
2139 unsigned int bw_reserved;
2140 unsigned int max_bandwidth;
2141 unsigned int bw_used;
2142 unsigned int block_size;
2143 struct xhci_interval_bw_table *bw_table;
2144 unsigned int packet_size = 0;
2145 unsigned int overhead = 0;
2146 unsigned int packets_transmitted = 0;
2147 unsigned int packets_remaining = 0;
2150 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2151 return xhci_check_ss_bw(xhci, virt_dev);
2153 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2154 max_bandwidth = HS_BW_LIMIT;
2155 /* Convert percent of bus BW reserved to blocks reserved */
2156 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2158 max_bandwidth = FS_BW_LIMIT;
2159 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2162 bw_table = virt_dev->bw_table;
2163 /* We need to translate the max packet size and max ESIT payloads into
2164 * the units the hardware uses.
2166 block_size = xhci_get_block_size(virt_dev->udev);
2168 /* If we are manipulating a LS/FS device under a HS hub, double check
2169 * that the HS bus has enough bandwidth if we are activing a new TT.
2171 if (virt_dev->tt_info) {
2172 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2173 "Recalculating BW for rootport %u",
2174 virt_dev->real_port);
2175 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2176 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2177 "newly activated TT.\n");
2180 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2181 "Recalculating BW for TT slot %u port %u",
2182 virt_dev->tt_info->slot_id,
2183 virt_dev->tt_info->ttport);
2185 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2186 "Recalculating BW for rootport %u",
2187 virt_dev->real_port);
2190 /* Add in how much bandwidth will be used for interval zero, or the
2191 * rounded max ESIT payload + number of packets * largest overhead.
2193 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2194 bw_table->interval_bw[0].num_packets *
2195 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2197 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2198 unsigned int bw_added;
2199 unsigned int largest_mps;
2200 unsigned int interval_overhead;
2203 * How many packets could we transmit in this interval?
2204 * If packets didn't fit in the previous interval, we will need
2205 * to transmit that many packets twice within this interval.
2207 packets_remaining = 2 * packets_remaining +
2208 bw_table->interval_bw[i].num_packets;
2210 /* Find the largest max packet size of this or the previous
2213 if (list_empty(&bw_table->interval_bw[i].endpoints))
2216 struct xhci_virt_ep *virt_ep;
2217 struct list_head *ep_entry;
2219 ep_entry = bw_table->interval_bw[i].endpoints.next;
2220 virt_ep = list_entry(ep_entry,
2221 struct xhci_virt_ep, bw_endpoint_list);
2222 /* Convert to blocks, rounding up */
2223 largest_mps = DIV_ROUND_UP(
2224 virt_ep->bw_info.max_packet_size,
2227 if (largest_mps > packet_size)
2228 packet_size = largest_mps;
2230 /* Use the larger overhead of this or the previous interval. */
2231 interval_overhead = xhci_get_largest_overhead(
2232 &bw_table->interval_bw[i]);
2233 if (interval_overhead > overhead)
2234 overhead = interval_overhead;
2236 /* How many packets can we evenly distribute across
2237 * (1 << (i + 1)) possible scheduling opportunities?
2239 packets_transmitted = packets_remaining >> (i + 1);
2241 /* Add in the bandwidth used for those scheduled packets */
2242 bw_added = packets_transmitted * (overhead + packet_size);
2244 /* How many packets do we have remaining to transmit? */
2245 packets_remaining = packets_remaining % (1 << (i + 1));
2247 /* What largest max packet size should those packets have? */
2248 /* If we've transmitted all packets, don't carry over the
2249 * largest packet size.
2251 if (packets_remaining == 0) {
2254 } else if (packets_transmitted > 0) {
2255 /* Otherwise if we do have remaining packets, and we've
2256 * scheduled some packets in this interval, take the
2257 * largest max packet size from endpoints with this
2260 packet_size = largest_mps;
2261 overhead = interval_overhead;
2263 /* Otherwise carry over packet_size and overhead from the last
2264 * time we had a remainder.
2266 bw_used += bw_added;
2267 if (bw_used > max_bandwidth) {
2268 xhci_warn(xhci, "Not enough bandwidth. "
2269 "Proposed: %u, Max: %u\n",
2270 bw_used, max_bandwidth);
2275 * Ok, we know we have some packets left over after even-handedly
2276 * scheduling interval 15. We don't know which microframes they will
2277 * fit into, so we over-schedule and say they will be scheduled every
2280 if (packets_remaining > 0)
2281 bw_used += overhead + packet_size;
2283 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2284 unsigned int port_index = virt_dev->real_port - 1;
2286 /* OK, we're manipulating a HS device attached to a
2287 * root port bandwidth domain. Include the number of active TTs
2288 * in the bandwidth used.
2290 bw_used += TT_HS_OVERHEAD *
2291 xhci->rh_bw[port_index].num_active_tts;
2294 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2295 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2296 "Available: %u " "percent",
2297 bw_used, max_bandwidth, bw_reserved,
2298 (max_bandwidth - bw_used - bw_reserved) * 100 /
2301 bw_used += bw_reserved;
2302 if (bw_used > max_bandwidth) {
2303 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2304 bw_used, max_bandwidth);
2308 bw_table->bw_used = bw_used;
2312 static bool xhci_is_async_ep(unsigned int ep_type)
2314 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2315 ep_type != ISOC_IN_EP &&
2316 ep_type != INT_IN_EP);
2319 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2321 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2324 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2326 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2328 if (ep_bw->ep_interval == 0)
2329 return SS_OVERHEAD_BURST +
2330 (ep_bw->mult * ep_bw->num_packets *
2331 (SS_OVERHEAD + mps));
2332 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2333 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2334 1 << ep_bw->ep_interval);
2338 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2339 struct xhci_bw_info *ep_bw,
2340 struct xhci_interval_bw_table *bw_table,
2341 struct usb_device *udev,
2342 struct xhci_virt_ep *virt_ep,
2343 struct xhci_tt_bw_info *tt_info)
2345 struct xhci_interval_bw *interval_bw;
2346 int normalized_interval;
2348 if (xhci_is_async_ep(ep_bw->type))
2351 if (udev->speed == USB_SPEED_SUPER) {
2352 if (xhci_is_sync_in_ep(ep_bw->type))
2353 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2354 xhci_get_ss_bw_consumed(ep_bw);
2356 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2357 xhci_get_ss_bw_consumed(ep_bw);
2361 /* SuperSpeed endpoints never get added to intervals in the table, so
2362 * this check is only valid for HS/FS/LS devices.
2364 if (list_empty(&virt_ep->bw_endpoint_list))
2366 /* For LS/FS devices, we need to translate the interval expressed in
2367 * microframes to frames.
2369 if (udev->speed == USB_SPEED_HIGH)
2370 normalized_interval = ep_bw->ep_interval;
2372 normalized_interval = ep_bw->ep_interval - 3;
2374 if (normalized_interval == 0)
2375 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2376 interval_bw = &bw_table->interval_bw[normalized_interval];
2377 interval_bw->num_packets -= ep_bw->num_packets;
2378 switch (udev->speed) {
2380 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2382 case USB_SPEED_FULL:
2383 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2385 case USB_SPEED_HIGH:
2386 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2388 case USB_SPEED_SUPER:
2389 case USB_SPEED_UNKNOWN:
2390 case USB_SPEED_WIRELESS:
2391 /* Should never happen because only LS/FS/HS endpoints will get
2392 * added to the endpoint list.
2397 tt_info->active_eps -= 1;
2398 list_del_init(&virt_ep->bw_endpoint_list);
2401 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2402 struct xhci_bw_info *ep_bw,
2403 struct xhci_interval_bw_table *bw_table,
2404 struct usb_device *udev,
2405 struct xhci_virt_ep *virt_ep,
2406 struct xhci_tt_bw_info *tt_info)
2408 struct xhci_interval_bw *interval_bw;
2409 struct xhci_virt_ep *smaller_ep;
2410 int normalized_interval;
2412 if (xhci_is_async_ep(ep_bw->type))
2415 if (udev->speed == USB_SPEED_SUPER) {
2416 if (xhci_is_sync_in_ep(ep_bw->type))
2417 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2418 xhci_get_ss_bw_consumed(ep_bw);
2420 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2421 xhci_get_ss_bw_consumed(ep_bw);
2425 /* For LS/FS devices, we need to translate the interval expressed in
2426 * microframes to frames.
2428 if (udev->speed == USB_SPEED_HIGH)
2429 normalized_interval = ep_bw->ep_interval;
2431 normalized_interval = ep_bw->ep_interval - 3;
2433 if (normalized_interval == 0)
2434 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2435 interval_bw = &bw_table->interval_bw[normalized_interval];
2436 interval_bw->num_packets += ep_bw->num_packets;
2437 switch (udev->speed) {
2439 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2441 case USB_SPEED_FULL:
2442 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2444 case USB_SPEED_HIGH:
2445 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2447 case USB_SPEED_SUPER:
2448 case USB_SPEED_UNKNOWN:
2449 case USB_SPEED_WIRELESS:
2450 /* Should never happen because only LS/FS/HS endpoints will get
2451 * added to the endpoint list.
2457 tt_info->active_eps += 1;
2458 /* Insert the endpoint into the list, largest max packet size first. */
2459 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2461 if (ep_bw->max_packet_size >=
2462 smaller_ep->bw_info.max_packet_size) {
2463 /* Add the new ep before the smaller endpoint */
2464 list_add_tail(&virt_ep->bw_endpoint_list,
2465 &smaller_ep->bw_endpoint_list);
2469 /* Add the new endpoint at the end of the list. */
2470 list_add_tail(&virt_ep->bw_endpoint_list,
2471 &interval_bw->endpoints);
2474 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2475 struct xhci_virt_device *virt_dev,
2478 struct xhci_root_port_bw_info *rh_bw_info;
2479 if (!virt_dev->tt_info)
2482 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2483 if (old_active_eps == 0 &&
2484 virt_dev->tt_info->active_eps != 0) {
2485 rh_bw_info->num_active_tts += 1;
2486 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2487 } else if (old_active_eps != 0 &&
2488 virt_dev->tt_info->active_eps == 0) {
2489 rh_bw_info->num_active_tts -= 1;
2490 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2494 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2495 struct xhci_virt_device *virt_dev,
2496 struct xhci_container_ctx *in_ctx)
2498 struct xhci_bw_info ep_bw_info[31];
2500 struct xhci_input_control_ctx *ctrl_ctx;
2501 int old_active_eps = 0;
2503 if (virt_dev->tt_info)
2504 old_active_eps = virt_dev->tt_info->active_eps;
2506 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2508 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2513 for (i = 0; i < 31; i++) {
2514 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2517 /* Make a copy of the BW info in case we need to revert this */
2518 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2519 sizeof(ep_bw_info[i]));
2520 /* Drop the endpoint from the interval table if the endpoint is
2521 * being dropped or changed.
2523 if (EP_IS_DROPPED(ctrl_ctx, i))
2524 xhci_drop_ep_from_interval_table(xhci,
2525 &virt_dev->eps[i].bw_info,
2531 /* Overwrite the information stored in the endpoints' bw_info */
2532 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2533 for (i = 0; i < 31; i++) {
2534 /* Add any changed or added endpoints to the interval table */
2535 if (EP_IS_ADDED(ctrl_ctx, i))
2536 xhci_add_ep_to_interval_table(xhci,
2537 &virt_dev->eps[i].bw_info,
2544 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2545 /* Ok, this fits in the bandwidth we have.
2546 * Update the number of active TTs.
2548 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2552 /* We don't have enough bandwidth for this, revert the stored info. */
2553 for (i = 0; i < 31; i++) {
2554 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2557 /* Drop the new copies of any added or changed endpoints from
2558 * the interval table.
2560 if (EP_IS_ADDED(ctrl_ctx, i)) {
2561 xhci_drop_ep_from_interval_table(xhci,
2562 &virt_dev->eps[i].bw_info,
2568 /* Revert the endpoint back to its old information */
2569 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2570 sizeof(ep_bw_info[i]));
2571 /* Add any changed or dropped endpoints back into the table */
2572 if (EP_IS_DROPPED(ctrl_ctx, i))
2573 xhci_add_ep_to_interval_table(xhci,
2574 &virt_dev->eps[i].bw_info,
2584 /* Issue a configure endpoint command or evaluate context command
2585 * and wait for it to finish.
2587 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2588 struct usb_device *udev,
2589 struct xhci_command *command,
2590 bool ctx_change, bool must_succeed)
2594 unsigned long flags;
2595 struct xhci_input_control_ctx *ctrl_ctx;
2596 struct xhci_virt_device *virt_dev;
2601 spin_lock_irqsave(&xhci->lock, flags);
2602 virt_dev = xhci->devs[udev->slot_id];
2604 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2606 spin_unlock_irqrestore(&xhci->lock, flags);
2607 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2612 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2613 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2614 spin_unlock_irqrestore(&xhci->lock, flags);
2615 xhci_warn(xhci, "Not enough host resources, "
2616 "active endpoint contexts = %u\n",
2617 xhci->num_active_eps);
2620 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2621 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2622 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2623 xhci_free_host_resources(xhci, ctrl_ctx);
2624 spin_unlock_irqrestore(&xhci->lock, flags);
2625 xhci_warn(xhci, "Not enough bandwidth\n");
2629 list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
2632 ret = xhci_queue_configure_endpoint(xhci, command,
2633 command->in_ctx->dma,
2634 udev->slot_id, must_succeed);
2636 ret = xhci_queue_evaluate_context(xhci, command,
2637 command->in_ctx->dma,
2638 udev->slot_id, must_succeed);
2640 list_del(&command->cmd_list);
2641 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2642 xhci_free_host_resources(xhci, ctrl_ctx);
2643 spin_unlock_irqrestore(&xhci->lock, flags);
2644 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2645 "FIXME allocate a new ring segment");
2648 xhci_ring_cmd_db(xhci);
2649 spin_unlock_irqrestore(&xhci->lock, flags);
2651 /* Wait for the configure endpoint command to complete */
2652 timeleft = wait_for_completion_interruptible_timeout(
2653 command->completion,
2654 XHCI_CMD_DEFAULT_TIMEOUT);
2655 if (timeleft <= 0) {
2656 xhci_warn(xhci, "%s while waiting for %s command\n",
2657 timeleft == 0 ? "Timeout" : "Signal",
2659 "configure endpoint" :
2660 "evaluate context");
2661 /* cancel the configure endpoint command */
2662 ret = xhci_cancel_cmd(xhci, command, command->command_trb);
2669 ret = xhci_configure_endpoint_result(xhci, udev,
2672 ret = xhci_evaluate_context_result(xhci, udev,
2675 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2676 spin_lock_irqsave(&xhci->lock, flags);
2677 /* If the command failed, remove the reserved resources.
2678 * Otherwise, clean up the estimate to include dropped eps.
2681 xhci_free_host_resources(xhci, ctrl_ctx);
2683 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2684 spin_unlock_irqrestore(&xhci->lock, flags);
2689 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2690 struct xhci_virt_device *vdev, int i)
2692 struct xhci_virt_ep *ep = &vdev->eps[i];
2694 if (ep->ep_state & EP_HAS_STREAMS) {
2695 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2696 xhci_get_endpoint_address(i));
2697 xhci_free_stream_info(xhci, ep->stream_info);
2698 ep->stream_info = NULL;
2699 ep->ep_state &= ~EP_HAS_STREAMS;
2703 /* Called after one or more calls to xhci_add_endpoint() or
2704 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2705 * to call xhci_reset_bandwidth().
2707 * Since we are in the middle of changing either configuration or
2708 * installing a new alt setting, the USB core won't allow URBs to be
2709 * enqueued for any endpoint on the old config or interface. Nothing
2710 * else should be touching the xhci->devs[slot_id] structure, so we
2711 * don't need to take the xhci->lock for manipulating that.
2713 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2717 struct xhci_hcd *xhci;
2718 struct xhci_virt_device *virt_dev;
2719 struct xhci_input_control_ctx *ctrl_ctx;
2720 struct xhci_slot_ctx *slot_ctx;
2721 struct xhci_command *command;
2723 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2726 xhci = hcd_to_xhci(hcd);
2727 if (xhci->xhc_state & XHCI_STATE_DYING)
2730 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2731 virt_dev = xhci->devs[udev->slot_id];
2733 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2737 command->in_ctx = virt_dev->in_ctx;
2739 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2740 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2742 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2745 goto command_cleanup;
2747 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2748 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2749 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2751 /* Don't issue the command if there's no endpoints to update. */
2752 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2753 ctrl_ctx->drop_flags == 0) {
2755 goto command_cleanup;
2757 xhci_dbg(xhci, "New Input Control Context:\n");
2758 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2759 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2760 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2762 ret = xhci_configure_endpoint(xhci, udev, command,
2765 /* Callee should call reset_bandwidth() */
2766 goto command_cleanup;
2768 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2769 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2770 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2772 /* Free any rings that were dropped, but not changed. */
2773 for (i = 1; i < 31; ++i) {
2774 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2775 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2776 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2777 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2780 xhci_zero_in_ctx(xhci, virt_dev);
2782 * Install any rings for completely new endpoints or changed endpoints,
2783 * and free or cache any old rings from changed endpoints.
2785 for (i = 1; i < 31; ++i) {
2786 if (!virt_dev->eps[i].new_ring)
2788 /* Only cache or free the old ring if it exists.
2789 * It may not if this is the first add of an endpoint.
2791 if (virt_dev->eps[i].ring) {
2792 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2794 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2795 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2796 virt_dev->eps[i].new_ring = NULL;
2799 kfree(command->completion);
2805 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2807 struct xhci_hcd *xhci;
2808 struct xhci_virt_device *virt_dev;
2811 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2814 xhci = hcd_to_xhci(hcd);
2816 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2817 virt_dev = xhci->devs[udev->slot_id];
2818 /* Free any rings allocated for added endpoints */
2819 for (i = 0; i < 31; ++i) {
2820 if (virt_dev->eps[i].new_ring) {
2821 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2822 virt_dev->eps[i].new_ring = NULL;
2825 xhci_zero_in_ctx(xhci, virt_dev);
2828 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2829 struct xhci_container_ctx *in_ctx,
2830 struct xhci_container_ctx *out_ctx,
2831 struct xhci_input_control_ctx *ctrl_ctx,
2832 u32 add_flags, u32 drop_flags)
2834 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2835 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2836 xhci_slot_copy(xhci, in_ctx, out_ctx);
2837 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2839 xhci_dbg(xhci, "Input Context:\n");
2840 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2843 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2844 unsigned int slot_id, unsigned int ep_index,
2845 struct xhci_dequeue_state *deq_state)
2847 struct xhci_input_control_ctx *ctrl_ctx;
2848 struct xhci_container_ctx *in_ctx;
2849 struct xhci_ep_ctx *ep_ctx;
2853 in_ctx = xhci->devs[slot_id]->in_ctx;
2854 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2856 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2861 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2862 xhci->devs[slot_id]->out_ctx, ep_index);
2863 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2864 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2865 deq_state->new_deq_ptr);
2867 xhci_warn(xhci, "WARN Cannot submit config ep after "
2868 "reset ep command\n");
2869 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2870 deq_state->new_deq_seg,
2871 deq_state->new_deq_ptr);
2874 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2876 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2877 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2878 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2879 added_ctxs, added_ctxs);
2882 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2883 struct usb_device *udev, unsigned int ep_index)
2885 struct xhci_dequeue_state deq_state;
2886 struct xhci_virt_ep *ep;
2888 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2889 "Cleaning up stalled endpoint ring");
2890 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2891 /* We need to move the HW's dequeue pointer past this TD,
2892 * or it will attempt to resend it on the next doorbell ring.
2894 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2895 ep_index, ep->stopped_stream, ep->stopped_td,
2898 /* HW with the reset endpoint quirk will use the saved dequeue state to
2899 * issue a configure endpoint command later.
2901 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2902 struct xhci_command *command;
2903 /* Can't sleep if we're called from cleanup_halted_endpoint() */
2904 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
2907 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2908 "Queueing new dequeue state");
2909 xhci_queue_new_dequeue_state(xhci, command, udev->slot_id,
2910 ep_index, ep->stopped_stream, &deq_state);
2912 /* Better hope no one uses the input context between now and the
2913 * reset endpoint completion!
2914 * XXX: No idea how this hardware will react when stream rings
2917 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2918 "Setting up input context for "
2919 "configure endpoint command");
2920 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2921 ep_index, &deq_state);
2925 /* Deal with stalled endpoints. The core should have sent the control message
2926 * to clear the halt condition. However, we need to make the xHCI hardware
2927 * reset its sequence number, since a device will expect a sequence number of
2928 * zero after the halt condition is cleared.
2929 * Context: in_interrupt
2931 void xhci_endpoint_reset(struct usb_hcd *hcd,
2932 struct usb_host_endpoint *ep)
2934 struct xhci_hcd *xhci;
2935 struct usb_device *udev;
2936 unsigned int ep_index;
2937 unsigned long flags;
2939 struct xhci_virt_ep *virt_ep;
2940 struct xhci_command *command;
2942 xhci = hcd_to_xhci(hcd);
2943 udev = (struct usb_device *) ep->hcpriv;
2944 /* Called with a root hub endpoint (or an endpoint that wasn't added
2945 * with xhci_add_endpoint()
2949 ep_index = xhci_get_endpoint_index(&ep->desc);
2950 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2951 if (!virt_ep->stopped_td) {
2952 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2953 "Endpoint 0x%x not halted, refusing to reset.",
2954 ep->desc.bEndpointAddress);
2957 if (usb_endpoint_xfer_control(&ep->desc)) {
2958 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2959 "Control endpoint stall already handled.");
2963 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
2967 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2968 "Queueing reset endpoint command");
2969 spin_lock_irqsave(&xhci->lock, flags);
2970 ret = xhci_queue_reset_ep(xhci, command, udev->slot_id, ep_index);
2972 * Can't change the ring dequeue pointer until it's transitioned to the
2973 * stopped state, which is only upon a successful reset endpoint
2974 * command. Better hope that last command worked!
2977 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2978 kfree(virt_ep->stopped_td);
2979 xhci_ring_cmd_db(xhci);
2981 virt_ep->stopped_td = NULL;
2982 virt_ep->stopped_stream = 0;
2983 spin_unlock_irqrestore(&xhci->lock, flags);
2986 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2989 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2990 struct usb_device *udev, struct usb_host_endpoint *ep,
2991 unsigned int slot_id)
2994 unsigned int ep_index;
2995 unsigned int ep_state;
2999 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
3002 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
3003 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
3004 " descriptor for ep 0x%x does not support streams\n",
3005 ep->desc.bEndpointAddress);
3009 ep_index = xhci_get_endpoint_index(&ep->desc);
3010 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3011 if (ep_state & EP_HAS_STREAMS ||
3012 ep_state & EP_GETTING_STREAMS) {
3013 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3014 "already has streams set up.\n",
3015 ep->desc.bEndpointAddress);
3016 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3017 "dynamic stream context array reallocation.\n");
3020 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3021 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3022 "endpoint 0x%x; URBs are pending.\n",
3023 ep->desc.bEndpointAddress);
3029 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3030 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3032 unsigned int max_streams;
3034 /* The stream context array size must be a power of two */
3035 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3037 * Find out how many primary stream array entries the host controller
3038 * supports. Later we may use secondary stream arrays (similar to 2nd
3039 * level page entries), but that's an optional feature for xHCI host
3040 * controllers. xHCs must support at least 4 stream IDs.
3042 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3043 if (*num_stream_ctxs > max_streams) {
3044 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3046 *num_stream_ctxs = max_streams;
3047 *num_streams = max_streams;
3051 /* Returns an error code if one of the endpoint already has streams.
3052 * This does not change any data structures, it only checks and gathers
3055 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3056 struct usb_device *udev,
3057 struct usb_host_endpoint **eps, unsigned int num_eps,
3058 unsigned int *num_streams, u32 *changed_ep_bitmask)
3060 unsigned int max_streams;
3061 unsigned int endpoint_flag;
3065 for (i = 0; i < num_eps; i++) {
3066 ret = xhci_check_streams_endpoint(xhci, udev,
3067 eps[i], udev->slot_id);
3071 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3072 if (max_streams < (*num_streams - 1)) {
3073 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3074 eps[i]->desc.bEndpointAddress,
3076 *num_streams = max_streams+1;
3079 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3080 if (*changed_ep_bitmask & endpoint_flag)
3082 *changed_ep_bitmask |= endpoint_flag;
3087 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3088 struct usb_device *udev,
3089 struct usb_host_endpoint **eps, unsigned int num_eps)
3091 u32 changed_ep_bitmask = 0;
3092 unsigned int slot_id;
3093 unsigned int ep_index;
3094 unsigned int ep_state;
3097 slot_id = udev->slot_id;
3098 if (!xhci->devs[slot_id])
3101 for (i = 0; i < num_eps; i++) {
3102 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3103 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3104 /* Are streams already being freed for the endpoint? */
3105 if (ep_state & EP_GETTING_NO_STREAMS) {
3106 xhci_warn(xhci, "WARN Can't disable streams for "
3108 "streams are being disabled already\n",
3109 eps[i]->desc.bEndpointAddress);
3112 /* Are there actually any streams to free? */
3113 if (!(ep_state & EP_HAS_STREAMS) &&
3114 !(ep_state & EP_GETTING_STREAMS)) {
3115 xhci_warn(xhci, "WARN Can't disable streams for "
3117 "streams are already disabled!\n",
3118 eps[i]->desc.bEndpointAddress);
3119 xhci_warn(xhci, "WARN xhci_free_streams() called "
3120 "with non-streams endpoint\n");
3123 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3125 return changed_ep_bitmask;
3129 * The USB device drivers use this function (though the HCD interface in USB
3130 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3131 * coordinate mass storage command queueing across multiple endpoints (basically
3132 * a stream ID == a task ID).
3134 * Setting up streams involves allocating the same size stream context array
3135 * for each endpoint and issuing a configure endpoint command for all endpoints.
3137 * Don't allow the call to succeed if one endpoint only supports one stream
3138 * (which means it doesn't support streams at all).
3140 * Drivers may get less stream IDs than they asked for, if the host controller
3141 * hardware or endpoints claim they can't support the number of requested
3144 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3145 struct usb_host_endpoint **eps, unsigned int num_eps,
3146 unsigned int num_streams, gfp_t mem_flags)
3149 struct xhci_hcd *xhci;
3150 struct xhci_virt_device *vdev;
3151 struct xhci_command *config_cmd;
3152 struct xhci_input_control_ctx *ctrl_ctx;
3153 unsigned int ep_index;
3154 unsigned int num_stream_ctxs;
3155 unsigned long flags;
3156 u32 changed_ep_bitmask = 0;
3161 /* Add one to the number of streams requested to account for
3162 * stream 0 that is reserved for xHCI usage.
3165 xhci = hcd_to_xhci(hcd);
3166 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3169 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3170 if (HCC_MAX_PSA(xhci->hcc_params) < 4) {
3171 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3175 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3177 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3180 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3182 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3184 xhci_free_command(xhci, config_cmd);
3188 /* Check to make sure all endpoints are not already configured for
3189 * streams. While we're at it, find the maximum number of streams that
3190 * all the endpoints will support and check for duplicate endpoints.
3192 spin_lock_irqsave(&xhci->lock, flags);
3193 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3194 num_eps, &num_streams, &changed_ep_bitmask);
3196 xhci_free_command(xhci, config_cmd);
3197 spin_unlock_irqrestore(&xhci->lock, flags);
3200 if (num_streams <= 1) {
3201 xhci_warn(xhci, "WARN: endpoints can't handle "
3202 "more than one stream.\n");
3203 xhci_free_command(xhci, config_cmd);
3204 spin_unlock_irqrestore(&xhci->lock, flags);
3207 vdev = xhci->devs[udev->slot_id];
3208 /* Mark each endpoint as being in transition, so
3209 * xhci_urb_enqueue() will reject all URBs.
3211 for (i = 0; i < num_eps; i++) {
3212 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3213 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3215 spin_unlock_irqrestore(&xhci->lock, flags);
3217 /* Setup internal data structures and allocate HW data structures for
3218 * streams (but don't install the HW structures in the input context
3219 * until we're sure all memory allocation succeeded).
3221 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3222 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3223 num_stream_ctxs, num_streams);
3225 for (i = 0; i < num_eps; i++) {
3226 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3227 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3229 num_streams, mem_flags);
3230 if (!vdev->eps[ep_index].stream_info)
3232 /* Set maxPstreams in endpoint context and update deq ptr to
3233 * point to stream context array. FIXME
3237 /* Set up the input context for a configure endpoint command. */
3238 for (i = 0; i < num_eps; i++) {
3239 struct xhci_ep_ctx *ep_ctx;
3241 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3242 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3244 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3245 vdev->out_ctx, ep_index);
3246 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3247 vdev->eps[ep_index].stream_info);
3249 /* Tell the HW to drop its old copy of the endpoint context info
3250 * and add the updated copy from the input context.
3252 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3253 vdev->out_ctx, ctrl_ctx,
3254 changed_ep_bitmask, changed_ep_bitmask);
3256 /* Issue and wait for the configure endpoint command */
3257 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3260 /* xHC rejected the configure endpoint command for some reason, so we
3261 * leave the old ring intact and free our internal streams data
3267 spin_lock_irqsave(&xhci->lock, flags);
3268 for (i = 0; i < num_eps; i++) {
3269 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3270 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3271 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3272 udev->slot_id, ep_index);
3273 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3275 xhci_free_command(xhci, config_cmd);
3276 spin_unlock_irqrestore(&xhci->lock, flags);
3278 /* Subtract 1 for stream 0, which drivers can't use */
3279 return num_streams - 1;
3282 /* If it didn't work, free the streams! */
3283 for (i = 0; i < num_eps; i++) {
3284 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3285 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3286 vdev->eps[ep_index].stream_info = NULL;
3287 /* FIXME Unset maxPstreams in endpoint context and
3288 * update deq ptr to point to normal string ring.
3290 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3291 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3292 xhci_endpoint_zero(xhci, vdev, eps[i]);
3294 xhci_free_command(xhci, config_cmd);
3298 /* Transition the endpoint from using streams to being a "normal" endpoint
3301 * Modify the endpoint context state, submit a configure endpoint command,
3302 * and free all endpoint rings for streams if that completes successfully.
3304 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3305 struct usb_host_endpoint **eps, unsigned int num_eps,
3309 struct xhci_hcd *xhci;
3310 struct xhci_virt_device *vdev;
3311 struct xhci_command *command;
3312 struct xhci_input_control_ctx *ctrl_ctx;
3313 unsigned int ep_index;
3314 unsigned long flags;
3315 u32 changed_ep_bitmask;
3317 xhci = hcd_to_xhci(hcd);
3318 vdev = xhci->devs[udev->slot_id];
3320 /* Set up a configure endpoint command to remove the streams rings */
3321 spin_lock_irqsave(&xhci->lock, flags);
3322 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3323 udev, eps, num_eps);
3324 if (changed_ep_bitmask == 0) {
3325 spin_unlock_irqrestore(&xhci->lock, flags);
3329 /* Use the xhci_command structure from the first endpoint. We may have
3330 * allocated too many, but the driver may call xhci_free_streams() for
3331 * each endpoint it grouped into one call to xhci_alloc_streams().
3333 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3334 command = vdev->eps[ep_index].stream_info->free_streams_command;
3335 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3337 spin_unlock_irqrestore(&xhci->lock, flags);
3338 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3343 for (i = 0; i < num_eps; i++) {
3344 struct xhci_ep_ctx *ep_ctx;
3346 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3347 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3348 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3349 EP_GETTING_NO_STREAMS;
3351 xhci_endpoint_copy(xhci, command->in_ctx,
3352 vdev->out_ctx, ep_index);
3353 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3354 &vdev->eps[ep_index]);
3356 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3357 vdev->out_ctx, ctrl_ctx,
3358 changed_ep_bitmask, changed_ep_bitmask);
3359 spin_unlock_irqrestore(&xhci->lock, flags);
3361 /* Issue and wait for the configure endpoint command,
3362 * which must succeed.
3364 ret = xhci_configure_endpoint(xhci, udev, command,
3367 /* xHC rejected the configure endpoint command for some reason, so we
3368 * leave the streams rings intact.
3373 spin_lock_irqsave(&xhci->lock, flags);
3374 for (i = 0; i < num_eps; i++) {
3375 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3376 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3377 vdev->eps[ep_index].stream_info = NULL;
3378 /* FIXME Unset maxPstreams in endpoint context and
3379 * update deq ptr to point to normal string ring.
3381 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3382 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3384 spin_unlock_irqrestore(&xhci->lock, flags);
3390 * Deletes endpoint resources for endpoints that were active before a Reset
3391 * Device command, or a Disable Slot command. The Reset Device command leaves
3392 * the control endpoint intact, whereas the Disable Slot command deletes it.
3394 * Must be called with xhci->lock held.
3396 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3397 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3400 unsigned int num_dropped_eps = 0;
3401 unsigned int drop_flags = 0;
3403 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3404 if (virt_dev->eps[i].ring) {
3405 drop_flags |= 1 << i;
3409 xhci->num_active_eps -= num_dropped_eps;
3410 if (num_dropped_eps)
3411 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3412 "Dropped %u ep ctxs, flags = 0x%x, "
3414 num_dropped_eps, drop_flags,
3415 xhci->num_active_eps);
3419 * This submits a Reset Device Command, which will set the device state to 0,
3420 * set the device address to 0, and disable all the endpoints except the default
3421 * control endpoint. The USB core should come back and call
3422 * xhci_address_device(), and then re-set up the configuration. If this is
3423 * called because of a usb_reset_and_verify_device(), then the old alternate
3424 * settings will be re-installed through the normal bandwidth allocation
3427 * Wait for the Reset Device command to finish. Remove all structures
3428 * associated with the endpoints that were disabled. Clear the input device
3429 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3431 * If the virt_dev to be reset does not exist or does not match the udev,
3432 * it means the device is lost, possibly due to the xHC restore error and
3433 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3434 * re-allocate the device.
3436 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3439 unsigned long flags;
3440 struct xhci_hcd *xhci;
3441 unsigned int slot_id;
3442 struct xhci_virt_device *virt_dev;
3443 struct xhci_command *reset_device_cmd;
3445 int last_freed_endpoint;
3446 struct xhci_slot_ctx *slot_ctx;
3447 int old_active_eps = 0;
3449 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3452 xhci = hcd_to_xhci(hcd);
3453 slot_id = udev->slot_id;
3454 virt_dev = xhci->devs[slot_id];
3456 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3457 "not exist. Re-allocate the device\n", slot_id);
3458 ret = xhci_alloc_dev(hcd, udev);
3465 if (virt_dev->udev != udev) {
3466 /* If the virt_dev and the udev does not match, this virt_dev
3467 * may belong to another udev.
3468 * Re-allocate the device.
3470 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3471 "not match the udev. Re-allocate the device\n",
3473 ret = xhci_alloc_dev(hcd, udev);
3480 /* If device is not setup, there is no point in resetting it */
3481 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3482 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3483 SLOT_STATE_DISABLED)
3486 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3487 /* Allocate the command structure that holds the struct completion.
3488 * Assume we're in process context, since the normal device reset
3489 * process has to wait for the device anyway. Storage devices are
3490 * reset as part of error handling, so use GFP_NOIO instead of
3493 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3494 if (!reset_device_cmd) {
3495 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3499 /* Attempt to submit the Reset Device command to the command ring */
3500 spin_lock_irqsave(&xhci->lock, flags);
3502 list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list);
3503 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3505 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3506 list_del(&reset_device_cmd->cmd_list);
3507 spin_unlock_irqrestore(&xhci->lock, flags);
3508 goto command_cleanup;
3510 xhci_ring_cmd_db(xhci);
3511 spin_unlock_irqrestore(&xhci->lock, flags);
3513 /* Wait for the Reset Device command to finish */
3514 timeleft = wait_for_completion_interruptible_timeout(
3515 reset_device_cmd->completion,
3516 XHCI_CMD_DEFAULT_TIMEOUT);
3517 if (timeleft <= 0) {
3518 xhci_warn(xhci, "%s while waiting for reset device command\n",
3519 timeleft == 0 ? "Timeout" : "Signal");
3520 spin_lock_irqsave(&xhci->lock, flags);
3521 /* The timeout might have raced with the event ring handler, so
3522 * only delete from the list if the item isn't poisoned.
3524 if (reset_device_cmd->cmd_list.next != LIST_POISON1)
3525 list_del(&reset_device_cmd->cmd_list);
3526 spin_unlock_irqrestore(&xhci->lock, flags);
3528 goto command_cleanup;
3531 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3532 * unless we tried to reset a slot ID that wasn't enabled,
3533 * or the device wasn't in the addressed or configured state.
3535 ret = reset_device_cmd->status;
3537 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3538 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3539 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3541 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3542 xhci_dbg(xhci, "Not freeing device rings.\n");
3543 /* Don't treat this as an error. May change my mind later. */
3545 goto command_cleanup;
3547 xhci_dbg(xhci, "Successful reset device command.\n");
3550 if (xhci_is_vendor_info_code(xhci, ret))
3552 xhci_warn(xhci, "Unknown completion code %u for "
3553 "reset device command.\n", ret);
3555 goto command_cleanup;
3558 /* Free up host controller endpoint resources */
3559 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3560 spin_lock_irqsave(&xhci->lock, flags);
3561 /* Don't delete the default control endpoint resources */
3562 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3563 spin_unlock_irqrestore(&xhci->lock, flags);
3566 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3567 last_freed_endpoint = 1;
3568 for (i = 1; i < 31; ++i) {
3569 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3571 if (ep->ep_state & EP_HAS_STREAMS) {
3572 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3573 xhci_get_endpoint_address(i));
3574 xhci_free_stream_info(xhci, ep->stream_info);
3575 ep->stream_info = NULL;
3576 ep->ep_state &= ~EP_HAS_STREAMS;
3580 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3581 last_freed_endpoint = i;
3583 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3584 xhci_drop_ep_from_interval_table(xhci,
3585 &virt_dev->eps[i].bw_info,
3590 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3592 /* If necessary, update the number of active TTs on this root port */
3593 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3595 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3596 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3600 xhci_free_command(xhci, reset_device_cmd);
3605 * At this point, the struct usb_device is about to go away, the device has
3606 * disconnected, and all traffic has been stopped and the endpoints have been
3607 * disabled. Free any HC data structures associated with that device.
3609 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3611 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3612 struct xhci_virt_device *virt_dev;
3613 unsigned long flags;
3616 struct xhci_command *command;
3618 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3622 #ifndef CONFIG_USB_DEFAULT_PERSIST
3624 * We called pm_runtime_get_noresume when the device was attached.
3625 * Decrement the counter here to allow controller to runtime suspend
3626 * if no devices remain.
3628 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3629 pm_runtime_put_noidle(hcd->self.controller);
3632 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3633 /* If the host is halted due to driver unload, we still need to free the
3636 if (ret <= 0 && ret != -ENODEV) {
3641 virt_dev = xhci->devs[udev->slot_id];
3643 /* Stop any wayward timer functions (which may grab the lock) */
3644 for (i = 0; i < 31; ++i) {
3645 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3646 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3649 spin_lock_irqsave(&xhci->lock, flags);
3650 /* Don't disable the slot if the host controller is dead. */
3651 state = readl(&xhci->op_regs->status);
3652 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3653 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3654 xhci_free_virt_device(xhci, udev->slot_id);
3655 spin_unlock_irqrestore(&xhci->lock, flags);
3660 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3662 spin_unlock_irqrestore(&xhci->lock, flags);
3663 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3666 xhci_ring_cmd_db(xhci);
3667 spin_unlock_irqrestore(&xhci->lock, flags);
3670 * Event command completion handler will free any data structures
3671 * associated with the slot. XXX Can free sleep?
3676 * Checks if we have enough host controller resources for the default control
3679 * Must be called with xhci->lock held.
3681 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3683 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3684 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3685 "Not enough ep ctxs: "
3686 "%u active, need to add 1, limit is %u.",
3687 xhci->num_active_eps, xhci->limit_active_eps);
3690 xhci->num_active_eps += 1;
3691 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3692 "Adding 1 ep ctx, %u now active.",
3693 xhci->num_active_eps);
3699 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3700 * timed out, or allocating memory failed. Returns 1 on success.
3702 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3704 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3705 unsigned long flags;
3708 struct xhci_command *command;
3710 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3714 spin_lock_irqsave(&xhci->lock, flags);
3715 command->completion = &xhci->addr_dev;
3716 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3718 spin_unlock_irqrestore(&xhci->lock, flags);
3719 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3723 xhci_ring_cmd_db(xhci);
3724 spin_unlock_irqrestore(&xhci->lock, flags);
3726 /* XXX: how much time for xHC slot assignment? */
3727 timeleft = wait_for_completion_interruptible_timeout(
3728 command->completion,
3729 XHCI_CMD_DEFAULT_TIMEOUT);
3730 if (timeleft <= 0) {
3731 xhci_warn(xhci, "%s while waiting for a slot\n",
3732 timeleft == 0 ? "Timeout" : "Signal");
3733 /* cancel the enable slot request */
3734 ret = xhci_cancel_cmd(xhci, NULL, command->command_trb);
3739 if (!xhci->slot_id) {
3740 xhci_err(xhci, "Error while assigning device slot ID\n");
3741 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3743 readl(&xhci->cap_regs->hcs_params1)));
3748 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3749 spin_lock_irqsave(&xhci->lock, flags);
3750 ret = xhci_reserve_host_control_ep_resources(xhci);
3752 spin_unlock_irqrestore(&xhci->lock, flags);
3753 xhci_warn(xhci, "Not enough host resources, "
3754 "active endpoint contexts = %u\n",
3755 xhci->num_active_eps);
3758 spin_unlock_irqrestore(&xhci->lock, flags);
3760 /* Use GFP_NOIO, since this function can be called from
3761 * xhci_discover_or_reset_device(), which may be called as part of
3762 * mass storage driver error handling.
3764 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3765 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3768 udev->slot_id = xhci->slot_id;
3770 #ifndef CONFIG_USB_DEFAULT_PERSIST
3772 * If resetting upon resume, we can't put the controller into runtime
3773 * suspend if there is a device attached.
3775 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3776 pm_runtime_get_noresume(hcd->self.controller);
3781 /* Is this a LS or FS device under a HS hub? */
3782 /* Hub or peripherial? */
3786 /* Disable slot, if we can do it without mem alloc */
3787 spin_lock_irqsave(&xhci->lock, flags);
3788 command->completion = NULL;
3789 command->status = 0;
3790 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3792 xhci_ring_cmd_db(xhci);
3793 spin_unlock_irqrestore(&xhci->lock, flags);
3798 * Issue an Address Device command and optionally send a corresponding
3799 * SetAddress request to the device.
3800 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3801 * we should only issue and wait on one address command at the same time.
3803 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3804 enum xhci_setup_dev setup)
3806 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3807 unsigned long flags;
3809 struct xhci_virt_device *virt_dev;
3811 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3812 struct xhci_slot_ctx *slot_ctx;
3813 struct xhci_input_control_ctx *ctrl_ctx;
3815 struct xhci_command *command;
3817 if (!udev->slot_id) {
3818 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3819 "Bad Slot ID %d", udev->slot_id);
3823 virt_dev = xhci->devs[udev->slot_id];
3825 if (WARN_ON(!virt_dev)) {
3827 * In plug/unplug torture test with an NEC controller,
3828 * a zero-dereference was observed once due to virt_dev = 0.
3829 * Print useful debug rather than crash if it is observed again!
3831 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3836 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3840 command->in_ctx = virt_dev->in_ctx;
3841 command->completion = &xhci->addr_dev;
3843 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3844 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3846 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3852 * If this is the first Set Address since device plug-in or
3853 * virt_device realloaction after a resume with an xHCI power loss,
3854 * then set up the slot context.
3856 if (!slot_ctx->dev_info)
3857 xhci_setup_addressable_virt_dev(xhci, udev);
3858 /* Otherwise, update the control endpoint ring enqueue pointer. */
3860 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3861 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3862 ctrl_ctx->drop_flags = 0;
3864 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3865 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3866 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3867 le32_to_cpu(slot_ctx->dev_info) >> 27);
3869 spin_lock_irqsave(&xhci->lock, flags);
3870 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3871 udev->slot_id, setup);
3873 spin_unlock_irqrestore(&xhci->lock, flags);
3874 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3875 "FIXME: allocate a command ring segment");
3879 xhci_ring_cmd_db(xhci);
3880 spin_unlock_irqrestore(&xhci->lock, flags);
3882 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3883 timeleft = wait_for_completion_interruptible_timeout(
3884 command->completion, XHCI_CMD_DEFAULT_TIMEOUT);
3885 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3886 * the SetAddress() "recovery interval" required by USB and aborting the
3887 * command on a timeout.
3889 if (timeleft <= 0) {
3890 xhci_warn(xhci, "%s while waiting for setup %s command\n",
3891 timeleft == 0 ? "Timeout" : "Signal", act);
3892 /* cancel the address device command */
3893 ret = xhci_cancel_cmd(xhci, NULL, command->command_trb);
3900 switch (virt_dev->cmd_status) {
3901 case COMP_CTX_STATE:
3903 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3904 act, udev->slot_id);
3908 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3912 dev_warn(&udev->dev,
3913 "ERROR: Incompatible device for setup %s command\n", act);
3917 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3918 "Successful setup %s command", act);
3922 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3923 act, virt_dev->cmd_status);
3924 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3925 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3926 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3934 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3935 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3936 "Op regs DCBAA ptr = %#016llx", temp_64);
3937 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3938 "Slot ID %d dcbaa entry @%p = %#016llx",
3940 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3941 (unsigned long long)
3942 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3943 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3944 "Output Context DMA address = %#08llx",
3945 (unsigned long long)virt_dev->out_ctx->dma);
3946 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3947 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3948 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3949 le32_to_cpu(slot_ctx->dev_info) >> 27);
3950 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3951 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3953 * USB core uses address 1 for the roothubs, so we add one to the
3954 * address given back to us by the HC.
3956 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3957 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3958 le32_to_cpu(slot_ctx->dev_info) >> 27);
3959 /* Zero the input context control for later use */
3960 ctrl_ctx->add_flags = 0;
3961 ctrl_ctx->drop_flags = 0;
3963 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3964 "Internal device address = %d",
3965 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3970 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3972 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3975 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3977 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3981 * Transfer the port index into real index in the HW port status
3982 * registers. Caculate offset between the port's PORTSC register
3983 * and port status base. Divide the number of per port register
3984 * to get the real index. The raw port number bases 1.
3986 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3988 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3989 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3990 __le32 __iomem *addr;
3993 if (hcd->speed != HCD_USB3)
3994 addr = xhci->usb2_ports[port1 - 1];
3996 addr = xhci->usb3_ports[port1 - 1];
3998 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
4003 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4004 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4006 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
4007 struct usb_device *udev, u16 max_exit_latency)
4009 struct xhci_virt_device *virt_dev;
4010 struct xhci_command *command;
4011 struct xhci_input_control_ctx *ctrl_ctx;
4012 struct xhci_slot_ctx *slot_ctx;
4013 unsigned long flags;
4016 spin_lock_irqsave(&xhci->lock, flags);
4017 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
4018 spin_unlock_irqrestore(&xhci->lock, flags);
4022 /* Attempt to issue an Evaluate Context command to change the MEL. */
4023 virt_dev = xhci->devs[udev->slot_id];
4024 command = xhci->lpm_command;
4025 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
4027 spin_unlock_irqrestore(&xhci->lock, flags);
4028 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4033 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
4034 spin_unlock_irqrestore(&xhci->lock, flags);
4036 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4037 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
4038 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
4039 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4041 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4042 "Set up evaluate context for LPM MEL change.");
4043 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4044 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4046 /* Issue and wait for the evaluate context command. */
4047 ret = xhci_configure_endpoint(xhci, udev, command,
4049 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4050 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4053 spin_lock_irqsave(&xhci->lock, flags);
4054 virt_dev->current_mel = max_exit_latency;
4055 spin_unlock_irqrestore(&xhci->lock, flags);
4060 #ifdef CONFIG_PM_RUNTIME
4062 /* BESL to HIRD Encoding array for USB2 LPM */
4063 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4064 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4066 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4067 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4068 struct usb_device *udev)
4070 int u2del, besl, besl_host;
4071 int besl_device = 0;
4074 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4075 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4077 if (field & USB_BESL_SUPPORT) {
4078 for (besl_host = 0; besl_host < 16; besl_host++) {
4079 if (xhci_besl_encoding[besl_host] >= u2del)
4082 /* Use baseline BESL value as default */
4083 if (field & USB_BESL_BASELINE_VALID)
4084 besl_device = USB_GET_BESL_BASELINE(field);
4085 else if (field & USB_BESL_DEEP_VALID)
4086 besl_device = USB_GET_BESL_DEEP(field);
4091 besl_host = (u2del - 51) / 75 + 1;
4094 besl = besl_host + besl_device;
4101 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4102 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4109 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4111 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4112 l1 = udev->l1_params.timeout / 256;
4114 /* device has preferred BESLD */
4115 if (field & USB_BESL_DEEP_VALID) {
4116 besld = USB_GET_BESL_DEEP(field);
4120 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4123 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4124 struct usb_device *udev, int enable)
4126 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4127 __le32 __iomem **port_array;
4128 __le32 __iomem *pm_addr, *hlpm_addr;
4129 u32 pm_val, hlpm_val, field;
4130 unsigned int port_num;
4131 unsigned long flags;
4132 int hird, exit_latency;
4135 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4139 if (!udev->parent || udev->parent->parent ||
4140 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4143 if (udev->usb2_hw_lpm_capable != 1)
4146 spin_lock_irqsave(&xhci->lock, flags);
4148 port_array = xhci->usb2_ports;
4149 port_num = udev->portnum - 1;
4150 pm_addr = port_array[port_num] + PORTPMSC;
4151 pm_val = readl(pm_addr);
4152 hlpm_addr = port_array[port_num] + PORTHLPMC;
4153 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4155 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4156 enable ? "enable" : "disable", port_num + 1);
4159 /* Host supports BESL timeout instead of HIRD */
4160 if (udev->usb2_hw_lpm_besl_capable) {
4161 /* if device doesn't have a preferred BESL value use a
4162 * default one which works with mixed HIRD and BESL
4163 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4165 if ((field & USB_BESL_SUPPORT) &&
4166 (field & USB_BESL_BASELINE_VALID))
4167 hird = USB_GET_BESL_BASELINE(field);
4169 hird = udev->l1_params.besl;
4171 exit_latency = xhci_besl_encoding[hird];
4172 spin_unlock_irqrestore(&xhci->lock, flags);
4174 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4175 * input context for link powermanagement evaluate
4176 * context commands. It is protected by hcd->bandwidth
4177 * mutex and is shared by all devices. We need to set
4178 * the max ext latency in USB 2 BESL LPM as well, so
4179 * use the same mutex and xhci_change_max_exit_latency()
4181 mutex_lock(hcd->bandwidth_mutex);
4182 ret = xhci_change_max_exit_latency(xhci, udev,
4184 mutex_unlock(hcd->bandwidth_mutex);
4188 spin_lock_irqsave(&xhci->lock, flags);
4190 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4191 writel(hlpm_val, hlpm_addr);
4195 hird = xhci_calculate_hird_besl(xhci, udev);
4198 pm_val &= ~PORT_HIRD_MASK;
4199 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4200 writel(pm_val, pm_addr);
4201 pm_val = readl(pm_addr);
4203 writel(pm_val, pm_addr);
4207 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4208 writel(pm_val, pm_addr);
4211 if (udev->usb2_hw_lpm_besl_capable) {
4212 spin_unlock_irqrestore(&xhci->lock, flags);
4213 mutex_lock(hcd->bandwidth_mutex);
4214 xhci_change_max_exit_latency(xhci, udev, 0);
4215 mutex_unlock(hcd->bandwidth_mutex);
4220 spin_unlock_irqrestore(&xhci->lock, flags);
4224 /* check if a usb2 port supports a given extened capability protocol
4225 * only USB2 ports extended protocol capability values are cached.
4226 * Return 1 if capability is supported
4228 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4229 unsigned capability)
4231 u32 port_offset, port_count;
4234 for (i = 0; i < xhci->num_ext_caps; i++) {
4235 if (xhci->ext_caps[i] & capability) {
4236 /* port offsets starts at 1 */
4237 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4238 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4239 if (port >= port_offset &&
4240 port < port_offset + port_count)
4247 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4249 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4250 int portnum = udev->portnum - 1;
4252 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4256 /* we only support lpm for non-hub device connected to root hub yet */
4257 if (!udev->parent || udev->parent->parent ||
4258 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4261 if (xhci->hw_lpm_support == 1 &&
4262 xhci_check_usb2_port_capability(
4263 xhci, portnum, XHCI_HLC)) {
4264 udev->usb2_hw_lpm_capable = 1;
4265 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4266 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4267 if (xhci_check_usb2_port_capability(xhci, portnum,
4269 udev->usb2_hw_lpm_besl_capable = 1;
4277 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4278 struct usb_device *udev, int enable)
4283 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4288 #endif /* CONFIG_PM_RUNTIME */
4290 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4293 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4294 static unsigned long long xhci_service_interval_to_ns(
4295 struct usb_endpoint_descriptor *desc)
4297 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4300 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4301 enum usb3_link_state state)
4303 unsigned long long sel;
4304 unsigned long long pel;
4305 unsigned int max_sel_pel;
4310 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4311 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4312 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4313 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4317 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4318 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4319 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4323 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4325 return USB3_LPM_DISABLED;
4328 if (sel <= max_sel_pel && pel <= max_sel_pel)
4329 return USB3_LPM_DEVICE_INITIATED;
4331 if (sel > max_sel_pel)
4332 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4333 "due to long SEL %llu ms\n",
4336 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4337 "due to long PEL %llu ms\n",
4339 return USB3_LPM_DISABLED;
4342 /* Returns the hub-encoded U1 timeout value.
4343 * The U1 timeout should be the maximum of the following values:
4344 * - For control endpoints, U1 system exit latency (SEL) * 3
4345 * - For bulk endpoints, U1 SEL * 5
4346 * - For interrupt endpoints:
4347 * - Notification EPs, U1 SEL * 3
4348 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4349 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4351 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4352 struct usb_endpoint_descriptor *desc)
4354 unsigned long long timeout_ns;
4358 ep_type = usb_endpoint_type(desc);
4360 case USB_ENDPOINT_XFER_CONTROL:
4361 timeout_ns = udev->u1_params.sel * 3;
4363 case USB_ENDPOINT_XFER_BULK:
4364 timeout_ns = udev->u1_params.sel * 5;
4366 case USB_ENDPOINT_XFER_INT:
4367 intr_type = usb_endpoint_interrupt_type(desc);
4368 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4369 timeout_ns = udev->u1_params.sel * 3;
4372 /* Otherwise the calculation is the same as isoc eps */
4373 case USB_ENDPOINT_XFER_ISOC:
4374 timeout_ns = xhci_service_interval_to_ns(desc);
4375 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4376 if (timeout_ns < udev->u1_params.sel * 2)
4377 timeout_ns = udev->u1_params.sel * 2;
4383 /* The U1 timeout is encoded in 1us intervals. */
4384 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4385 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4386 if (timeout_ns == USB3_LPM_DISABLED)
4389 /* If the necessary timeout value is bigger than what we can set in the
4390 * USB 3.0 hub, we have to disable hub-initiated U1.
4392 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4394 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4395 "due to long timeout %llu ms\n", timeout_ns);
4396 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4399 /* Returns the hub-encoded U2 timeout value.
4400 * The U2 timeout should be the maximum of:
4401 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4402 * - largest bInterval of any active periodic endpoint (to avoid going
4403 * into lower power link states between intervals).
4404 * - the U2 Exit Latency of the device
4406 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4407 struct usb_endpoint_descriptor *desc)
4409 unsigned long long timeout_ns;
4410 unsigned long long u2_del_ns;
4412 timeout_ns = 10 * 1000 * 1000;
4414 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4415 (xhci_service_interval_to_ns(desc) > timeout_ns))
4416 timeout_ns = xhci_service_interval_to_ns(desc);
4418 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4419 if (u2_del_ns > timeout_ns)
4420 timeout_ns = u2_del_ns;
4422 /* The U2 timeout is encoded in 256us intervals */
4423 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4424 /* If the necessary timeout value is bigger than what we can set in the
4425 * USB 3.0 hub, we have to disable hub-initiated U2.
4427 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4429 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4430 "due to long timeout %llu ms\n", timeout_ns);
4431 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4434 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4435 struct usb_device *udev,
4436 struct usb_endpoint_descriptor *desc,
4437 enum usb3_link_state state,
4440 if (state == USB3_LPM_U1) {
4441 if (xhci->quirks & XHCI_INTEL_HOST)
4442 return xhci_calculate_intel_u1_timeout(udev, desc);
4444 if (xhci->quirks & XHCI_INTEL_HOST)
4445 return xhci_calculate_intel_u2_timeout(udev, desc);
4448 return USB3_LPM_DISABLED;
4451 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4452 struct usb_device *udev,
4453 struct usb_endpoint_descriptor *desc,
4454 enum usb3_link_state state,
4459 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4460 desc, state, timeout);
4462 /* If we found we can't enable hub-initiated LPM, or
4463 * the U1 or U2 exit latency was too high to allow
4464 * device-initiated LPM as well, just stop searching.
4466 if (alt_timeout == USB3_LPM_DISABLED ||
4467 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4468 *timeout = alt_timeout;
4471 if (alt_timeout > *timeout)
4472 *timeout = alt_timeout;
4476 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4477 struct usb_device *udev,
4478 struct usb_host_interface *alt,
4479 enum usb3_link_state state,
4484 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4485 if (xhci_update_timeout_for_endpoint(xhci, udev,
4486 &alt->endpoint[j].desc, state, timeout))
4493 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4494 enum usb3_link_state state)
4496 struct usb_device *parent;
4497 unsigned int num_hubs;
4499 if (state == USB3_LPM_U2)
4502 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4503 for (parent = udev->parent, num_hubs = 0; parent->parent;
4504 parent = parent->parent)
4510 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4511 " below second-tier hub.\n");
4512 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4513 "to decrease power consumption.\n");
4517 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4518 struct usb_device *udev,
4519 enum usb3_link_state state)
4521 if (xhci->quirks & XHCI_INTEL_HOST)
4522 return xhci_check_intel_tier_policy(udev, state);
4526 /* Returns the U1 or U2 timeout that should be enabled.
4527 * If the tier check or timeout setting functions return with a non-zero exit
4528 * code, that means the timeout value has been finalized and we shouldn't look
4529 * at any more endpoints.
4531 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4532 struct usb_device *udev, enum usb3_link_state state)
4534 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4535 struct usb_host_config *config;
4538 u16 timeout = USB3_LPM_DISABLED;
4540 if (state == USB3_LPM_U1)
4542 else if (state == USB3_LPM_U2)
4545 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4550 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4553 /* Gather some information about the currently installed configuration
4554 * and alternate interface settings.
4556 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4560 config = udev->actconfig;
4564 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4565 struct usb_driver *driver;
4566 struct usb_interface *intf = config->interface[i];
4571 /* Check if any currently bound drivers want hub-initiated LPM
4574 if (intf->dev.driver) {
4575 driver = to_usb_driver(intf->dev.driver);
4576 if (driver && driver->disable_hub_initiated_lpm) {
4577 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4578 "at request of driver %s\n",
4579 state_name, driver->name);
4580 return xhci_get_timeout_no_hub_lpm(udev, state);
4584 /* Not sure how this could happen... */
4585 if (!intf->cur_altsetting)
4588 if (xhci_update_timeout_for_interface(xhci, udev,
4589 intf->cur_altsetting,
4596 static int calculate_max_exit_latency(struct usb_device *udev,
4597 enum usb3_link_state state_changed,
4598 u16 hub_encoded_timeout)
4600 unsigned long long u1_mel_us = 0;
4601 unsigned long long u2_mel_us = 0;
4602 unsigned long long mel_us = 0;
4608 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4609 hub_encoded_timeout == USB3_LPM_DISABLED);
4610 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4611 hub_encoded_timeout == USB3_LPM_DISABLED);
4613 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4614 hub_encoded_timeout != USB3_LPM_DISABLED);
4615 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4616 hub_encoded_timeout != USB3_LPM_DISABLED);
4618 /* If U1 was already enabled and we're not disabling it,
4619 * or we're going to enable U1, account for the U1 max exit latency.
4621 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4623 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4624 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4626 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4628 if (u1_mel_us > u2_mel_us)
4632 /* xHCI host controller max exit latency field is only 16 bits wide. */
4633 if (mel_us > MAX_EXIT) {
4634 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4635 "is too big.\n", mel_us);
4641 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4642 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4643 struct usb_device *udev, enum usb3_link_state state)
4645 struct xhci_hcd *xhci;
4646 u16 hub_encoded_timeout;
4650 xhci = hcd_to_xhci(hcd);
4651 /* The LPM timeout values are pretty host-controller specific, so don't
4652 * enable hub-initiated timeouts unless the vendor has provided
4653 * information about their timeout algorithm.
4655 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4656 !xhci->devs[udev->slot_id])
4657 return USB3_LPM_DISABLED;
4659 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4660 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4662 /* Max Exit Latency is too big, disable LPM. */
4663 hub_encoded_timeout = USB3_LPM_DISABLED;
4667 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4670 return hub_encoded_timeout;
4673 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4674 struct usb_device *udev, enum usb3_link_state state)
4676 struct xhci_hcd *xhci;
4680 xhci = hcd_to_xhci(hcd);
4681 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4682 !xhci->devs[udev->slot_id])
4685 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4686 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4691 #else /* CONFIG_PM */
4693 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4694 struct usb_device *udev, enum usb3_link_state state)
4696 return USB3_LPM_DISABLED;
4699 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4700 struct usb_device *udev, enum usb3_link_state state)
4704 #endif /* CONFIG_PM */
4706 /*-------------------------------------------------------------------------*/
4708 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4709 * internal data structures for the device.
4711 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4712 struct usb_tt *tt, gfp_t mem_flags)
4714 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4715 struct xhci_virt_device *vdev;
4716 struct xhci_command *config_cmd;
4717 struct xhci_input_control_ctx *ctrl_ctx;
4718 struct xhci_slot_ctx *slot_ctx;
4719 unsigned long flags;
4720 unsigned think_time;
4723 /* Ignore root hubs */
4727 vdev = xhci->devs[hdev->slot_id];
4729 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4732 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4734 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4737 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4739 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4741 xhci_free_command(xhci, config_cmd);
4745 spin_lock_irqsave(&xhci->lock, flags);
4746 if (hdev->speed == USB_SPEED_HIGH &&
4747 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4748 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4749 xhci_free_command(xhci, config_cmd);
4750 spin_unlock_irqrestore(&xhci->lock, flags);
4754 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4755 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4756 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4757 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4759 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4760 if (xhci->hci_version > 0x95) {
4761 xhci_dbg(xhci, "xHCI version %x needs hub "
4762 "TT think time and number of ports\n",
4763 (unsigned int) xhci->hci_version);
4764 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4765 /* Set TT think time - convert from ns to FS bit times.
4766 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4767 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4769 * xHCI 1.0: this field shall be 0 if the device is not a
4772 think_time = tt->think_time;
4773 if (think_time != 0)
4774 think_time = (think_time / 666) - 1;
4775 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4776 slot_ctx->tt_info |=
4777 cpu_to_le32(TT_THINK_TIME(think_time));
4779 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4780 "TT think time or number of ports\n",
4781 (unsigned int) xhci->hci_version);
4783 slot_ctx->dev_state = 0;
4784 spin_unlock_irqrestore(&xhci->lock, flags);
4786 xhci_dbg(xhci, "Set up %s for hub device.\n",
4787 (xhci->hci_version > 0x95) ?
4788 "configure endpoint" : "evaluate context");
4789 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4790 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4792 /* Issue and wait for the configure endpoint or
4793 * evaluate context command.
4795 if (xhci->hci_version > 0x95)
4796 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4799 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4802 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4803 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4805 xhci_free_command(xhci, config_cmd);
4809 int xhci_get_frame(struct usb_hcd *hcd)
4811 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4812 /* EHCI mods by the periodic size. Why? */
4813 return readl(&xhci->run_regs->microframe_index) >> 3;
4816 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4818 struct xhci_hcd *xhci;
4819 struct device *dev = hcd->self.controller;
4822 /* Accept arbitrarily long scatter-gather lists */
4823 hcd->self.sg_tablesize = ~0;
4825 /* support to build packet from discontinuous buffers */
4826 hcd->self.no_sg_constraint = 1;
4828 /* XHCI controllers don't stop the ep queue on short packets :| */
4829 hcd->self.no_stop_on_short = 1;
4831 if (usb_hcd_is_primary_hcd(hcd)) {
4832 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4835 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4836 xhci->main_hcd = hcd;
4837 /* Mark the first roothub as being USB 2.0.
4838 * The xHCI driver will register the USB 3.0 roothub.
4840 hcd->speed = HCD_USB2;
4841 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4843 * USB 2.0 roothub under xHCI has an integrated TT,
4844 * (rate matching hub) as opposed to having an OHCI/UHCI
4845 * companion controller.
4849 /* xHCI private pointer was set in xhci_pci_probe for the second
4850 * registered roothub.
4855 xhci->cap_regs = hcd->regs;
4856 xhci->op_regs = hcd->regs +
4857 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4858 xhci->run_regs = hcd->regs +
4859 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4860 /* Cache read-only capability registers */
4861 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4862 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4863 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4864 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4865 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4866 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4867 xhci_print_registers(xhci);
4869 xhci->quirks = quirks;
4871 get_quirks(dev, xhci);
4873 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4874 * success event after a short transfer. This quirk will ignore such
4877 if (xhci->hci_version > 0x96)
4878 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4880 /* Make sure the HC is halted. */
4881 retval = xhci_halt(xhci);
4885 xhci_dbg(xhci, "Resetting HCD\n");
4886 /* Reset the internal HC memory state and registers. */
4887 retval = xhci_reset(xhci);
4890 xhci_dbg(xhci, "Reset complete\n");
4892 /* Set dma_mask and coherent_dma_mask to 64-bits,
4893 * if xHC supports 64-bit addressing */
4894 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4895 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4896 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4897 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4900 xhci_dbg(xhci, "Calling HCD init\n");
4901 /* Initialize HCD and host controller data structures. */
4902 retval = xhci_init(hcd);
4905 xhci_dbg(xhci, "Called HCD init\n");
4912 MODULE_DESCRIPTION(DRIVER_DESC);
4913 MODULE_AUTHOR(DRIVER_AUTHOR);
4914 MODULE_LICENSE("GPL");
4916 static int __init xhci_hcd_init(void)
4920 retval = xhci_register_pci();
4922 pr_debug("Problem registering PCI driver.\n");
4925 retval = xhci_register_plat();
4927 pr_debug("Problem registering platform driver.\n");
4931 * Check the compiler generated sizes of structures that must be laid
4932 * out in specific ways for hardware access.
4934 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4935 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4936 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4937 /* xhci_device_control has eight fields, and also
4938 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4940 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4941 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4942 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4943 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4944 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4945 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4946 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4949 xhci_unregister_pci();
4952 module_init(xhci_hcd_init);
4954 static void __exit xhci_hcd_cleanup(void)
4956 xhci_unregister_pci();
4957 xhci_unregister_plat();
4959 module_exit(xhci_hcd_cleanup);