drivers/video/atmel_lcdfb.c

   1 /*
   2  *  Driver for AT91/AT32 LCD Controller
   3  *
   4  *  Copyright (C) 2007 Atmel Corporation
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file COPYING in the main directory of this archive for
   8  * more details.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/platform_device.h>
  13 #include <linux/dma-mapping.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/clk.h>
  16 #include <linux/fb.h>
  17 #include <linux/init.h>
  18 #include <linux/delay.h>
  19 #include <linux/backlight.h>
  20 #include <linux/gfp.h>
  21 #include <linux/module.h>
  22 #include <linux/platform_data/atmel.h>
  23
  24 #include <mach/cpu.h>
  25 #include <asm/gpio.h>
  26
  27 #include <video/atmel_lcdc.h>
  28
  29 #define lcdc_readl(sinfo, reg)          __raw_readl((sinfo)->mmio+(reg))
  30 #define lcdc_writel(sinfo, reg, val)    __raw_writel((val), (sinfo)->mmio+(reg))
  31
  32 /* configurable parameters */
  33 #define ATMEL_LCDC_CVAL_DEFAULT         0xc8
  34 #define ATMEL_LCDC_DMA_BURST_LEN        8       /* words */
  35 #define ATMEL_LCDC_FIFO_SIZE            512     /* words */
  36
  37 #if defined(CONFIG_ARCH_AT91)
  38 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
  39                                          | FBINFO_PARTIAL_PAN_OK \
  40                                          | FBINFO_HWACCEL_YPAN)
  41
  42 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  43                                         struct fb_var_screeninfo *var,
  44                                         struct fb_info *info)
  45 {
  46
  47 }
  48 #elif defined(CONFIG_AVR32)
  49 #define ATMEL_LCDFB_FBINFO_DEFAULT      (FBINFO_DEFAULT \
  50                                         | FBINFO_PARTIAL_PAN_OK \
  51                                         | FBINFO_HWACCEL_XPAN \
  52                                         | FBINFO_HWACCEL_YPAN)
  53
  54 static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  55                                      struct fb_var_screeninfo *var,
  56                                      struct fb_info *info)
  57 {
  58         u32 dma2dcfg;
  59         u32 pixeloff;
  60
  61         pixeloff = (var->xoffset * info->var.bits_per_pixel) & 0x1f;
  62
  63         dma2dcfg = (info->var.xres_virtual - info->var.xres)
  64                  * info->var.bits_per_pixel / 8;
  65         dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  66         lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  67
  68         /* Update configuration */
  69         lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  70                     lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  71                     | ATMEL_LCDC_DMAUPDT);
  72 }
  73 #endif
  74
  75 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  76                 | ATMEL_LCDC_POL_POSITIVE
  77                 | ATMEL_LCDC_ENA_PWMENABLE;
  78
  79 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  80
  81 /* some bl->props field just changed */
  82 static int atmel_bl_update_status(struct backlight_device *bl)
  83 {
  84         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  85         int                     power = sinfo->bl_power;
  86         int                     brightness = bl->props.brightness;
  87
  88         /* REVISIT there may be a meaningful difference between
  89          * fb_blank and power ... there seem to be some cases
  90          * this doesn't handle correctly.
  91          */
  92         if (bl->props.fb_blank != sinfo->bl_power)
  93                 power = bl->props.fb_blank;
  94         else if (bl->props.power != sinfo->bl_power)
  95                 power = bl->props.power;
  96
  97         if (brightness < 0 && power == FB_BLANK_UNBLANK)
  98                 brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  99         else if (power != FB_BLANK_UNBLANK)
 100                 brightness = 0;
 101
 102         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
 103         if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE)
 104                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
 105                         brightness ? contrast_ctr : 0);
 106         else
 107                 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
 108
 109         bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
 110
 111         return 0;
 112 }
 113
 114 static int atmel_bl_get_brightness(struct backlight_device *bl)
 115 {
 116         struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
 117
 118         return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
 119 }
 120
 121 static const struct backlight_ops atmel_lcdc_bl_ops = {
 122         .update_status = atmel_bl_update_status,
 123         .get_brightness = atmel_bl_get_brightness,
 124 };
 125
 126 static void init_backlight(struct atmel_lcdfb_info *sinfo)
 127 {
 128         struct backlight_properties props;
 129         struct backlight_device *bl;
 130
 131         sinfo->bl_power = FB_BLANK_UNBLANK;
 132
 133         if (sinfo->backlight)
 134                 return;
 135
 136         memset(&props, 0, sizeof(struct backlight_properties));
 137         props.type = BACKLIGHT_RAW;
 138         props.max_brightness = 0xff;
 139         bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo,
 140                                        &atmel_lcdc_bl_ops, &props);
 141         if (IS_ERR(bl)) {
 142                 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
 143                                 PTR_ERR(bl));
 144                 return;
 145         }
 146         sinfo->backlight = bl;
 147
 148         bl->props.power = FB_BLANK_UNBLANK;
 149         bl->props.fb_blank = FB_BLANK_UNBLANK;
 150         bl->props.brightness = atmel_bl_get_brightness(bl);
 151 }
 152
 153 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
 154 {
 155         if (sinfo->backlight)
 156                 backlight_device_unregister(sinfo->backlight);
 157 }
 158
 159 #else
 160
 161 static void init_backlight(struct atmel_lcdfb_info *sinfo)
 162 {
 163         dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
 164 }
 165
 166 static void exit_backlight(struct atmel_lcdfb_info *sinfo)
 167 {
 168 }
 169
 170 #endif
 171
 172 static void init_contrast(struct atmel_lcdfb_info *sinfo)
 173 {
 174         /* contrast pwm can be 'inverted' */
 175         if (sinfo->lcdcon_pol_negative)
 176                         contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE);
 177
 178         /* have some default contrast/backlight settings */
 179         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
 180         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
 181
 182         if (sinfo->lcdcon_is_backlight)
 183                 init_backlight(sinfo);
 184 }
 185
 186
 187 static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
 188         .type           = FB_TYPE_PACKED_PIXELS,
 189         .visual         = FB_VISUAL_TRUECOLOR,
 190         .xpanstep       = 0,
 191         .ypanstep       = 1,
 192         .ywrapstep      = 0,
 193         .accel          = FB_ACCEL_NONE,
 194 };
 195
 196 static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
 197 {
 198         unsigned long value;
 199
 200         if (!(cpu_is_at91sam9261() || cpu_is_at91sam9g10()
 201                 || cpu_is_at32ap7000()))
 202                 return xres;
 203
 204         value = xres;
 205         if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
 206                 /* STN display */
 207                 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
 208                         value *= 3;
 209                 }
 210                 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
 211                    || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
 212                       && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
 213                         value = DIV_ROUND_UP(value, 4);
 214                 else
 215                         value = DIV_ROUND_UP(value, 8);
 216         }
 217
 218         return value;
 219 }
 220
 221 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo)
 222 {
 223         /* Turn off the LCD controller and the DMA controller */
 224         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
 225                         sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
 226
 227         /* Wait for the LCDC core to become idle */
 228         while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
 229                 msleep(10);
 230
 231         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
 232 }
 233
 234 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo)
 235 {
 236         atmel_lcdfb_stop_nowait(sinfo);
 237
 238         /* Wait for DMA engine to become idle... */
 239         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
 240                 msleep(10);
 241 }
 242
 243 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo)
 244 {
 245         lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
 246         lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
 247                 (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET)
 248                 | ATMEL_LCDC_PWR);
 249 }
 250
 251 static void atmel_lcdfb_update_dma(struct fb_info *info,
 252                                struct fb_var_screeninfo *var)
 253 {
 254         struct atmel_lcdfb_info *sinfo = info->par;
 255         struct fb_fix_screeninfo *fix = &info->fix;
 256         unsigned long dma_addr;
 257
 258         dma_addr = (fix->smem_start + var->yoffset * fix->line_length
 259                     + var->xoffset * info->var.bits_per_pixel / 8);
 260
 261         dma_addr &= ~3UL;
 262
 263         /* Set framebuffer DMA base address and pixel offset */
 264         lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
 265
 266         atmel_lcdfb_update_dma2d(sinfo, var, info);
 267 }
 268
 269 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
 270 {
 271         struct fb_info *info = sinfo->info;
 272
 273         dma_free_writecombine(info->device, info->fix.smem_len,
 274                                 info->screen_base, info->fix.smem_start);
 275 }
 276
 277 /**
 278  *      atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
 279  *      @sinfo: the frame buffer to allocate memory for
 280  *
 281  *      This function is called only from the atmel_lcdfb_probe()
 282  *      so no locking by fb_info->mm_lock around smem_len setting is needed.
 283  */
 284 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
 285 {
 286         struct fb_info *info = sinfo->info;
 287         struct fb_var_screeninfo *var = &info->var;
 288         unsigned int smem_len;
 289
 290         smem_len = (var->xres_virtual * var->yres_virtual
 291                     * ((var->bits_per_pixel + 7) / 8));
 292         info->fix.smem_len = max(smem_len, sinfo->smem_len);
 293
 294         info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
 295                                         (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
 296
 297         if (!info->screen_base) {
 298                 return -ENOMEM;
 299         }
 300
 301         memset(info->screen_base, 0, info->fix.smem_len);
 302
 303         return 0;
 304 }
 305
 306 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var,
 307                                                      struct fb_info *info)
 308 {
 309         struct fb_videomode varfbmode;
 310         const struct fb_videomode *fbmode = NULL;
 311
 312         fb_var_to_videomode(&varfbmode, var);
 313         fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist);
 314         if (fbmode)
 315                 fb_videomode_to_var(var, fbmode);
 316         return fbmode;
 317 }
 318
 319
 320 /**
 321  *      atmel_lcdfb_check_var - Validates a var passed in.
 322  *      @var: frame buffer variable screen structure
 323  *      @info: frame buffer structure that represents a single frame buffer
 324  *
 325  *      Checks to see if the hardware supports the state requested by
 326  *      var passed in. This function does not alter the hardware
 327  *      state!!!  This means the data stored in struct fb_info and
 328  *      struct atmel_lcdfb_info do not change. This includes the var
 329  *      inside of struct fb_info.  Do NOT change these. This function
 330  *      can be called on its own if we intent to only test a mode and
 331  *      not actually set it. The stuff in modedb.c is a example of
 332  *      this. If the var passed in is slightly off by what the
 333  *      hardware can support then we alter the var PASSED in to what
 334  *      we can do. If the hardware doesn't support mode change a
 335  *      -EINVAL will be returned by the upper layers. You don't need
 336  *      to implement this function then. If you hardware doesn't
 337  *      support changing the resolution then this function is not
 338  *      needed. In this case the driver would just provide a var that
 339  *      represents the static state the screen is in.
 340  *
 341  *      Returns negative errno on error, or zero on success.
 342  */
 343 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
 344                              struct fb_info *info)
 345 {
 346         struct device *dev = info->device;
 347         struct atmel_lcdfb_info *sinfo = info->par;
 348         unsigned long clk_value_khz;
 349
 350         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
 351
 352         dev_dbg(dev, "%s:\n", __func__);
 353
 354         if (!(var->pixclock && var->bits_per_pixel)) {
 355                 /* choose a suitable mode if possible */
 356                 if (!atmel_lcdfb_choose_mode(var, info)) {
 357                         dev_err(dev, "needed value not specified\n");
 358                         return -EINVAL;
 359                 }
 360         }
 361
 362         dev_dbg(dev, "  resolution: %ux%u\n", var->xres, var->yres);
 363         dev_dbg(dev, "  pixclk:     %lu KHz\n", PICOS2KHZ(var->pixclock));
 364         dev_dbg(dev, "  bpp:        %u\n", var->bits_per_pixel);
 365         dev_dbg(dev, "  clk:        %lu KHz\n", clk_value_khz);
 366
 367         if (PICOS2KHZ(var->pixclock) > clk_value_khz) {
 368                 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
 369                 return -EINVAL;
 370         }
 371
 372         /* Do not allow to have real resoulution larger than virtual */
 373         if (var->xres > var->xres_virtual)
 374                 var->xres_virtual = var->xres;
 375
 376         if (var->yres > var->yres_virtual)
 377                 var->yres_virtual = var->yres;
 378
 379         /* Force same alignment for each line */
 380         var->xres = (var->xres + 3) & ~3UL;
 381         var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
 382
 383         var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
 384         var->transp.msb_right = 0;
 385         var->transp.offset = var->transp.length = 0;
 386         var->xoffset = var->yoffset = 0;
 387
 388         if (info->fix.smem_len) {
 389                 unsigned int smem_len = (var->xres_virtual * var->yres_virtual
 390                                          * ((var->bits_per_pixel + 7) / 8));
 391                 if (smem_len > info->fix.smem_len)
 392                         return -EINVAL;
 393         }
 394
 395         /* Saturate vertical and horizontal timings at maximum values */
 396         var->vsync_len = min_t(u32, var->vsync_len,
 397                         (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
 398         var->upper_margin = min_t(u32, var->upper_margin,
 399                         ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
 400         var->lower_margin = min_t(u32, var->lower_margin,
 401                         ATMEL_LCDC_VFP);
 402         var->right_margin = min_t(u32, var->right_margin,
 403                         (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
 404         var->hsync_len = min_t(u32, var->hsync_len,
 405                         (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
 406         var->left_margin = min_t(u32, var->left_margin,
 407                         ATMEL_LCDC_HBP + 1);
 408
 409         /* Some parameters can't be zero */
 410         var->vsync_len = max_t(u32, var->vsync_len, 1);
 411         var->right_margin = max_t(u32, var->right_margin, 1);
 412         var->hsync_len = max_t(u32, var->hsync_len, 1);
 413         var->left_margin = max_t(u32, var->left_margin, 1);
 414
 415         switch (var->bits_per_pixel) {
 416         case 1:
 417         case 2:
 418         case 4:
 419         case 8:
 420                 var->red.offset = var->green.offset = var->blue.offset = 0;
 421                 var->red.length = var->green.length = var->blue.length
 422                         = var->bits_per_pixel;
 423                 break;
 424         case 16:
 425                 /* Older SOCs use IBGR:555 rather than BGR:565. */
 426                 if (sinfo->have_intensity_bit)
 427                         var->green.length = 5;
 428                 else
 429                         var->green.length = 6;
 430
 431                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
 432                         /* RGB:5X5 mode */
 433                         var->red.offset = var->green.length + 5;
 434                         var->blue.offset = 0;
 435                 } else {
 436                         /* BGR:5X5 mode */
 437                         var->red.offset = 0;
 438                         var->blue.offset = var->green.length + 5;
 439                 }
 440                 var->green.offset = 5;
 441                 var->red.length = var->blue.length = 5;
 442                 break;
 443         case 32:
 444                 var->transp.offset = 24;
 445                 var->transp.length = 8;
 446                 /* fall through */
 447         case 24:
 448                 if (sinfo->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) {
 449                         /* RGB:888 mode */
 450                         var->red.offset = 16;
 451                         var->blue.offset = 0;
 452                 } else {
 453                         /* BGR:888 mode */
 454                         var->red.offset = 0;
 455                         var->blue.offset = 16;
 456                 }
 457                 var->green.offset = 8;
 458                 var->red.length = var->green.length = var->blue.length = 8;
 459                 break;
 460         default:
 461                 dev_err(dev, "color depth %d not supported\n",
 462                                         var->bits_per_pixel);
 463                 return -EINVAL;
 464         }
 465
 466         return 0;
 467 }
 468
 469 /*
 470  * LCD reset sequence
 471  */
 472 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo)
 473 {
 474         might_sleep();
 475
 476         atmel_lcdfb_stop(sinfo);
 477         atmel_lcdfb_start(sinfo);
 478 }
 479
 480 /**
 481  *      atmel_lcdfb_set_par - Alters the hardware state.
 482  *      @info: frame buffer structure that represents a single frame buffer
 483  *
 484  *      Using the fb_var_screeninfo in fb_info we set the resolution
 485  *      of the this particular framebuffer. This function alters the
 486  *      par AND the fb_fix_screeninfo stored in fb_info. It doesn't
 487  *      not alter var in fb_info since we are using that data. This
 488  *      means we depend on the data in var inside fb_info to be
 489  *      supported by the hardware.  atmel_lcdfb_check_var is always called
 490  *      before atmel_lcdfb_set_par to ensure this.  Again if you can't
 491  *      change the resolution you don't need this function.
 492  *
 493  */
 494 static int atmel_lcdfb_set_par(struct fb_info *info)
 495 {
 496         struct atmel_lcdfb_info *sinfo = info->par;
 497         unsigned long hozval_linesz;
 498         unsigned long value;
 499         unsigned long clk_value_khz;
 500         unsigned long bits_per_line;
 501         unsigned long pix_factor = 2;
 502
 503         might_sleep();
 504
 505         dev_dbg(info->device, "%s:\n", __func__);
 506         dev_dbg(info->device, "  * resolution: %ux%u (%ux%u virtual)\n",
 507                  info->var.xres, info->var.yres,
 508                  info->var.xres_virtual, info->var.yres_virtual);
 509
 510         atmel_lcdfb_stop_nowait(sinfo);
 511
 512         if (info->var.bits_per_pixel == 1)
 513                 info->fix.visual = FB_VISUAL_MONO01;
 514         else if (info->var.bits_per_pixel <= 8)
 515                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
 516         else
 517                 info->fix.visual = FB_VISUAL_TRUECOLOR;
 518
 519         bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
 520         info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
 521
 522         /* Re-initialize the DMA engine... */
 523         dev_dbg(info->device, "  * update DMA engine\n");
 524         atmel_lcdfb_update_dma(info, &info->var);
 525
 526         /* ...set frame size and burst length = 8 words (?) */
 527         value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
 528         value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
 529         lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
 530
 531         /* Now, the LCDC core... */
 532
 533         /* Set pixel clock */
 534         if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
 535                 pix_factor = 1;
 536
 537         clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
 538
 539         value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
 540
 541         if (value < pix_factor) {
 542                 dev_notice(info->device, "Bypassing pixel clock divider\n");
 543                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
 544         } else {
 545                 value = (value / pix_factor) - 1;
 546                 dev_dbg(info->device, "  * programming CLKVAL = 0x%08lx\n",
 547                                 value);
 548                 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
 549                                 value << ATMEL_LCDC_CLKVAL_OFFSET);
 550                 info->var.pixclock =
 551                         KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
 552                 dev_dbg(info->device, "  updated pixclk:     %lu KHz\n",
 553                                         PICOS2KHZ(info->var.pixclock));
 554         }
 555
 556
 557         /* Initialize control register 2 */
 558         value = sinfo->default_lcdcon2;
 559
 560         if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
 561                 value |= ATMEL_LCDC_INVLINE_INVERTED;
 562         if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
 563                 value |= ATMEL_LCDC_INVFRAME_INVERTED;
 564
 565         switch (info->var.bits_per_pixel) {
 566                 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
 567                 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
 568                 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
 569                 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
 570                 case 15: /* fall through */
 571                 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
 572                 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
 573                 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
 574                 default: BUG(); break;
 575         }
 576         dev_dbg(info->device, "  * LCDCON2 = %08lx\n", value);
 577         lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
 578
 579         /* Vertical timing */
 580         value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
 581         value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
 582         value |= info->var.lower_margin;
 583         dev_dbg(info->device, "  * LCDTIM1 = %08lx\n", value);
 584         lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
 585
 586         /* Horizontal timing */
 587         value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
 588         value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
 589         value |= (info->var.left_margin - 1);
 590         dev_dbg(info->device, "  * LCDTIM2 = %08lx\n", value);
 591         lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
 592
 593         /* Horizontal value (aka line size) */
 594         hozval_linesz = compute_hozval(info->var.xres,
 595                                         lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
 596
 597         /* Display size */
 598         value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
 599         value |= info->var.yres - 1;
 600         dev_dbg(info->device, "  * LCDFRMCFG = %08lx\n", value);
 601         lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
 602
 603         /* FIFO Threshold: Use formula from data sheet */
 604         value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
 605         lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
 606
 607         /* Toggle LCD_MODE every frame */
 608         lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
 609
 610         /* Disable all interrupts */
 611         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
 612         /* Enable FIFO & DMA errors */
 613         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
 614
 615         /* ...wait for DMA engine to become idle... */
 616         while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
 617                 msleep(10);
 618
 619         atmel_lcdfb_start(sinfo);
 620
 621         dev_dbg(info->device, "  * DONE\n");
 622
 623         return 0;
 624 }
 625
 626 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
 627 {
 628         chan &= 0xffff;
 629         chan >>= 16 - bf->length;
 630         return chan << bf->offset;
 631 }
 632
 633 /**
 634  *      atmel_lcdfb_setcolreg - Optional function. Sets a color register.
 635  *      @regno: Which register in the CLUT we are programming
 636  *      @red: The red value which can be up to 16 bits wide
 637  *      @green: The green value which can be up to 16 bits wide
 638  *      @blue:  The blue value which can be up to 16 bits wide.
 639  *      @transp: If supported the alpha value which can be up to 16 bits wide.
 640  *      @info: frame buffer info structure
 641  *
 642  *      Set a single color register. The values supplied have a 16 bit
 643  *      magnitude which needs to be scaled in this function for the hardware.
 644  *      Things to take into consideration are how many color registers, if
 645  *      any, are supported with the current color visual. With truecolor mode
 646  *      no color palettes are supported. Here a pseudo palette is created
 647  *      which we store the value in pseudo_palette in struct fb_info. For
 648  *      pseudocolor mode we have a limited color palette. To deal with this
 649  *      we can program what color is displayed for a particular pixel value.
 650  *      DirectColor is similar in that we can program each color field. If
 651  *      we have a static colormap we don't need to implement this function.
 652  *
 653  *      Returns negative errno on error, or zero on success. In an
 654  *      ideal world, this would have been the case, but as it turns
 655  *      out, the other drivers return 1 on failure, so that's what
 656  *      we're going to do.
 657  */
 658 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
 659                              unsigned int green, unsigned int blue,
 660                              unsigned int transp, struct fb_info *info)
 661 {
 662         struct atmel_lcdfb_info *sinfo = info->par;
 663         unsigned int val;
 664         u32 *pal;
 665         int ret = 1;
 666
 667         if (info->var.grayscale)
 668                 red = green = blue = (19595 * red + 38470 * green
 669                                       + 7471 * blue) >> 16;
 670
 671         switch (info->fix.visual) {
 672         case FB_VISUAL_TRUECOLOR:
 673                 if (regno < 16) {
 674                         pal = info->pseudo_palette;
 675
 676                         val  = chan_to_field(red, &info->var.red);
 677                         val |= chan_to_field(green, &info->var.green);
 678                         val |= chan_to_field(blue, &info->var.blue);
 679
 680                         pal[regno] = val;
 681                         ret = 0;
 682                 }
 683                 break;
 684
 685         case FB_VISUAL_PSEUDOCOLOR:
 686                 if (regno < 256) {
 687                         if (sinfo->have_intensity_bit) {
 688                                 /* old style I+BGR:555 */
 689                                 val  = ((red   >> 11) & 0x001f);
 690                                 val |= ((green >>  6) & 0x03e0);
 691                                 val |= ((blue  >>  1) & 0x7c00);
 692
 693                                 /*
 694                                  * TODO: intensity bit. Maybe something like
 695                                  *   ~(red[10] ^ green[10] ^ blue[10]) & 1
 696                                  */
 697                         } else {
 698                                 /* new style BGR:565 / RGB:565 */
 699                                 if (sinfo->lcd_wiring_mode ==
 700                                     ATMEL_LCDC_WIRING_RGB) {
 701                                         val  = ((blue >> 11) & 0x001f);
 702                                         val |= ((red  >>  0) & 0xf800);
 703                                 } else {
 704                                         val  = ((red  >> 11) & 0x001f);
 705                                         val |= ((blue >>  0) & 0xf800);
 706                                 }
 707
 708                                 val |= ((green >>  5) & 0x07e0);
 709                         }
 710
 711                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
 712                         ret = 0;
 713                 }
 714                 break;
 715
 716         case FB_VISUAL_MONO01:
 717                 if (regno < 2) {
 718                         val = (regno == 0) ? 0x00 : 0x1F;
 719                         lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
 720                         ret = 0;
 721                 }
 722                 break;
 723
 724         }
 725
 726         return ret;
 727 }
 728
 729 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
 730                                struct fb_info *info)
 731 {
 732         dev_dbg(info->device, "%s\n", __func__);
 733
 734         atmel_lcdfb_update_dma(info, var);
 735
 736         return 0;
 737 }
 738
 739 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info)
 740 {
 741         struct atmel_lcdfb_info *sinfo = info->par;
 742
 743         switch (blank_mode) {
 744         case FB_BLANK_UNBLANK:
 745         case FB_BLANK_NORMAL:
 746                 atmel_lcdfb_start(sinfo);
 747                 break;
 748         case FB_BLANK_VSYNC_SUSPEND:
 749         case FB_BLANK_HSYNC_SUSPEND:
 750                 break;
 751         case FB_BLANK_POWERDOWN:
 752                 atmel_lcdfb_stop(sinfo);
 753                 break;
 754         default:
 755                 return -EINVAL;
 756         }
 757
 758         /* let fbcon do a soft blank for us */
 759         return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0);
 760 }
 761
 762 static struct fb_ops atmel_lcdfb_ops = {
 763         .owner          = THIS_MODULE,
 764         .fb_check_var   = atmel_lcdfb_check_var,
 765         .fb_set_par     = atmel_lcdfb_set_par,
 766         .fb_setcolreg   = atmel_lcdfb_setcolreg,
 767         .fb_blank       = atmel_lcdfb_blank,
 768         .fb_pan_display = atmel_lcdfb_pan_display,
 769         .fb_fillrect    = cfb_fillrect,
 770         .fb_copyarea    = cfb_copyarea,
 771         .fb_imageblit   = cfb_imageblit,
 772 };
 773
 774 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
 775 {
 776         struct fb_info *info = dev_id;
 777         struct atmel_lcdfb_info *sinfo = info->par;
 778         u32 status;
 779
 780         status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
 781         if (status & ATMEL_LCDC_UFLWI) {
 782                 dev_warn(info->device, "FIFO underflow %#x\n", status);
 783                 /* reset DMA and FIFO to avoid screen shifting */
 784                 schedule_work(&sinfo->task);
 785         }
 786         lcdc_writel(sinfo, ATMEL_LCDC_ICR, status);
 787         return IRQ_HANDLED;
 788 }
 789
 790 /*
 791  * LCD controller task (to reset the LCD)
 792  */
 793 static void atmel_lcdfb_task(struct work_struct *work)
 794 {
 795         struct atmel_lcdfb_info *sinfo =
 796                 container_of(work, struct atmel_lcdfb_info, task);
 797
 798         atmel_lcdfb_reset(sinfo);
 799 }
 800
 801 static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
 802 {
 803         struct fb_info *info = sinfo->info;
 804         int ret = 0;
 805
 806         info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
 807
 808         dev_info(info->device,
 809                "%luKiB frame buffer at %08lx (mapped at %p)\n",
 810                (unsigned long)info->fix.smem_len / 1024,
 811                (unsigned long)info->fix.smem_start,
 812                info->screen_base);
 813
 814         /* Allocate colormap */
 815         ret = fb_alloc_cmap(&info->cmap, 256, 0);
 816         if (ret < 0)
 817                 dev_err(info->device, "Alloc color map failed\n");
 818
 819         return ret;
 820 }
 821
 822 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
 823 {
 824         if (sinfo->bus_clk)
 825                 clk_enable(sinfo->bus_clk);
 826         clk_enable(sinfo->lcdc_clk);
 827 }
 828
 829 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
 830 {
 831         if (sinfo->bus_clk)
 832                 clk_disable(sinfo->bus_clk);
 833         clk_disable(sinfo->lcdc_clk);
 834 }
 835
 836
 837 static int __init atmel_lcdfb_probe(struct platform_device *pdev)
 838 {
 839         struct device *dev = &pdev->dev;
 840         struct fb_info *info;
 841         struct atmel_lcdfb_info *sinfo;
 842         struct atmel_lcdfb_info *pdata_sinfo;
 843         struct fb_videomode fbmode;
 844         struct resource *regs = NULL;
 845         struct resource *map = NULL;
 846         int ret;
 847
 848         dev_dbg(dev, "%s BEGIN\n", __func__);
 849
 850         ret = -ENOMEM;
 851         info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
 852         if (!info) {
 853                 dev_err(dev, "cannot allocate memory\n");
 854                 goto out;
 855         }
 856
 857         sinfo = info->par;
 858
 859         if (dev->platform_data) {
 860                 pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
 861                 sinfo->default_bpp = pdata_sinfo->default_bpp;
 862                 sinfo->default_dmacon = pdata_sinfo->default_dmacon;
 863                 sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
 864                 sinfo->default_monspecs = pdata_sinfo->default_monspecs;
 865                 sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
 866                 sinfo->guard_time = pdata_sinfo->guard_time;
 867                 sinfo->smem_len = pdata_sinfo->smem_len;
 868                 sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
 869                 sinfo->lcdcon_pol_negative = pdata_sinfo->lcdcon_pol_negative;
 870                 sinfo->lcd_wiring_mode = pdata_sinfo->lcd_wiring_mode;
 871         } else {
 872                 dev_err(dev, "cannot get default configuration\n");
 873                 goto free_info;
 874         }
 875         sinfo->info = info;
 876         sinfo->pdev = pdev;
 877         if (cpu_is_at91sam9261() || cpu_is_at91sam9263() ||
 878                                                         cpu_is_at91sam9rl()) {
 879                 sinfo->have_intensity_bit = true;
 880         }
 881
 882         strcpy(info->fix.id, sinfo->pdev->name);
 883         info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
 884         info->pseudo_palette = sinfo->pseudo_palette;
 885         info->fbops = &atmel_lcdfb_ops;
 886
 887         memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
 888         info->fix = atmel_lcdfb_fix;
 889
 890         /* Enable LCDC Clocks */
 891         if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()
 892          || cpu_is_at32ap7000()) {
 893                 sinfo->bus_clk = clk_get(dev, "hck1");
 894                 if (IS_ERR(sinfo->bus_clk)) {
 895                         ret = PTR_ERR(sinfo->bus_clk);
 896                         goto free_info;
 897                 }
 898         }
 899         sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
 900         if (IS_ERR(sinfo->lcdc_clk)) {
 901                 ret = PTR_ERR(sinfo->lcdc_clk);
 902                 goto put_bus_clk;
 903         }
 904         atmel_lcdfb_start_clock(sinfo);
 905
 906         ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
 907                         info->monspecs.modedb_len, info->monspecs.modedb,
 908                         sinfo->default_bpp);
 909         if (!ret) {
 910                 dev_err(dev, "no suitable video mode found\n");
 911                 goto stop_clk;
 912         }
 913
 914
 915         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 916         if (!regs) {
 917                 dev_err(dev, "resources unusable\n");
 918                 ret = -ENXIO;
 919                 goto stop_clk;
 920         }
 921
 922         sinfo->irq_base = platform_get_irq(pdev, 0);
 923         if (sinfo->irq_base < 0) {
 924                 dev_err(dev, "unable to get irq\n");
 925                 ret = sinfo->irq_base;
 926                 goto stop_clk;
 927         }
 928
 929         /* Initialize video memory */
 930         map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
 931         if (map) {
 932                 /* use a pre-allocated memory buffer */
 933                 info->fix.smem_start = map->start;
 934                 info->fix.smem_len = resource_size(map);
 935                 if (!request_mem_region(info->fix.smem_start,
 936                                         info->fix.smem_len, pdev->name)) {
 937                         ret = -EBUSY;
 938                         goto stop_clk;
 939                 }
 940
 941                 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
 942                 if (!info->screen_base) {
 943                         ret = -ENOMEM;
 944                         goto release_intmem;
 945                 }
 946
 947                 /*
 948                  * Don't clear the framebuffer -- someone may have set
 949                  * up a splash image.
 950                  */
 951         } else {
 952                 /* allocate memory buffer */
 953                 ret = atmel_lcdfb_alloc_video_memory(sinfo);
 954                 if (ret < 0) {
 955                         dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
 956                         goto stop_clk;
 957                 }
 958         }
 959
 960         /* LCDC registers */
 961         info->fix.mmio_start = regs->start;
 962         info->fix.mmio_len = resource_size(regs);
 963
 964         if (!request_mem_region(info->fix.mmio_start,
 965                                 info->fix.mmio_len, pdev->name)) {
 966                 ret = -EBUSY;
 967                 goto free_fb;
 968         }
 969
 970         sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
 971         if (!sinfo->mmio) {
 972                 dev_err(dev, "cannot map LCDC registers\n");
 973                 ret = -ENOMEM;
 974                 goto release_mem;
 975         }
 976
 977         /* Initialize PWM for contrast or backlight ("off") */
 978         init_contrast(sinfo);
 979
 980         /* interrupt */
 981         ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
 982         if (ret) {
 983                 dev_err(dev, "request_irq failed: %d\n", ret);
 984                 goto unmap_mmio;
 985         }
 986
 987         /* Some operations on the LCDC might sleep and
 988          * require a preemptible task context */
 989         INIT_WORK(&sinfo->task, atmel_lcdfb_task);
 990
 991         ret = atmel_lcdfb_init_fbinfo(sinfo);
 992         if (ret < 0) {
 993                 dev_err(dev, "init fbinfo failed: %d\n", ret);
 994                 goto unregister_irqs;
 995         }
 996
 997         /*
 998          * This makes sure that our colour bitfield
 999          * descriptors are correctly initialised.
1000          */
1001         atmel_lcdfb_check_var(&info->var, info);
1002
1003         ret = fb_set_var(info, &info->var);
1004         if (ret) {
1005                 dev_warn(dev, "unable to set display parameters\n");
1006                 goto free_cmap;
1007         }
1008
1009         dev_set_drvdata(dev, info);
1010
1011         /*
1012          * Tell the world that we're ready to go
1013          */
1014         ret = register_framebuffer(info);
1015         if (ret < 0) {
1016                 dev_err(dev, "failed to register framebuffer device: %d\n", ret);
1017                 goto reset_drvdata;
1018         }
1019
1020         /* add selected videomode to modelist */
1021         fb_var_to_videomode(&fbmode, &info->var);
1022         fb_add_videomode(&fbmode, &info->modelist);
1023
1024         /* Power up the LCDC screen */
1025         if (sinfo->atmel_lcdfb_power_control)
1026                 sinfo->atmel_lcdfb_power_control(1);
1027
1028         dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n",
1029                        info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
1030
1031         return 0;
1032
1033 reset_drvdata:
1034         dev_set_drvdata(dev, NULL);
1035 free_cmap:
1036         fb_dealloc_cmap(&info->cmap);
1037 unregister_irqs:
1038         cancel_work_sync(&sinfo->task);
1039         free_irq(sinfo->irq_base, info);
1040 unmap_mmio:
1041         exit_backlight(sinfo);
1042         iounmap(sinfo->mmio);
1043 release_mem:
1044         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1045 free_fb:
1046         if (map)
1047                 iounmap(info->screen_base);
1048         else
1049                 atmel_lcdfb_free_video_memory(sinfo);
1050
1051 release_intmem:
1052         if (map)
1053                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1054 stop_clk:
1055         atmel_lcdfb_stop_clock(sinfo);
1056         clk_put(sinfo->lcdc_clk);
1057 put_bus_clk:
1058         if (sinfo->bus_clk)
1059                 clk_put(sinfo->bus_clk);
1060 free_info:
1061         framebuffer_release(info);
1062 out:
1063         dev_dbg(dev, "%s FAILED\n", __func__);
1064         return ret;
1065 }
1066
1067 static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
1068 {
1069         struct device *dev = &pdev->dev;
1070         struct fb_info *info = dev_get_drvdata(dev);
1071         struct atmel_lcdfb_info *sinfo;
1072
1073         if (!info || !info->par)
1074                 return 0;
1075         sinfo = info->par;
1076
1077         cancel_work_sync(&sinfo->task);
1078         exit_backlight(sinfo);
1079         if (sinfo->atmel_lcdfb_power_control)
1080                 sinfo->atmel_lcdfb_power_control(0);
1081         unregister_framebuffer(info);
1082         atmel_lcdfb_stop_clock(sinfo);
1083         clk_put(sinfo->lcdc_clk);
1084         if (sinfo->bus_clk)
1085                 clk_put(sinfo->bus_clk);
1086         fb_dealloc_cmap(&info->cmap);
1087         free_irq(sinfo->irq_base, info);
1088         iounmap(sinfo->mmio);
1089         release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
1090         if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
1091                 iounmap(info->screen_base);
1092                 release_mem_region(info->fix.smem_start, info->fix.smem_len);
1093         } else {
1094                 atmel_lcdfb_free_video_memory(sinfo);
1095         }
1096
1097         dev_set_drvdata(dev, NULL);
1098         framebuffer_release(info);
1099
1100         return 0;
1101 }
1102
1103 #ifdef CONFIG_PM
1104
1105 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg)
1106 {
1107         struct fb_info *info = platform_get_drvdata(pdev);
1108         struct atmel_lcdfb_info *sinfo = info->par;
1109
1110         /*
1111          * We don't want to handle interrupts while the clock is
1112          * stopped. It may take forever.
1113          */
1114         lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
1115
1116         sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR);
1117         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0);
1118         if (sinfo->atmel_lcdfb_power_control)
1119                 sinfo->atmel_lcdfb_power_control(0);
1120
1121         atmel_lcdfb_stop(sinfo);
1122         atmel_lcdfb_stop_clock(sinfo);
1123
1124         return 0;
1125 }
1126
1127 static int atmel_lcdfb_resume(struct platform_device *pdev)
1128 {
1129         struct fb_info *info = platform_get_drvdata(pdev);
1130         struct atmel_lcdfb_info *sinfo = info->par;
1131
1132         atmel_lcdfb_start_clock(sinfo);
1133         atmel_lcdfb_start(sinfo);
1134         if (sinfo->atmel_lcdfb_power_control)
1135                 sinfo->atmel_lcdfb_power_control(1);
1136         lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon);
1137
1138         /* Enable FIFO & DMA errors */
1139         lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI
1140                         | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI);
1141
1142         return 0;
1143 }
1144
1145 #else
1146 #define atmel_lcdfb_suspend     NULL
1147 #define atmel_lcdfb_resume      NULL
1148 #endif
1149
1150 static struct platform_driver atmel_lcdfb_driver = {
1151         .remove         = __exit_p(atmel_lcdfb_remove),
1152         .suspend        = atmel_lcdfb_suspend,
1153         .resume         = atmel_lcdfb_resume,
1154
1155         .driver         = {
1156                 .name   = "atmel_lcdfb",
1157                 .owner  = THIS_MODULE,
1158         },
1159 };
1160
1161 static int __init atmel_lcdfb_init(void)
1162 {
1163         return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
1164 }
1165
1166 static void __exit atmel_lcdfb_exit(void)
1167 {
1168         platform_driver_unregister(&atmel_lcdfb_driver);
1169 }
1170
1171 module_init(atmel_lcdfb_init);
1172 module_exit(atmel_lcdfb_exit);
1173
1174 MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
1175 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1176 MODULE_LICENSE("GPL");