2 * HDMI driver for OMAP5
4 * Copyright (C) 2014 Texas Instruments Incorporated
9 * Archit Taneja <archit@ti.com>
10 * Tomi Valkeinen <tomi.valkeinen@ti.com>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published by
14 * the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program. If not, see <http://www.gnu.org/licenses/>.
25 #define DSS_SUBSYS_NAME "HDMI"
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/err.h>
31 #include <linux/interrupt.h>
32 #include <linux/mutex.h>
33 #include <linux/delay.h>
34 #include <linux/string.h>
35 #include <linux/platform_device.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/clk.h>
38 #include <linux/gpio.h>
39 #include <linux/regulator/consumer.h>
40 #include <linux/component.h>
41 #include <video/omapdss.h>
42 #include <sound/omap-hdmi-audio.h>
44 #include "hdmi5_core.h"
46 #include "dss_features.h"
48 static struct omap_hdmi hdmi;
50 static int hdmi_runtime_get(void)
54 DSSDBG("hdmi_runtime_get\n");
56 r = pm_runtime_get_sync(&hdmi.pdev->dev);
64 static void hdmi_runtime_put(void)
68 DSSDBG("hdmi_runtime_put\n");
70 r = pm_runtime_put_sync(&hdmi.pdev->dev);
71 WARN_ON(r < 0 && r != -ENOSYS);
74 static irqreturn_t hdmi_irq_handler(int irq, void *data)
76 struct hdmi_wp_data *wp = data;
79 irqstatus = hdmi_wp_get_irqstatus(wp);
80 hdmi_wp_set_irqstatus(wp, irqstatus);
82 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
83 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
86 * If we get both connect and disconnect interrupts at the same
87 * time, turn off the PHY, clear interrupts, and restart, which
88 * raises connect interrupt if a cable is connected, or nothing
89 * if cable is not connected.
92 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
95 * We always get bogus CONNECT & DISCONNECT interrupts when
96 * setting the PHY to LDOON. To ignore those, we force the RXDET
97 * line to 0 until the PHY power state has been changed.
99 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
100 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
101 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
102 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
104 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
105 HDMI_IRQ_LINK_DISCONNECT);
107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
109 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
111 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
112 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
113 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
114 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
120 static int hdmi_init_regulator(void)
123 struct regulator *reg;
125 if (hdmi.vdda_reg != NULL)
128 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
130 DSSERR("can't get VDDA regulator\n");
134 if (regulator_can_change_voltage(reg)) {
135 r = regulator_set_voltage(reg, 1800000, 1800000);
137 devm_regulator_put(reg);
138 DSSWARN("can't set the regulator voltage\n");
148 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
152 r = regulator_enable(hdmi.vdda_reg);
156 r = hdmi_runtime_get();
158 goto err_runtime_get;
160 /* Make selection of HDMI in DSS */
161 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
163 hdmi.core_enabled = true;
168 regulator_disable(hdmi.vdda_reg);
173 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
175 hdmi.core_enabled = false;
178 regulator_disable(hdmi.vdda_reg);
181 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
184 struct omap_video_timings *p;
185 struct omap_overlay_manager *mgr = hdmi.output.manager;
186 struct dss_pll_clock_info hdmi_cinfo = { 0 };
188 r = hdmi_power_on_core(dssdev);
192 p = &hdmi.cfg.timings;
194 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
196 hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
198 /* disable and clear irqs */
199 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
200 hdmi_wp_set_irqstatus(&hdmi.wp,
201 hdmi_wp_get_irqstatus(&hdmi.wp));
203 r = dss_pll_enable(&hdmi.pll.pll);
205 DSSERR("Failed to enable PLL\n");
209 r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
211 DSSERR("Failed to configure PLL\n");
215 r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
216 hdmi_cinfo.clkout[0]);
218 DSSDBG("Failed to start PHY\n");
222 r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
226 hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
228 /* bypass TV gamma table */
229 dispc_enable_gamma_table(0);
232 dss_mgr_set_timings(mgr, p);
234 r = hdmi_wp_video_start(&hdmi.wp);
238 r = dss_mgr_enable(mgr);
242 hdmi_wp_set_irqenable(&hdmi.wp,
243 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
248 hdmi_wp_video_stop(&hdmi.wp);
250 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
254 dss_pll_disable(&hdmi.pll.pll);
256 hdmi_power_off_core(dssdev);
260 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
262 struct omap_overlay_manager *mgr = hdmi.output.manager;
264 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
266 dss_mgr_disable(mgr);
268 hdmi_wp_video_stop(&hdmi.wp);
270 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
272 dss_pll_disable(&hdmi.pll.pll);
274 hdmi_power_off_core(dssdev);
277 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
278 struct omap_video_timings *timings)
280 struct omap_dss_device *out = &hdmi.output;
282 /* TODO: proper interlace support */
283 if (timings->interlace)
286 if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
292 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
293 struct omap_video_timings *timings)
295 mutex_lock(&hdmi.lock);
297 hdmi.cfg.timings = *timings;
299 dispc_set_tv_pclk(timings->pixelclock);
301 mutex_unlock(&hdmi.lock);
304 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
305 struct omap_video_timings *timings)
307 *timings = hdmi.cfg.timings;
310 static void hdmi_dump_regs(struct seq_file *s)
312 mutex_lock(&hdmi.lock);
314 if (hdmi_runtime_get()) {
315 mutex_unlock(&hdmi.lock);
319 hdmi_wp_dump(&hdmi.wp, s);
320 hdmi_pll_dump(&hdmi.pll, s);
321 hdmi_phy_dump(&hdmi.phy, s);
322 hdmi5_core_dump(&hdmi.core, s);
325 mutex_unlock(&hdmi.lock);
328 static int read_edid(u8 *buf, int len)
333 mutex_lock(&hdmi.lock);
335 r = hdmi_runtime_get();
338 idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
340 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
342 r = hdmi5_read_edid(&hdmi.core, buf, len);
344 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
347 mutex_unlock(&hdmi.lock);
352 static int hdmi_display_enable(struct omap_dss_device *dssdev)
354 struct omap_dss_device *out = &hdmi.output;
357 DSSDBG("ENTER hdmi_display_enable\n");
359 mutex_lock(&hdmi.lock);
361 if (out == NULL || out->manager == NULL) {
362 DSSERR("failed to enable display: no output/manager\n");
367 r = hdmi_power_on_full(dssdev);
369 DSSERR("failed to power on device\n");
373 hdmi.display_enabled = true;
375 mutex_unlock(&hdmi.lock);
379 mutex_unlock(&hdmi.lock);
383 static void hdmi_display_disable(struct omap_dss_device *dssdev)
385 DSSDBG("Enter hdmi_display_disable\n");
387 mutex_lock(&hdmi.lock);
389 if (hdmi.audio_pdev && hdmi.audio_abort_cb)
390 hdmi.audio_abort_cb(&hdmi.audio_pdev->dev);
392 hdmi_power_off_full(dssdev);
394 hdmi.display_enabled = false;
396 mutex_unlock(&hdmi.lock);
399 static int hdmi_core_enable(struct omap_dss_device *dssdev)
403 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
405 mutex_lock(&hdmi.lock);
407 r = hdmi_power_on_core(dssdev);
409 DSSERR("failed to power on device\n");
413 mutex_unlock(&hdmi.lock);
417 mutex_unlock(&hdmi.lock);
421 static void hdmi_core_disable(struct omap_dss_device *dssdev)
423 DSSDBG("Enter omapdss_hdmi_core_disable\n");
425 mutex_lock(&hdmi.lock);
427 hdmi_power_off_core(dssdev);
429 mutex_unlock(&hdmi.lock);
432 static int hdmi_connect(struct omap_dss_device *dssdev,
433 struct omap_dss_device *dst)
435 struct omap_overlay_manager *mgr;
438 r = hdmi_init_regulator();
442 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
446 r = dss_mgr_connect(mgr, dssdev);
450 r = omapdss_output_set_device(dssdev, dst);
452 DSSERR("failed to connect output to new device: %s\n",
454 dss_mgr_disconnect(mgr, dssdev);
461 static void hdmi_disconnect(struct omap_dss_device *dssdev,
462 struct omap_dss_device *dst)
464 WARN_ON(dst != dssdev->dst);
466 if (dst != dssdev->dst)
469 omapdss_output_unset_device(dssdev);
472 dss_mgr_disconnect(dssdev->manager, dssdev);
475 static int hdmi_read_edid(struct omap_dss_device *dssdev,
481 need_enable = hdmi.core_enabled == false;
484 r = hdmi_core_enable(dssdev);
489 r = read_edid(edid, len);
492 hdmi_core_disable(dssdev);
497 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
498 const struct hdmi_avi_infoframe *avi)
500 hdmi.cfg.infoframe = *avi;
504 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
507 hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
511 static const struct omapdss_hdmi_ops hdmi_ops = {
512 .connect = hdmi_connect,
513 .disconnect = hdmi_disconnect,
515 .enable = hdmi_display_enable,
516 .disable = hdmi_display_disable,
518 .check_timings = hdmi_display_check_timing,
519 .set_timings = hdmi_display_set_timing,
520 .get_timings = hdmi_display_get_timings,
522 .read_edid = hdmi_read_edid,
523 .set_infoframe = hdmi_set_infoframe,
524 .set_hdmi_mode = hdmi_set_hdmi_mode,
527 static void hdmi_init_output(struct platform_device *pdev)
529 struct omap_dss_device *out = &hdmi.output;
531 out->dev = &pdev->dev;
532 out->id = OMAP_DSS_OUTPUT_HDMI;
533 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
534 out->name = "hdmi.0";
535 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
536 out->ops.hdmi = &hdmi_ops;
537 out->owner = THIS_MODULE;
539 omapdss_register_output(out);
542 static void hdmi_uninit_output(struct platform_device *pdev)
544 struct omap_dss_device *out = &hdmi.output;
546 omapdss_unregister_output(out);
549 static int hdmi_probe_of(struct platform_device *pdev)
551 struct device_node *node = pdev->dev.of_node;
552 struct device_node *ep;
555 ep = omapdss_of_get_first_endpoint(node);
559 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
571 /* Audio callbacks */
572 static int hdmi_audio_startup(struct device *dev,
573 void (*abort_cb)(struct device *dev))
575 struct omap_hdmi *hd = dev_get_drvdata(dev);
578 mutex_lock(&hd->lock);
580 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
585 hd->audio_abort_cb = abort_cb;
588 mutex_unlock(&hd->lock);
593 static int hdmi_audio_shutdown(struct device *dev)
595 struct omap_hdmi *hd = dev_get_drvdata(dev);
597 mutex_lock(&hd->lock);
598 hd->audio_abort_cb = NULL;
599 mutex_unlock(&hd->lock);
604 static int hdmi_audio_start(struct device *dev)
606 struct omap_hdmi *hd = dev_get_drvdata(dev);
608 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
609 WARN_ON(!hd->display_enabled);
611 /* No-idle while playing audio, store the old value */
612 hd->wp_idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
613 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
615 hdmi_wp_audio_enable(&hd->wp, true);
616 hdmi_wp_audio_core_req_enable(&hd->wp, true);
621 static void hdmi_audio_stop(struct device *dev)
623 struct omap_hdmi *hd = dev_get_drvdata(dev);
625 WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
626 WARN_ON(!hd->display_enabled);
628 hdmi_wp_audio_core_req_enable(&hd->wp, false);
629 hdmi_wp_audio_enable(&hd->wp, false);
631 /* Playback stopped, restore original idlemode */
632 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
635 static int hdmi_audio_config(struct device *dev,
636 struct omap_dss_audio *dss_audio)
638 struct omap_hdmi *hd = dev_get_drvdata(dev);
641 mutex_lock(&hd->lock);
643 if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
648 ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
649 hd->cfg.timings.pixelclock);
652 mutex_unlock(&hd->lock);
657 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
658 .audio_startup = hdmi_audio_startup,
659 .audio_shutdown = hdmi_audio_shutdown,
660 .audio_start = hdmi_audio_start,
661 .audio_stop = hdmi_audio_stop,
662 .audio_config = hdmi_audio_config,
665 static int hdmi_audio_register(struct device *dev)
667 struct omap_hdmi_audio_pdata pdata = {
669 .dss_version = omapdss_get_version(),
670 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
671 .ops = &hdmi_audio_ops,
674 hdmi.audio_pdev = platform_device_register_data(
675 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
676 &pdata, sizeof(pdata));
678 if (IS_ERR(hdmi.audio_pdev))
679 return PTR_ERR(hdmi.audio_pdev);
684 /* HDMI HW IP initialisation */
685 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
687 struct platform_device *pdev = to_platform_device(dev);
692 dev_set_drvdata(&pdev->dev, &hdmi);
694 mutex_init(&hdmi.lock);
696 if (pdev->dev.of_node) {
697 r = hdmi_probe_of(pdev);
702 r = hdmi_wp_init(pdev, &hdmi.wp);
706 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
710 r = hdmi_phy_init(pdev, &hdmi.phy);
714 r = hdmi5_core_init(pdev, &hdmi.core);
718 irq = platform_get_irq(pdev, 0);
720 DSSERR("platform_get_irq failed\n");
725 r = devm_request_threaded_irq(&pdev->dev, irq,
726 NULL, hdmi_irq_handler,
727 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
729 DSSERR("HDMI IRQ request failed\n");
733 pm_runtime_enable(&pdev->dev);
735 hdmi_init_output(pdev);
737 r = hdmi_audio_register(&pdev->dev);
739 DSSERR("Registering HDMI audio failed %d\n", r);
740 hdmi_uninit_output(pdev);
741 pm_runtime_disable(&pdev->dev);
745 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
749 hdmi_pll_uninit(&hdmi.pll);
753 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
755 struct platform_device *pdev = to_platform_device(dev);
758 platform_device_unregister(hdmi.audio_pdev);
760 hdmi_uninit_output(pdev);
762 hdmi_pll_uninit(&hdmi.pll);
764 pm_runtime_disable(&pdev->dev);
767 static const struct component_ops hdmi5_component_ops = {
769 .unbind = hdmi5_unbind,
772 static int hdmi5_probe(struct platform_device *pdev)
774 return component_add(&pdev->dev, &hdmi5_component_ops);
777 static int hdmi5_remove(struct platform_device *pdev)
779 component_del(&pdev->dev, &hdmi5_component_ops);
783 static int hdmi_runtime_suspend(struct device *dev)
790 static int hdmi_runtime_resume(struct device *dev)
794 r = dispc_runtime_get();
801 static const struct dev_pm_ops hdmi_pm_ops = {
802 .runtime_suspend = hdmi_runtime_suspend,
803 .runtime_resume = hdmi_runtime_resume,
806 static const struct of_device_id hdmi_of_match[] = {
807 { .compatible = "ti,omap5-hdmi", },
808 { .compatible = "ti,dra7-hdmi", },
812 static struct platform_driver omapdss_hdmihw_driver = {
813 .probe = hdmi5_probe,
814 .remove = hdmi5_remove,
816 .name = "omapdss_hdmi5",
818 .of_match_table = hdmi_of_match,
819 .suppress_bind_attrs = true,
823 int __init hdmi5_init_platform_driver(void)
825 return platform_driver_register(&omapdss_hdmihw_driver);
828 void hdmi5_uninit_platform_driver(void)
830 platform_driver_unregister(&omapdss_hdmihw_driver);