drivers/video/i810/i810_main.c

   1  /*-*- linux-c -*-
   2  *  linux/drivers/video/i810_main.c -- Intel 810 frame buffer device
   3  *
   4  *      Copyright (C) 2001 Antonino Daplas<adaplas@pol.net>
   5  *      All Rights Reserved
   6  *
   7  *      Contributors:
   8  *         Michael Vogt <mvogt@acm.org> - added support for Intel 815 chipsets
   9  *                                        and enabling the power-on state of
  10  *                                        external VGA connectors for
  11  *                                        secondary displays
  12  *
  13  *         Fredrik Andersson <krueger@shell.linux.se> - alpha testing of
  14  *                                        the VESA GTF
  15  *
  16  *         Brad Corrion <bcorrion@web-co.com> - alpha testing of customized
  17  *                                        timings support
  18  *
  19  *      The code framework is a modification of vfb.c by Geert Uytterhoeven.
  20  *      DotClock and PLL calculations are partly based on i810_driver.c
  21  *              in xfree86 v4.0.3 by Precision Insight.
  22  *      Watermark calculation and tables are based on i810_wmark.c
  23  *              in xfre86 v4.0.3 by Precision Insight.  Slight modifications
  24  *              only to allow for integer operations instead of floating point.
  25  *
  26  *  This file is subject to the terms and conditions of the GNU General Public
  27  *  License. See the file COPYING in the main directory of this archive for
  28  *  more details.
  29  */
  30
  31 #include <linux/module.h>
  32 #include <linux/config.h>
  33 #include <linux/kernel.h>
  34 #include <linux/errno.h>
  35 #include <linux/string.h>
  36 #include <linux/mm.h>
  37 #include <linux/tty.h>
  38 #include <linux/slab.h>
  39 #include <linux/fb.h>
  40 #include <linux/init.h>
  41 #include <linux/pci.h>
  42 #include <linux/pci_ids.h>
  43 #include <linux/resource.h>
  44 #include <linux/unistd.h>
  45 #include <linux/console.h>
  46
  47 #include <asm/io.h>
  48 #include <asm/div64.h>
  49
  50 #ifdef CONFIG_MTRR
  51 #include <asm/mtrr.h>
  52 #endif
  53
  54 #include <asm/page.h>
  55
  56 #include "i810_regs.h"
  57 #include "i810.h"
  58 #include "i810_main.h"
  59
  60 /* PCI */
  61 static const char *i810_pci_list[] __devinitdata = {
  62         "Intel(R) 810 Framebuffer Device"                                 ,
  63         "Intel(R) 810-DC100 Framebuffer Device"                           ,
  64         "Intel(R) 810E Framebuffer Device"                                ,
  65         "Intel(R) 815 (Internal Graphics 100Mhz FSB) Framebuffer Device"  ,
  66         "Intel(R) 815 (Internal Graphics only) Framebuffer Device"        ,
  67         "Intel(R) 815 (Internal Graphics with AGP) Framebuffer Device"
  68 };
  69
  70 static struct pci_device_id i810fb_pci_tbl[] = {
  71         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG1,
  72           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  73         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810_IG3,
  74           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1  },
  75         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82810E_IG,
  76           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
  77         /* mvo: added i815 PCI-ID */
  78         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_100,
  79           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
  80         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_NOAGP,
  81           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
  82         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82815_CGC,
  83           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
  84         { 0 },
  85 };
  86
  87 static struct pci_driver i810fb_driver = {
  88         .name     =     "i810fb",
  89         .id_table =     i810fb_pci_tbl,
  90         .probe    =     i810fb_init_pci,
  91         .remove   =     __exit_p(i810fb_remove_pci),
  92         .suspend  =     i810fb_suspend,
  93         .resume   =     i810fb_resume,
  94 };
  95
  96 static char *mode_option __devinitdata = NULL;
  97 static int vram       __devinitdata = 4;
  98 static int bpp        __devinitdata = 8;
  99 static int mtrr       __devinitdata;
 100 static int accel      __devinitdata;
 101 static int hsync1     __devinitdata;
 102 static int hsync2     __devinitdata;
 103 static int vsync1     __devinitdata;
 104 static int vsync2     __devinitdata;
 105 static int xres       __devinitdata;
 106 static int yres       __devinitdata;
 107 static int vyres      __devinitdata;
 108 static int sync       __devinitdata;
 109 static int extvga     __devinitdata;
 110 static int dcolor     __devinitdata;
 111
 112 /*------------------------------------------------------------*/
 113
 114 /**************************************************************
 115  *                Hardware Low Level Routines                 *
 116  **************************************************************/
 117
 118 /**
 119  * i810_screen_off - turns off/on display
 120  * @mmio: address of register space
 121  * @mode: on or off
 122  *
 123  * DESCRIPTION:
 124  * Blanks/unblanks the display
 125  */
 126 static void i810_screen_off(u8 __iomem *mmio, u8 mode)
 127 {
 128         u32 count = WAIT_COUNT;
 129         u8 val;
 130
 131         i810_writeb(SR_INDEX, mmio, SR01);
 132         val = i810_readb(SR_DATA, mmio);
 133         val = (mode == OFF) ? val | SCR_OFF :
 134                 val & ~SCR_OFF;
 135
 136         while((i810_readw(DISP_SL, mmio) & 0xFFF) && count--);
 137         i810_writeb(SR_INDEX, mmio, SR01);
 138         i810_writeb(SR_DATA, mmio, val);
 139 }
 140
 141 /**
 142  * i810_dram_off - turns off/on dram refresh
 143  * @mmio: address of register space
 144  * @mode: on or off
 145  *
 146  * DESCRIPTION:
 147  * Turns off DRAM refresh.  Must be off for only 2 vsyncs
 148  * before data becomes corrupt
 149  */
 150 static void i810_dram_off(u8 __iomem *mmio, u8 mode)
 151 {
 152         u8 val;
 153
 154         val = i810_readb(DRAMCH, mmio);
 155         val &= DRAM_OFF;
 156         val = (mode == OFF) ? val : val | DRAM_ON;
 157         i810_writeb(DRAMCH, mmio, val);
 158 }
 159
 160 /**
 161  * i810_protect_regs - allows rw/ro mode of certain VGA registers
 162  * @mmio: address of register space
 163  * @mode: protect/unprotect
 164  *
 165  * DESCRIPTION:
 166  * The IBM VGA standard allows protection of certain VGA registers.
 167  * This will  protect or unprotect them.
 168  */
 169 static void i810_protect_regs(u8 __iomem *mmio, int mode)
 170 {
 171         u8 reg;
 172
 173         i810_writeb(CR_INDEX_CGA, mmio, CR11);
 174         reg = i810_readb(CR_DATA_CGA, mmio);
 175         reg = (mode == OFF) ? reg & ~0x80 :
 176                 reg | 0x80;
 177
 178         i810_writeb(CR_INDEX_CGA, mmio, CR11);
 179         i810_writeb(CR_DATA_CGA, mmio, reg);
 180 }
 181
 182 /**
 183  * i810_load_pll - loads values for the hardware PLL clock
 184  * @par: pointer to i810fb_par structure
 185  *
 186  * DESCRIPTION:
 187  * Loads the P, M, and N registers.
 188  */
 189 static void i810_load_pll(struct i810fb_par *par)
 190 {
 191         u32 tmp1, tmp2;
 192         u8 __iomem *mmio = par->mmio_start_virtual;
 193
 194         tmp1 = par->regs.M | par->regs.N << 16;
 195         tmp2 = i810_readl(DCLK_2D, mmio);
 196         tmp2 &= ~MN_MASK;
 197         i810_writel(DCLK_2D, mmio, tmp1 | tmp2);
 198
 199         tmp1 = par->regs.P;
 200         tmp2 = i810_readl(DCLK_0DS, mmio);
 201         tmp2 &= ~(P_OR << 16);
 202         i810_writel(DCLK_0DS, mmio, (tmp1 << 16) | tmp2);
 203
 204         i810_writeb(MSR_WRITE, mmio, par->regs.msr | 0xC8 | 1);
 205
 206 }
 207
 208 /**
 209  * i810_load_vga - load standard VGA registers
 210  * @par: pointer to i810fb_par structure
 211  *
 212  * DESCRIPTION:
 213  * Load values to VGA registers
 214  */
 215 static void i810_load_vga(struct i810fb_par *par)
 216 {
 217         u8 __iomem *mmio = par->mmio_start_virtual;
 218
 219         /* interlace */
 220         i810_writeb(CR_INDEX_CGA, mmio, CR70);
 221         i810_writeb(CR_DATA_CGA, mmio, par->interlace);
 222
 223         i810_writeb(CR_INDEX_CGA, mmio, CR00);
 224         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr00);
 225         i810_writeb(CR_INDEX_CGA, mmio, CR01);
 226         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr01);
 227         i810_writeb(CR_INDEX_CGA, mmio, CR02);
 228         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr02);
 229         i810_writeb(CR_INDEX_CGA, mmio, CR03);
 230         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr03);
 231         i810_writeb(CR_INDEX_CGA, mmio, CR04);
 232         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr04);
 233         i810_writeb(CR_INDEX_CGA, mmio, CR05);
 234         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr05);
 235         i810_writeb(CR_INDEX_CGA, mmio, CR06);
 236         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr06);
 237         i810_writeb(CR_INDEX_CGA, mmio, CR09);
 238         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr09);
 239         i810_writeb(CR_INDEX_CGA, mmio, CR10);
 240         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr10);
 241         i810_writeb(CR_INDEX_CGA, mmio, CR11);
 242         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr11);
 243         i810_writeb(CR_INDEX_CGA, mmio, CR12);
 244         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr12);
 245         i810_writeb(CR_INDEX_CGA, mmio, CR15);
 246         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr15);
 247         i810_writeb(CR_INDEX_CGA, mmio, CR16);
 248         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr16);
 249 }
 250
 251 /**
 252  * i810_load_vgax - load extended VGA registers
 253  * @par: pointer to i810fb_par structure
 254  *
 255  * DESCRIPTION:
 256  * Load values to extended VGA registers
 257  */
 258 static void i810_load_vgax(struct i810fb_par *par)
 259 {
 260         u8 __iomem *mmio = par->mmio_start_virtual;
 261
 262         i810_writeb(CR_INDEX_CGA, mmio, CR30);
 263         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr30);
 264         i810_writeb(CR_INDEX_CGA, mmio, CR31);
 265         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr31);
 266         i810_writeb(CR_INDEX_CGA, mmio, CR32);
 267         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr32);
 268         i810_writeb(CR_INDEX_CGA, mmio, CR33);
 269         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr33);
 270         i810_writeb(CR_INDEX_CGA, mmio, CR35);
 271         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr35);
 272         i810_writeb(CR_INDEX_CGA, mmio, CR39);
 273         i810_writeb(CR_DATA_CGA, mmio, par->regs.cr39);
 274 }
 275
 276 /**
 277  * i810_load_2d - load grahics registers
 278  * @par: pointer to i810fb_par structure
 279  *
 280  * DESCRIPTION:
 281  * Load values to graphics registers
 282  */
 283 static void i810_load_2d(struct i810fb_par *par)
 284 {
 285         u32 tmp;
 286         u8 tmp8;
 287         u8 __iomem *mmio = par->mmio_start_virtual;
 288
 289         i810_writel(FW_BLC, mmio, par->watermark);
 290         tmp = i810_readl(PIXCONF, mmio);
 291         tmp |= 1 | 1 << 20;
 292         i810_writel(PIXCONF, mmio, tmp);
 293
 294         i810_writel(OVRACT, mmio, par->ovract);
 295
 296         i810_writeb(GR_INDEX, mmio, GR10);
 297         tmp8 = i810_readb(GR_DATA, mmio);
 298         tmp8 |= 2;
 299         i810_writeb(GR_INDEX, mmio, GR10);
 300         i810_writeb(GR_DATA, mmio, tmp8);
 301 }
 302
 303 /**
 304  * i810_hires - enables high resolution mode
 305  * @mmio: address of register space
 306  */
 307 static void i810_hires(u8 __iomem *mmio)
 308 {
 309         u8 val;
 310
 311         i810_writeb(CR_INDEX_CGA, mmio, CR80);
 312         val = i810_readb(CR_DATA_CGA, mmio);
 313         i810_writeb(CR_INDEX_CGA, mmio, CR80);
 314         i810_writeb(CR_DATA_CGA, mmio, val | 1);
 315         /* Stop LCD displays from flickering */
 316         i810_writel(MEM_MODE, mmio, i810_readl(MEM_MODE, mmio) | 4);
 317 }
 318
 319 /**
 320  * i810_load_pitch - loads the characters per line of the display
 321  * @par: pointer to i810fb_par structure
 322  *
 323  * DESCRIPTION:
 324  * Loads the characters per line
 325  */
 326 static void i810_load_pitch(struct i810fb_par *par)
 327 {
 328         u32 tmp, pitch;
 329         u8 val;
 330         u8 __iomem *mmio = par->mmio_start_virtual;
 331
 332         pitch = par->pitch >> 3;
 333         i810_writeb(SR_INDEX, mmio, SR01);
 334         val = i810_readb(SR_DATA, mmio);
 335         val &= 0xE0;
 336         val |= 1 | 1 << 2;
 337         i810_writeb(SR_INDEX, mmio, SR01);
 338         i810_writeb(SR_DATA, mmio, val);
 339
 340         tmp = pitch & 0xFF;
 341         i810_writeb(CR_INDEX_CGA, mmio, CR13);
 342         i810_writeb(CR_DATA_CGA, mmio, (u8) tmp);
 343
 344         tmp = pitch >> 8;
 345         i810_writeb(CR_INDEX_CGA, mmio, CR41);
 346         val = i810_readb(CR_DATA_CGA, mmio) & ~0x0F;
 347         i810_writeb(CR_INDEX_CGA, mmio, CR41);
 348         i810_writeb(CR_DATA_CGA, mmio, (u8) tmp | val);
 349 }
 350
 351 /**
 352  * i810_load_color - loads the color depth of the display
 353  * @par: pointer to i810fb_par structure
 354  *
 355  * DESCRIPTION:
 356  * Loads the color depth of the display and the graphics engine
 357  */
 358 static void i810_load_color(struct i810fb_par *par)
 359 {
 360         u8 __iomem *mmio = par->mmio_start_virtual;
 361         u32 reg1;
 362         u16 reg2;
 363
 364         reg1 = i810_readl(PIXCONF, mmio) & ~(0xF0000 | 1 << 27);
 365         reg2 = i810_readw(BLTCNTL, mmio) & ~0x30;
 366
 367         reg1 |= 0x8000 | par->pixconf;
 368         reg2 |= par->bltcntl;
 369         i810_writel(PIXCONF, mmio, reg1);
 370         i810_writew(BLTCNTL, mmio, reg2);
 371 }
 372
 373 /**
 374  * i810_load_regs - loads all registers for the mode
 375  * @par: pointer to i810fb_par structure
 376  *
 377  * DESCRIPTION:
 378  * Loads registers
 379  */
 380 static void i810_load_regs(struct i810fb_par *par)
 381 {
 382         u8 __iomem *mmio = par->mmio_start_virtual;
 383
 384         i810_screen_off(mmio, OFF);
 385         i810_protect_regs(mmio, OFF);
 386         i810_dram_off(mmio, OFF);
 387         i810_load_pll(par);
 388         i810_load_vga(par);
 389         i810_load_vgax(par);
 390         i810_dram_off(mmio, ON);
 391         i810_load_2d(par);
 392         i810_hires(mmio);
 393         i810_screen_off(mmio, ON);
 394         i810_protect_regs(mmio, ON);
 395         i810_load_color(par);
 396         i810_load_pitch(par);
 397 }
 398
 399 static void i810_write_dac(u8 regno, u8 red, u8 green, u8 blue,
 400                           u8 __iomem *mmio)
 401 {
 402         i810_writeb(CLUT_INDEX_WRITE, mmio, regno);
 403         i810_writeb(CLUT_DATA, mmio, red);
 404         i810_writeb(CLUT_DATA, mmio, green);
 405         i810_writeb(CLUT_DATA, mmio, blue);
 406 }
 407
 408 static void i810_read_dac(u8 regno, u8 *red, u8 *green, u8 *blue,
 409                           u8 __iomem *mmio)
 410 {
 411         i810_writeb(CLUT_INDEX_READ, mmio, regno);
 412         *red = i810_readb(CLUT_DATA, mmio);
 413         *green = i810_readb(CLUT_DATA, mmio);
 414         *blue = i810_readb(CLUT_DATA, mmio);
 415 }
 416
 417 /************************************************************
 418  *                   VGA State Restore                      *
 419  ************************************************************/
 420 static void i810_restore_pll(struct i810fb_par *par)
 421 {
 422         u32 tmp1, tmp2;
 423         u8 __iomem *mmio = par->mmio_start_virtual;
 424
 425         tmp1 = par->hw_state.dclk_2d;
 426         tmp2 = i810_readl(DCLK_2D, mmio);
 427         tmp1 &= ~MN_MASK;
 428         tmp2 &= MN_MASK;
 429         i810_writel(DCLK_2D, mmio, tmp1 | tmp2);
 430
 431         tmp1 = par->hw_state.dclk_1d;
 432         tmp2 = i810_readl(DCLK_1D, mmio);
 433         tmp1 &= ~MN_MASK;
 434         tmp2 &= MN_MASK;
 435         i810_writel(DCLK_1D, mmio, tmp1 | tmp2);
 436
 437         i810_writel(DCLK_0DS, mmio, par->hw_state.dclk_0ds);
 438 }
 439
 440 static void i810_restore_dac(struct i810fb_par *par)
 441 {
 442         u32 tmp1, tmp2;
 443         u8 __iomem *mmio = par->mmio_start_virtual;
 444
 445         tmp1 = par->hw_state.pixconf;
 446         tmp2 = i810_readl(PIXCONF, mmio);
 447         tmp1 &= DAC_BIT;
 448         tmp2 &= ~DAC_BIT;
 449         i810_writel(PIXCONF, mmio, tmp1 | tmp2);
 450 }
 451
 452 static void i810_restore_vgax(struct i810fb_par *par)
 453 {
 454         u8 i, j;
 455         u8 __iomem *mmio = par->mmio_start_virtual;
 456
 457         for (i = 0; i < 4; i++) {
 458                 i810_writeb(CR_INDEX_CGA, mmio, CR30+i);
 459                 i810_writeb(CR_DATA_CGA, mmio, *(&(par->hw_state.cr30) + i));
 460         }
 461         i810_writeb(CR_INDEX_CGA, mmio, CR35);
 462         i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr35);
 463         i810_writeb(CR_INDEX_CGA, mmio, CR39);
 464         i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr39);
 465         i810_writeb(CR_INDEX_CGA, mmio, CR41);
 466         i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr39);
 467
 468         /*restore interlace*/
 469         i810_writeb(CR_INDEX_CGA, mmio, CR70);
 470         i = par->hw_state.cr70;
 471         i &= INTERLACE_BIT;
 472         j = i810_readb(CR_DATA_CGA, mmio);
 473         i810_writeb(CR_INDEX_CGA, mmio, CR70);
 474         i810_writeb(CR_DATA_CGA, mmio, j | i);
 475
 476         i810_writeb(CR_INDEX_CGA, mmio, CR80);
 477         i810_writeb(CR_DATA_CGA, mmio, par->hw_state.cr80);
 478         i810_writeb(MSR_WRITE, mmio, par->hw_state.msr);
 479         i810_writeb(SR_INDEX, mmio, SR01);
 480         i = (par->hw_state.sr01) & ~0xE0 ;
 481         j = i810_readb(SR_DATA, mmio) & 0xE0;
 482         i810_writeb(SR_INDEX, mmio, SR01);
 483         i810_writeb(SR_DATA, mmio, i | j);
 484 }
 485
 486 static void i810_restore_vga(struct i810fb_par *par)
 487 {
 488         u8 i;
 489         u8 __iomem *mmio = par->mmio_start_virtual;
 490
 491         for (i = 0; i < 10; i++) {
 492                 i810_writeb(CR_INDEX_CGA, mmio, CR00 + i);
 493                 i810_writeb(CR_DATA_CGA, mmio, *((&par->hw_state.cr00) + i));
 494         }
 495         for (i = 0; i < 8; i++) {
 496                 i810_writeb(CR_INDEX_CGA, mmio, CR10 + i);
 497                 i810_writeb(CR_DATA_CGA, mmio, *((&par->hw_state.cr10) + i));
 498         }
 499 }
 500
 501 static void i810_restore_addr_map(struct i810fb_par *par)
 502 {
 503         u8 tmp;
 504         u8 __iomem *mmio = par->mmio_start_virtual;
 505
 506         i810_writeb(GR_INDEX, mmio, GR10);
 507         tmp = i810_readb(GR_DATA, mmio);
 508         tmp &= ADDR_MAP_MASK;
 509         tmp |= par->hw_state.gr10;
 510         i810_writeb(GR_INDEX, mmio, GR10);
 511         i810_writeb(GR_DATA, mmio, tmp);
 512 }
 513
 514 static void i810_restore_2d(struct i810fb_par *par)
 515 {
 516         u32 tmp_long;
 517         u16 tmp_word;
 518         u8 __iomem *mmio = par->mmio_start_virtual;
 519
 520         tmp_word = i810_readw(BLTCNTL, mmio);
 521         tmp_word &= ~(3 << 4);
 522         tmp_word |= par->hw_state.bltcntl;
 523         i810_writew(BLTCNTL, mmio, tmp_word);
 524
 525         i810_dram_off(mmio, OFF);
 526         i810_writel(PIXCONF, mmio, par->hw_state.pixconf);
 527         i810_dram_off(mmio, ON);
 528
 529         tmp_word = i810_readw(HWSTAM, mmio);
 530         tmp_word &= 3 << 13;
 531         tmp_word |= par->hw_state.hwstam;
 532         i810_writew(HWSTAM, mmio, tmp_word);
 533
 534         tmp_long = i810_readl(FW_BLC, mmio);
 535         tmp_long &= FW_BLC_MASK;
 536         tmp_long |= par->hw_state.fw_blc;
 537         i810_writel(FW_BLC, mmio, tmp_long);
 538
 539         i810_writel(HWS_PGA, mmio, par->hw_state.hws_pga);
 540         i810_writew(IER, mmio, par->hw_state.ier);
 541         i810_writew(IMR, mmio, par->hw_state.imr);
 542         i810_writel(DPLYSTAS, mmio, par->hw_state.dplystas);
 543 }
 544
 545 static void i810_restore_vga_state(struct i810fb_par *par)
 546 {
 547         u8 __iomem *mmio = par->mmio_start_virtual;
 548
 549         i810_screen_off(mmio, OFF);
 550         i810_protect_regs(mmio, OFF);
 551         i810_dram_off(mmio, OFF);
 552         i810_restore_pll(par);
 553         i810_restore_dac(par);
 554         i810_restore_vga(par);
 555         i810_restore_vgax(par);
 556         i810_restore_addr_map(par);
 557         i810_dram_off(mmio, ON);
 558         i810_restore_2d(par);
 559         i810_screen_off(mmio, ON);
 560         i810_protect_regs(mmio, ON);
 561 }
 562
 563 /***********************************************************************
 564  *                         VGA State Save                              *
 565  ***********************************************************************/
 566
 567 static void i810_save_vgax(struct i810fb_par *par)
 568 {
 569         u8 i;
 570         u8 __iomem *mmio = par->mmio_start_virtual;
 571
 572         for (i = 0; i < 4; i++) {
 573                 i810_writeb(CR_INDEX_CGA, mmio, CR30 + i);
 574                 *(&(par->hw_state.cr30) + i) = i810_readb(CR_DATA_CGA, mmio);
 575         }
 576         i810_writeb(CR_INDEX_CGA, mmio, CR35);
 577         par->hw_state.cr35 = i810_readb(CR_DATA_CGA, mmio);
 578         i810_writeb(CR_INDEX_CGA, mmio, CR39);
 579         par->hw_state.cr39 = i810_readb(CR_DATA_CGA, mmio);
 580         i810_writeb(CR_INDEX_CGA, mmio, CR41);
 581         par->hw_state.cr41 = i810_readb(CR_DATA_CGA, mmio);
 582         i810_writeb(CR_INDEX_CGA, mmio, CR70);
 583         par->hw_state.cr70 = i810_readb(CR_DATA_CGA, mmio);
 584         par->hw_state.msr = i810_readb(MSR_READ, mmio);
 585         i810_writeb(CR_INDEX_CGA, mmio, CR80);
 586         par->hw_state.cr80 = i810_readb(CR_DATA_CGA, mmio);
 587         i810_writeb(SR_INDEX, mmio, SR01);
 588         par->hw_state.sr01 = i810_readb(SR_DATA, mmio);
 589 }
 590
 591 static void i810_save_vga(struct i810fb_par *par)
 592 {
 593         u8 i;
 594         u8 __iomem *mmio = par->mmio_start_virtual;
 595
 596         for (i = 0; i < 10; i++) {
 597                 i810_writeb(CR_INDEX_CGA, mmio, CR00 + i);
 598                 *((&par->hw_state.cr00) + i) = i810_readb(CR_DATA_CGA, mmio);
 599         }
 600         for (i = 0; i < 8; i++) {
 601                 i810_writeb(CR_INDEX_CGA, mmio, CR10 + i);
 602                 *((&par->hw_state.cr10) + i) = i810_readb(CR_DATA_CGA, mmio);
 603         }
 604 }
 605
 606 static void i810_save_2d(struct i810fb_par *par)
 607 {
 608         u8 __iomem *mmio = par->mmio_start_virtual;
 609
 610         par->hw_state.dclk_2d = i810_readl(DCLK_2D, mmio);
 611         par->hw_state.dclk_1d = i810_readl(DCLK_1D, mmio);
 612         par->hw_state.dclk_0ds = i810_readl(DCLK_0DS, mmio);
 613         par->hw_state.pixconf = i810_readl(PIXCONF, mmio);
 614         par->hw_state.fw_blc = i810_readl(FW_BLC, mmio);
 615         par->hw_state.bltcntl = i810_readw(BLTCNTL, mmio);
 616         par->hw_state.hwstam = i810_readw(HWSTAM, mmio);
 617         par->hw_state.hws_pga = i810_readl(HWS_PGA, mmio);
 618         par->hw_state.ier = i810_readw(IER, mmio);
 619         par->hw_state.imr = i810_readw(IMR, mmio);
 620         par->hw_state.dplystas = i810_readl(DPLYSTAS, mmio);
 621 }
 622
 623 static void i810_save_vga_state(struct i810fb_par *par)
 624 {
 625         i810_save_vga(par);
 626         i810_save_vgax(par);
 627         i810_save_2d(par);
 628 }
 629
 630 /************************************************************
 631  *                    Helpers                               *
 632  ************************************************************/
 633 /**
 634  * get_line_length - calculates buffer pitch in bytes
 635  * @par: pointer to i810fb_par structure
 636  * @xres_virtual: virtual resolution of the frame
 637  * @bpp: bits per pixel
 638  *
 639  * DESCRIPTION:
 640  * Calculates buffer pitch in bytes.
 641  */
 642 static u32 get_line_length(struct i810fb_par *par, int xres_virtual, int bpp)
 643 {
 644         u32 length;
 645
 646         length = xres_virtual*bpp;
 647         length = (length+31)&-32;
 648         length >>= 3;
 649         return length;
 650 }
 651
 652 /**
 653  * i810_calc_dclk - calculates the P, M, and N values of a pixelclock value
 654  * @freq: target pixelclock in picoseconds
 655  * @m: where to write M register
 656  * @n: where to write N register
 657  * @p: where to write P register
 658  *
 659  * DESCRIPTION:
 660  * Based on the formula Freq_actual = (4*M*Freq_ref)/(N^P)
 661  * Repeatedly computes the Freq until the actual Freq is equal to
 662  * the target Freq or until the loop count is zero.  In the latter
 663  * case, the actual frequency nearest the target will be used.
 664  */
 665 static void i810_calc_dclk(u32 freq, u32 *m, u32 *n, u32 *p)
 666 {
 667         u32 m_reg, n_reg, p_divisor, n_target_max;
 668         u32 m_target, n_target, p_target, n_best, m_best, mod;
 669         u32 f_out, target_freq, diff = 0, mod_min, diff_min;
 670
 671         diff_min = mod_min = 0xFFFFFFFF;
 672         n_best = m_best = m_target = f_out = 0;
 673
 674         target_freq =  freq;
 675         n_target_max = 30;
 676
 677         /*
 678          * find P such that target freq is 16x reference freq (Hz).
 679          */
 680         p_divisor = 1;
 681         p_target = 0;
 682         while(!((1000000 * p_divisor)/(16 * 24 * target_freq)) &&
 683               p_divisor <= 32) {
 684                 p_divisor <<= 1;
 685                 p_target++;
 686         }
 687
 688         n_reg = m_reg = n_target = 3;
 689         while (diff_min && mod_min && (n_target < n_target_max)) {
 690                 f_out = (p_divisor * n_reg * 1000000)/(4 * 24 * m_reg);
 691                 mod = (p_divisor * n_reg * 1000000) % (4 * 24 * m_reg);
 692                 m_target = m_reg;
 693                 n_target = n_reg;
 694                 if (f_out <= target_freq) {
 695                         n_reg++;
 696                         diff = target_freq - f_out;
 697                 } else {
 698                         m_reg++;
 699                         diff = f_out - target_freq;
 700                 }
 701
 702                 if (diff_min > diff) {
 703                         diff_min = diff;
 704                         n_best = n_target;
 705                         m_best = m_target;
 706                 }
 707
 708                 if (!diff && mod_min > mod) {
 709                         mod_min = mod;
 710                         n_best = n_target;
 711                         m_best = m_target;
 712                 }
 713         }
 714         if (m) *m = (m_best - 2) & 0x3FF;
 715         if (n) *n = (n_best - 2) & 0x3FF;
 716         if (p) *p = (p_target << 4);
 717 }
 718
 719 /*************************************************************
 720  *                Hardware Cursor Routines                   *
 721  *************************************************************/
 722
 723 /**
 724  * i810_enable_cursor - show or hide the hardware cursor
 725  * @mmio: address of register space
 726  * @mode: show (1) or hide (0)
 727  *
 728  * Description:
 729  * Shows or hides the hardware cursor
 730  */
 731 static void i810_enable_cursor(u8 __iomem *mmio, int mode)
 732 {
 733         u32 temp;
 734
 735         temp = i810_readl(PIXCONF, mmio);
 736         temp = (mode == ON) ? temp | CURSOR_ENABLE_MASK :
 737                 temp & ~CURSOR_ENABLE_MASK;
 738
 739         i810_writel(PIXCONF, mmio, temp);
 740 }
 741
 742 static void i810_reset_cursor_image(struct i810fb_par *par)
 743 {
 744         u8 __iomem *addr = par->cursor_heap.virtual;
 745         int i, j;
 746
 747         for (i = 64; i--; ) {
 748                 for (j = 0; j < 8; j++) {
 749                         i810_writeb(j, addr, 0xff);
 750                         i810_writeb(j+8, addr, 0x00);
 751                 }
 752                 addr +=16;
 753         }
 754 }
 755
 756 static void i810_load_cursor_image(int width, int height, u8 *data,
 757                                    struct i810fb_par *par)
 758 {
 759         u8 __iomem *addr = par->cursor_heap.virtual;
 760         int i, j, w = width/8;
 761         int mod = width % 8, t_mask, d_mask;
 762
 763         t_mask = 0xff >> mod;
 764         d_mask = ~(0xff >> mod);
 765         for (i = height; i--; ) {
 766                 for (j = 0; j < w; j++) {
 767                         i810_writeb(j+0, addr, 0x00);
 768                         i810_writeb(j+8, addr, *data++);
 769                 }
 770                 if (mod) {
 771                         i810_writeb(j+0, addr, t_mask);
 772                         i810_writeb(j+8, addr, *data++ & d_mask);
 773                 }
 774                 addr += 16;
 775         }
 776 }
 777
 778 static void i810_load_cursor_colors(int fg, int bg, struct fb_info *info)
 779 {
 780         struct i810fb_par *par = info->par;
 781         u8 __iomem *mmio = par->mmio_start_virtual;
 782         u8 red, green, blue, trans, temp;
 783
 784         i810fb_getcolreg(bg, &red, &green, &blue, &trans, info);
 785
 786         temp = i810_readb(PIXCONF1, mmio);
 787         i810_writeb(PIXCONF1, mmio, temp | EXTENDED_PALETTE);
 788
 789         i810_write_dac(4, red, green, blue, mmio);
 790
 791         i810_writeb(PIXCONF1, mmio, temp);
 792
 793         i810fb_getcolreg(fg, &red, &green, &blue, &trans, info);
 794         temp = i810_readb(PIXCONF1, mmio);
 795         i810_writeb(PIXCONF1, mmio, temp | EXTENDED_PALETTE);
 796
 797         i810_write_dac(5, red, green, blue, mmio);
 798
 799         i810_writeb(PIXCONF1, mmio, temp);
 800 }
 801
 802 /**
 803  * i810_init_cursor - initializes the cursor
 804  * @par: pointer to i810fb_par structure
 805  *
 806  * DESCRIPTION:
 807  * Initializes the cursor registers
 808  */
 809 static void i810_init_cursor(struct i810fb_par *par)
 810 {
 811         u8 __iomem *mmio = par->mmio_start_virtual;
 812
 813         i810_enable_cursor(mmio, OFF);
 814         i810_writel(CURBASE, mmio, par->cursor_heap.physical);
 815         i810_writew(CURCNTR, mmio, COORD_ACTIVE | CURSOR_MODE_64_XOR);
 816 }
 817
 818 /*********************************************************************
 819  *                    Framebuffer hook helpers                       *
 820  *********************************************************************/
 821 /**
 822  * i810_round_off -  Round off values to capability of hardware
 823  * @var: pointer to fb_var_screeninfo structure
 824  *
 825  * DESCRIPTION:
 826  * @var contains user-defined information for the mode to be set.
 827  * This will try modify those values to ones nearest the
 828  * capability of the hardware
 829  */
 830 static void i810_round_off(struct fb_var_screeninfo *var)
 831 {
 832         u32 xres, yres, vxres, vyres;
 833
 834         /*
 835          *  Presently supports only these configurations
 836          */
 837
 838         xres = var->xres;
 839         yres = var->yres;
 840         vxres = var->xres_virtual;
 841         vyres = var->yres_virtual;
 842
 843         var->bits_per_pixel += 7;
 844         var->bits_per_pixel &= ~7;
 845
 846         if (var->bits_per_pixel < 8)
 847                 var->bits_per_pixel = 8;
 848         if (var->bits_per_pixel > 32)
 849                 var->bits_per_pixel = 32;
 850
 851         round_off_xres(&xres);
 852         if (xres < 40)
 853                 xres = 40;
 854         if (xres > 2048)
 855                 xres = 2048;
 856         xres = (xres + 7) & ~7;
 857
 858         if (vxres < xres)
 859                 vxres = xres;
 860
 861         round_off_yres(&xres, &yres);
 862         if (yres < 1)
 863                 yres = 1;
 864         if (yres >= 2048)
 865                 yres = 2048;
 866
 867         if (vyres < yres)
 868                 vyres = yres;
 869
 870         if (var->bits_per_pixel == 32)
 871                 var->accel_flags = 0;
 872
 873         /* round of horizontal timings to nearest 8 pixels */
 874         var->left_margin = (var->left_margin + 4) & ~7;
 875         var->right_margin = (var->right_margin + 4) & ~7;
 876         var->hsync_len = (var->hsync_len + 4) & ~7;
 877
 878         if (var->vmode & FB_VMODE_INTERLACED) {
 879                 if (!((yres + var->upper_margin + var->vsync_len +
 880                        var->lower_margin) & 1))
 881                         var->upper_margin++;
 882         }
 883
 884         var->xres = xres;
 885         var->yres = yres;
 886         var->xres_virtual = vxres;
 887         var->yres_virtual = vyres;
 888 }
 889
 890 /**
 891  * set_color_bitfields - sets rgba fields
 892  * @var: pointer to fb_var_screeninfo
 893  *
 894  * DESCRIPTION:
 895  * The length, offset and ordering  for each color field
 896  * (red, green, blue)  will be set as specified
 897  * by the hardware
 898  */
 899 static void set_color_bitfields(struct fb_var_screeninfo *var)
 900 {
 901         switch (var->bits_per_pixel) {
 902         case 8:
 903                 var->red.offset = 0;
 904                 var->red.length = 8;
 905                 var->green.offset = 0;
 906                 var->green.length = 8;
 907                 var->blue.offset = 0;
 908                 var->blue.length = 8;
 909                 var->transp.offset = 0;
 910                 var->transp.length = 0;
 911                 break;
 912         case 16:
 913                 var->green.length = (var->green.length == 5) ? 5 : 6;
 914                 var->red.length = 5;
 915                 var->blue.length = 5;
 916                 var->transp.length = 6 - var->green.length;
 917                 var->blue.offset = 0;
 918                 var->green.offset = 5;
 919                 var->red.offset = 5 + var->green.length;
 920                 var->transp.offset =  (5 + var->red.offset) & 15;
 921                 break;
 922         case 24:        /* RGB 888   */
 923         case 32:        /* RGBA 8888 */
 924                 var->red.offset = 16;
 925                 var->red.length = 8;
 926                 var->green.offset = 8;
 927                 var->green.length = 8;
 928                 var->blue.offset = 0;
 929                 var->blue.length = 8;
 930                 var->transp.length = var->bits_per_pixel - 24;
 931                 var->transp.offset = (var->transp.length) ? 24 : 0;
 932                 break;
 933         }
 934         var->red.msb_right = 0;
 935         var->green.msb_right = 0;
 936         var->blue.msb_right = 0;
 937         var->transp.msb_right = 0;
 938 }
 939
 940 /**
 941  * i810_check_params - check if contents in var are valid
 942  * @var: pointer to fb_var_screeninfo
 943  * @info: pointer to fb_info
 944  *
 945  * DESCRIPTION:
 946  * This will check if the framebuffer size is sufficient
 947  * for the current mode and if the user's monitor has the
 948  * required specifications to display the current mode.
 949  */
 950 static int i810_check_params(struct fb_var_screeninfo *var,
 951                              struct fb_info *info)
 952 {
 953         struct i810fb_par *par = info->par;
 954         int line_length, vidmem, mode_valid = 0, retval = 0;
 955         u32 vyres = var->yres_virtual, vxres = var->xres_virtual;
 956         /*
 957          *  Memory limit
 958          */
 959         line_length = get_line_length(par, vxres, var->bits_per_pixel);
 960         vidmem = line_length*vyres;
 961
 962         if (vidmem > par->fb.size) {
 963                 vyres = par->fb.size/line_length;
 964                 if (vyres < var->yres) {
 965                         vyres = yres;
 966                         vxres = par->fb.size/vyres;
 967                         vxres /= var->bits_per_pixel >> 3;
 968                         line_length = get_line_length(par, vxres,
 969                                                       var->bits_per_pixel);
 970                         vidmem = line_length * yres;
 971                         if (vxres < var->xres) {
 972                                 printk("i810fb: required video memory, "
 973                                        "%d bytes, for %dx%d-%d (virtual) "
 974                                        "is out of range\n",
 975                                        vidmem, vxres, vyres,
 976                                        var->bits_per_pixel);
 977                                 return -ENOMEM;
 978                         }
 979                 }
 980         }
 981
 982         var->xres_virtual = vxres;
 983         var->yres_virtual = vyres;
 984
 985         /*
 986          * Monitor limit
 987          */
 988         switch (var->bits_per_pixel) {
 989         case 8:
 990                 info->monspecs.dclkmax = 234000000;
 991                 break;
 992         case 16:
 993                 info->monspecs.dclkmax = 229000000;
 994                 break;
 995         case 24:
 996         case 32:
 997                 info->monspecs.dclkmax = 204000000;
 998                 break;
 999         }
1000
1001         info->monspecs.dclkmin = 15000000;
1002
1003         if (!fb_validate_mode(var, info))
1004                 mode_valid = 1;
1005
1006 #ifdef CONFIG_FB_I810_I2C
1007         if (!mode_valid && info->monspecs.gtf &&
1008             !fb_get_mode(FB_MAXTIMINGS, 0, var, info))
1009                 mode_valid = 1;
1010
1011         if (!mode_valid && info->monspecs.modedb_len) {
1012                 struct fb_videomode *mode;
1013
1014                 mode = fb_find_best_mode(var, &info->modelist);
1015                 if (mode) {
1016                         fb_videomode_to_var(var, mode);
1017                         mode_valid = 1;
1018                 }
1019         }
1020 #endif
1021         if (!mode_valid && info->monspecs.modedb_len == 0) {
1022                 if (fb_get_mode(FB_MAXTIMINGS, 0, var, info)) {
1023                         int default_sync = (info->monspecs.hfmin-HFMIN)
1024                                 |(info->monspecs.hfmax-HFMAX)
1025                                 |(info->monspecs.vfmin-VFMIN)
1026                                 |(info->monspecs.vfmax-VFMAX);
1027                         printk("i810fb: invalid video mode%s\n",
1028                                default_sync ? "" : ". Specifying "
1029                                "vsyncN/hsyncN parameters may help");
1030                         retval = -EINVAL;
1031                 }
1032         }
1033
1034         return retval;
1035 }
1036
1037 /**
1038  * encode_fix - fill up fb_fix_screeninfo structure
1039  * @fix: pointer to fb_fix_screeninfo
1040  * @info: pointer to fb_info
1041  *
1042  * DESCRIPTION:
1043  * This will set up parameters that are unmodifiable by the user.
1044  */
1045 static int encode_fix(struct fb_fix_screeninfo *fix, struct fb_info *info)
1046 {
1047         struct i810fb_par *par = info->par;
1048
1049         memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1050
1051         strcpy(fix->id, "I810");
1052         fix->smem_start = par->fb.physical;
1053         fix->smem_len = par->fb.size;
1054         fix->type = FB_TYPE_PACKED_PIXELS;
1055         fix->type_aux = 0;
1056         fix->xpanstep = 8;
1057         fix->ypanstep = 1;
1058
1059         switch (info->var.bits_per_pixel) {
1060         case 8:
1061                 fix->visual = FB_VISUAL_PSEUDOCOLOR;
1062                 break;
1063         case 16:
1064         case 24:
1065         case 32:
1066                 if (info->var.nonstd)
1067                         fix->visual = FB_VISUAL_DIRECTCOLOR;
1068                 else
1069                         fix->visual = FB_VISUAL_TRUECOLOR;
1070                 break;
1071         default:
1072                 return -EINVAL;
1073         }
1074         fix->ywrapstep = 0;
1075         fix->line_length = par->pitch;
1076         fix->mmio_start = par->mmio_start_phys;
1077         fix->mmio_len = MMIO_SIZE;
1078         fix->accel = FB_ACCEL_I810;
1079
1080         return 0;
1081 }
1082
1083 /**
1084  * decode_var - modify par according to contents of var
1085  * @var: pointer to fb_var_screeninfo
1086  * @par: pointer to i810fb_par
1087  *
1088  * DESCRIPTION:
1089  * Based on the contents of @var, @par will be dynamically filled up.
1090  * @par contains all information necessary to modify the hardware.
1091 */
1092 static void decode_var(const struct fb_var_screeninfo *var,
1093                        struct i810fb_par *par)
1094 {
1095         u32 xres, yres, vxres, vyres;
1096
1097         xres = var->xres;
1098         yres = var->yres;
1099         vxres = var->xres_virtual;
1100         vyres = var->yres_virtual;
1101
1102         switch (var->bits_per_pixel) {
1103         case 8:
1104                 par->pixconf = PIXCONF8;
1105                 par->bltcntl = 0;
1106                 par->depth = 1;
1107                 par->blit_bpp = BPP8;
1108                 break;
1109         case 16:
1110                 if (var->green.length == 5)
1111                         par->pixconf = PIXCONF15;
1112                 else
1113                         par->pixconf = PIXCONF16;
1114                 par->bltcntl = 16;
1115                 par->depth = 2;
1116                 par->blit_bpp = BPP16;
1117                 break;
1118         case 24:
1119                 par->pixconf = PIXCONF24;
1120                 par->bltcntl = 32;
1121                 par->depth = 3;
1122                 par->blit_bpp = BPP24;
1123                 break;
1124         case 32:
1125                 par->pixconf = PIXCONF32;
1126                 par->bltcntl = 0;
1127                 par->depth = 4;
1128                 par->blit_bpp = 3 << 24;
1129                 break;
1130         }
1131         if (var->nonstd && var->bits_per_pixel != 8)
1132                 par->pixconf |= 1 << 27;
1133
1134         i810_calc_dclk(var->pixclock, &par->regs.M,
1135                        &par->regs.N, &par->regs.P);
1136         i810fb_encode_registers(var, par, xres, yres);
1137
1138         par->watermark = i810_get_watermark(var, par);
1139         par->pitch = get_line_length(par, vxres, var->bits_per_pixel);
1140 }
1141
1142 /**
1143  * i810fb_getcolreg - gets red, green and blue values of the hardware DAC
1144  * @regno: DAC index
1145  * @red: red
1146  * @green: green
1147  * @blue: blue
1148  * @transp: transparency (alpha)
1149  * @info: pointer to fb_info
1150  *
1151  * DESCRIPTION:
1152  * Gets the red, green and blue values of the hardware DAC as pointed by @regno
1153  * and writes them to @red, @green and @blue respectively
1154  */
1155 static int i810fb_getcolreg(u8 regno, u8 *red, u8 *green, u8 *blue,
1156                             u8 *transp, struct fb_info *info)
1157 {
1158         struct i810fb_par *par = info->par;
1159         u8 __iomem *mmio = par->mmio_start_virtual;
1160         u8 temp;
1161
1162         if (info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
1163                 if ((info->var.green.length == 5 && regno > 31) ||
1164                     (info->var.green.length == 6 && regno > 63))
1165                         return 1;
1166         }
1167
1168         temp = i810_readb(PIXCONF1, mmio);
1169         i810_writeb(PIXCONF1, mmio, temp & ~EXTENDED_PALETTE);
1170
1171         if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
1172             info->var.green.length == 5)
1173                 i810_read_dac(regno * 8, red, green, blue, mmio);
1174
1175         else if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
1176                  info->var.green.length == 6) {
1177                 u8 tmp;
1178
1179                 i810_read_dac(regno * 8, red, &tmp, blue, mmio);
1180                 i810_read_dac(regno * 4, &tmp, green, &tmp, mmio);
1181         }
1182         else
1183                 i810_read_dac(regno, red, green, blue, mmio);
1184
1185         *transp = 0;
1186         i810_writeb(PIXCONF1, mmio, temp);
1187
1188         return 0;
1189 }
1190
1191 /******************************************************************
1192  *           Framebuffer device-specific hooks                    *
1193  ******************************************************************/
1194
1195 static int i810fb_open(struct fb_info *info, int user)
1196 {
1197         struct i810fb_par *par = info->par;
1198         u32 count = atomic_read(&par->use_count);
1199
1200         if (count == 0) {
1201                 memset(&par->state, 0, sizeof(struct vgastate));
1202                 par->state.flags = VGA_SAVE_CMAP;
1203                 par->state.vgabase = par->mmio_start_virtual;
1204                 save_vga(&par->state);
1205
1206                 i810_save_vga_state(par);
1207         }
1208
1209         atomic_inc(&par->use_count);
1210
1211         return 0;
1212 }
1213
1214 static int i810fb_release(struct fb_info *info, int user)
1215 {
1216         struct i810fb_par *par = info->par;
1217         u32 count;
1218
1219         count = atomic_read(&par->use_count);
1220         if (count == 0)
1221                 return -EINVAL;
1222
1223         if (count == 1) {
1224                 i810_restore_vga_state(par);
1225                 restore_vga(&par->state);
1226         }
1227
1228         atomic_dec(&par->use_count);
1229
1230         return 0;
1231 }
1232
1233
1234 static int i810fb_setcolreg(unsigned regno, unsigned red, unsigned green,
1235                             unsigned blue, unsigned transp,
1236                             struct fb_info *info)
1237 {
1238         struct i810fb_par *par = info->par;
1239         u8 __iomem *mmio = par->mmio_start_virtual;
1240         u8 temp;
1241         int i;
1242
1243         if (regno > 255) return 1;
1244
1245         if (info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
1246                 if ((info->var.green.length == 5 && regno > 31) ||
1247                     (info->var.green.length == 6 && regno > 63))
1248                         return 1;
1249         }
1250
1251         if (info->var.grayscale)
1252                 red = green = blue = (19595 * red + 38470 * green +
1253                                       7471 * blue) >> 16;
1254
1255         temp = i810_readb(PIXCONF1, mmio);
1256         i810_writeb(PIXCONF1, mmio, temp & ~EXTENDED_PALETTE);
1257
1258         if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
1259             info->var.green.length == 5) {
1260                 for (i = 0; i < 8; i++)
1261                         i810_write_dac((u8) (regno * 8) + i, (u8) red,
1262                                        (u8) green, (u8) blue, mmio);
1263         } else if (info->fix.visual == FB_VISUAL_DIRECTCOLOR &&
1264                  info->var.green.length == 6) {
1265                 u8 r, g, b;
1266
1267                 if (regno < 32) {
1268                         for (i = 0; i < 8; i++)
1269                                 i810_write_dac((u8) (regno * 8) + i,
1270                                                (u8) red, (u8) green,
1271                                                (u8) blue, mmio);
1272                 }
1273                 i810_read_dac((u8) (regno*4), &r, &g, &b, mmio);
1274                 for (i = 0; i < 4; i++)
1275                         i810_write_dac((u8) (regno*4) + i, r, (u8) green,
1276                                        b, mmio);
1277         } else if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) {
1278                 i810_write_dac((u8) regno, (u8) red, (u8) green,
1279                                (u8) blue, mmio);
1280         }
1281
1282         i810_writeb(PIXCONF1, mmio, temp);
1283
1284         if (regno < 16) {
1285                 switch (info->var.bits_per_pixel) {
1286                 case 16:
1287                         if (info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
1288                                 if (info->var.green.length == 5)
1289                                         ((u32 *)info->pseudo_palette)[regno] =
1290                                                 (regno << 10) | (regno << 5) |
1291                                                 regno;
1292                                 else
1293                                         ((u32 *)info->pseudo_palette)[regno] =
1294                                                 (regno << 11) | (regno << 5) |
1295                                                 regno;
1296                         } else {
1297                                 if (info->var.green.length == 5) {
1298                                         /* RGB 555 */
1299                                         ((u32 *)info->pseudo_palette)[regno] =
1300                                                 ((red & 0xf800) >> 1) |
1301                                                 ((green & 0xf800) >> 6) |
1302                                                 ((blue & 0xf800) >> 11);
1303                                 } else {
1304                                         /* RGB 565 */
1305                                         ((u32 *)info->pseudo_palette)[regno] =
1306                                                 (red & 0xf800) |
1307                                                 ((green & 0xf800) >> 5) |
1308                                                 ((blue & 0xf800) >> 11);
1309                                 }
1310                         }
1311                         break;
1312                 case 24:        /* RGB 888 */
1313                 case 32:        /* RGBA 8888 */
1314                         if (info->fix.visual == FB_VISUAL_DIRECTCOLOR)
1315                                 ((u32 *)info->pseudo_palette)[regno] =
1316                                         (regno << 16) | (regno << 8) |
1317                                         regno;
1318                         else
1319                                 ((u32 *)info->pseudo_palette)[regno] =
1320                                         ((red & 0xff00) << 8) |
1321                                         (green & 0xff00) |
1322                                         ((blue & 0xff00) >> 8);
1323                         break;
1324                 }
1325         }
1326         return 0;
1327 }
1328
1329 static int i810fb_pan_display(struct fb_var_screeninfo *var,
1330                               struct fb_info *info)
1331 {
1332         struct i810fb_par *par = info->par;
1333         u32 total;
1334
1335         total = var->xoffset * par->depth +
1336                 var->yoffset * info->fix.line_length;
1337         i810fb_load_front(total, info);
1338
1339         return 0;
1340 }
1341
1342 static int i810fb_blank (int blank_mode, struct fb_info *info)
1343 {
1344         struct i810fb_par *par = info->par;
1345         u8 __iomem *mmio = par->mmio_start_virtual;
1346         int mode = 0, pwr, scr_off = 0;
1347
1348         pwr = i810_readl(PWR_CLKC, mmio);
1349
1350         switch (blank_mode) {
1351         case FB_BLANK_UNBLANK:
1352                 mode = POWERON;
1353                 pwr |= 1;
1354                 scr_off = ON;
1355                 break;
1356         case FB_BLANK_NORMAL:
1357                 mode = POWERON;
1358                 pwr |= 1;
1359                 scr_off = OFF;
1360                 break;
1361         case FB_BLANK_VSYNC_SUSPEND:
1362                 mode = STANDBY;
1363                 pwr |= 1;
1364                 scr_off = OFF;
1365                 break;
1366         case FB_BLANK_HSYNC_SUSPEND:
1367                 mode = SUSPEND;
1368                 pwr |= 1;
1369                 scr_off = OFF;
1370                 break;
1371         case FB_BLANK_POWERDOWN:
1372                 mode = POWERDOWN;
1373                 pwr &= ~1;
1374                 scr_off = OFF;
1375                 break;
1376         default:
1377                 return -EINVAL;
1378         }
1379
1380         i810_screen_off(mmio, scr_off);
1381         i810_writel(HVSYNC, mmio, mode);
1382         i810_writel(PWR_CLKC, mmio, pwr);
1383
1384         return 0;
1385 }
1386
1387 static int i810fb_set_par(struct fb_info *info)
1388 {
1389         struct i810fb_par *par = info->par;
1390
1391         decode_var(&info->var, par);
1392         i810_load_regs(par);
1393         i810_init_cursor(par);
1394         encode_fix(&info->fix, info);
1395
1396         if (info->var.accel_flags && !(par->dev_flags & LOCKUP)) {
1397                 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN |
1398                 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
1399                 FBINFO_HWACCEL_IMAGEBLIT;
1400                 info->pixmap.scan_align = 2;
1401         } else {
1402                 info->pixmap.scan_align = 1;
1403                 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
1404         }
1405         return 0;
1406 }
1407
1408 static int i810fb_check_var(struct fb_var_screeninfo *var,
1409                             struct fb_info *info)
1410 {
1411         int err;
1412
1413         if (IS_DVT) {
1414                 var->vmode &= ~FB_VMODE_MASK;
1415                 var->vmode |= FB_VMODE_NONINTERLACED;
1416         }
1417         if (var->vmode & FB_VMODE_DOUBLE) {
1418                 var->vmode &= ~FB_VMODE_MASK;
1419                 var->vmode |= FB_VMODE_NONINTERLACED;
1420         }
1421
1422         i810_round_off(var);
1423         if ((err = i810_check_params(var, info)))
1424                 return err;
1425
1426         i810fb_fill_var_timings(var);
1427         set_color_bitfields(var);
1428         return 0;
1429 }
1430
1431 static int i810fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1432 {
1433         struct i810fb_par *par = info->par;
1434         u8 __iomem *mmio = par->mmio_start_virtual;
1435
1436         if (!par->dev_flags & LOCKUP)
1437                 return -ENXIO;
1438
1439         if (cursor->image.width > 64 || cursor->image.height > 64)
1440                 return -ENXIO;
1441
1442         if ((i810_readl(CURBASE, mmio) & 0xf) != par->cursor_heap.physical) {
1443                 i810_init_cursor(par);
1444                 cursor->set |= FB_CUR_SETALL;
1445         }
1446
1447         i810_enable_cursor(mmio, OFF);
1448
1449         if (cursor->set & FB_CUR_SETPOS) {
1450                 u32 tmp;
1451
1452                 tmp = (cursor->image.dx - info->var.xoffset) & 0xffff;
1453                 tmp |= (cursor->image.dy - info->var.yoffset) << 16;
1454                 i810_writel(CURPOS, mmio, tmp);
1455         }
1456
1457         if (cursor->set & FB_CUR_SETSIZE)
1458                 i810_reset_cursor_image(par);
1459
1460         if (cursor->set & FB_CUR_SETCMAP)
1461                 i810_load_cursor_colors(cursor->image.fg_color,
1462                                         cursor->image.bg_color,
1463                                         info);
1464
1465         if (cursor->set & (FB_CUR_SETSHAPE | FB_CUR_SETIMAGE)) {
1466                 int size = ((cursor->image.width + 7) >> 3) *
1467                         cursor->image.height;
1468                 int i;
1469                 u8 *data = kmalloc(64 * 8, GFP_KERNEL);
1470
1471                 if (data == NULL)
1472                         return -ENOMEM;
1473
1474                 switch (cursor->rop) {
1475                 case ROP_XOR:
1476                         for (i = 0; i < size; i++)
1477                                 data[i] = cursor->image.data[i] ^ cursor->mask[i];
1478                         break;
1479                 case ROP_COPY:
1480                 default:
1481                         for (i = 0; i < size; i++)
1482                                 data[i] = cursor->image.data[i] & cursor->mask[i];
1483                         break;
1484                 }
1485
1486                 i810_load_cursor_image(cursor->image.width,
1487                                        cursor->image.height, data,
1488                                        par);
1489                 kfree(data);
1490         }
1491
1492         if (cursor->enable)
1493                 i810_enable_cursor(mmio, ON);
1494
1495         return 0;
1496 }
1497
1498 static struct fb_ops i810fb_ops __devinitdata = {
1499         .owner =             THIS_MODULE,
1500         .fb_open =           i810fb_open,
1501         .fb_release =        i810fb_release,
1502         .fb_check_var =      i810fb_check_var,
1503         .fb_set_par =        i810fb_set_par,
1504         .fb_setcolreg =      i810fb_setcolreg,
1505         .fb_blank =          i810fb_blank,
1506         .fb_pan_display =    i810fb_pan_display,
1507         .fb_fillrect =       i810fb_fillrect,
1508         .fb_copyarea =       i810fb_copyarea,
1509         .fb_imageblit =      i810fb_imageblit,
1510         .fb_cursor =         i810fb_cursor,
1511         .fb_sync =           i810fb_sync,
1512 };
1513
1514 /***********************************************************************
1515  *                         Power Management                            *
1516  ***********************************************************************/
1517 static int i810fb_suspend(struct pci_dev *dev, pm_message_t state)
1518 {
1519         struct fb_info *info = pci_get_drvdata(dev);
1520         struct i810fb_par *par = info->par;
1521
1522         par->cur_state = state.event;
1523
1524         if (state.event == PM_EVENT_FREEZE) {
1525                 dev->dev.power.power_state = state;
1526                 return 0;
1527         }
1528
1529         acquire_console_sem();
1530         fb_set_suspend(info, 1);
1531
1532         if (info->fbops->fb_sync)
1533                 info->fbops->fb_sync(info);
1534
1535         i810fb_blank(FB_BLANK_POWERDOWN, info);
1536         agp_unbind_memory(par->i810_gtt.i810_fb_memory);
1537         agp_unbind_memory(par->i810_gtt.i810_cursor_memory);
1538
1539         pci_save_state(dev);
1540         pci_disable_device(dev);
1541         pci_set_power_state(dev, pci_choose_state(dev, state));
1542         release_console_sem();
1543
1544         return 0;
1545 }
1546
1547 static int i810fb_resume(struct pci_dev *dev)
1548 {
1549         struct fb_info *info = pci_get_drvdata(dev);
1550         struct i810fb_par *par = info->par;
1551         int cur_state = par->cur_state;
1552
1553         par->cur_state = PM_EVENT_ON;
1554
1555         if (cur_state == PM_EVENT_FREEZE) {
1556                 pci_set_power_state(dev, PCI_D0);
1557                 return 0;
1558         }
1559
1560         acquire_console_sem();
1561         pci_set_power_state(dev, PCI_D0);
1562         pci_restore_state(dev);
1563         pci_enable_device(dev);
1564         pci_set_master(dev);
1565         agp_bind_memory(par->i810_gtt.i810_fb_memory,
1566                         par->fb.offset);
1567         agp_bind_memory(par->i810_gtt.i810_cursor_memory,
1568                         par->cursor_heap.offset);
1569         i810fb_set_par(info);
1570         fb_set_suspend (info, 0);
1571         info->fbops->fb_blank(VESA_NO_BLANKING, info);
1572         release_console_sem();
1573         return 0;
1574 }
1575 /***********************************************************************
1576  *                  AGP resource allocation                            *
1577  ***********************************************************************/
1578
1579 static void __devinit i810_fix_pointers(struct i810fb_par *par)
1580 {
1581         par->fb.physical = par->aperture.physical+(par->fb.offset << 12);
1582         par->fb.virtual = par->aperture.virtual+(par->fb.offset << 12);
1583         par->iring.physical = par->aperture.physical +
1584                 (par->iring.offset << 12);
1585         par->iring.virtual = par->aperture.virtual +
1586                 (par->iring.offset << 12);
1587         par->cursor_heap.virtual = par->aperture.virtual+
1588                 (par->cursor_heap.offset << 12);
1589 }
1590
1591 static void __devinit i810_fix_offsets(struct i810fb_par *par)
1592 {
1593         if (vram + 1 > par->aperture.size >> 20)
1594                 vram = (par->aperture.size >> 20) - 1;
1595         if (v_offset_default > (par->aperture.size >> 20))
1596                 v_offset_default = (par->aperture.size >> 20);
1597         if (vram + v_offset_default + 1 > par->aperture.size >> 20)
1598                 v_offset_default = (par->aperture.size >> 20) - (vram + 1);
1599
1600         par->fb.size = vram << 20;
1601         par->fb.offset = v_offset_default << 20;
1602         par->fb.offset >>= 12;
1603
1604         par->iring.offset = par->fb.offset + (par->fb.size >> 12);
1605         par->iring.size = RINGBUFFER_SIZE;
1606
1607         par->cursor_heap.offset = par->iring.offset + (RINGBUFFER_SIZE >> 12);
1608         par->cursor_heap.size = 4096;
1609 }
1610
1611 static int __devinit i810_alloc_agp_mem(struct fb_info *info)
1612 {
1613         struct i810fb_par *par = info->par;
1614         int size;
1615         struct agp_bridge_data *bridge;
1616
1617         i810_fix_offsets(par);
1618         size = par->fb.size + par->iring.size;
1619
1620         if (!(bridge = agp_backend_acquire(par->dev))) {
1621                 printk("i810fb_alloc_fbmem: cannot acquire agpgart\n");
1622                 return -ENODEV;
1623         }
1624         if (!(par->i810_gtt.i810_fb_memory =
1625               agp_allocate_memory(bridge, size >> 12, AGP_NORMAL_MEMORY))) {
1626                 printk("i810fb_alloc_fbmem: can't allocate framebuffer "
1627                        "memory\n");
1628                 agp_backend_release(bridge);
1629                 return -ENOMEM;
1630         }
1631         if (agp_bind_memory(par->i810_gtt.i810_fb_memory,
1632                             par->fb.offset)) {
1633                 printk("i810fb_alloc_fbmem: can't bind framebuffer memory\n");
1634                 agp_backend_release(bridge);
1635                 return -EBUSY;
1636         }
1637
1638         if (!(par->i810_gtt.i810_cursor_memory =
1639               agp_allocate_memory(bridge, par->cursor_heap.size >> 12,
1640                                   AGP_PHYSICAL_MEMORY))) {
1641                 printk("i810fb_alloc_cursormem:  can't allocate"
1642                        "cursor memory\n");
1643                 agp_backend_release(bridge);
1644                 return -ENOMEM;
1645         }
1646         if (agp_bind_memory(par->i810_gtt.i810_cursor_memory,
1647                             par->cursor_heap.offset)) {
1648                 printk("i810fb_alloc_cursormem: cannot bind cursor memory\n");
1649                 agp_backend_release(bridge);
1650                 return -EBUSY;
1651         }
1652
1653         par->cursor_heap.physical = par->i810_gtt.i810_cursor_memory->physical;
1654
1655         i810_fix_pointers(par);
1656
1657         agp_backend_release(bridge);
1658
1659         return 0;
1660 }
1661
1662 /***************************************************************
1663  *                    Initialization                           *
1664  ***************************************************************/
1665
1666 /**
1667  * i810_init_monspecs
1668  * @info: pointer to device specific info structure
1669  *
1670  * DESCRIPTION:
1671  * Sets the the user monitor's horizontal and vertical
1672  * frequency limits
1673  */
1674 static void __devinit i810_init_monspecs(struct fb_info *info)
1675 {
1676         if (!hsync1)
1677                 hsync1 = HFMIN;
1678         if (!hsync2)
1679                 hsync2 = HFMAX;
1680         if (!info->monspecs.hfmax)
1681                 info->monspecs.hfmax = hsync2;
1682         if (!info->monspecs.hfmin)
1683                 info->monspecs.hfmin = hsync1;
1684         if (hsync2 < hsync1)
1685                 info->monspecs.hfmin = hsync2;
1686
1687         if (!vsync1)
1688                 vsync1 = VFMIN;
1689         if (!vsync2)
1690                 vsync2 = VFMAX;
1691         if (IS_DVT && vsync1 < 60)
1692                 vsync1 = 60;
1693         if (!info->monspecs.vfmax)
1694                 info->monspecs.vfmax = vsync2;
1695         if (!info->monspecs.vfmin)
1696                 info->monspecs.vfmin = vsync1;
1697         if (vsync2 < vsync1)
1698                 info->monspecs.vfmin = vsync2;
1699 }
1700
1701 /**
1702  * i810_init_defaults - initializes default values to use
1703  * @par: pointer to i810fb_par structure
1704  * @info: pointer to current fb_info structure
1705  */
1706 static void __devinit i810_init_defaults(struct i810fb_par *par,
1707                                       struct fb_info *info)
1708 {
1709         if (voffset)
1710                 v_offset_default = voffset;
1711         else if (par->aperture.size > 32 * 1024 * 1024)
1712                 v_offset_default = 16;
1713         else
1714                 v_offset_default = 8;
1715
1716         if (!vram)
1717                 vram = 1;
1718
1719         if (accel)
1720                 par->dev_flags |= HAS_ACCELERATION;
1721
1722         if (sync)
1723                 par->dev_flags |= ALWAYS_SYNC;
1724
1725         if (bpp < 8)
1726                 bpp = 8;
1727
1728         par->i810fb_ops = i810fb_ops;
1729
1730         if (xres)
1731                 info->var.xres = xres;
1732         else
1733                 info->var.xres = 640;
1734
1735         if (yres)
1736                 info->var.yres = yres;
1737         else
1738                 info->var.yres = 480;
1739
1740         if (!vyres)
1741                 vyres = (vram << 20)/(info->var.xres*bpp >> 3);
1742
1743         info->var.yres_virtual = vyres;
1744         info->var.bits_per_pixel = bpp;
1745
1746         if (dcolor)
1747                 info->var.nonstd = 1;
1748
1749         if (par->dev_flags & HAS_ACCELERATION)
1750                 info->var.accel_flags = 1;
1751
1752         i810_init_monspecs(info);
1753 }
1754
1755 /**
1756  * i810_init_device - initialize device
1757  * @par: pointer to i810fb_par structure
1758  */
1759 static void __devinit i810_init_device(struct i810fb_par *par)
1760 {
1761         u8 reg;
1762         u8 __iomem *mmio = par->mmio_start_virtual;
1763
1764         if (mtrr) set_mtrr(par);
1765
1766         i810_init_cursor(par);
1767
1768         /* mvo: enable external vga-connector (for laptops) */
1769         if (extvga) {
1770                 i810_writel(HVSYNC, mmio, 0);
1771                 i810_writel(PWR_CLKC, mmio, 3);
1772         }
1773
1774         pci_read_config_byte(par->dev, 0x50, &reg);
1775         reg &= FREQ_MASK;
1776         par->mem_freq = (reg) ? 133 : 100;
1777
1778 }
1779
1780 static int __devinit
1781 i810_allocate_pci_resource(struct i810fb_par *par,
1782                            const struct pci_device_id *entry)
1783 {
1784         int err;
1785
1786         if ((err = pci_enable_device(par->dev))) {
1787                 printk("i810fb_init: cannot enable device\n");
1788                 return err;
1789         }
1790         par->res_flags |= PCI_DEVICE_ENABLED;
1791
1792         if (pci_resource_len(par->dev, 0) > 512 * 1024) {
1793                 par->aperture.physical = pci_resource_start(par->dev, 0);
1794                 par->aperture.size = pci_resource_len(par->dev, 0);
1795                 par->mmio_start_phys = pci_resource_start(par->dev, 1);
1796         } else {
1797                 par->aperture.physical = pci_resource_start(par->dev, 1);
1798                 par->aperture.size = pci_resource_len(par->dev, 1);
1799                 par->mmio_start_phys = pci_resource_start(par->dev, 0);
1800         }
1801         if (!par->aperture.size) {
1802                 printk("i810fb_init: device is disabled\n");
1803                 return -ENOMEM;
1804         }
1805
1806         if (!request_mem_region(par->aperture.physical,
1807                                 par->aperture.size,
1808                                 i810_pci_list[entry->driver_data])) {
1809                 printk("i810fb_init: cannot request framebuffer region\n");
1810                 return -ENODEV;
1811         }
1812         par->res_flags |= FRAMEBUFFER_REQ;
1813
1814         par->aperture.virtual = ioremap_nocache(par->aperture.physical,
1815                                         par->aperture.size);
1816         if (!par->aperture.virtual) {
1817                 printk("i810fb_init: cannot remap framebuffer region\n");
1818                 return -ENODEV;
1819         }
1820
1821         if (!request_mem_region(par->mmio_start_phys,
1822                                 MMIO_SIZE,
1823                                 i810_pci_list[entry->driver_data])) {
1824                 printk("i810fb_init: cannot request mmio region\n");
1825                 return -ENODEV;
1826         }
1827         par->res_flags |= MMIO_REQ;
1828
1829         par->mmio_start_virtual = ioremap_nocache(par->mmio_start_phys,
1830                                                   MMIO_SIZE);
1831         if (!par->mmio_start_virtual) {
1832                 printk("i810fb_init: cannot remap mmio region\n");
1833                 return -ENODEV;
1834         }
1835
1836         return 0;
1837 }
1838
1839 static void __devinit i810fb_find_init_mode(struct fb_info *info)
1840 {
1841         struct fb_videomode mode;
1842         struct fb_var_screeninfo var;
1843         struct fb_monspecs *specs = &info->monspecs;
1844         int found = 0;
1845 #ifdef CONFIG_FB_I810_I2C
1846         int i;
1847         int err;
1848         struct i810fb_par *par = info->par;
1849 #endif
1850
1851         INIT_LIST_HEAD(&info->modelist);
1852         memset(&mode, 0, sizeof(struct fb_videomode));
1853         var = info->var;
1854 #ifdef CONFIG_FB_I810_I2C
1855         i810_create_i2c_busses(par);
1856
1857         for (i = 0; i < 4; i++) {
1858                 err = i810_probe_i2c_connector(info, &par->edid, i+1);
1859                 if (!err)
1860                         break;
1861         }
1862
1863         if (!err)
1864                 printk("i810fb_init_pci: DDC probe successful\n");
1865
1866         fb_edid_to_monspecs(par->edid, specs);
1867
1868         if (specs->modedb == NULL)
1869                 printk("i810fb_init_pci: Unable to get Mode Database\n");
1870
1871         fb_videomode_to_modelist(specs->modedb, specs->modedb_len,
1872                                  &info->modelist);
1873         if (specs->modedb != NULL) {
1874                 struct fb_videomode *m;
1875
1876                 if (xres && yres) {
1877                         if ((m = fb_find_best_mode(&var, &info->modelist))) {
1878                                 mode = *m;
1879                                 found  = 1;
1880                         }
1881                 }
1882
1883                 if (!found) {
1884                         m = fb_find_best_display(&info->monspecs, &info->modelist);
1885                         mode = *m;
1886                         found = 1;
1887                 }
1888
1889                 fb_videomode_to_var(&var, &mode);
1890         }
1891 #endif
1892         if (mode_option)
1893                 fb_find_mode(&var, info, mode_option, specs->modedb,
1894                              specs->modedb_len, (found) ? &mode : NULL,
1895                              info->var.bits_per_pixel);
1896
1897         info->var = var;
1898         fb_destroy_modedb(specs->modedb);
1899         specs->modedb = NULL;
1900 }
1901
1902 #ifndef MODULE
1903 static int __devinit i810fb_setup(char *options)
1904 {
1905         char *this_opt, *suffix = NULL;
1906
1907         if (!options || !*options)
1908                 return 0;
1909
1910         while ((this_opt = strsep(&options, ",")) != NULL) {
1911                 if (!strncmp(this_opt, "mtrr", 4))
1912                         mtrr = 1;
1913                 else if (!strncmp(this_opt, "accel", 5))
1914                         accel = 1;
1915                 else if (!strncmp(this_opt, "extvga", 6))
1916                         extvga = 1;
1917                 else if (!strncmp(this_opt, "sync", 4))
1918                         sync = 1;
1919                 else if (!strncmp(this_opt, "vram:", 5))
1920                         vram = (simple_strtoul(this_opt+5, NULL, 0));
1921                 else if (!strncmp(this_opt, "voffset:", 8))
1922                         voffset = (simple_strtoul(this_opt+8, NULL, 0));
1923                 else if (!strncmp(this_opt, "xres:", 5))
1924                         xres = simple_strtoul(this_opt+5, NULL, 0);
1925                 else if (!strncmp(this_opt, "yres:", 5))
1926                         yres = simple_strtoul(this_opt+5, NULL, 0);
1927                 else if (!strncmp(this_opt, "vyres:", 6))
1928                         vyres = simple_strtoul(this_opt+6, NULL, 0);
1929                 else if (!strncmp(this_opt, "bpp:", 4))
1930                         bpp = simple_strtoul(this_opt+4, NULL, 0);
1931                 else if (!strncmp(this_opt, "hsync1:", 7)) {
1932                         hsync1 = simple_strtoul(this_opt+7, &suffix, 0);
1933                         if (strncmp(suffix, "H", 1))
1934                                 hsync1 *= 1000;
1935                 } else if (!strncmp(this_opt, "hsync2:", 7)) {
1936                         hsync2 = simple_strtoul(this_opt+7, &suffix, 0);
1937                         if (strncmp(suffix, "H", 1))
1938                                 hsync2 *= 1000;
1939                 } else if (!strncmp(this_opt, "vsync1:", 7))
1940                         vsync1 = simple_strtoul(this_opt+7, NULL, 0);
1941                 else if (!strncmp(this_opt, "vsync2:", 7))
1942                         vsync2 = simple_strtoul(this_opt+7, NULL, 0);
1943                 else if (!strncmp(this_opt, "dcolor", 6))
1944                         dcolor = 1;
1945                 else
1946                         mode_option = this_opt;
1947         }
1948         return 0;
1949 }
1950 #endif
1951
1952 static int __devinit i810fb_init_pci (struct pci_dev *dev,
1953                                    const struct pci_device_id *entry)
1954 {
1955         struct fb_info    *info;
1956         struct i810fb_par *par = NULL;
1957         struct fb_videomode mode;
1958         int i, err = -1, vfreq, hfreq, pixclock;
1959
1960         i = 0;
1961
1962         info = framebuffer_alloc(sizeof(struct i810fb_par), &dev->dev);
1963         if (!info)
1964                 return -ENOMEM;
1965
1966         par = info->par;
1967         par->dev = dev;
1968
1969         if (!(info->pixmap.addr = kmalloc(8*1024, GFP_KERNEL))) {
1970                 i810fb_release_resource(info, par);
1971                 return -ENOMEM;
1972         }
1973         memset(info->pixmap.addr, 0, 8*1024);
1974         info->pixmap.size = 8*1024;
1975         info->pixmap.buf_align = 8;
1976         info->pixmap.access_align = 32;
1977         info->pixmap.flags = FB_PIXMAP_SYSTEM;
1978
1979         if ((err = i810_allocate_pci_resource(par, entry))) {
1980                 i810fb_release_resource(info, par);
1981                 return err;
1982         }
1983
1984         i810_init_defaults(par, info);
1985
1986         if ((err = i810_alloc_agp_mem(info))) {
1987                 i810fb_release_resource(info, par);
1988                 return err;
1989         }
1990
1991         i810_init_device(par);
1992
1993         info->screen_base = par->fb.virtual;
1994         info->fbops = &par->i810fb_ops;
1995         info->pseudo_palette = par->pseudo_palette;
1996         fb_alloc_cmap(&info->cmap, 256, 0);
1997         i810fb_find_init_mode(info);
1998
1999         if ((err = info->fbops->fb_check_var(&info->var, info))) {
2000                 i810fb_release_resource(info, par);
2001                 return err;
2002         }
2003
2004         fb_var_to_videomode(&mode, &info->var);
2005         fb_add_videomode(&mode, &info->modelist);
2006         encode_fix(&info->fix, info);
2007
2008         i810fb_init_ringbuffer(info);
2009         err = register_framebuffer(info);
2010
2011         if (err < 0) {
2012                 i810fb_release_resource(info, par);
2013                 printk("i810fb_init: cannot register framebuffer device\n");
2014                 return err;
2015         }
2016
2017         pci_set_drvdata(dev, info);
2018         pixclock = 1000000000/(info->var.pixclock);
2019         pixclock *= 1000;
2020         hfreq = pixclock/(info->var.xres + info->var.left_margin +
2021                           info->var.hsync_len + info->var.right_margin);
2022         vfreq = hfreq/(info->var.yres + info->var.upper_margin +
2023                        info->var.vsync_len + info->var.lower_margin);
2024
2025         printk("I810FB: fb%d         : %s v%d.%d.%d%s\n"
2026                "I810FB: Video RAM   : %dK\n"
2027                "I810FB: Monitor     : H: %d-%d KHz V: %d-%d Hz\n"
2028                "I810FB: Mode        : %dx%d-%dbpp@%dHz\n",
2029                info->node,
2030                i810_pci_list[entry->driver_data],
2031                VERSION_MAJOR, VERSION_MINOR, VERSION_TEENIE, BRANCH_VERSION,
2032                (int) par->fb.size>>10, info->monspecs.hfmin/1000,
2033                info->monspecs.hfmax/1000, info->monspecs.vfmin,
2034                info->monspecs.vfmax, info->var.xres,
2035                info->var.yres, info->var.bits_per_pixel, vfreq);
2036         return 0;
2037 }
2038
2039 /***************************************************************
2040  *                     De-initialization                        *
2041  ***************************************************************/
2042
2043 static void i810fb_release_resource(struct fb_info *info,
2044                                     struct i810fb_par *par)
2045 {
2046         struct gtt_data *gtt = &par->i810_gtt;
2047         unset_mtrr(par);
2048
2049         i810_delete_i2c_busses(par);
2050
2051         if (par->i810_gtt.i810_cursor_memory)
2052                 agp_free_memory(gtt->i810_cursor_memory);
2053         if (par->i810_gtt.i810_fb_memory)
2054                 agp_free_memory(gtt->i810_fb_memory);
2055
2056         if (par->mmio_start_virtual)
2057                 iounmap(par->mmio_start_virtual);
2058         if (par->aperture.virtual)
2059                 iounmap(par->aperture.virtual);
2060         kfree(par->edid);
2061         if (par->res_flags & FRAMEBUFFER_REQ)
2062                 release_mem_region(par->aperture.physical,
2063                                    par->aperture.size);
2064         if (par->res_flags & MMIO_REQ)
2065                 release_mem_region(par->mmio_start_phys, MMIO_SIZE);
2066
2067         if (par->res_flags & PCI_DEVICE_ENABLED)
2068                 pci_disable_device(par->dev);
2069
2070         framebuffer_release(info);
2071
2072 }
2073
2074 static void __exit i810fb_remove_pci(struct pci_dev *dev)
2075 {
2076         struct fb_info *info = pci_get_drvdata(dev);
2077         struct i810fb_par *par = info->par;
2078
2079         unregister_framebuffer(info);
2080         i810fb_release_resource(info, par);
2081         pci_set_drvdata(dev, NULL);
2082         printk("cleanup_module:  unloaded i810 framebuffer device\n");
2083 }
2084
2085 #ifndef MODULE
2086 static int __devinit i810fb_init(void)
2087 {
2088         char *option = NULL;
2089
2090         if (fb_get_options("i810fb", &option))
2091                 return -ENODEV;
2092         i810fb_setup(option);
2093
2094         return pci_register_driver(&i810fb_driver);
2095 }
2096 #endif
2097
2098 /*********************************************************************
2099  *                          Modularization                           *
2100  *********************************************************************/
2101
2102 #ifdef MODULE
2103
2104 static int __devinit i810fb_init(void)
2105 {
2106         hsync1 *= 1000;
2107         hsync2 *= 1000;
2108
2109         return pci_register_driver(&i810fb_driver);
2110 }
2111
2112 module_param(vram, int, 0);
2113 MODULE_PARM_DESC(vram, "System RAM to allocate to framebuffer in MiB"
2114                  " (default=4)");
2115 module_param(voffset, int, 0);
2116 MODULE_PARM_DESC(voffset, "at what offset to place start of framebuffer "
2117                  "memory (0 to maximum aperture size), in MiB (default = 48)");
2118 module_param(bpp, int, 0);
2119 MODULE_PARM_DESC(bpp, "Color depth for display in bits per pixel"
2120                  " (default = 8)");
2121 module_param(xres, int, 0);
2122 MODULE_PARM_DESC(xres, "Horizontal resolution in pixels (default = 640)");
2123 module_param(yres, int, 0);
2124 MODULE_PARM_DESC(yres, "Vertical resolution in scanlines (default = 480)");
2125 module_param(vyres,int, 0);
2126 MODULE_PARM_DESC(vyres, "Virtual vertical resolution in scanlines"
2127                  " (default = 480)");
2128 module_param(hsync1, int, 0);
2129 MODULE_PARM_DESC(hsync1, "Minimum horizontal frequency of monitor in KHz"
2130                  " (default = 29)");
2131 module_param(hsync2, int, 0);
2132 MODULE_PARM_DESC(hsync2, "Maximum horizontal frequency of monitor in KHz"
2133                  " (default = 30)");
2134 module_param(vsync1, int, 0);
2135 MODULE_PARM_DESC(vsync1, "Minimum vertical frequency of monitor in Hz"
2136                  " (default = 50)");
2137 module_param(vsync2, int, 0);
2138 MODULE_PARM_DESC(vsync2, "Maximum vertical frequency of monitor in Hz"
2139                  " (default = 60)");
2140 module_param(accel, bool, 0);
2141 MODULE_PARM_DESC(accel, "Use Acceleration (BLIT) engine (default = 0)");
2142 module_param(mtrr, bool, 0);
2143 MODULE_PARM_DESC(mtrr, "Use MTRR (default = 0)");
2144 module_param(extvga, bool, 0);
2145 MODULE_PARM_DESC(extvga, "Enable external VGA connector (default = 0)");
2146 module_param(sync, bool, 0);
2147 MODULE_PARM_DESC(sync, "wait for accel engine to finish drawing"
2148                  " (default = 0)");
2149 module_param(dcolor, bool, 0);
2150 MODULE_PARM_DESC(dcolor, "use DirectColor visuals"
2151                  " (default = 0 = TrueColor)");
2152 module_param(mode_option, charp, 0);
2153 MODULE_PARM_DESC(mode_option, "Specify initial video mode");
2154
2155 MODULE_AUTHOR("Tony A. Daplas");
2156 MODULE_DESCRIPTION("Framebuffer device for the Intel 810/815 and"
2157                    " compatible cards");
2158 MODULE_LICENSE("GPL");
2159
2160 static void __exit i810fb_exit(void)
2161 {
2162         pci_unregister_driver(&i810fb_driver);
2163 }
2164 module_exit(i810fb_exit);
2165
2166 #endif /* MODULE */
2167
2168 module_init(i810fb_init);