2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License
8 * Version 2 or later at the following locations:
10 * http://www.opensource.org/licenses/gpl-license.html
11 * http://www.gnu.org/copyleft/gpl.html
15 * @defgroup Framebuffer Framebuffer Driver for SDC and ADC.
21 * @brief MXC Frame buffer driver for SDC
23 * @ingroup Framebuffer
29 #include <linux/clk.h>
30 #include <linux/console.h>
31 #include <linux/delay.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/errno.h>
35 #include <linux/fsl_devices.h>
36 #include <linux/init.h>
37 #include <linux/interrupt.h>
39 #include <linux/ioport.h>
40 #include <linux/ipu.h>
41 #include <linux/ipu-v3.h>
42 #include <linux/kernel.h>
43 #include <linux/module.h>
44 #include <linux/mxcfb.h>
45 #include <linux/of_device.h>
46 #include <linux/platform_device.h>
47 #include <linux/sched.h>
48 #include <linux/slab.h>
49 #include <linux/string.h>
50 #include <linux/uaccess.h>
52 #include "mxc_dispdrv.h"
57 #define MXCFB_NAME "mxc_sdc_fb"
59 /* Display port number */
60 #define MXCFB_PORT_NUM 2
62 * Structure containing the MXC specific framebuffer information.
77 dma_addr_t alpha_phy_addr0;
78 dma_addr_t alpha_phy_addr1;
79 void *alpha_virt_addr0;
80 void *alpha_virt_addr1;
81 uint32_t alpha_mem_len;
83 uint32_t ipu_ch_nf_irq;
84 uint32_t ipu_alp_ch_irq;
86 uint32_t cur_ipu_alpha_buf;
88 u32 pseudo_palette[16];
91 struct completion flip_complete;
92 struct completion alpha_flip_complete;
93 struct completion vsync_complete;
96 struct fb_info *ovfbi;
98 struct mxc_dispdrv_handle *dispdrv;
100 struct fb_var_screeninfo cur_var;
106 struct fb_bitfield red;
107 struct fb_bitfield green;
108 struct fb_bitfield blue;
109 struct fb_bitfield transp;
112 static const struct mxcfb_pfmt mxcfb_pfmts[] = {
113 /* pixel bpp red green blue transp */
114 {IPU_PIX_FMT_RGB565, 16, {11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0} },
115 {IPU_PIX_FMT_RGB24, 24, { 0, 8, 0}, { 8, 8, 0}, {16, 8, 0}, { 0, 0, 0} },
116 {IPU_PIX_FMT_BGR24, 24, {16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0} },
117 {IPU_PIX_FMT_RGB32, 32, { 0, 8, 0}, { 8, 8, 0}, {16, 8, 0}, {24, 8, 0} },
118 {IPU_PIX_FMT_BGR32, 32, {16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, {24, 8, 0} },
119 {IPU_PIX_FMT_ABGR32, 32, {24, 8, 0}, {16, 8, 0}, { 8, 8, 0}, { 0, 8, 0} },
122 struct mxcfb_alloc_list {
123 struct list_head list;
136 static bool g_dp_in_use[2];
137 LIST_HEAD(fb_alloc_list);
139 /* Return default standard(RGB) pixel format */
140 static uint32_t bpp_to_pixfmt(int bpp)
146 pixfmt = IPU_PIX_FMT_BGR24;
149 pixfmt = IPU_PIX_FMT_BGR32;
152 pixfmt = IPU_PIX_FMT_RGB565;
158 static inline int bitfield_is_equal(struct fb_bitfield f1,
159 struct fb_bitfield f2)
161 return !memcmp(&f1, &f2, sizeof(f1));
164 static int pixfmt_to_var(uint32_t pixfmt, struct fb_var_screeninfo *var)
168 for (i = 0; i < ARRAY_SIZE(mxcfb_pfmts); i++) {
169 if (pixfmt == mxcfb_pfmts[i].fb_pix_fmt) {
170 var->red = mxcfb_pfmts[i].red;
171 var->green = mxcfb_pfmts[i].green;
172 var->blue = mxcfb_pfmts[i].blue;
173 var->transp = mxcfb_pfmts[i].transp;
174 var->bits_per_pixel = mxcfb_pfmts[i].bpp;
182 static int bpp_to_var(int bpp, struct fb_var_screeninfo *var)
186 pixfmt = bpp_to_pixfmt(bpp);
188 return pixfmt_to_var(pixfmt, var);
193 static int check_var_pixfmt(struct fb_var_screeninfo *var)
197 for (i = 0; i < ARRAY_SIZE(mxcfb_pfmts); i++) {
198 if (bitfield_is_equal(var->red, mxcfb_pfmts[i].red) &&
199 bitfield_is_equal(var->green, mxcfb_pfmts[i].green) &&
200 bitfield_is_equal(var->blue, mxcfb_pfmts[i].blue) &&
201 bitfield_is_equal(var->transp, mxcfb_pfmts[i].transp) &&
202 var->bits_per_pixel == mxcfb_pfmts[i].bpp) {
210 static uint32_t fbi_to_pixfmt(struct fb_info *fbi)
216 return fbi->var.nonstd;
218 for (i = 0; i < ARRAY_SIZE(mxcfb_pfmts); i++) {
219 if (bitfield_is_equal(fbi->var.red, mxcfb_pfmts[i].red) &&
220 bitfield_is_equal(fbi->var.green, mxcfb_pfmts[i].green) &&
221 bitfield_is_equal(fbi->var.blue, mxcfb_pfmts[i].blue) &&
222 bitfield_is_equal(fbi->var.transp, mxcfb_pfmts[i].transp)) {
223 pixfmt = mxcfb_pfmts[i].fb_pix_fmt;
229 dev_err(fbi->device, "cannot get pixel format\n");
234 static struct fb_info *found_registered_fb(ipu_channel_t ipu_ch, int ipu_id)
237 struct mxcfb_info *mxc_fbi;
238 struct fb_info *fbi = NULL;
240 for (i = 0; i < num_registered_fb; i++) {
241 mxc_fbi = registered_fb[i]->par;
243 if ((mxc_fbi->ipu_ch == ipu_ch) &&
244 (mxc_fbi->ipu_id == ipu_id)) {
245 fbi = registered_fb[i];
252 static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id);
253 static irqreturn_t mxcfb_nf_irq_handler(int irq, void *dev_id);
254 static int mxcfb_blank(int blank, struct fb_info *info);
255 static int mxcfb_map_video_memory(struct fb_info *fbi);
256 static int mxcfb_unmap_video_memory(struct fb_info *fbi);
259 * Set fixed framebuffer parameters based on variable settings.
261 * @param info framebuffer information pointer
263 static int mxcfb_set_fix(struct fb_info *info)
265 struct fb_fix_screeninfo *fix = &info->fix;
266 struct fb_var_screeninfo *var = &info->var;
268 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
270 fix->type = FB_TYPE_PACKED_PIXELS;
271 fix->accel = FB_ACCEL_NONE;
272 fix->visual = FB_VISUAL_TRUECOLOR;
280 static int _setup_disp_channel1(struct fb_info *fbi)
282 ipu_channel_params_t params;
283 struct mxcfb_info *mxc_fbi = fbi->par;
285 memset(¶ms, 0, sizeof(params));
287 if (mxc_fbi->ipu_ch == MEM_DC_SYNC) {
288 params.mem_dc_sync.di = mxc_fbi->ipu_di;
289 if (fbi->var.vmode & FB_VMODE_INTERLACED)
290 params.mem_dc_sync.interlaced = true;
291 params.mem_dc_sync.out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
292 params.mem_dc_sync.in_pixel_fmt = fbi_to_pixfmt(fbi);
294 params.mem_dp_bg_sync.di = mxc_fbi->ipu_di;
295 if (fbi->var.vmode & FB_VMODE_INTERLACED)
296 params.mem_dp_bg_sync.interlaced = true;
297 params.mem_dp_bg_sync.out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
298 params.mem_dp_bg_sync.in_pixel_fmt = fbi_to_pixfmt(fbi);
299 if (mxc_fbi->alpha_chan_en)
300 params.mem_dp_bg_sync.alpha_chan_en = true;
302 ipu_init_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch, ¶ms);
307 static int _setup_disp_channel2(struct fb_info *fbi)
310 struct mxcfb_info *mxc_fbi = fbi->par;
313 unsigned int fr_xoff, fr_yoff, fr_w, fr_h;
315 switch (fbi_to_pixfmt(fbi)) {
316 case IPU_PIX_FMT_YUV420P2:
317 case IPU_PIX_FMT_YVU420P:
318 case IPU_PIX_FMT_NV12:
319 case IPU_PIX_FMT_YUV422P:
320 case IPU_PIX_FMT_YVU422P:
321 case IPU_PIX_FMT_YUV420P:
322 case IPU_PIX_FMT_YUV444P:
323 fb_stride = fbi->var.xres_virtual;
326 fb_stride = fbi->fix.line_length;
329 base = fbi->fix.smem_start;
330 fr_xoff = fbi->var.xoffset;
331 fr_w = fbi->var.xres_virtual;
332 if (!(fbi->var.vmode & FB_VMODE_YWRAP)) {
333 dev_dbg(fbi->device, "Y wrap disabled\n");
334 fr_yoff = fbi->var.yoffset % fbi->var.yres;
335 fr_h = fbi->var.yres;
336 base += fbi->fix.line_length * fbi->var.yres *
337 (fbi->var.yoffset / fbi->var.yres);
339 dev_dbg(fbi->device, "Y wrap enabled\n");
340 fr_yoff = fbi->var.yoffset;
341 fr_h = fbi->var.yres_virtual;
343 base += fr_yoff * fb_stride + fr_xoff;
345 mxc_fbi->cur_ipu_buf = 2;
346 init_completion(&mxc_fbi->flip_complete);
348 * We don't need to wait for vsync at the first time
349 * we do pan display after fb is initialized, as IPU will
350 * switch to the newly selected buffer automatically,
351 * so we call complete() for both mxc_fbi->flip_complete
352 * and mxc_fbi->alpha_flip_complete.
354 complete(&mxc_fbi->flip_complete);
355 if (mxc_fbi->alpha_chan_en) {
356 mxc_fbi->cur_ipu_alpha_buf = 1;
357 init_completion(&mxc_fbi->alpha_flip_complete);
358 complete(&mxc_fbi->alpha_flip_complete);
361 retval = ipu_init_channel_buffer(mxc_fbi->ipu,
362 mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
364 fbi->var.xres, fbi->var.yres,
369 fbi->var.accel_flags &
370 FB_ACCEL_DOUBLE_FLAG ? 0 : base,
374 "ipu_init_channel_buffer error %d\n", retval);
378 /* update u/v offset */
379 ipu_update_channel_offset(mxc_fbi->ipu, mxc_fbi->ipu_ch,
389 if (mxc_fbi->alpha_chan_en) {
390 retval = ipu_init_channel_buffer(mxc_fbi->ipu,
394 fbi->var.xres, fbi->var.yres,
397 mxc_fbi->alpha_phy_addr1,
398 mxc_fbi->alpha_phy_addr0,
403 "ipu_init_channel_buffer error %d\n", retval);
411 static bool mxcfb_need_to_set_par(struct fb_info *fbi)
413 struct mxcfb_info *mxc_fbi = fbi->par;
415 if ((fbi->var.activate & FB_ACTIVATE_FORCE) &&
416 (fbi->var.activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW)
420 * Ignore xoffset and yoffset update,
421 * because pan display handles this case.
423 mxc_fbi->cur_var.xoffset = fbi->var.xoffset;
424 mxc_fbi->cur_var.yoffset = fbi->var.yoffset;
426 return !!memcmp(&mxc_fbi->cur_var, &fbi->var,
427 sizeof(struct fb_var_screeninfo));
431 * Set framebuffer parameters and change the operating mode.
433 * @param info framebuffer information pointer
435 static int mxcfb_set_par(struct fb_info *fbi)
438 u32 mem_len, alpha_mem_len;
439 ipu_di_signal_cfg_t sig_cfg;
440 struct mxcfb_info *mxc_fbi = fbi->par;
442 int16_t ov_pos_x = 0, ov_pos_y = 0;
444 struct mxcfb_info *mxc_fbi_fg = NULL;
445 bool ovfbi_enable = false;
447 if (ipu_ch_param_bad_alpha_pos(fbi_to_pixfmt(fbi)) &&
448 mxc_fbi->alpha_chan_en) {
449 dev_err(fbi->device, "Bad pixel format for "
450 "graphics plane fb\n");
455 mxc_fbi_fg = mxc_fbi->ovfbi->par;
457 if (mxc_fbi->ovfbi && mxc_fbi_fg)
458 if (mxc_fbi_fg->next_blank == FB_BLANK_UNBLANK)
461 if (!mxcfb_need_to_set_par(fbi))
464 dev_dbg(fbi->device, "Reconfiguring framebuffer\n");
466 if (fbi->var.xres == 0 || fbi->var.yres == 0)
470 ov_pos_ret = ipu_disp_get_window_pos(
471 mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch,
472 &ov_pos_x, &ov_pos_y);
474 dev_err(fbi->device, "Get overlay pos failed, dispdrv:%s.\n",
475 mxc_fbi->dispdrv->drv->name);
477 ipu_clear_irq(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch_irq);
478 ipu_disable_irq(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch_irq);
479 ipu_clear_irq(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch_nf_irq);
480 ipu_disable_irq(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch_nf_irq);
481 ipu_disable_channel(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch, true);
482 ipu_uninit_channel(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch);
485 ipu_clear_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq);
486 ipu_disable_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq);
487 ipu_clear_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_nf_irq);
488 ipu_disable_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_nf_irq);
489 ipu_disable_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch, true);
490 ipu_uninit_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch);
493 * Disable IPU hsp clock if it is enabled for an
494 * additional time in ipu common driver.
496 if (mxc_fbi->first_set_par && mxc_fbi->late_init)
497 ipu_disable_hsp_clk(mxc_fbi->ipu);
501 mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
502 if (!fbi->fix.smem_start || (mem_len > fbi->fix.smem_len)) {
503 if (fbi->fix.smem_start)
504 mxcfb_unmap_video_memory(fbi);
506 if (mxcfb_map_video_memory(fbi) < 0)
510 if (mxc_fbi->first_set_par) {
512 * Clear the screen in case uboot fb pixel format is not
513 * the same to kernel fb pixel format.
515 if (mxc_fbi->late_init)
516 memset(fbi->screen_base, 0, fbi->fix.smem_len);
518 mxc_fbi->first_set_par = false;
521 if (mxc_fbi->alpha_chan_en) {
522 alpha_mem_len = fbi->var.xres * fbi->var.yres;
523 if ((!mxc_fbi->alpha_phy_addr0 && !mxc_fbi->alpha_phy_addr1) ||
524 (alpha_mem_len > mxc_fbi->alpha_mem_len)) {
525 if (mxc_fbi->alpha_phy_addr0)
526 dma_free_coherent(fbi->device,
527 mxc_fbi->alpha_mem_len,
528 mxc_fbi->alpha_virt_addr0,
529 mxc_fbi->alpha_phy_addr0);
530 if (mxc_fbi->alpha_phy_addr1)
531 dma_free_coherent(fbi->device,
532 mxc_fbi->alpha_mem_len,
533 mxc_fbi->alpha_virt_addr1,
534 mxc_fbi->alpha_phy_addr1);
536 mxc_fbi->alpha_virt_addr0 =
537 dma_alloc_coherent(fbi->device,
539 &mxc_fbi->alpha_phy_addr0,
540 GFP_DMA | GFP_KERNEL);
542 mxc_fbi->alpha_virt_addr1 =
543 dma_alloc_coherent(fbi->device,
545 &mxc_fbi->alpha_phy_addr1,
546 GFP_DMA | GFP_KERNEL);
547 if (mxc_fbi->alpha_virt_addr0 == NULL ||
548 mxc_fbi->alpha_virt_addr1 == NULL) {
549 dev_err(fbi->device, "mxcfb: dma alloc for"
550 " alpha buffer failed.\n");
551 if (mxc_fbi->alpha_virt_addr0)
552 dma_free_coherent(fbi->device,
553 mxc_fbi->alpha_mem_len,
554 mxc_fbi->alpha_virt_addr0,
555 mxc_fbi->alpha_phy_addr0);
556 if (mxc_fbi->alpha_virt_addr1)
557 dma_free_coherent(fbi->device,
558 mxc_fbi->alpha_mem_len,
559 mxc_fbi->alpha_virt_addr1,
560 mxc_fbi->alpha_phy_addr1);
563 mxc_fbi->alpha_mem_len = alpha_mem_len;
567 if (mxc_fbi->next_blank != FB_BLANK_UNBLANK)
570 if (mxc_fbi->dispdrv && mxc_fbi->dispdrv->drv->setup) {
571 retval = mxc_fbi->dispdrv->drv->setup(mxc_fbi->dispdrv, fbi);
573 dev_err(fbi->device, "setup error, dispdrv:%s.\n",
574 mxc_fbi->dispdrv->drv->name);
579 _setup_disp_channel1(fbi);
581 _setup_disp_channel1(mxc_fbi->ovfbi);
583 if (!mxc_fbi->overlay) {
584 uint32_t out_pixel_fmt;
586 memset(&sig_cfg, 0, sizeof(sig_cfg));
587 if (fbi->var.vmode & FB_VMODE_INTERLACED)
588 sig_cfg.interlaced = true;
589 out_pixel_fmt = mxc_fbi->ipu_di_pix_fmt;
590 if (fbi->var.vmode & FB_VMODE_ODD_FLD_FIRST) /* PAL */
591 sig_cfg.odd_field_first = true;
592 if (mxc_fbi->ipu_int_clk)
593 sig_cfg.int_clk = true;
594 if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
595 sig_cfg.Hsync_pol = true;
596 if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
597 sig_cfg.Vsync_pol = true;
598 if (!(fbi->var.sync & FB_SYNC_CLK_LAT_FALL))
599 sig_cfg.clk_pol = true;
600 if (fbi->var.sync & FB_SYNC_DATA_INVERT)
601 sig_cfg.data_pol = true;
602 if (!(fbi->var.sync & FB_SYNC_OE_LOW_ACT))
603 sig_cfg.enable_pol = true;
604 if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
605 sig_cfg.clkidle_en = true;
607 dev_dbg(fbi->device, "pixclock = %ul Hz\n",
608 (u32) (PICOS2KHZ(fbi->var.pixclock) * 1000UL));
610 if (ipu_init_sync_panel(mxc_fbi->ipu, mxc_fbi->ipu_di,
611 (PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
612 fbi->var.xres, fbi->var.yres,
614 fbi->var.left_margin,
616 fbi->var.right_margin,
617 fbi->var.upper_margin,
619 fbi->var.lower_margin,
622 "mxcfb: Error initializing panel.\n");
627 (struct fb_videomode *)fb_match_mode(&fbi->var,
630 ipu_disp_set_window_pos(mxc_fbi->ipu, mxc_fbi->ipu_ch, 0, 0);
633 retval = _setup_disp_channel2(fbi);
635 ipu_uninit_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch);
641 ipu_disp_set_window_pos(
642 mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch,
644 retval = _setup_disp_channel2(mxc_fbi->ovfbi);
646 ipu_uninit_channel(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch);
647 ipu_uninit_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch);
652 ipu_enable_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch);
654 ipu_enable_channel(mxc_fbi_fg->ipu, mxc_fbi_fg->ipu_ch);
656 if (mxc_fbi->dispdrv && mxc_fbi->dispdrv->drv->enable) {
657 retval = mxc_fbi->dispdrv->drv->enable(mxc_fbi->dispdrv);
659 dev_err(fbi->device, "enable error, dispdrv:%s.\n",
660 mxc_fbi->dispdrv->drv->name);
665 mxc_fbi->cur_var = fbi->var;
670 static int _swap_channels(struct fb_info *fbi_from,
671 struct fb_info *fbi_to, bool both_on)
674 ipu_channel_t old_ch;
675 struct fb_info *ovfbi;
676 struct mxcfb_info *mxc_fbi_from = fbi_from->par;
677 struct mxcfb_info *mxc_fbi_to = fbi_to->par;
680 ipu_disable_channel(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch, true);
681 ipu_uninit_channel(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch);
684 /* switch the mxc fbi parameters */
685 old_ch = mxc_fbi_from->ipu_ch;
686 mxc_fbi_from->ipu_ch = mxc_fbi_to->ipu_ch;
687 mxc_fbi_to->ipu_ch = old_ch;
688 tmp = mxc_fbi_from->ipu_ch_irq;
689 mxc_fbi_from->ipu_ch_irq = mxc_fbi_to->ipu_ch_irq;
690 mxc_fbi_to->ipu_ch_irq = tmp;
691 tmp = mxc_fbi_from->ipu_ch_nf_irq;
692 mxc_fbi_from->ipu_ch_nf_irq = mxc_fbi_to->ipu_ch_nf_irq;
693 mxc_fbi_to->ipu_ch_nf_irq = tmp;
694 ovfbi = mxc_fbi_from->ovfbi;
695 mxc_fbi_from->ovfbi = mxc_fbi_to->ovfbi;
696 mxc_fbi_to->ovfbi = ovfbi;
698 _setup_disp_channel1(fbi_from);
699 retval = _setup_disp_channel2(fbi_from);
703 /* switch between dp and dc, disable old idmac, enable new idmac */
704 retval = ipu_swap_channel(mxc_fbi_from->ipu, old_ch, mxc_fbi_from->ipu_ch);
705 ipu_uninit_channel(mxc_fbi_from->ipu, old_ch);
708 _setup_disp_channel1(fbi_to);
709 retval = _setup_disp_channel2(fbi_to);
712 ipu_enable_channel(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch);
718 static int swap_channels(struct fb_info *fbi_from)
723 struct mxcfb_info *mxc_fbi_from = fbi_from->par;
724 struct fb_info *fbi_to = NULL;
725 struct mxcfb_info *mxc_fbi_to;
727 /* what's the target channel? */
728 if (mxc_fbi_from->ipu_ch == MEM_BG_SYNC)
733 fbi_to = found_registered_fb(ch_to, mxc_fbi_from->ipu_id);
736 mxc_fbi_to = fbi_to->par;
738 ipu_clear_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_irq);
739 ipu_clear_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_irq);
740 ipu_free_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_irq, fbi_from);
741 ipu_free_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_irq, fbi_to);
742 ipu_clear_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_nf_irq);
743 ipu_clear_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_nf_irq);
744 ipu_free_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_nf_irq, fbi_from);
745 ipu_free_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_nf_irq, fbi_to);
747 if (mxc_fbi_from->cur_blank == FB_BLANK_UNBLANK) {
748 if (mxc_fbi_to->cur_blank == FB_BLANK_UNBLANK)
753 if (mxc_fbi_to->cur_blank == FB_BLANK_UNBLANK)
756 swap_mode = BOTH_OFF;
761 /* disable target->switch src->enable target */
762 _swap_channels(fbi_from, fbi_to, true);
765 /* just switch src */
766 _swap_channels(fbi_from, fbi_to, false);
769 /* just switch target */
770 _swap_channels(fbi_to, fbi_from, false);
773 /* switch directly, no more need to do */
774 mxc_fbi_to->ipu_ch = mxc_fbi_from->ipu_ch;
775 mxc_fbi_from->ipu_ch = ch_to;
776 i = mxc_fbi_from->ipu_ch_irq;
777 mxc_fbi_from->ipu_ch_irq = mxc_fbi_to->ipu_ch_irq;
778 mxc_fbi_to->ipu_ch_irq = i;
779 i = mxc_fbi_from->ipu_ch_nf_irq;
780 mxc_fbi_from->ipu_ch_nf_irq = mxc_fbi_to->ipu_ch_nf_irq;
781 mxc_fbi_to->ipu_ch_nf_irq = i;
787 if (ipu_request_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_irq,
788 mxcfb_irq_handler, IPU_IRQF_ONESHOT,
789 MXCFB_NAME, fbi_from) != 0) {
790 dev_err(fbi_from->device, "Error registering irq %d\n",
791 mxc_fbi_from->ipu_ch_irq);
794 ipu_disable_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_irq);
795 if (ipu_request_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_irq,
796 mxcfb_irq_handler, IPU_IRQF_ONESHOT,
797 MXCFB_NAME, fbi_to) != 0) {
798 dev_err(fbi_to->device, "Error registering irq %d\n",
799 mxc_fbi_to->ipu_ch_irq);
802 ipu_disable_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_irq);
803 if (ipu_request_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_nf_irq,
804 mxcfb_nf_irq_handler, IPU_IRQF_ONESHOT,
805 MXCFB_NAME, fbi_from) != 0) {
806 dev_err(fbi_from->device, "Error registering irq %d\n",
807 mxc_fbi_from->ipu_ch_nf_irq);
810 ipu_disable_irq(mxc_fbi_from->ipu, mxc_fbi_from->ipu_ch_nf_irq);
811 if (ipu_request_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_nf_irq,
812 mxcfb_nf_irq_handler, IPU_IRQF_ONESHOT,
813 MXCFB_NAME, fbi_to) != 0) {
814 dev_err(fbi_to->device, "Error registering irq %d\n",
815 mxc_fbi_to->ipu_ch_nf_irq);
818 ipu_disable_irq(mxc_fbi_to->ipu, mxc_fbi_to->ipu_ch_nf_irq);
824 * Check framebuffer variable parameters and adjust to valid values.
826 * @param var framebuffer variable parameters
828 * @param info framebuffer information pointer
830 static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
834 struct mxcfb_info *mxc_fbi = info->par;
837 if (var->xres == 0 || var->yres == 0)
840 /* fg should not bigger than bg */
841 if (mxc_fbi->ipu_ch == MEM_FG_SYNC) {
842 struct fb_info *fbi_tmp;
843 int bg_xres = 0, bg_yres = 0;
844 int16_t pos_x, pos_y;
849 fbi_tmp = found_registered_fb(MEM_BG_SYNC, mxc_fbi->ipu_id);
851 bg_xres = fbi_tmp->var.xres;
852 bg_yres = fbi_tmp->var.yres;
855 ipu_disp_get_window_pos(mxc_fbi->ipu, mxc_fbi->ipu_ch, &pos_x, &pos_y);
857 if ((var->xres + pos_x) > bg_xres)
858 var->xres = bg_xres - pos_x;
859 if ((var->yres + pos_y) > bg_yres)
860 var->yres = bg_yres - pos_y;
863 if (var->rotate > IPU_ROTATE_VERT_FLIP)
864 var->rotate = IPU_ROTATE_NONE;
866 if (var->xres_virtual < var->xres)
867 var->xres_virtual = var->xres;
869 if (var->yres_virtual < var->yres)
870 var->yres_virtual = var->yres * 3;
872 if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
873 (var->bits_per_pixel != 16) && (var->bits_per_pixel != 12) &&
874 (var->bits_per_pixel != 8))
875 var->bits_per_pixel = 16;
877 if (check_var_pixfmt(var))
878 /* Fall back to default */
879 bpp_to_var(var->bits_per_pixel, var);
881 if (var->pixclock < 1000) {
882 htotal = var->xres + var->right_margin + var->hsync_len +
884 vtotal = var->yres + var->lower_margin + var->vsync_len +
886 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
887 var->pixclock = KHZ2PICOS(var->pixclock);
888 dev_dbg(info->device,
889 "pixclock set for 60Hz refresh = %u ps\n",
900 static inline u_int _chan_to_field(u_int chan, struct fb_bitfield *bf)
903 chan >>= 16 - bf->length;
904 return chan << bf->offset;
907 static int mxcfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
908 u_int trans, struct fb_info *fbi)
914 * If greyscale is true, then we convert the RGB value
915 * to greyscale no matter what visual we are using.
917 if (fbi->var.grayscale)
918 red = green = blue = (19595 * red + 38470 * green +
920 switch (fbi->fix.visual) {
921 case FB_VISUAL_TRUECOLOR:
923 * 16-bit True Colour. We encode the RGB value
924 * according to the RGB bitfield information.
927 u32 *pal = fbi->pseudo_palette;
929 val = _chan_to_field(red, &fbi->var.red);
930 val |= _chan_to_field(green, &fbi->var.green);
931 val |= _chan_to_field(blue, &fbi->var.blue);
938 case FB_VISUAL_STATIC_PSEUDOCOLOR:
939 case FB_VISUAL_PSEUDOCOLOR:
947 * Function to handle custom ioctls for MXC framebuffer.
949 * @param inode inode struct
951 * @param file file struct
953 * @param cmd Ioctl command to handle
955 * @param arg User pointer to command arguments
957 * @param fbi framebuffer information pointer
959 static int mxcfb_ioctl(struct fb_info *fbi, unsigned int cmd, unsigned long arg)
962 int __user *argp = (void __user *)arg;
963 struct mxcfb_info *mxc_fbi = fbi->par;
966 case MXCFB_SET_GBL_ALPHA:
968 struct mxcfb_gbl_alpha ga;
970 if (copy_from_user(&ga, argp, sizeof(ga))) {
975 if (ipu_disp_set_global_alpha(mxc_fbi->ipu,
984 mxc_fbi->alpha_chan_en = false;
988 "Set global alpha of %s to %d\n",
989 fbi->fix.id, ga.alpha);
992 case MXCFB_SET_LOC_ALPHA:
994 struct mxcfb_loc_alpha la;
996 ipu_ch_param_bad_alpha_pos(fbi_to_pixfmt(fbi));
998 if (copy_from_user(&la, argp, sizeof(la))) {
1003 if (la.enable && !la.alpha_in_pixel) {
1004 struct fb_info *fbi_tmp;
1005 ipu_channel_t ipu_ch;
1008 dev_err(fbi->device, "Bad pixel format "
1009 "for graphics plane fb\n");
1014 mxc_fbi->alpha_chan_en = true;
1016 if (mxc_fbi->ipu_ch == MEM_FG_SYNC)
1017 ipu_ch = MEM_BG_SYNC;
1018 else if (mxc_fbi->ipu_ch == MEM_BG_SYNC)
1019 ipu_ch = MEM_FG_SYNC;
1025 fbi_tmp = found_registered_fb(ipu_ch, mxc_fbi->ipu_id);
1027 ((struct mxcfb_info *)(fbi_tmp->par))->alpha_chan_en = false;
1029 mxc_fbi->alpha_chan_en = false;
1031 if (ipu_disp_set_global_alpha(mxc_fbi->ipu,
1033 !(bool)la.enable, 0)) {
1038 fbi->var.activate = (fbi->var.activate & ~FB_ACTIVATE_MASK) |
1039 FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
1042 la.alpha_phy_addr0 = mxc_fbi->alpha_phy_addr0;
1043 la.alpha_phy_addr1 = mxc_fbi->alpha_phy_addr1;
1044 if (copy_to_user(argp, &la, sizeof(la))) {
1050 dev_dbg(fbi->device,
1051 "Enable DP local alpha for %s\n",
1055 case MXCFB_SET_LOC_ALP_BUF:
1058 uint32_t ipu_alp_ch_irq;
1060 if (!(((mxc_fbi->ipu_ch == MEM_FG_SYNC) ||
1061 (mxc_fbi->ipu_ch == MEM_BG_SYNC)) &&
1062 (mxc_fbi->alpha_chan_en))) {
1063 dev_err(fbi->device,
1064 "Should use background or overlay "
1065 "framebuffer to set the alpha buffer "
1070 if (get_user(base, argp))
1073 if (base != mxc_fbi->alpha_phy_addr0 &&
1074 base != mxc_fbi->alpha_phy_addr1) {
1075 dev_err(fbi->device,
1076 "Wrong alpha buffer physical address "
1081 if (mxc_fbi->ipu_ch == MEM_FG_SYNC)
1082 ipu_alp_ch_irq = IPU_IRQ_FG_ALPHA_SYNC_EOF;
1084 ipu_alp_ch_irq = IPU_IRQ_BG_ALPHA_SYNC_EOF;
1086 retval = wait_for_completion_timeout(
1087 &mxc_fbi->alpha_flip_complete, HZ/2);
1089 dev_err(fbi->device, "timeout when waiting for alpha flip irq\n");
1090 retval = -ETIMEDOUT;
1094 mxc_fbi->cur_ipu_alpha_buf =
1095 !mxc_fbi->cur_ipu_alpha_buf;
1096 if (ipu_update_channel_buffer(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1097 IPU_ALPHA_IN_BUFFER,
1101 ipu_select_buffer(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1102 IPU_ALPHA_IN_BUFFER,
1103 mxc_fbi->cur_ipu_alpha_buf);
1104 ipu_clear_irq(mxc_fbi->ipu, ipu_alp_ch_irq);
1105 ipu_enable_irq(mxc_fbi->ipu, ipu_alp_ch_irq);
1107 dev_err(fbi->device,
1108 "Error updating %s SDC alpha buf %d "
1109 "to address=0x%08lX\n",
1111 mxc_fbi->cur_ipu_alpha_buf, base);
1115 case MXCFB_SET_CLR_KEY:
1117 struct mxcfb_color_key key;
1118 if (copy_from_user(&key, argp, sizeof(key))) {
1122 retval = ipu_disp_set_color_key(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1125 dev_dbg(fbi->device, "Set color key to 0x%08X\n",
1129 case MXCFB_SET_GAMMA:
1131 struct mxcfb_gamma gamma;
1132 if (copy_from_user(&gamma, argp, sizeof(gamma))) {
1136 retval = ipu_disp_set_gamma_correction(mxc_fbi->ipu,
1143 case MXCFB_WAIT_FOR_VSYNC:
1145 if (mxc_fbi->ipu_ch == MEM_FG_SYNC) {
1146 /* BG should poweron */
1147 struct mxcfb_info *bg_mxcfbi = NULL;
1148 struct fb_info *fbi_tmp;
1150 fbi_tmp = found_registered_fb(MEM_BG_SYNC, mxc_fbi->ipu_id);
1152 bg_mxcfbi = ((struct mxcfb_info *)(fbi_tmp->par));
1158 if (bg_mxcfbi->cur_blank != FB_BLANK_UNBLANK) {
1163 if (mxc_fbi->cur_blank != FB_BLANK_UNBLANK) {
1168 init_completion(&mxc_fbi->vsync_complete);
1169 ipu_clear_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_nf_irq);
1170 ipu_enable_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_nf_irq);
1171 retval = wait_for_completion_interruptible_timeout(
1172 &mxc_fbi->vsync_complete, 1 * HZ);
1174 dev_err(fbi->device,
1175 "MXCFB_WAIT_FOR_VSYNC: timeout %d\n",
1178 } else if (retval > 0) {
1186 struct mxcfb_alloc_list *mem;
1188 mem = kzalloc(sizeof(*mem), GFP_KERNEL);
1192 if (get_user(size, argp))
1195 mem->size = PAGE_ALIGN(size);
1197 mem->cpu_addr = dma_alloc_coherent(fbi->device, size,
1200 if (mem->cpu_addr == NULL) {
1205 list_add(&mem->list, &fb_alloc_list);
1207 dev_dbg(fbi->device, "allocated %d bytes @ 0x%08X\n",
1208 mem->size, mem->phy_addr);
1210 if (put_user(mem->phy_addr, argp))
1217 unsigned long offset;
1218 struct mxcfb_alloc_list *mem;
1220 if (get_user(offset, argp))
1224 list_for_each_entry(mem, &fb_alloc_list, list) {
1225 if (mem->phy_addr == offset) {
1226 list_del(&mem->list);
1227 dma_free_coherent(fbi->device,
1239 case MXCFB_SET_OVERLAY_POS:
1241 struct mxcfb_pos pos;
1242 struct fb_info *bg_fbi = NULL;
1243 struct mxcfb_info *bg_mxcfbi = NULL;
1245 if (mxc_fbi->ipu_ch != MEM_FG_SYNC) {
1246 dev_err(fbi->device, "Should use the overlay "
1247 "framebuffer to set the position of "
1248 "the overlay window\n");
1253 if (copy_from_user(&pos, argp, sizeof(pos))) {
1258 bg_fbi = found_registered_fb(MEM_BG_SYNC, mxc_fbi->ipu_id);
1260 bg_mxcfbi = ((struct mxcfb_info *)(bg_fbi->par));
1262 if (bg_fbi == NULL) {
1263 dev_err(fbi->device, "Cannot find the "
1264 "background framebuffer\n");
1269 /* if fb is unblank, check if the pos fit the display */
1270 if (mxc_fbi->cur_blank == FB_BLANK_UNBLANK) {
1271 if (fbi->var.xres + pos.x > bg_fbi->var.xres) {
1272 if (bg_fbi->var.xres < fbi->var.xres)
1275 pos.x = bg_fbi->var.xres - fbi->var.xres;
1277 if (fbi->var.yres + pos.y > bg_fbi->var.yres) {
1278 if (bg_fbi->var.yres < fbi->var.yres)
1281 pos.y = bg_fbi->var.yres - fbi->var.yres;
1285 retval = ipu_disp_set_window_pos(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1288 if (copy_to_user(argp, &pos, sizeof(pos))) {
1294 case MXCFB_GET_FB_IPU_CHAN:
1296 struct mxcfb_info *mxc_fbi =
1297 (struct mxcfb_info *)fbi->par;
1299 if (put_user(mxc_fbi->ipu_ch, argp))
1303 case MXCFB_GET_DIFMT:
1305 struct mxcfb_info *mxc_fbi =
1306 (struct mxcfb_info *)fbi->par;
1308 if (put_user(mxc_fbi->ipu_di_pix_fmt, argp))
1312 case MXCFB_GET_FB_IPU_DI:
1314 struct mxcfb_info *mxc_fbi =
1315 (struct mxcfb_info *)fbi->par;
1317 if (put_user(mxc_fbi->ipu_di, argp))
1321 case MXCFB_GET_FB_BLANK:
1323 struct mxcfb_info *mxc_fbi =
1324 (struct mxcfb_info *)fbi->par;
1326 if (put_user(mxc_fbi->cur_blank, argp))
1330 case MXCFB_SET_DIFMT:
1332 struct mxcfb_info *mxc_fbi =
1333 (struct mxcfb_info *)fbi->par;
1335 if (get_user(mxc_fbi->ipu_di_pix_fmt, argp))
1340 case MXCFB_CSC_UPDATE:
1342 struct mxcfb_csc_matrix csc;
1344 if (copy_from_user(&csc, argp, sizeof(csc)))
1347 if ((mxc_fbi->ipu_ch != MEM_FG_SYNC) &&
1348 (mxc_fbi->ipu_ch != MEM_BG_SYNC) &&
1349 (mxc_fbi->ipu_ch != MEM_BG_ASYNC0))
1351 ipu_set_csc_coefficients(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1362 * Blank the display.
1364 static int mxcfb_blank(int blank, struct fb_info *info)
1366 struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par;
1369 dev_dbg(info->device, "blank = %d\n", blank);
1371 if (mxc_fbi->cur_blank == blank)
1374 mxc_fbi->next_blank = blank;
1377 case FB_BLANK_POWERDOWN:
1378 case FB_BLANK_VSYNC_SUSPEND:
1379 case FB_BLANK_HSYNC_SUSPEND:
1380 case FB_BLANK_NORMAL:
1381 if (mxc_fbi->dispdrv && mxc_fbi->dispdrv->drv->disable)
1382 mxc_fbi->dispdrv->drv->disable(mxc_fbi->dispdrv);
1383 ipu_disable_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch, true);
1384 if (mxc_fbi->ipu_di >= 0)
1385 ipu_uninit_sync_panel(mxc_fbi->ipu, mxc_fbi->ipu_di);
1386 ipu_uninit_channel(mxc_fbi->ipu, mxc_fbi->ipu_ch);
1388 case FB_BLANK_UNBLANK:
1389 info->var.activate = (info->var.activate & ~FB_ACTIVATE_MASK) |
1390 FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
1391 ret = mxcfb_set_par(info);
1395 mxc_fbi->cur_blank = blank;
1400 * Pan or Wrap the Display
1402 * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag
1404 * @param var Variable screen buffer information
1405 * @param info Framebuffer information pointer
1408 mxcfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
1410 struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)info->par,
1411 *mxc_graphic_fbi = NULL;
1413 unsigned int fr_xoff, fr_yoff, fr_w, fr_h;
1414 unsigned long base, active_alpha_phy_addr = 0;
1415 bool loc_alpha_en = false;
1420 /* no pan display during fb blank */
1421 if (mxc_fbi->ipu_ch == MEM_FG_SYNC) {
1422 struct mxcfb_info *bg_mxcfbi = NULL;
1423 struct fb_info *fbi_tmp;
1425 fbi_tmp = found_registered_fb(MEM_BG_SYNC, mxc_fbi->ipu_id);
1427 bg_mxcfbi = ((struct mxcfb_info *)(fbi_tmp->par));
1430 if (bg_mxcfbi->cur_blank != FB_BLANK_UNBLANK)
1433 if (mxc_fbi->cur_blank != FB_BLANK_UNBLANK)
1436 y_bottom = var->yoffset;
1438 if (y_bottom > info->var.yres_virtual)
1441 switch (fbi_to_pixfmt(info)) {
1442 case IPU_PIX_FMT_YUV420P2:
1443 case IPU_PIX_FMT_YVU420P:
1444 case IPU_PIX_FMT_NV12:
1445 case IPU_PIX_FMT_YUV422P:
1446 case IPU_PIX_FMT_YVU422P:
1447 case IPU_PIX_FMT_YUV420P:
1448 case IPU_PIX_FMT_YUV444P:
1449 fb_stride = info->var.xres_virtual;
1452 fb_stride = info->fix.line_length;
1455 base = info->fix.smem_start;
1456 fr_xoff = var->xoffset;
1457 fr_w = info->var.xres_virtual;
1458 if (!(var->vmode & FB_VMODE_YWRAP)) {
1459 dev_dbg(info->device, "Y wrap disabled\n");
1460 fr_yoff = var->yoffset % info->var.yres;
1461 fr_h = info->var.yres;
1462 base += info->fix.line_length * info->var.yres *
1463 (var->yoffset / info->var.yres);
1465 dev_dbg(info->device, "Y wrap enabled\n");
1466 fr_yoff = var->yoffset;
1467 fr_h = info->var.yres_virtual;
1469 base += fr_yoff * fb_stride + fr_xoff;
1471 /* Check if DP local alpha is enabled and find the graphic fb */
1472 if (mxc_fbi->ipu_ch == MEM_BG_SYNC || mxc_fbi->ipu_ch == MEM_FG_SYNC) {
1473 for (i = 0; i < num_registered_fb; i++) {
1474 char bg_id[] = "DISP3 BG";
1475 char fg_id[] = "DISP3 FG";
1476 char *idstr = registered_fb[i]->fix.id;
1477 bg_id[4] += mxc_fbi->ipu_id;
1478 fg_id[4] += mxc_fbi->ipu_id;
1479 if ((strcmp(idstr, bg_id) == 0 ||
1480 strcmp(idstr, fg_id) == 0) &&
1481 ((struct mxcfb_info *)
1482 (registered_fb[i]->par))->alpha_chan_en) {
1483 loc_alpha_en = true;
1484 mxc_graphic_fbi = (struct mxcfb_info *)
1485 (registered_fb[i]->par);
1486 active_alpha_phy_addr =
1487 mxc_fbi->cur_ipu_alpha_buf ?
1488 mxc_graphic_fbi->alpha_phy_addr1 :
1489 mxc_graphic_fbi->alpha_phy_addr0;
1490 dev_dbg(info->device, "Updating SDC alpha "
1491 "buf %d address=0x%08lX\n",
1492 !mxc_fbi->cur_ipu_alpha_buf,
1493 active_alpha_phy_addr);
1499 ret = wait_for_completion_timeout(&mxc_fbi->flip_complete, HZ/2);
1501 dev_err(info->device, "timeout when waiting for flip irq\n");
1505 ++mxc_fbi->cur_ipu_buf;
1506 mxc_fbi->cur_ipu_buf %= 3;
1507 mxc_fbi->cur_ipu_alpha_buf = !mxc_fbi->cur_ipu_alpha_buf;
1509 dev_dbg(info->device, "Updating SDC %s buf %d address=0x%08lX\n",
1510 info->fix.id, mxc_fbi->cur_ipu_buf, base);
1512 if (ipu_update_channel_buffer(mxc_fbi->ipu, mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
1513 mxc_fbi->cur_ipu_buf, base) == 0) {
1514 /* Update the DP local alpha buffer only for graphic plane */
1515 if (loc_alpha_en && mxc_graphic_fbi == mxc_fbi &&
1516 ipu_update_channel_buffer(mxc_graphic_fbi->ipu, mxc_graphic_fbi->ipu_ch,
1517 IPU_ALPHA_IN_BUFFER,
1518 mxc_fbi->cur_ipu_alpha_buf,
1519 active_alpha_phy_addr) == 0) {
1520 ipu_select_buffer(mxc_graphic_fbi->ipu, mxc_graphic_fbi->ipu_ch,
1521 IPU_ALPHA_IN_BUFFER,
1522 mxc_fbi->cur_ipu_alpha_buf);
1525 /* update u/v offset */
1526 ipu_update_channel_offset(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1528 fbi_to_pixfmt(info),
1536 ipu_select_buffer(mxc_fbi->ipu, mxc_fbi->ipu_ch, IPU_INPUT_BUFFER,
1537 mxc_fbi->cur_ipu_buf);
1538 ipu_clear_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq);
1539 ipu_enable_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq);
1541 dev_err(info->device,
1542 "Error updating SDC buf %d to address=0x%08lX, "
1543 "current buf %d, buf0 ready %d, buf1 ready %d, "
1544 "buf2 ready %d\n", mxc_fbi->cur_ipu_buf, base,
1545 ipu_get_cur_buffer_idx(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1547 ipu_check_buffer_ready(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1548 IPU_INPUT_BUFFER, 0),
1549 ipu_check_buffer_ready(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1550 IPU_INPUT_BUFFER, 1),
1551 ipu_check_buffer_ready(mxc_fbi->ipu, mxc_fbi->ipu_ch,
1552 IPU_INPUT_BUFFER, 2));
1553 ++mxc_fbi->cur_ipu_buf;
1554 mxc_fbi->cur_ipu_buf %= 3;
1555 ++mxc_fbi->cur_ipu_buf;
1556 mxc_fbi->cur_ipu_buf %= 3;
1557 mxc_fbi->cur_ipu_alpha_buf = !mxc_fbi->cur_ipu_alpha_buf;
1558 ipu_clear_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq);
1559 ipu_enable_irq(mxc_fbi->ipu, mxc_fbi->ipu_ch_irq);
1563 dev_dbg(info->device, "Update complete\n");
1565 info->var.yoffset = var->yoffset;
1571 * Function to handle custom mmap for MXC framebuffer.
1573 * @param fbi framebuffer information pointer
1575 * @param vma Pointer to vm_area_struct
1577 static int mxcfb_mmap(struct fb_info *fbi, struct vm_area_struct *vma)
1581 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
1582 struct mxcfb_alloc_list *mem;
1583 struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
1585 if (offset < fbi->fix.smem_len) {
1586 /* mapping framebuffer memory */
1587 len = fbi->fix.smem_len - offset;
1588 vma->vm_pgoff = (fbi->fix.smem_start + offset) >> PAGE_SHIFT;
1589 } else if ((vma->vm_pgoff ==
1590 (mxc_fbi->alpha_phy_addr0 >> PAGE_SHIFT)) ||
1592 (mxc_fbi->alpha_phy_addr1 >> PAGE_SHIFT))) {
1593 len = mxc_fbi->alpha_mem_len;
1595 list_for_each_entry(mem, &fb_alloc_list, list) {
1596 if (offset == mem->phy_addr) {
1606 len = PAGE_ALIGN(len);
1607 if (vma->vm_end - vma->vm_start > len)
1610 /* make buffers bufferable */
1611 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1613 vma->vm_flags |= VM_IO;
1615 if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
1616 vma->vm_end - vma->vm_start, vma->vm_page_prot)) {
1617 dev_dbg(fbi->device, "mmap remap_pfn_range failed\n");
1625 * This structure contains the pointers to the control functions that are
1626 * invoked by the core framebuffer driver to perform operations like
1627 * blitting, rectangle filling, copy regions and cursor definition.
1629 static struct fb_ops mxcfb_ops = {
1630 .owner = THIS_MODULE,
1631 .fb_set_par = mxcfb_set_par,
1632 .fb_check_var = mxcfb_check_var,
1633 .fb_setcolreg = mxcfb_setcolreg,
1634 .fb_pan_display = mxcfb_pan_display,
1635 .fb_ioctl = mxcfb_ioctl,
1636 .fb_mmap = mxcfb_mmap,
1637 .fb_fillrect = cfb_fillrect,
1638 .fb_copyarea = cfb_copyarea,
1639 .fb_imageblit = cfb_imageblit,
1640 .fb_blank = mxcfb_blank,
1643 static irqreturn_t mxcfb_irq_handler(int irq, void *dev_id)
1645 struct fb_info *fbi = dev_id;
1646 struct mxcfb_info *mxc_fbi = fbi->par;
1648 complete(&mxc_fbi->flip_complete);
1652 static irqreturn_t mxcfb_nf_irq_handler(int irq, void *dev_id)
1654 struct fb_info *fbi = dev_id;
1655 struct mxcfb_info *mxc_fbi = fbi->par;
1657 complete(&mxc_fbi->vsync_complete);
1661 static irqreturn_t mxcfb_alpha_irq_handler(int irq, void *dev_id)
1663 struct fb_info *fbi = dev_id;
1664 struct mxcfb_info *mxc_fbi = fbi->par;
1666 complete(&mxc_fbi->alpha_flip_complete);
1671 * Suspends the framebuffer and blanks the screen. Power management support
1673 static int mxcfb_suspend(struct platform_device *pdev, pm_message_t state)
1675 struct fb_info *fbi = platform_get_drvdata(pdev);
1676 struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
1678 #ifdef CONFIG_FB_MXC_LOW_PWR_DISPLAY
1682 if (mxc_fbi->ovfbi) {
1683 struct mxcfb_info *mxc_fbi_fg =
1684 (struct mxcfb_info *)mxc_fbi->ovfbi->par;
1687 fb_set_suspend(mxc_fbi->ovfbi, 1);
1688 saved_blank = mxc_fbi_fg->cur_blank;
1689 mxcfb_blank(FB_BLANK_POWERDOWN, mxc_fbi->ovfbi);
1690 mxc_fbi_fg->next_blank = saved_blank;
1695 fb_set_suspend(fbi, 1);
1696 saved_blank = mxc_fbi->cur_blank;
1697 mxcfb_blank(FB_BLANK_POWERDOWN, fbi);
1698 mxc_fbi->next_blank = saved_blank;
1705 * Resumes the framebuffer and unblanks the screen. Power management support
1707 static int mxcfb_resume(struct platform_device *pdev)
1709 struct fb_info *fbi = platform_get_drvdata(pdev);
1710 struct mxcfb_info *mxc_fbi = (struct mxcfb_info *)fbi->par;
1713 mxcfb_blank(mxc_fbi->next_blank, fbi);
1714 fb_set_suspend(fbi, 0);
1717 if (mxc_fbi->ovfbi) {
1718 struct mxcfb_info *mxc_fbi_fg =
1719 (struct mxcfb_info *)mxc_fbi->ovfbi->par;
1721 mxcfb_blank(mxc_fbi_fg->next_blank, mxc_fbi->ovfbi);
1722 fb_set_suspend(mxc_fbi->ovfbi, 0);
1730 * Main framebuffer functions
1734 * Allocates the DRAM memory for the frame buffer. This buffer is remapped
1735 * into a non-cached, non-buffered, memory region to allow palette and pixel
1736 * writes to occur without flushing the cache. Once this area is remapped,
1737 * all virtual memory access to the video memory should occur at the new region.
1739 * @param fbi framebuffer information pointer
1741 * @return Error code indicating success or failure
1743 static int mxcfb_map_video_memory(struct fb_info *fbi)
1745 if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length)
1746 fbi->fix.smem_len = fbi->var.yres_virtual *
1747 fbi->fix.line_length;
1749 fbi->screen_base = dma_alloc_writecombine(fbi->device,
1751 (dma_addr_t *)&fbi->fix.smem_start,
1752 GFP_DMA | GFP_KERNEL);
1753 if (fbi->screen_base == 0) {
1754 dev_err(fbi->device, "Unable to allocate framebuffer memory\n");
1755 fbi->fix.smem_len = 0;
1756 fbi->fix.smem_start = 0;
1760 dev_dbg(fbi->device, "allocated fb @ paddr=0x%08X, size=%d.\n",
1761 (uint32_t) fbi->fix.smem_start, fbi->fix.smem_len);
1763 fbi->screen_size = fbi->fix.smem_len;
1765 /* Clear the screen */
1766 memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
1772 * De-allocates the DRAM memory for the frame buffer.
1774 * @param fbi framebuffer information pointer
1776 * @return Error code indicating success or failure
1778 static int mxcfb_unmap_video_memory(struct fb_info *fbi)
1780 dma_free_writecombine(fbi->device, fbi->fix.smem_len,
1781 fbi->screen_base, fbi->fix.smem_start);
1782 fbi->screen_base = 0;
1783 fbi->fix.smem_start = 0;
1784 fbi->fix.smem_len = 0;
1789 * Initializes the framebuffer information pointer. After allocating
1790 * sufficient memory for the framebuffer structure, the fields are
1791 * filled with custom information passed in from the configurable
1792 * structures. This includes information such as bits per pixel,
1793 * color maps, screen width/height and RGBA offsets.
1795 * @return Framebuffer structure initialized with our information
1797 static struct fb_info *mxcfb_init_fbinfo(struct device *dev, struct fb_ops *ops)
1799 struct fb_info *fbi;
1800 struct mxcfb_info *mxcfbi;
1803 * Allocate sufficient memory for the fb structure
1805 fbi = framebuffer_alloc(sizeof(struct mxcfb_info), dev);
1809 mxcfbi = (struct mxcfb_info *)fbi->par;
1811 fbi->var.activate = FB_ACTIVATE_NOW;
1814 fbi->flags = FBINFO_FLAG_DEFAULT;
1815 fbi->pseudo_palette = mxcfbi->pseudo_palette;
1820 fb_alloc_cmap(&fbi->cmap, 16, 0);
1825 static ssize_t show_disp_chan(struct device *dev,
1826 struct device_attribute *attr, char *buf)
1828 struct fb_info *info = dev_get_drvdata(dev);
1829 struct mxcfb_info *mxcfbi = (struct mxcfb_info *)info->par;
1831 if (mxcfbi->ipu_ch == MEM_BG_SYNC)
1832 return sprintf(buf, "2-layer-fb-bg\n");
1833 else if (mxcfbi->ipu_ch == MEM_FG_SYNC)
1834 return sprintf(buf, "2-layer-fb-fg\n");
1835 else if (mxcfbi->ipu_ch == MEM_DC_SYNC)
1836 return sprintf(buf, "1-layer-fb\n");
1838 return sprintf(buf, "err: no display chan\n");
1841 static ssize_t swap_disp_chan(struct device *dev,
1842 struct device_attribute *attr,
1843 const char *buf, size_t count)
1845 struct fb_info *info = dev_get_drvdata(dev);
1846 struct mxcfb_info *mxcfbi = (struct mxcfb_info *)info->par;
1847 struct mxcfb_info *fg_mxcfbi = NULL;
1850 /* swap only happen between DP-BG and DC, while DP-FG disable */
1851 if (((mxcfbi->ipu_ch == MEM_BG_SYNC) &&
1852 (strstr(buf, "1-layer-fb") != NULL)) ||
1853 ((mxcfbi->ipu_ch == MEM_DC_SYNC) &&
1854 (strstr(buf, "2-layer-fb-bg") != NULL))) {
1855 struct fb_info *fbi_fg;
1857 fbi_fg = found_registered_fb(MEM_FG_SYNC, mxcfbi->ipu_id);
1859 fg_mxcfbi = (struct mxcfb_info *)fbi_fg->par;
1862 fg_mxcfbi->cur_blank == FB_BLANK_UNBLANK) {
1864 "Can not switch while fb2(fb-fg) is on.\n");
1869 if (swap_channels(info) < 0)
1870 dev_err(dev, "Swap display channel failed.\n");
1876 static DEVICE_ATTR(fsl_disp_property, S_IWUSR | S_IRUGO,
1877 show_disp_chan, swap_disp_chan);
1879 static ssize_t show_disp_dev(struct device *dev,
1880 struct device_attribute *attr, char *buf)
1882 struct fb_info *info = dev_get_drvdata(dev);
1883 struct mxcfb_info *mxcfbi = (struct mxcfb_info *)info->par;
1885 if (mxcfbi->ipu_ch == MEM_FG_SYNC)
1886 return sprintf(buf, "overlay\n");
1888 return sprintf(buf, "%s\n", mxcfbi->dispdrv->drv->name);
1890 static DEVICE_ATTR(fsl_disp_dev_property, S_IRUGO, show_disp_dev, NULL);
1892 static int mxcfb_dispdrv_init(struct platform_device *pdev,
1893 struct fb_info *fbi)
1895 struct ipuv3_fb_platform_data *plat_data = pdev->dev.platform_data;
1896 struct mxcfb_info *mxcfbi = (struct mxcfb_info *)fbi->par;
1897 struct mxc_dispdrv_setting setting;
1898 char disp_dev[32], *default_dev = "lcd";
1901 setting.if_fmt = plat_data->interface_pix_fmt;
1902 setting.dft_mode_str = plat_data->mode_str;
1903 setting.default_bpp = plat_data->default_bpp;
1904 if (!setting.default_bpp)
1905 setting.default_bpp = 16;
1907 if (!strlen(plat_data->disp_dev))
1908 strlcpy(disp_dev, default_dev, sizeof(disp_dev));
1910 strlcpy(disp_dev, plat_data->disp_dev, sizeof(disp_dev));
1913 dev_info(&pdev->dev, "register mxc display driver %s\n", disp_dev);
1915 mxcfbi->dispdrv = mxc_dispdrv_gethandle(disp_dev, &setting);
1916 if (IS_ERR(mxcfbi->dispdrv)) {
1917 ret = PTR_ERR(mxcfbi->dispdrv);
1918 dev_err(&pdev->dev, "NO mxc display driver found!\n");
1922 mxcfbi->ipu_di_pix_fmt = setting.if_fmt;
1923 mxcfbi->default_bpp = setting.default_bpp;
1926 mxcfbi->ipu_id = setting.dev_id;
1927 mxcfbi->ipu_di = setting.disp_id;
1928 dev_dbg(&pdev->dev, "di_pixfmt:0x%x, bpp:0x%x, di:%d, ipu:%d\n",
1929 setting.if_fmt, setting.default_bpp,
1930 setting.disp_id, setting.dev_id);
1937 * Parse user specified options (`video=trident:')
1939 * video=mxcfb0:dev=lcd,800x480M-16@55,if=RGB565,bpp=16,noaccel
1940 * video=mxcfb0:dev=lcd,800x480M-16@55,if=RGB565,fbpix=RGB565
1942 static int mxcfb_option_setup(struct platform_device *pdev, struct fb_info *fbi)
1944 struct ipuv3_fb_platform_data *pdata = pdev->dev.platform_data;
1945 char *options, *opt, *fb_mode_str = NULL;
1946 char name[] = "mxcfb0";
1947 uint32_t fb_pix_fmt = 0;
1949 name[5] += pdev->id;
1950 if (fb_get_options(name, &options)) {
1951 dev_err(&pdev->dev, "Can't get fb option for %s!\n", name);
1955 if (!options || !*options)
1958 while ((opt = strsep(&options, ",")) != NULL) {
1962 if (!strncmp(opt, "dev=", 4)) {
1963 strlcpy(pdata->disp_dev, opt + 4, sizeof(pdata->disp_dev));
1964 } else if (!strncmp(opt, "if=", 3)) {
1965 if (!strncmp(opt+3, "RGB24", 5))
1966 pdata->interface_pix_fmt = IPU_PIX_FMT_RGB24;
1967 else if (!strncmp(opt+3, "BGR24", 5))
1968 pdata->interface_pix_fmt = IPU_PIX_FMT_BGR24;
1969 else if (!strncmp(opt+3, "GBR24", 5))
1970 pdata->interface_pix_fmt = IPU_PIX_FMT_GBR24;
1971 else if (!strncmp(opt+3, "RGB565", 6))
1972 pdata->interface_pix_fmt = IPU_PIX_FMT_RGB565;
1973 else if (!strncmp(opt+3, "RGB666", 6))
1974 pdata->interface_pix_fmt = IPU_PIX_FMT_RGB666;
1975 else if (!strncmp(opt+3, "YUV444", 6))
1976 pdata->interface_pix_fmt = IPU_PIX_FMT_YUV444;
1977 else if (!strncmp(opt+3, "LVDS666", 7))
1978 pdata->interface_pix_fmt = IPU_PIX_FMT_LVDS666;
1979 else if (!strncmp(opt+3, "YUYV16", 6))
1980 pdata->interface_pix_fmt = IPU_PIX_FMT_YUYV;
1981 else if (!strncmp(opt+3, "UYVY16", 6))
1982 pdata->interface_pix_fmt = IPU_PIX_FMT_UYVY;
1983 else if (!strncmp(opt+3, "YVYU16", 6))
1984 pdata->interface_pix_fmt = IPU_PIX_FMT_YVYU;
1985 else if (!strncmp(opt+3, "VYUY16", 6))
1986 pdata->interface_pix_fmt = IPU_PIX_FMT_VYUY;
1987 } else if (!strncmp(opt, "fbpix=", 6)) {
1988 if (!strncmp(opt+6, "RGB24", 5))
1989 fb_pix_fmt = IPU_PIX_FMT_RGB24;
1990 else if (!strncmp(opt+6, "BGR24", 5))
1991 fb_pix_fmt = IPU_PIX_FMT_BGR24;
1992 else if (!strncmp(opt+6, "RGB32", 5))
1993 fb_pix_fmt = IPU_PIX_FMT_RGB32;
1994 else if (!strncmp(opt+6, "BGR32", 5))
1995 fb_pix_fmt = IPU_PIX_FMT_BGR32;
1996 else if (!strncmp(opt+6, "ABGR32", 6))
1997 fb_pix_fmt = IPU_PIX_FMT_ABGR32;
1998 else if (!strncmp(opt+6, "RGB565", 6))
1999 fb_pix_fmt = IPU_PIX_FMT_RGB565;
2002 pixfmt_to_var(fb_pix_fmt, &fbi->var);
2003 pdata->default_bpp =
2004 fbi->var.bits_per_pixel;
2006 } else if (!strncmp(opt, "int_clk", 7)) {
2007 pdata->int_clk = true;
2009 } else if (!strncmp(opt, "bpp=", 4)) {
2010 /* bpp setting cannot overwirte fbpix setting */
2014 pdata->default_bpp =
2015 simple_strtoul(opt + 4, NULL, 0);
2017 fb_pix_fmt = bpp_to_pixfmt(pdata->default_bpp);
2019 pixfmt_to_var(fb_pix_fmt, &fbi->var);
2025 pdata->mode_str = fb_mode_str;
2030 static int mxcfb_register(struct fb_info *fbi)
2032 struct mxcfb_info *mxcfbi = (struct mxcfb_info *)fbi->par;
2033 struct fb_videomode m;
2035 char bg0_id[] = "DISP3 BG";
2036 char bg1_id[] = "DISP3 BG - DI1";
2037 char fg_id[] = "DISP3 FG";
2039 if (mxcfbi->ipu_di == 0) {
2040 bg0_id[4] += mxcfbi->ipu_id;
2041 strcpy(fbi->fix.id, bg0_id);
2042 } else if (mxcfbi->ipu_di == 1) {
2043 bg1_id[4] += mxcfbi->ipu_id;
2044 strcpy(fbi->fix.id, bg1_id);
2045 } else { /* Overlay */
2046 fg_id[4] += mxcfbi->ipu_id;
2047 strcpy(fbi->fix.id, fg_id);
2050 mxcfb_check_var(&fbi->var, fbi);
2054 /* Added first mode to fbi modelist. */
2055 if (!fbi->modelist.next || !fbi->modelist.prev)
2056 INIT_LIST_HEAD(&fbi->modelist);
2057 fb_var_to_videomode(&m, &fbi->var);
2058 fb_add_videomode(&m, &fbi->modelist);
2060 if (ipu_request_irq(mxcfbi->ipu, mxcfbi->ipu_ch_irq,
2061 mxcfb_irq_handler, IPU_IRQF_ONESHOT, MXCFB_NAME, fbi) != 0) {
2062 dev_err(fbi->device, "Error registering EOF irq handler.\n");
2066 ipu_disable_irq(mxcfbi->ipu, mxcfbi->ipu_ch_irq);
2067 if (ipu_request_irq(mxcfbi->ipu, mxcfbi->ipu_ch_nf_irq,
2068 mxcfb_nf_irq_handler, IPU_IRQF_ONESHOT, MXCFB_NAME, fbi) != 0) {
2069 dev_err(fbi->device, "Error registering NFACK irq handler.\n");
2073 ipu_disable_irq(mxcfbi->ipu, mxcfbi->ipu_ch_nf_irq);
2075 if (mxcfbi->ipu_alp_ch_irq != -1)
2076 if (ipu_request_irq(mxcfbi->ipu, mxcfbi->ipu_alp_ch_irq,
2077 mxcfb_alpha_irq_handler, IPU_IRQF_ONESHOT,
2078 MXCFB_NAME, fbi) != 0) {
2079 dev_err(fbi->device, "Error registering alpha irq "
2085 if (!mxcfbi->late_init) {
2086 fbi->var.activate |= FB_ACTIVATE_FORCE;
2088 fbi->flags |= FBINFO_MISC_USEREVENT;
2089 ret = fb_set_var(fbi, &fbi->var);
2090 fbi->flags &= ~FBINFO_MISC_USEREVENT;
2093 dev_err(fbi->device, "Error fb_set_var ret:%d\n", ret);
2097 if (mxcfbi->next_blank == FB_BLANK_UNBLANK) {
2099 ret = fb_blank(fbi, FB_BLANK_UNBLANK);
2102 dev_err(fbi->device,
2103 "Error fb_blank ret:%d\n", ret);
2109 * Setup the channel again though bootloader
2110 * has done this, then set_par() can stop the
2111 * channel neatly and re-initialize it .
2113 if (mxcfbi->next_blank == FB_BLANK_UNBLANK) {
2115 _setup_disp_channel1(fbi);
2116 ipu_enable_channel(mxcfbi->ipu, mxcfbi->ipu_ch);
2122 ret = register_framebuffer(fbi);
2128 if (mxcfbi->next_blank == FB_BLANK_UNBLANK) {
2130 if (!mxcfbi->late_init)
2131 fb_blank(fbi, FB_BLANK_POWERDOWN);
2133 ipu_disable_channel(mxcfbi->ipu, mxcfbi->ipu_ch,
2135 ipu_uninit_channel(mxcfbi->ipu, mxcfbi->ipu_ch);
2141 if (mxcfbi->ipu_alp_ch_irq != -1)
2142 ipu_free_irq(mxcfbi->ipu, mxcfbi->ipu_alp_ch_irq, fbi);
2144 ipu_free_irq(mxcfbi->ipu, mxcfbi->ipu_ch_nf_irq, fbi);
2146 ipu_free_irq(mxcfbi->ipu, mxcfbi->ipu_ch_irq, fbi);
2151 static void mxcfb_unregister(struct fb_info *fbi)
2153 struct mxcfb_info *mxcfbi = (struct mxcfb_info *)fbi->par;
2155 if (mxcfbi->ipu_alp_ch_irq != -1)
2156 ipu_free_irq(mxcfbi->ipu, mxcfbi->ipu_alp_ch_irq, fbi);
2157 if (mxcfbi->ipu_ch_irq)
2158 ipu_free_irq(mxcfbi->ipu, mxcfbi->ipu_ch_irq, fbi);
2159 if (mxcfbi->ipu_ch_nf_irq)
2160 ipu_free_irq(mxcfbi->ipu, mxcfbi->ipu_ch_nf_irq, fbi);
2162 unregister_framebuffer(fbi);
2165 static int mxcfb_setup_overlay(struct platform_device *pdev,
2166 struct fb_info *fbi_bg, struct resource *res)
2168 struct fb_info *ovfbi;
2169 struct mxcfb_info *mxcfbi_bg = (struct mxcfb_info *)fbi_bg->par;
2170 struct mxcfb_info *mxcfbi_fg;
2173 ovfbi = mxcfb_init_fbinfo(&pdev->dev, &mxcfb_ops);
2176 goto init_ovfbinfo_failed;
2178 mxcfbi_fg = ovfbi->par;
2180 mxcfbi_fg->ipu = ipu_get_soc(mxcfbi_bg->ipu_id);
2181 if (IS_ERR(mxcfbi_fg->ipu)) {
2182 ret = PTR_ERR(mxcfbi_fg->ipu);
2183 goto get_ipu_failed;
2185 mxcfbi_fg->ipu_id = mxcfbi_bg->ipu_id;
2186 mxcfbi_fg->ipu_ch_irq = IPU_IRQ_FG_SYNC_EOF;
2187 mxcfbi_fg->ipu_ch_nf_irq = IPU_IRQ_FG_SYNC_NFACK;
2188 mxcfbi_fg->ipu_alp_ch_irq = IPU_IRQ_FG_ALPHA_SYNC_EOF;
2189 mxcfbi_fg->ipu_ch = MEM_FG_SYNC;
2190 mxcfbi_fg->ipu_di = -1;
2191 mxcfbi_fg->ipu_di_pix_fmt = mxcfbi_bg->ipu_di_pix_fmt;
2192 mxcfbi_fg->overlay = true;
2193 mxcfbi_fg->cur_blank = mxcfbi_fg->next_blank = FB_BLANK_POWERDOWN;
2195 /* Need dummy values until real panel is configured */
2196 ovfbi->var.xres = 240;
2197 ovfbi->var.yres = 320;
2199 if (res && res->start && res->end) {
2200 ovfbi->fix.smem_len = res->end - res->start + 1;
2201 ovfbi->fix.smem_start = res->start;
2202 ovfbi->screen_base = ioremap(
2203 ovfbi->fix.smem_start,
2204 ovfbi->fix.smem_len);
2207 ret = mxcfb_register(ovfbi);
2209 goto register_ov_failed;
2211 mxcfbi_bg->ovfbi = ovfbi;
2217 fb_dealloc_cmap(&ovfbi->cmap);
2218 framebuffer_release(ovfbi);
2219 init_ovfbinfo_failed:
2223 static void mxcfb_unsetup_overlay(struct fb_info *fbi_bg)
2225 struct mxcfb_info *mxcfbi_bg = fbi_bg->par;
2226 struct fb_info *ovfbi = mxcfbi_bg->ovfbi;
2228 mxcfb_unregister(ovfbi);
2231 fb_dealloc_cmap(&ovfbi->cmap);
2232 framebuffer_release(ovfbi);
2235 static bool ipu_usage[2][2];
2236 static int ipu_test_set_usage(int ipu, int di)
2238 if (ipu_usage[ipu][di])
2241 ipu_usage[ipu][di] = true;
2245 static void ipu_clear_usage(int ipu, int di)
2247 ipu_usage[ipu][di] = false;
2250 static int mxcfb_get_of_property(struct platform_device *pdev,
2251 struct ipuv3_fb_platform_data *plat_data)
2253 struct device_node *np = pdev->dev.of_node;
2254 const char *disp_dev;
2255 const char *mode_str;
2261 err = of_property_read_string(np, "disp_dev", &disp_dev);
2263 dev_dbg(&pdev->dev, "get of property disp_dev fail\n");
2266 err = of_property_read_string(np, "mode_str", &mode_str);
2268 dev_dbg(&pdev->dev, "get of property mode_str fail\n");
2271 err = of_property_read_string(np, "interface_pix_fmt", &pixfmt);
2273 dev_dbg(&pdev->dev, "get of property pix fmt fail\n");
2276 err = of_property_read_u32(np, "default_bpp", &bpp);
2278 dev_dbg(&pdev->dev, "get of property bpp fail\n");
2281 err = of_property_read_u32(np, "int_clk", &int_clk);
2283 dev_dbg(&pdev->dev, "get of property int_clk fail\n");
2286 err = of_property_read_u32(np, "late_init", &late_init);
2288 dev_dbg(&pdev->dev, "get of property late_init fail\n");
2292 if (!strncmp(pixfmt, "RGB24", 5))
2293 plat_data->interface_pix_fmt = IPU_PIX_FMT_RGB24;
2294 else if (!strncmp(pixfmt, "BGR24", 5))
2295 plat_data->interface_pix_fmt = IPU_PIX_FMT_BGR24;
2296 else if (!strncmp(pixfmt, "GBR24", 5))
2297 plat_data->interface_pix_fmt = IPU_PIX_FMT_GBR24;
2298 else if (!strncmp(pixfmt, "RGB565", 6))
2299 plat_data->interface_pix_fmt = IPU_PIX_FMT_RGB565;
2300 else if (!strncmp(pixfmt, "RGB666", 6))
2301 plat_data->interface_pix_fmt = IPU_PIX_FMT_RGB666;
2302 else if (!strncmp(pixfmt, "YUV444", 6))
2303 plat_data->interface_pix_fmt = IPU_PIX_FMT_YUV444;
2304 else if (!strncmp(pixfmt, "LVDS666", 7))
2305 plat_data->interface_pix_fmt = IPU_PIX_FMT_LVDS666;
2306 else if (!strncmp(pixfmt, "YUYV16", 6))
2307 plat_data->interface_pix_fmt = IPU_PIX_FMT_YUYV;
2308 else if (!strncmp(pixfmt, "UYVY16", 6))
2309 plat_data->interface_pix_fmt = IPU_PIX_FMT_UYVY;
2310 else if (!strncmp(pixfmt, "YVYU16", 6))
2311 plat_data->interface_pix_fmt = IPU_PIX_FMT_YVYU;
2312 else if (!strncmp(pixfmt, "VYUY16", 6))
2313 plat_data->interface_pix_fmt = IPU_PIX_FMT_VYUY;
2315 dev_err(&pdev->dev, "err interface_pix_fmt!\n");
2319 strlcpy(plat_data->disp_dev, disp_dev, sizeof(plat_data->disp_dev));
2320 plat_data->mode_str = (char *)mode_str;
2321 plat_data->default_bpp = bpp;
2322 plat_data->int_clk = (bool)int_clk;
2323 plat_data->late_init = (bool)late_init;
2328 * Probe routine for the framebuffer driver. It is called during the
2329 * driver binding process. The following functions are performed in
2330 * this routine: Framebuffer initialization, Memory allocation and
2331 * mapping, Framebuffer registration, IPU initialization.
2333 * @return Appropriate error code to the kernel common code
2335 static int mxcfb_probe(struct platform_device *pdev)
2337 struct ipuv3_fb_platform_data *plat_data;
2338 struct fb_info *fbi;
2339 struct mxcfb_info *mxcfbi;
2340 struct resource *res;
2343 dev_dbg(&pdev->dev, "%s enter\n", __func__);
2344 pdev->id = of_alias_get_id(pdev->dev.of_node, "mxcfb");
2346 dev_err(&pdev->dev, "can not get alias id\n");
2350 plat_data = devm_kzalloc(&pdev->dev, sizeof(struct
2351 ipuv3_fb_platform_data), GFP_KERNEL);
2354 pdev->dev.platform_data = plat_data;
2356 ret = mxcfb_get_of_property(pdev, plat_data);
2358 dev_err(&pdev->dev, "get mxcfb of property fail\n");
2362 /* Initialize FB structures */
2363 fbi = mxcfb_init_fbinfo(&pdev->dev, &mxcfb_ops);
2366 goto init_fbinfo_failed;
2369 ret = mxcfb_option_setup(pdev, fbi);
2371 goto get_fb_option_failed;
2374 mxcfbi->ipu_int_clk = plat_data->int_clk;
2375 mxcfbi->late_init = plat_data->late_init;
2376 mxcfbi->first_set_par = true;
2377 ret = mxcfb_dispdrv_init(pdev, fbi);
2379 goto init_dispdrv_failed;
2381 ret = ipu_test_set_usage(mxcfbi->ipu_id, mxcfbi->ipu_di);
2383 dev_err(&pdev->dev, "ipu%d-di%d already in use\n",
2384 mxcfbi->ipu_id, mxcfbi->ipu_di);
2388 if (mxcfbi->dispdrv->drv->post_init) {
2389 ret = mxcfbi->dispdrv->drv->post_init(mxcfbi->dispdrv,
2393 dev_err(&pdev->dev, "post init failed\n");
2394 goto post_init_failed;
2398 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2399 if (res && res->start && res->end) {
2400 fbi->fix.smem_len = res->end - res->start + 1;
2401 fbi->fix.smem_start = res->start;
2402 fbi->screen_base = ioremap(fbi->fix.smem_start, fbi->fix.smem_len);
2403 /* Do not clear the fb content drawn in bootloader. */
2404 if (!mxcfbi->late_init)
2405 memset(fbi->screen_base, 0, fbi->fix.smem_len);
2408 mxcfbi->ipu = ipu_get_soc(mxcfbi->ipu_id);
2409 if (IS_ERR(mxcfbi->ipu)) {
2410 dev_err(&pdev->dev, "Failed to get IPU %d\n", mxcfbi->ipu_id);
2411 ret = PTR_ERR(mxcfbi->ipu);
2412 goto get_ipu_failed;
2415 /* first user uses DP with alpha feature */
2416 if (!g_dp_in_use[mxcfbi->ipu_id]) {
2417 mxcfbi->ipu_ch_irq = IPU_IRQ_BG_SYNC_EOF;
2418 mxcfbi->ipu_ch_nf_irq = IPU_IRQ_BG_SYNC_NFACK;
2419 mxcfbi->ipu_alp_ch_irq = IPU_IRQ_BG_ALPHA_SYNC_EOF;
2420 mxcfbi->ipu_ch = MEM_BG_SYNC;
2421 /* Unblank the primary fb only by default */
2423 mxcfbi->cur_blank = mxcfbi->next_blank = FB_BLANK_UNBLANK;
2425 mxcfbi->cur_blank = mxcfbi->next_blank = FB_BLANK_POWERDOWN;
2427 ret = mxcfb_register(fbi);
2429 goto mxcfb_register_failed;
2431 ipu_disp_set_global_alpha(mxcfbi->ipu, mxcfbi->ipu_ch,
2433 ipu_disp_set_color_key(mxcfbi->ipu, mxcfbi->ipu_ch, false, 0);
2435 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2436 ret = mxcfb_setup_overlay(pdev, fbi, res);
2439 mxcfb_unregister(fbi);
2440 goto mxcfb_setupoverlay_failed;
2443 g_dp_in_use[mxcfbi->ipu_id] = true;
2445 ret = device_create_file(mxcfbi->ovfbi->dev,
2446 &dev_attr_fsl_disp_property);
2448 dev_err(mxcfbi->ovfbi->dev, "Error %d on creating "
2449 "file for disp property\n",
2452 ret = device_create_file(mxcfbi->ovfbi->dev,
2453 &dev_attr_fsl_disp_dev_property);
2455 dev_err(mxcfbi->ovfbi->dev, "Error %d on creating "
2456 "file for disp device "
2459 mxcfbi->ipu_ch_irq = IPU_IRQ_DC_SYNC_EOF;
2460 mxcfbi->ipu_ch_nf_irq = IPU_IRQ_DC_SYNC_NFACK;
2461 mxcfbi->ipu_alp_ch_irq = -1;
2462 mxcfbi->ipu_ch = MEM_DC_SYNC;
2463 mxcfbi->cur_blank = mxcfbi->next_blank = FB_BLANK_POWERDOWN;
2465 ret = mxcfb_register(fbi);
2467 goto mxcfb_register_failed;
2470 platform_set_drvdata(pdev, fbi);
2472 ret = device_create_file(fbi->dev, &dev_attr_fsl_disp_property);
2474 dev_err(&pdev->dev, "Error %d on creating file for disp "
2477 ret = device_create_file(fbi->dev, &dev_attr_fsl_disp_dev_property);
2479 dev_err(&pdev->dev, "Error %d on creating file for disp "
2480 " device propety\n", ret);
2484 mxcfb_setupoverlay_failed:
2485 mxcfb_register_failed:
2488 ipu_clear_usage(mxcfbi->ipu_id, mxcfbi->ipu_di);
2490 init_dispdrv_failed:
2491 fb_dealloc_cmap(&fbi->cmap);
2492 framebuffer_release(fbi);
2493 get_fb_option_failed:
2498 static int mxcfb_remove(struct platform_device *pdev)
2500 struct fb_info *fbi = platform_get_drvdata(pdev);
2501 struct mxcfb_info *mxc_fbi = fbi->par;
2506 device_remove_file(fbi->dev, &dev_attr_fsl_disp_dev_property);
2507 device_remove_file(fbi->dev, &dev_attr_fsl_disp_property);
2508 mxcfb_blank(FB_BLANK_POWERDOWN, fbi);
2509 mxcfb_unregister(fbi);
2510 mxcfb_unmap_video_memory(fbi);
2512 if (mxc_fbi->ovfbi) {
2513 device_remove_file(mxc_fbi->ovfbi->dev,
2514 &dev_attr_fsl_disp_dev_property);
2515 device_remove_file(mxc_fbi->ovfbi->dev,
2516 &dev_attr_fsl_disp_property);
2517 mxcfb_blank(FB_BLANK_POWERDOWN, mxc_fbi->ovfbi);
2518 mxcfb_unsetup_overlay(fbi);
2519 mxcfb_unmap_video_memory(mxc_fbi->ovfbi);
2522 ipu_clear_usage(mxc_fbi->ipu_id, mxc_fbi->ipu_di);
2524 fb_dealloc_cmap(&fbi->cmap);
2525 framebuffer_release(fbi);
2529 static const struct of_device_id imx_mxcfb_dt_ids[] = {
2530 { .compatible = "fsl,mxc_sdc_fb"},
2535 * This structure contains pointers to the power management callback functions.
2537 static struct platform_driver mxcfb_driver = {
2540 .of_match_table = imx_mxcfb_dt_ids,
2542 .probe = mxcfb_probe,
2543 .remove = mxcfb_remove,
2544 .suspend = mxcfb_suspend,
2545 .resume = mxcfb_resume,
2549 * Main entry function for the framebuffer. The function registers the power
2550 * management callback functions with the kernel and also registers the MXCFB
2551 * callback functions with the core Linux framebuffer driver \b fbmem.c
2553 * @return Error code indicating success or failure
2555 int __init mxcfb_init(void)
2557 return platform_driver_register(&mxcfb_driver);
2560 void mxcfb_exit(void)
2562 platform_driver_unregister(&mxcfb_driver);
2565 module_init(mxcfb_init);
2566 module_exit(mxcfb_exit);
2568 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
2569 MODULE_DESCRIPTION("MXC framebuffer driver");
2570 MODULE_LICENSE("GPL");
2571 MODULE_SUPPORTED_DEVICE("fb");