3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * The test exercises SDRAM accesses in burst mode
31 #include <asm/processor.h>
36 #include "test_burst.h"
38 /* 8 MB test region of physical RAM */
39 #define TEST_PADDR 0x00800000
40 /* The uncached virtual region */
41 #define TEST_VADDR_NC 0x00800000
42 /* The cached virtual region */
43 #define TEST_VADDR_C 0x01000000
44 /* When an error is detected, the address where the error has been found,
45 and also the current and the expected data will be written to
46 the following flash address
48 #define TEST_FLASH_ADDR 0x40100000
50 /* Define GPIO ports to signal start of burst transfers and errors */
52 /* Use PD.8 to signal start of burst transfers */
53 #define GPIO1_DAT (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat)
54 #define GPIO1_BIT 0x0080
55 /* Configure PD.8 as general purpose output */
57 ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdpar &= ~GPIO1_BIT; \
58 ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddir |= GPIO1_BIT;
59 /* Use PD.9 to signal error */
60 #define GPIO2_DAT (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat)
61 #define GPIO2_BIT 0x0040
62 /* Configure PD.9 as general purpose output */
64 ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pdpar &= ~GPIO2_BIT; \
65 ((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddir |= GPIO2_BIT;
66 #endif /* CONFIG_LWMON */
69 static void test_prepare (void);
70 static int test_burst_start (unsigned long size, unsigned long pattern);
71 static void test_map_8M (unsigned long paddr, unsigned long vaddr, int cached);
72 static int test_mmu_is_on(void);
73 static void test_desc(unsigned long size);
74 static void test_error(char * step, volatile void * addr, unsigned long val, unsigned long pattern);
75 static void signal_init(void);
76 static void signal_start(void);
77 static void signal_error(void);
78 static void test_usage(void);
80 static unsigned long test_pattern [] = {
88 int test_burst (int argc, char *argv[])
90 unsigned long size = CACHE_LINE_SIZE;
91 unsigned int pass = 0;
97 for (size = 0, d = argv[1]; *d >= '0' && *d <= '9'; d++) {
101 if (size == 0 || *d) {
105 for (d = argv[2]; *d >= '0' && *d <= '9'; d++) {
113 } else if (argc > 3) {
118 size += (CACHE_LINE_SIZE - 1);
119 size &= ~(CACHE_LINE_SIZE - 1);
121 if (!test_mmu_is_on()) {
127 for (j = 0; !pass || j < pass; j++) {
128 for (i = 0; i < sizeof(test_pattern) / sizeof(test_pattern[0]);
130 res = test_burst_start(size, test_pattern[i]);
136 printf ("Iteration #%d passed\n", j + 1);
138 if (tstc() && 0x03 == getc())
145 static void test_prepare (void)
150 disable_interrupts();
153 printf ("Interrupts are disabled\n");
154 printf ("I-Cache is ON\n");
155 printf ("D-Cache is ON\n");
156 printf ("MMU is ON\n");
160 test_map_8M (TEST_PADDR, TEST_VADDR_NC, 0);
161 test_map_8M (TEST_PADDR, TEST_VADDR_C, 1);
163 test_map_8M (TEST_FLASH_ADDR & 0xFF800000, TEST_FLASH_ADDR & 0xFF800000, 0);
165 /* Configure GPIO ports */
169 static int test_burst_start (unsigned long size, unsigned long pattern)
171 volatile unsigned long * vaddr_c = (unsigned long *)TEST_VADDR_C;
172 volatile unsigned long * vaddr_nc = (unsigned long *)TEST_VADDR_NC;
176 printf ("Test pattern %08lx ...", pattern);
180 for (i = 0; i < n; i ++) {
181 vaddr_c [i] = pattern;
184 flush_dcache_range((unsigned long)vaddr_c, (unsigned long)(vaddr_c + n) - 1);
186 for (i = 0; i < n; i ++) {
187 register unsigned long tmp = vaddr_nc [i];
188 if (tmp != pattern) {
189 test_error("2a", vaddr_nc + i, tmp, pattern);
194 for (i = 0; i < n; i ++) {
195 register unsigned long tmp = vaddr_c [i];
196 if (tmp != pattern) {
197 test_error("2b", vaddr_c + i, tmp, pattern);
202 for (i = 0; i < n; i ++) {
203 vaddr_nc [i] = pattern;
206 for (i = 0; i < n; i ++) {
207 register unsigned long tmp = vaddr_nc [i];
208 if (tmp != pattern) {
209 test_error("3a", vaddr_nc + i, tmp, pattern);
215 for (i = 0; i < n; i ++) {
216 register unsigned long tmp = vaddr_c [i];
217 if (tmp != pattern) {
218 test_error("3b", vaddr_c + i, tmp, pattern);
225 printf(" %s\n", res == 0 ? "OK" : "");
230 static void test_map_8M (unsigned long paddr, unsigned long vaddr, int cached)
232 mtspr (MD_EPN, (vaddr & 0xFFFFFC00) | MI_EVALID);
233 mtspr (MD_TWC, MI_PS8MEG | MI_SVALID);
234 mtspr (MD_RPN, (paddr & 0xFFFFF000) | MI_BOOTINIT | (cached ? 0 : 2));
235 mtspr (MD_AP, MI_Kp);
238 static int test_mmu_is_on(void)
242 asm volatile("mfmsr %0" : "=r" (msr) :);
247 static void test_desc(unsigned long size)
250 "The following tests will be conducted:\n"
251 "1) Map %ld-byte region of physical RAM at 0x%08x\n"
252 " into two virtual regions:\n"
253 " one cached at 0x%08x and\n"
254 " the the other uncached at 0x%08x.\n",
255 size, TEST_PADDR, TEST_VADDR_NC, TEST_VADDR_C);
258 "2) Fill the cached region with a pattern, and flush the cache\n"
259 "2a) Check the uncached region to match the pattern\n"
260 "2b) Check the cached region to match the pattern\n"
261 "3) Fill the uncached region with a pattern\n"
262 "3a) Check the cached region to match the pattern\n"
263 "3b) Check the uncached region to match the pattern\n"
264 "2b) Change the patterns and go to step 2\n"
269 static void test_error(
270 char * step, volatile void * addr, unsigned long val, unsigned long pattern)
272 volatile unsigned long * p = (void *)TEST_FLASH_ADDR;
276 p[0] = (unsigned long)addr;
280 printf ("\nError at step %s, addr %08lx: read %08lx, pattern %08lx",
281 step, (unsigned long)addr, val, pattern);
284 static void signal_init(void)
286 #if defined(GPIO1_INIT)
289 #if defined(GPIO2_INIT)
294 static void signal_start(void)
296 #if defined(GPIO1_INIT)
297 if (GPIO1_DAT & GPIO1_BIT) {
298 GPIO1_DAT &= ~GPIO1_BIT;
300 GPIO1_DAT |= GPIO1_BIT;
305 static void signal_error(void)
307 #if defined(GPIO2_INIT)
308 if (GPIO2_DAT & GPIO2_BIT) {
309 GPIO2_DAT &= ~GPIO2_BIT;
311 GPIO2_DAT |= GPIO2_BIT;
316 static void test_usage(void)
318 printf("Usage: go 0x40004 [size] [count]\n");