2 * Copyright (C) 2008 Embedded Alley Solutions Inc.
4 * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
6 * Clock control register descriptions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 #include <asm/arch/mx23.h>
27 #define CLKCTRL_BASE (MX23_REGS_BASE + 0x40000)
29 #define CLKCTRL_PLLCTRL0 0x000
30 #define CLKCTRL_PLLCTRL1 0x010
31 #define CLKCTRL_CPU 0x020
32 #define CLKCTRL_HBUS 0x030
33 #define CLKCTRL_XBUS 0x040
34 #define CLKCTRL_XTAL 0x050
35 #define CLKCTRL_PIX 0x060
36 #define CLKCTRL_SSP 0x070
37 #define CLKCTRL_GPMI 0x080
38 #define CLKCTRL_SPDIF 0x090
39 #define CLKCTRL_EMI 0x0a0
40 #define CLKCTRL_IR 0x0b0
41 #define CLKCTRL_SAIF 0x0c0
42 #define CLKCTRL_TV 0x0d0
43 #define CLKCTRL_ETM 0x0e0
44 #define CLKCTRL_FRAC 0x0f0
45 #define CLKCTRL_FRAC1 0x100
46 #define CLKCTRL_CLKSEQ 0x110
47 #define CLKCTRL_RESET 0x120
48 #define CLKCTRL_STATUS 0x130
49 #define CLKCTRL_VERSION 0x140
51 /* CLKCTRL_SSP register bits, bit fields and values */
52 #define SSP_CLKGATE (1 << 31)
53 #define SSP_BUSY (1 << 29)
54 #define SSP_DIV_FRAC_EN (1 << 9)
57 /* CLKCTRL_FRAC register bits, bit fields and values */
58 #define FRAC_CLKGATEIO (1 << 31)
59 #define FRAC_IOFRAC 24
61 /* CLKCTRL_FRAC register bits, bit fields and values */
62 #define CLKSEQ_BYPASS_SSP (1 << 5)
64 #endif /* CLKCTRL_H */