2 * Copyright (C) 2008 Embedded Alley Solutions Inc.
4 * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 unsigned int mxc_get_clock(enum mxc_clock clk);
32 void enet_board_init(void);
34 extern int mxs_reset_block(volatile void *addr);
38 * Most of i.MX28 SoC registers are associated with four addresses
39 * used for different operations - read/write, set, clear and toggle bits.
41 * Some of registers do not implement such feature and, thus, should be
42 * accessed/manipulated via single address in common way.
44 #define REG_RD(base, reg) \
45 (*(volatile unsigned int *)((base) + (reg)))
46 #define REG_WR(base, reg, value) \
47 ((*(volatile unsigned int *)((base) + (reg))) = (value))
48 #define REG_SET(base, reg, value) \
49 ((*(volatile unsigned int *)((base) + (reg ## _SET))) = (value))
50 #define REG_CLR(base, reg, value) \
51 ((*(volatile unsigned int *)((base) + (reg ## _CLR))) = (value))
52 #define REG_TOG(base, reg, value) \
53 ((*(volatile unsigned int *)((base) + (reg ## _TOG))) = (value))
55 #define REG_RD_ADDR(addr) \
56 (*(volatile unsigned int *)((addr)))
57 #define REG_WR_ADDR(addr, value) \
58 ((*(volatile unsigned int *)((addr))) = (value))
59 #define REG_SET_ADDR(addr, value) \
60 ((*(volatile unsigned int *)((addr) + 0x4)) = (value))
61 #define REG_CLR_ADDR(addr, value) \
62 ((*(volatile unsigned int *)((addr) + 0x8)) = (value))
63 #define REG_TOG_ADDR(addr, value) \
64 ((*(volatile unsigned int *)((addr) + 0xc)) = (value))
67 * Register base address
69 #define REGS_ICOL_BASE 0x80000000
70 #define REGS_HSADC_BASE 0x80002000
71 #define REGS_APBH_BASE 0x80004000
72 #define REGS_PERFMON_BASE 0x80006000
73 #define REGS_BCH_BASE 0x8000A000
74 #define REGS_GPMI_BASE 0x8000C000
75 #define REGS_SSP0_BASE 0x80010000
76 #define REGS_SSP1_BASE 0x80012000
77 #define REGS_SSP2_BASE 0x80014000
78 #define REGS_SSP3_BASE 0x80016000
79 #define REGS_PINCTRL_BASE 0x80018000
80 #define REGS_DIGCTL_BASE 0x8001C000
81 #define REGS_ETM_BASE 0x80022000
82 #define REGS_APBX_BASE 0x80024000
83 #define REGS_DCP_BASE 0x80028000
84 #define REGS_PXP_BASE 0x8002A000
85 #define REGS_OCOTP_BASE 0x8002C000
86 #define REGS_AXI_AHB0_BASE 0x8002E000
87 #define REGS_LCDIF_BASE 0x80030000
88 #define REGS_CAN0_BASE 0x80032000
89 #define REGS_CAN1_BASE 0x80034000
90 #define REGS_SIMDBG_BASE 0x8003C000
91 #define REGS_SIMGPMISEL_BASE 0x8003C200
92 #define REGS_SIMSSPSEL_BASE 0x8003C300
93 #define REGS_SIMMEMSEL_BASE 0x8003C400
94 #define REGS_GPIOMON_BASE 0x8003C500
95 #define REGS_SIMENET_BASE 0x8003C700
96 #define REGS_ARMJTAG_BASE 0x8003C800
97 #define REGS_CLKCTRL_BASE 0x80040000
98 #define REGS_SAIF0_BASE 0x80042000
99 #define REGS_POWER_BASE 0x80044000
100 #define REGS_SAIF1_BASE 0x80046000
101 #define REGS_LRADC_BASE 0x80050000
102 #define REGS_SPDIF_BASE 0x80054000
103 #define REGS_RTC_BASE 0x80056000
104 #define REGS_I2C0_BASE 0x80058000
105 #define REGS_I2C1_BASE 0x8005A000
106 #define REGS_PWM_BASE 0x80064000
107 #define REGS_TIMROT_BASE 0x80068000
108 #define REGS_UARTAPP0_BASE 0x8006A000
109 #define REGS_UARTAPP1_BASE 0x8006C000
110 #define REGS_UARTAPP2_BASE 0x8006E000
111 #define REGS_UARTAPP3_BASE 0x80070000
112 #define REGS_UARTAPP4_BASE 0x80072000
113 #define REGS_UARTDBG_BASE 0x80074000
114 #define REGS_USBPHY0_BASE 0x8007C000
115 #define REGS_USBPHY1_BASE 0x8007E000
116 #define REGS_USBCTRL0_BASE 0x80080000
117 #define REGS_USBCTRL1_BASE 0x80090000
118 #define REGS_DFLPT_BASE 0x800C0000
119 #define REGS_DRAM_BASE 0x800E0000
120 #define REGS_ENET_BASE 0x800F0000
122 #define BCH_BASE_ADDR REGS_BCH_BASE
123 #define GPMI_BASE_ADDR REGS_GPMI_BASE
124 #define APBHDMA_BASE_ADDR REGS_APBH_BASE
125 #define CLKCTRL_BASE_ADDR REGS_CLKCTRL_BASE
127 #define MXS_SET_ADDR 0x04
128 #define MXS_CLR_ADDR 0x08
129 #define MXS_TOG_ADDR 0x0c
131 #endif /* __MX28_H */