2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * David Updegraff, Cray, Inc. dave@cray.com: our 405 is walnut-lite..
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * board/config.h - configuration options, board specific
33 * High Level Configuration Options
37 #define CONFIG_405GP 1 /* This is a PPC405 CPU */
38 #define CONFIG_4xx 1 /* ...member of PPC405 family */
39 #define CONFIG_SYS_CLK_FREQ 25000000
40 #define CONFIG_BAUDRATE 9600
41 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
42 #define CONFIG_MII 1 /* MII PHY management */
43 #define CONFIG_PHY_ADDR 1 /* PHY address; handling of ENET */
44 #define CONFIG_BOARD_EARLY_INIT_F 1 /* early setup for 405gp */
45 #define CONFIG_MISC_INIT_R 1 /* so that a misc_init_r() is called */
47 /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to
48 * keep possible initrd ramdisk decompression out. This is in k (1024 bytes)
49 #define CONFIG_PRAM 16
51 #define CONFIG_LOADADDR 0x100000 /* where TFTP images go */
52 #undef CONFIG_BOOTARGS
54 /* Bootcmd is overridden by the bootscript in board/cray/L1
56 #define CONFIG_SYS_AUTOLOAD "no"
57 #define CONFIG_BOOTCOMMAND "dhcp"
60 * ..during experiments..
61 #define CONFIG_SERVERIP 10.0.0.1
62 #define CONFIG_ETHADDR 00:40:a6:80:14:5
64 #define CONFIG_HARD_I2C 1 /* hardware support for i2c */
65 #define CONFIG_SDRAM_BANK0 1
66 #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
67 #define CONFIG_SYS_I2C_SLAVE 0x7F
68 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
69 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
70 #define CONFIG_IDENT_STRING "Cray L1"
71 #define CONFIG_ENV_OVERWRITE 1
72 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
73 #define CONFIG_SYS_HUSH_PARSER 1
74 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
75 #define CONFIG_AUTOSCRIPT 1
79 * Command line configuration.
82 #define CONFIG_CMD_BDI
83 #define CONFIG_CMD_IMI
84 #define CONFIG_CMD_FLASH
85 #define CONFIG_CMD_MEMORY
86 #define CONFIG_CMD_NET
87 #define CONFIG_CMD_ENV
88 #define CONFIG_CMD_CONSOLE
89 #define CONFIG_CMD_ASKENV
90 #define CONFIG_CMD_ECHO
91 #define CONFIG_CMD_IMMAP
92 #define CONFIG_CMD_REGINFO
93 #define CONFIG_CMD_DHCP
94 #define CONFIG_CMD_DATE
95 #define CONFIG_CMD_RUN
96 #define CONFIG_CMD_I2C
97 #define CONFIG_CMD_EEPROM
98 #define CONFIG_CMD_DIAG
99 #define CONFIG_CMD_AUTOSCRIPT
100 #define CONFIG_CMD_SETGETDCR
106 #define CONFIG_BOOTP_SUBNETMASK
107 #define CONFIG_BOOTP_GATEWAY
108 #define CONFIG_BOOTP_HOSTNAME
109 #define CONFIG_BOOTP_BOOTPATH
110 #define CONFIG_BOOTP_VENDOREX
111 #define CONFIG_BOOTP_DNS
112 #define CONFIG_BOOTP_BOOTFILESIZE
116 * how many time to fail & restart a net-TFTP before giving up & resetting
117 * the board hoping that a reset of net interface might help..
119 #define CONFIG_NET_RESET 5
122 * bauds. Just to make it compile; in our case, I read the base_baud
123 * from the DCR anyway, so its kinda-tied to the above ref. clock which in turn
124 * drives the system clock.
126 #define CONFIG_SYS_BASE_BAUD 403225
127 #define CONFIG_SYS_BAUDRATE_TABLE \
128 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
131 * Miscellaneous configurable options
133 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
134 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
135 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
136 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
137 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
140 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* where to load what we get from TFTP */
141 #define CONFIG_SYS_TFTP_LOADADDR CONFIG_SYS_LOAD_ADDR
142 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
143 #define CONFIG_SYS_DRAM_TEST 1
145 /*-----------------------------------------------------------------------
146 * Start addresses for the final memory configuration
147 * (Set up by the startup code)
148 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
150 #define CONFIG_SYS_SDRAM_BASE 0x00000000
151 #define CONFIG_SYS_FLASH_BASE 0xFFC00000
152 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
155 #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 192 kB for Monitor */
158 * For booting Linux, the board info and command line data
159 * have to be in the first 8 MB of memory, since this is
160 * the maximum mapped by the Linux kernel during initialization.
162 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
163 /*-----------------------------------------------------------------------
166 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
167 #define CONFIG_SYS_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
168 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
169 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
171 /* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector */
172 #define CONFIG_ENV_OFFSET 0x3c8000
173 #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
174 #define CONFIG_ENV_SIZE 0x1000 /* Total Size of Environment area */
175 #define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
177 /* Memory tests: U-BOOT relocates itself to the top of Ram, so its at
178 * 32meg-(128k+some_malloc_space+copy-of-ENV sector)..
180 #define CONFIG_SYS_SDRAM_SIZE 32 /* megs of ram */
181 #define CONFIG_SYS_MEMTEST_START 0x2000 /* memtest works from the end of */
182 /* the exception vector table */
183 /* to the end of the DRAM */
184 /* less monitor and malloc area */
185 #define CONFIG_SYS_STACK_USAGE 0x10000 /* Reserve 64k for the stack usage */
186 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* 128k for malloc space */
187 #define CONFIG_SYS_MEM_END_USAGE ( CONFIG_SYS_MONITOR_LEN \
188 + CONFIG_SYS_MALLOC_LEN \
189 + CONFIG_ENV_SECT_SIZE \
190 + CONFIG_SYS_STACK_USAGE )
192 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_SIZE * 1024 * 1024 - CONFIG_SYS_MEM_END_USAGE)
193 /* END ENVIRONNEMENT FLASH */
196 * Init Memory Controller:
198 * BR0/1 and OR0/1 (FLASH)
201 #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
204 /*-----------------------------------------------------------------------
205 * Definitions for initial stack pointer and data area (in OnChipMem )
208 /* On Chip Memory location */
209 #define CONFIG_SYS_TEMP_STACK_OCM 1
210 #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
211 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000
213 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of SDRAM */
214 #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM */
215 #define CONFIG_SYS_GBL_DATA_SIZE 256 /* size in bytes reserved for initial data */
216 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
217 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
219 #define CONFIG_SYS_OCM_DATA_ADDR 0xF0000000
220 #define CONFIG_SYS_OCM_DATA_SIZE 0x1000
221 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_DATA_ADDR /* inside of On Chip SRAM */
222 #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of On Chip SRAM */
223 #define CONFIG_SYS_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
224 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
225 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
228 /*-----------------------------------------------------------------------
229 * Definitions for Serial Presence Detect EEPROM address
231 #define EEPROM_WRITE_ADDRESS 0xA0
232 #define EEPROM_READ_ADDRESS 0xA1
235 * Internal Definitions
239 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
240 #define BOOTFLAG_WARM 0x02 /* Software reboot */
242 #endif /* __CONFIG_H */