2 * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * config for XPedite1000 from XES Inc.
25 * Ported from EBONY config by Travis B. Sawyer <tsawyer@sandburst.com>
26 * (C) Copyright 2003 Sandburst Corporation
27 * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
33 /* High Level Configuration Options */
34 #define CONFIG_XPEDITE1K 1 /* Board is XPedite 1000 */
35 #define CONFIG_4xx 1 /* ... PPC4xx family */
37 #define CONFIG_440GX 1 /* 440 GX */
38 #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
39 #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
44 #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
45 #define SPD_EEPROM_ADDRESS {0x54} /* SPD i2c spd addresses */
46 #define CONFIG_VERY_BIG_RAM 1
49 * Base addresses -- Note these are effective addresses where the
50 * actual resources get mapped (not physical addresses)
52 #define CONFIG_SYS_SDRAM_BASE 0x00000000
53 #define CONFIG_SYS_FLASH_BASE 0xff000000 /* start of FLASH */
54 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */
55 #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
56 #define CONFIG_SYS_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
57 #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
58 #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
59 #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
60 #define CONFIG_SYS_GPIO_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000700)
65 #define CONFIG_SYS_MEMTEST_START 0x0400000
66 #define CONFIG_SYS_MEMTEST_END 0x0C00000
69 #define CONFIG_POST (CONFIG_SYS_POST_RTC | \
75 #define USR_LED0 0x00000080
76 #define USR_LED1 0x00000100
77 #define USR_LED2 0x00000200
78 #define USR_LED3 0x00000400
81 extern unsigned long in32(unsigned int);
82 extern void out32(unsigned int, unsigned long);
84 #define LED0_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED0))
85 #define LED1_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED1))
86 #define LED2_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED2))
87 #define LED3_ON() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) & ~USR_LED3))
89 #define LED0_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED0))
90 #define LED1_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED1))
91 #define LED2_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED2))
92 #define LED3_OFF() out32(CONFIG_SYS_GPIO_BASE, (in32(CONFIG_SYS_GPIO_BASE) | USR_LED3))
96 * Use internal SRAM for initial stack
98 #define CONFIG_SYS_TEMP_STACK_OCM 1
99 #define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_ISRAM_BASE
100 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
101 #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
102 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data */
103 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
104 #define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
105 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_POST_WORD_ADDR
107 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
108 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc */
113 #define CONFIG_SYS_BAUDRATE_TABLE \
114 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
115 #define CONFIG_BAUDRATE 9600
116 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
117 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
120 * NOR flash configuration
122 #define CONFIG_SYS_MAX_FLASH_BANKS 3
123 #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, 0xf0000000, 0xf4000000 }
124 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */
125 #define CONFIG_FLASH_CFI_DRIVER
126 #define CONFIG_SYS_FLASH_CFI
127 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
128 #define CONFIG_SYS_FLASH_QUIET_TEST /* MirrorBit flashes are optional */
130 #undef CONFIG_SYS_FLASH_CHECKSUM
131 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
132 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
137 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
138 #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
139 #define CONFIG_SYS_I2C_SLAVE 0x7f
140 #define CONFIG_SYS_I2C_NOPROBES {0x55,0x56,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x69}
143 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
144 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
145 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
146 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
148 /* I2C RTC: STMicro M41T00 */
149 #define CONFIG_RTC_M41T11 1
150 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
151 #define CONFIG_SYS_M41T11_BASE_YEAR 2000
157 #define CONFIG_PCI /* include pci support */
158 #define CONFIG_PCI_PNP /* do pci plug-and-play */
159 #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
160 #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
162 /* Board-specific PCI */
163 #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
164 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
165 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
166 #define CONFIG_SYS_PCI_FORCE_PCI_CONV /* Force PCI Conventional Mode */
171 #define CONFIG_PPC4xx_EMAC
172 #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
173 #define CONFIG_NET_MULTI 1
174 #define CONFIG_MII 1 /* MII PHY management */
175 #define CONFIG_PHY_RESET 1 /* reset phy upon startup */
176 #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
177 #define CONFIG_ETHPRIME "ppc_4xx_eth2"
178 #define CONFIG_PHY_ADDR 4 /* PHY address phy0 not populated */
179 #define CONFIG_PHY2_ADDR 4 /* PHY address phy2 */
180 #define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
181 #define CONFIG_PHY3_ADDR 8 /* PHY address phy3 */
182 #define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
185 #define CONFIG_BOOTP_BOOTFILESIZE
186 #define CONFIG_BOOTP_BOOTPATH
187 #define CONFIG_BOOTP_GATEWAY
188 #define CONFIG_BOOTP_HOSTNAME
191 * Command configuration
193 #include <config_cmd_default.h>
195 #define CONFIG_CMD_ASKENV
196 #define CONFIG_CMD_DATE
197 #define CONFIG_CMD_DHCP
198 #define CONFIG_CMD_EEPROM
199 #define CONFIG_CMD_ELF
200 #define CONFIG_CMD_FLASH
201 #define CONFIG_CMD_I2C
202 #define CONFIG_CMD_IRQ
203 #define CONFIG_CMD_JFFS2
204 #define CONFIG_CMD_MII
205 #define CONFIG_CMD_NET
206 #define CONFIG_CMD_PCI
207 #define CONFIG_CMD_PING
208 #define CONFIG_CMD_SAVEENV
209 #define CONFIG_CMD_SNTP
212 * Miscellaneous configurable options
214 #define CONFIG_SYS_LONGHELP /* undef to save memory */
215 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
216 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
217 #if defined(CONFIG_CMD_KGDB)
218 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
220 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
222 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
223 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
224 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
225 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
226 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
229 * For booting Linux, the board info and command line data
230 * have to be in the first 8 MB of memory, since this is
231 * the maximum mapped by the Linux kernel during initialization.
233 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
238 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
239 #define BOOTFLAG_WARM 0x02 /* Software reboot */
244 #if defined(CONFIG_CMD_KGDB)
245 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
246 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
250 * Environment Configuration
252 #define CONFIG_ENV_IS_IN_FLASH 1
253 #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128k (one sector) for env */
254 #define CONFIG_ENV_SIZE 0x8000
255 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
259 * fff80000 - ffffffff U-Boot (512 KB)
260 * fff40000 - fff7ffff U-Boot Environment (256 KB)
261 * fff00000 - fff3ffff FDT (256KB)
262 * ffc00000 - ffefffff OS image (3MB)
263 * ff000000 - ffbfffff OS Use/Filesystem (12MB)
266 #define CONFIG_UBOOT_ENV_ADDR MK_STR(TEXT_BASE)
267 #define CONFIG_FDT_ENV_ADDR MK_STR(0xfff00000)
268 #define CONFIG_OS_ENV_ADDR MK_STR(0xffc00000)
270 #define CONFIG_PROG_UBOOT \
271 "$download_cmd $loadaddr $ubootfile; " \
272 "if test $? -eq 0; then " \
273 "protect off "CONFIG_UBOOT_ENV_ADDR" +80000; " \
274 "erase "CONFIG_UBOOT_ENV_ADDR" +80000; " \
275 "cp.w $loadaddr "CONFIG_UBOOT_ENV_ADDR" 40000; " \
276 "protect on "CONFIG_UBOOT_ENV_ADDR" +80000; " \
277 "cmp.b $loadaddr "CONFIG_UBOOT_ENV_ADDR" 80000; " \
278 "if test $? -ne 0; then " \
279 "echo PROGRAM FAILED; " \
281 "echo PROGRAM SUCCEEDED; " \
284 "echo DOWNLOAD FAILED; " \
287 #define CONFIG_BOOT_OS_NET \
288 "$download_cmd $osaddr $osfile; " \
289 "if test $? -eq 0; then " \
290 "if test -n $fdtaddr; then " \
291 "$download_cmd $fdtaddr $fdtfile; " \
292 "if test $? -eq 0; then " \
293 "bootm $osaddr - $fdtaddr; " \
295 "echo FDT DOWNLOAD FAILED; " \
301 "echo OS DOWNLOAD FAILED; " \
304 #define CONFIG_PROG_OS \
305 "$download_cmd $osaddr $osfile; " \
306 "if test $? -eq 0; then " \
307 "erase "CONFIG_OS_ENV_ADDR" +$filesize; " \
308 "cp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
309 "cmp.b $osaddr "CONFIG_OS_ENV_ADDR" $filesize; " \
310 "if test $? -ne 0; then " \
311 "echo OS PROGRAM FAILED; " \
313 "echo OS PROGRAM SUCCEEDED; " \
316 "echo OS DOWNLOAD FAILED; " \
319 #define CONFIG_PROG_FDT \
320 "$download_cmd $fdtaddr $fdtfile; " \
321 "if test $? -eq 0; then " \
322 "erase "CONFIG_FDT_ENV_ADDR" +$filesize;" \
323 "cp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
324 "cmp.b $fdtaddr "CONFIG_FDT_ENV_ADDR" $filesize; " \
325 "if test $? -ne 0; then " \
326 "echo FDT PROGRAM FAILED; " \
328 "echo FDT PROGRAM SUCCEEDED; " \
331 "echo FDT DOWNLOAD FAILED; " \
334 #define CONFIG_EXTRA_ENV_SETTINGS \
336 "download_cmd=tftp\0" \
337 "console_args=console=ttyS0,115200\0" \
338 "root_args=root=/dev/nfs rw\0" \
339 "misc_args=ip=on\0" \
340 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
341 "bootfile=/home/user/file\0" \
342 "osfile=/home/user/uImage-XPedite1000\0" \
343 "fdtfile=/home/user/xpedite1000.dtb\0" \
344 "ubootfile=/home/user/u-boot.bin\0" \
346 "osaddr=0x1000000\0" \
347 "loadaddr=0x1000000\0" \
348 "prog_uboot="CONFIG_PROG_UBOOT"\0" \
349 "prog_os="CONFIG_PROG_OS"\0" \
350 "prog_fdt="CONFIG_PROG_FDT"\0" \
351 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
352 "bootcmd_flash=run set_bootargs; " \
353 "bootm "CONFIG_OS_ENV_ADDR" - "CONFIG_FDT_ENV_ADDR"\0" \
354 "bootcmd=run bootcmd_flash\0"
355 #endif /* __CONFIG_H */