2 * Copyright 2012-2013 Stefan Roese <sr@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
11 * High Level Configuration Options
15 #define CONFIG_MPC5200
16 #define CONFIG_A3M071 /* A3M071 board */
17 #define CONFIG_DISPLAY_BOARDINFO
19 #define CONFIG_SYS_TEXT_BASE 0x01000000 /* boot low for 32 MiB boards */
21 #define CONFIG_SPL_TARGET "u-boot-img.bin"
23 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33MHz */
25 #define CONFIG_MISC_INIT_R
26 #define CONFIG_SYS_LOWBOOT /* Enable lowboot */
29 #define CONFIG_HOSTNAME a4m2k
31 #define CONFIG_HOSTNAME a3m071
34 #define CONFIG_BOOTCOUNT_LIMIT
37 * Serial console configuration
39 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
40 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
41 #define CONFIG_SYS_BAUDRATE_TABLE \
42 { 9600, 19200, 38400, 57600, 115200, 230400 }
45 * Command line configuration.
47 #define CONFIG_CMD_BSP
48 #define CONFIG_CMD_CACHE
49 #define CONFIG_CMD_MII
50 #define CONFIG_CMD_REGINFO
51 #define CONFIG_BOOTP_SEND_HOSTNAME
52 #define CONFIG_BOOTP_SERVERIP
53 #define CONFIG_BOOTP_MAY_FAIL
54 #define CONFIG_BOOTP_BOOTPATH
55 #define CONFIG_BOOTP_GATEWAY
56 #define CONFIG_BOOTP_SERVERIP
57 #define CONFIG_NET_RETRY_COUNT 3
58 #define CONFIG_NETCONSOLE
59 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
60 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
61 #define CONFIG_MTD_PARTITIONS /* needed for UBI */
62 #define CONFIG_FLASH_CFI_MTD
63 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
64 #define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:512k(u-boot)," \
77 #define CONFIG_LZO /* needed for UBI */
78 #define CONFIG_RBTREE /* needed for UBI */
79 #define CONFIG_CMD_MTDPARTS
80 #define CONFIG_CMD_UBI
81 #define CONFIG_CMD_UBIFS
84 * IPB Bus clocking configuration.
86 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
87 /* define for 66MHz speed - undef for 33MHz PCI clock speed */
89 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
91 #undef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
94 /* maximum size of the flat tree (8K) */
95 #define OF_FLAT_TREE_MAX_SIZE 8192
97 #define OF_CPU "PowerPC,5200@0"
98 #define OF_SOC "soc5200@f0000000"
99 #define OF_TBCLK (bd->bi_busfreq / 4)
100 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
103 * NOR flash configuration
105 #define CONFIG_SYS_FLASH_BASE 0xfc000000
106 #define CONFIG_SYS_FLASH_SIZE 0x02000000
107 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000)
109 #define CONFIG_SYS_MAX_FLASH_BANKS 1
110 #define CONFIG_SYS_MAX_FLASH_SECT 256
111 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000
112 #define CONFIG_SYS_FLASH_WRITE_TOUT 500
113 #define CONFIG_SYS_FLASH_LOCK_TOUT 5
114 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000
115 #define CONFIG_SYS_FLASH_PROTECTION
116 #define CONFIG_FLASH_CFI_DRIVER
117 #define CONFIG_SYS_FLASH_CFI
118 #define CONFIG_SYS_FLASH_EMPTY_INFO
119 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
120 #define CONFIG_FLASH_VERIFY
123 * Environment settings
125 #define CONFIG_ENV_IS_IN_FLASH
126 #define CONFIG_ENV_SIZE 0x10000
127 #define CONFIG_ENV_SECT_SIZE 0x20000
128 #define CONFIG_ENV_OVERWRITE
129 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
130 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
135 #define CONFIG_SYS_MBAR 0xf0000000
136 #define CONFIG_SYS_SDRAM_BASE 0x00000000
137 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
139 /* Use SRAM until RAM will be available */
140 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
141 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
143 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
144 GENERATED_GBL_DATA_SIZE)
145 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
147 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
149 #define CONFIG_SYS_MONITOR_LEN (512 << 10)
150 #define CONFIG_SYS_MALLOC_LEN (4 << 20)
151 #define CONFIG_SYS_BOOTMAPSZ (8 << 20)
154 * Ethernet configuration
156 #define CONFIG_MPC5xxx_FEC
157 #define CONFIG_MPC5xxx_FEC_MII100
159 #define CONFIG_PHY_ADDR 0x01
161 #define CONFIG_PHY_ADDR 0x00
169 * GPIO-config depends on failsave-level
170 * failsave 0 means just MPX-config, no digiboard, no fpga
171 * 1 means digiboard ok
176 #define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C805
178 /* for failsave-level 0 - full failsave */
179 #define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C005
180 /* for failsave-level 1 - only digiboard ok */
181 #define CONFIG_SYS_GPS_PORT_CONFIG_1 0x1005C065
182 /* for failsave-level 2 - all ok */
183 #define CONFIG_SYS_GPS_PORT_CONFIG_2 0x1005C065
186 #define CONFIG_WDOG_GPIO_PIN GPIO_WKUP_7
187 #if defined(CONFIG_A4M2K) && !defined(CONFIG_SPL_BUILD)
188 #define CONFIG_HW_WATCHDOG /* Use external HW-Watchdog */
192 * Configuration matrix
194 * failsave 0 0x1005C005 00010000000001011100000000000101 ( full failsave )
195 * failsave 1 0x1005C065 00010000000001011100000001100101 ( digib.-ver ok )
196 * failsave 2 0x1005C065 00010000000001011100000001100101 ( all ok )
197 * || ||| || | ||| | | | |
198 * || ||| || | ||| | | | | bit rev name
199 * ++-+++-++--+---+++-+---+---+---+- 0 31 CS1
200 * +-+++-++--+---+++-+---+---+---+- 1 30 LPTZ
201 * ||| || | ||| | | | | 2 29 ALTs
202 * +++-++--+---+++-+---+---+---+- 3 28 ALTs
203 * ++-++--+---+++-+---+---+---+- 4 27 CS7
204 * +-++--+---+++-+---+---+---+- 5 26 CS6
205 * || | ||| | | | | 6 25 ATA
206 * ++--+---+++-+---+---+---+- 7 24 ATA
207 * +--+---+++-+---+---+---+- 8 23 IR_USB_CLK
208 * | ||| | | | | 9 22 IRDA
209 * | ||| | | | | 10 21 IRDA
210 * +---+++-+---+---+---+- 11 20 IRDA
211 * ||| | | | | 12 19 Ether
212 * ||| | | | | 13 18 Ether
213 * ||| | | | | 14 17 Ether
214 * +++-+---+---+---+- 15 16 Ether
215 * ++-+---+---+---+- 16 15 PCI_DIS
216 * +-+---+---+---+- 17 14 USB_SE
218 * +---+---+---+- 19 12 USB
222 * +---+---+- 23 8 PSC3
235 * Miscellaneous configurable options
237 #define CONFIG_SYS_LONGHELP
239 #define CONFIG_CMDLINE_EDITING
241 #if defined(CONFIG_CMD_KGDB)
242 #define CONFIG_SYS_CBSIZE 1024
244 #define CONFIG_SYS_CBSIZE 256
246 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
247 #define CONFIG_SYS_MAXARGS 16
248 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
250 #define CONFIG_SYS_MEMTEST_START 0x00100000
251 #define CONFIG_SYS_MEMTEST_END 0x00f00000
253 #define CONFIG_SYS_LOAD_ADDR 0x00100000
255 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
258 * Various low-level settings
260 #define CONFIG_SYS_HID0_INIT (HID0_ICE | HID0_ICFI)
261 #define CONFIG_SYS_HID0_FINAL HID0_ICE
263 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
264 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
265 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
266 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
270 #define CONFIG_SYS_CS1_START 0xf1000000
271 #define CONFIG_SYS_CS1_SIZE (512 << 10) /* 512KiB MRAM */
274 #define CONFIG_SYS_CS2_START 0xe0000000
275 #define CONFIG_SYS_CS2_SIZE 0x00100000
277 /* FPGA slave io (512kiB / 1MiB) - see ticket #66 */
278 #define CONFIG_SYS_CS3_START 0xE9000000
280 #define CONFIG_SYS_CS3_SIZE 0x00100000
282 #define CONFIG_SYS_CS3_SIZE 0x00080000
284 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */
285 #define CONFIG_SYS_CS3_CFG 0x0032B900
288 /* Diagnosis Interface - see ticket #63 */
289 #define CONFIG_SYS_CS4_START 0xEA000000
290 #define CONFIG_SYS_CS4_SIZE 0x00000001
291 /* 00000000 00000010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0002B900 */
292 #define CONFIG_SYS_CS4_CFG 0x0002B900
295 /* FPGA master io (64kiB / 1MiB) - see ticket #66 */
296 #define CONFIG_SYS_CS5_START 0xE8000000
298 #define CONFIG_SYS_CS5_SIZE 0x00100000
300 #define CONFIG_SYS_CS5_SIZE 0x00010000
302 /* 00000000 00110010 1 0 1 1 10 01 00 00 0 0 0 0 = 0x0032B900 */
303 #define CONFIG_SYS_CS5_CFG 0x0032B900
305 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* for pci_clk = 66 MHz */
306 #define CONFIG_SYS_BOOTCS_CFG 0x0006F900
307 #define CONFIG_SYS_CS1_CFG 0x0008FD00
308 #define CONFIG_SYS_CS2_CFG 0x0006F90C
309 #else /* for pci_clk = 33 MHz */
310 #define CONFIG_SYS_BOOTCS_CFG 0x0002F900
311 #define CONFIG_SYS_CS1_CFG 0x0001FB00
312 #define CONFIG_SYS_CS2_CFG 0x0002F90C
315 #define CONFIG_SYS_CS_BURST 0x00000000
316 /* set DC for FPGA CS5 and CS3 to 0 - see ticket #66 */
317 /* R 7 R 6 R 5 R 4 R 3 R 2 R 1 R 0 */
318 /* 00 11 00 11 00 00 00 11 00 00 00 00 00 00 00 00 */
319 #define CONFIG_SYS_CS_DEADCYCLE 0x33030000
321 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
324 * Environment Configuration
327 #define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */
328 #undef CONFIG_BOOTARGS
329 #define CONFIG_ZERO_BOOTDELAY_CHECK
331 #define CONFIG_SYS_AUTOLOAD "n"
333 #define CONFIG_PREBOOT "echo;" \
334 "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \
335 "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \
338 #undef CONFIG_BOOTARGS
340 #define CONFIG_SYS_OS_BASE 0xfc200000
341 #define CONFIG_SYS_FDT_BASE 0xfc1e0000
343 #define CONFIG_EXTRA_ENV_SETTINGS \
346 "loadaddr=200000\0" \
347 "kernel_addr=" __stringify(CONFIG_SYS_OS_BASE) "\0" \
348 "kernel_addr_r=1000000\0" \
349 "fdt_addr=" __stringify(CONFIG_SYS_FDT_BASE) "\0" \
350 "fdt_addr_r=1800000\0" \
351 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
352 "fdtfile=" __stringify(CONFIG_HOSTNAME) "/" \
353 __stringify(CONFIG_HOSTNAME) ".dtb\0" \
354 "rootpath=/opt/eldk-5.2.1/powerpc/" \
355 "core-image-minimal-mtdutils-dropbear-generic\0" \
356 "consoledev=ttyPSC0\0" \
357 "nfsargs=setenv bootargs root=/dev/nfs rw " \
358 "nfsroot=${serverip}:${rootpath}\0" \
359 "ramargs=setenv bootargs root=/dev/ram rw\0" \
360 "mtdargs=setenv bootargs root=/dev/mtdblock8 " \
361 "rootfstype=squashfs,jffs2\0" \
362 "addhost=setenv bootargs ${bootargs} " \
363 "hostname=${hostname}\0" \
364 "addip=setenv bootargs ${bootargs} " \
365 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
366 ":${hostname}:${netdev}:off panic=1\0" \
367 "addtty=setenv bootargs ${bootargs} " \
368 "console=${consoledev},${baudrate}\0" \
369 "flash_nfs=run nfsargs addip addtty addmtd addhost;" \
370 "bootm ${kernel_addr} - ${fdt_addr}\0" \
371 "flash_mtd=run mtdargs addip addtty addmtd addhost;" \
372 "bootm ${kernel_addr} - ${fdt_addr}\0" \
373 "flash_self=run ramargs addip addtty addmtd addhost;" \
374 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
375 "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \
376 "tftp ${fdt_addr_r} ${fdtfile};" \
377 "run nfsargs addip addtty addmtd addhost;" \
378 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
379 "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME) \
380 "/u-boot-img.bin\0" \
381 "update=protect off fc000000 fc07ffff;" \
382 "era fc000000 fc07ffff;" \
383 "cp.b ${loadaddr} fc000000 ${filesize}\0" \
384 "upd=run load;run update\0" \
385 "upd_fdt=tftp 1800000 a3m071/a3m071.dtb;" \
386 "run mtdargs addip addtty addmtd addhost;" \
387 "fdt addr 1800000;fdt boardsetup;fdt chosen;" \
388 "erase fc1e0000 fc1fffff;cp.b 1800000 fc1e0000 20000" \
389 "upd_kernel=tftp 1000000 a3m071/uImage-uncompressed;" \
390 "erase fc200000 fc6fffff;" \
391 "cp.b 1000000 fc200000 ${filesize}" \
392 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
393 "mtdids=" MTDIDS_DEFAULT "\0" \
394 "mtdparts=" MTDPARTS_DEFAULT "\0" \
397 #define CONFIG_BOOTCOMMAND "run flash_mtd"
400 * SPL related defines
402 #define CONFIG_SPL_FRAMEWORK
403 #define CONFIG_SPL_BOARD_INIT
404 #define CONFIG_SPL_NOR_SUPPORT
405 #define CONFIG_SPL_TEXT_BASE 0xfc000000
406 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */
407 #define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */
408 #define CONFIG_SPL_SERIAL_SUPPORT
410 /* Place BSS for SPL near end of SDRAM */
411 #define CONFIG_SPL_BSS_START_ADDR ((128 - 1) << 20)
412 #define CONFIG_SPL_BSS_MAX_SIZE (64 << 10)
414 #define CONFIG_SPL_OS_BOOT
415 #define CONFIG_SPL_ENV_SUPPORT
416 /* Place patched DT blob (fdt) at this address */
417 #define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000
419 /* Settings for real U-Boot to be loaded from NOR flash */
421 extern char __spl_flash_end[];
423 #define CONFIG_SYS_UBOOT_BASE __spl_flash_end
424 #define CONFIG_SYS_SPL_MAX_LEN (32 << 10)
425 #define CONFIG_SYS_UBOOT_START 0x1000100
427 #endif /* __CONFIG_H */