3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-3 board.
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_IXP425 1
14 #define CONFIG_ACTUX3 1
16 #define CONFIG_MACH_TYPE 1481
18 #define CONFIG_DISPLAY_CPUINFO 1
19 #define CONFIG_DISPLAY_BOARDINFO 1
21 #define CONFIG_IXP_SERIAL
22 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
23 #define CONFIG_BAUDRATE 115200
24 #define CONFIG_BOOTDELAY 3
25 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
26 #define CONFIG_BOARD_EARLY_INIT_F 1
27 #define CONFIG_SYS_LDSCRIPT "board/actux3/u-boot.lds"
29 /***************************************************************
30 * U-boot generic defines start here.
31 ***************************************************************/
32 /* Size of malloc() pool */
33 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
35 /* allow to overwrite serial and ethaddr */
36 #define CONFIG_ENV_OVERWRITE
38 /* Command line configuration. */
39 #include <config_cmd_default.h>
41 #define CONFIG_CMD_ELF
43 #define CONFIG_BOOTCOMMAND "run boot_flash"
44 /* enable passing of ATAGs */
45 #define CONFIG_CMDLINE_TAG 1
46 #define CONFIG_SETUP_MEMORY_TAGS 1
47 #define CONFIG_INITRD_TAG 1
48 #define CONFIG_REVISION_TAG 1
50 #if defined(CONFIG_CMD_KGDB)
51 # define CONFIG_KGDB_BAUDRATE 230400
52 /* which serial port to use */
53 # define CONFIG_KGDB_SER_INDEX 1
56 /* Miscellaneous configurable options */
57 #define CONFIG_SYS_LONGHELP
58 /* Console I/O Buffer Size */
59 #define CONFIG_SYS_CBSIZE 256
60 /* Print Buffer Size */
61 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
62 /* max number of command args */
63 #define CONFIG_SYS_MAXARGS 16
64 /* Boot Argument Buffer Size */
65 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
67 #define CONFIG_SYS_MEMTEST_START 0x00400000
68 #define CONFIG_SYS_MEMTEST_END 0x00800000
70 /* timer clock - 2* OSC_IN system clock */
71 #define CONFIG_IXP425_TIMER_CLK 66666666
72 #define CONFIG_SYS_HZ 1000
74 /* default load address */
75 #define CONFIG_SYS_LOAD_ADDR 0x00010000
78 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
80 #define CONFIG_SERIAL_RTS_ACTIVE 1
82 /* Expansion bus settings */
83 #define CONFIG_SYS_EXP_CS0 0xbd113442
86 #define CONFIG_NR_DRAM_BANKS 1
87 #define PHYS_SDRAM_1 0x00000000
88 #define CONFIG_SYS_SDRAM_BASE 0x00000000
91 #define CONFIG_SYS_SDR_CONFIG 0x3A
92 #define PHYS_SDRAM_1_SIZE 0x01000000
93 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
94 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1
95 #define CONFIG_SYS_DRAM_SIZE 0x01000000
97 /* FLASH organization */
98 #define CONFIG_SYS_TEXT_BASE 0x50000000
99 #define CONFIG_SYS_MAX_FLASH_BANKS 1
100 /* max number of sectors on one chip */
101 #define CONFIG_SYS_MAX_FLASH_SECT 140
102 #define PHYS_FLASH_1 0x50000000
103 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
105 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
106 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
107 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
108 #define CONFIG_BOARD_SIZE_LIMIT 262144
110 /* Use common CFI driver */
111 #define CONFIG_SYS_FLASH_CFI
112 #define CONFIG_FLASH_CFI_DRIVER
113 /* no byte writes on IXP4xx */
114 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
116 /* print 'E' for empty sector on flinfo */
117 #define CONFIG_SYS_FLASH_EMPTY_INFO
121 /* include IXP4xx NPE support */
122 #define CONFIG_IXP4XX_NPE 1
124 /* NPE0 PHY address */
125 #define CONFIG_PHY_ADDR 0x10
126 /* MII PHY management */
128 /* fixed-speed switch without standard PHY registers on MII */
129 #define CONFIG_MII_NPE0_FIXEDLINK 1
130 #define CONFIG_MII_NPE0_SPEED 100
131 #define CONFIG_MII_NPE0_FULLDUPLEX 1
133 /* Number of ethernet rx buffers & descriptors */
134 #define CONFIG_SYS_RX_ETH_BUFFER 16
135 #define CONFIG_RESET_PHY_R 1
136 /* ethernet switch connected to MII port */
137 #define CONFIG_MII_ETHSWITCH 1
139 #define CONFIG_CMD_DHCP
140 #define CONFIG_CMD_NET
141 #define CONFIG_CMD_MII
142 #define CONFIG_CMD_PING
143 #undef CONFIG_CMD_NFS
146 #define CONFIG_BOOTP_BOOTFILESIZE
147 #define CONFIG_BOOTP_BOOTPATH
148 #define CONFIG_BOOTP_GATEWAY
149 #define CONFIG_BOOTP_HOSTNAME
151 /* Cache Configuration */
152 #define CONFIG_SYS_CACHELINE_SIZE 32
155 * environment organization:
156 * one flash sector, embedded in uboot area (bottom bootblock flash)
158 #define CONFIG_ENV_IS_IN_FLASH 1
159 #define CONFIG_ENV_SIZE 0x2000
160 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
161 #define CONFIG_SYS_USE_PPCENV 1
163 #define CONFIG_EXTRA_ENV_SETTINGS \
164 "npe_ucode=50040000\0" \
165 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
166 "kerneladdr=50050000\0" \
167 "kernelfile=actux3/uImage\0" \
168 "rootfile=actux3/rootfs\0" \
169 "rootaddr=50170000\0" \
171 "updateboot_ser=mw.b 10000 ff 40000;" \
172 " loady ${loadaddr};" \
173 " run eraseboot writeboot\0" \
174 "updateboot_net=mw.b 10000 ff 40000;" \
175 " tftp ${loadaddr} actux3/u-boot.bin;" \
176 " run eraseboot writeboot\0" \
177 "eraseboot=protect off 50000000 50003fff;" \
178 " protect off 50006000 5003ffff;" \
179 " erase 50000000 50003fff;" \
180 " erase 50006000 5003ffff\0" \
181 "writeboot=cp.b 10000 50000000 4000;" \
182 " cp.b 16000 50006000 3a000\0" \
183 "updateucode=loady;" \
184 " era ${npe_ucode} +${filesize};" \
185 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
186 "updateroot=tftp ${loadaddr} ${rootfile};" \
187 " era ${rootaddr} +${filesize};" \
188 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
189 "updatekern=tftp ${loadaddr} ${kernelfile};" \
190 " era ${kerneladdr} +${filesize};" \
191 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
192 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
193 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
194 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
195 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
196 "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0" \
197 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
198 "boot_flash=run flashargs addtty addeth;" \
199 " bootm ${kerneladdr}\0" \
200 "boot_net=run netargs addtty addeth;" \
201 " tftpboot ${loadaddr} ${kernelfile};" \
204 /* additions for new relocation code, must be added to all boards */
205 #define CONFIG_SYS_INIT_SP_ADDR \
206 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
208 #endif /* __CONFIG_H */