4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #ifndef __CONFIG_AM335X_EVM_H
17 #define __CONFIG_AM335X_EVM_H
21 #include <asm/arch/cpu.h>
22 #include <asm/arch/hardware.h>
24 #define CONFIG_DMA_COHERENT
25 #define CONFIG_DMA_COHERENT_SIZE (1 << 20)
27 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
28 #define CONFIG_SYS_MALLOC_LEN (1024 << 10)
29 #define CONFIG_SYS_LONGHELP /* undef to save memory */
30 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
31 #define CONFIG_SYS_PROMPT "U-Boot# "
32 #define CONFIG_BOARD_LATE_INIT
33 #define CONFIG_SYS_NO_FLASH
34 #define MACH_TYPE_TIAM335EVM 3589 /* Until the next sync */
35 #define CONFIG_MACH_TYPE MACH_TYPE_TIAM335EVM
37 #define CONFIG_OF_LIBFDT
38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG
42 /* commands to include */
43 #include <config_cmd_default.h>
45 #define CONFIG_CMD_ASKENV
46 #define CONFIG_VERSION_VARIABLE
48 /* set to negative value for no autoboot */
49 #define CONFIG_BOOTDELAY 1
50 #define CONFIG_ENV_VARS_UBOOT_CONFIG
51 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
52 #define CONFIG_EXTRA_ENV_SETTINGS \
53 "loadaddr=0x80200000\0" \
54 "fdtaddr=0x80F80000\0" \
55 "fdt_high=0xffffffff\0" \
56 "rdaddr=0x81000000\0" \
57 "bootfile=/boot/uImage\0" \
59 "console=ttyO0,115200n8\0" \
62 "mmcroot=/dev/mmcblk0p2 ro\0" \
63 "mmcrootfstype=ext4 rootwait\0" \
64 "nandroot=ubi0:rootfs rw ubi.mtd=7,2048\0" \
65 "nandrootfstype=ubifs rootwait=1\0" \
66 "nandsrcaddr=0x280000\0" \
67 "nandimgsize=0x500000\0" \
68 "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
69 "ramrootfstype=ext2\0" \
70 "mmcargs=setenv bootargs console=${console} " \
73 "rootfstype=${mmcrootfstype}\0" \
74 "nandargs=setenv bootargs console=${console} " \
77 "rootfstype=${nandrootfstype}\0" \
78 "spiroot=/dev/mtdblock4 rw\0" \
79 "spirootfstype=jffs2\0" \
80 "spisrcaddr=0xe0000\0" \
81 "spiimgsize=0x362000\0" \
83 "spiargs=setenv bootargs console=${console} " \
86 "rootfstype=${spirootfstype}\0" \
87 "bootenv=uEnv.txt\0" \
88 "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
89 "importbootenv=echo Importing environment from mmc ...; " \
90 "env import -t $loadaddr $filesize\0" \
91 "ramargs=setenv bootargs console=${console} " \
94 "rootfstype=${ramrootfstype}\0" \
95 "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
96 "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
97 "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
98 "mmcboot=echo Booting from mmc ...; " \
100 "bootm ${loadaddr}\0" \
101 "nandboot=echo Booting from nand ...; " \
103 "nand read ${loadaddr} ${nandsrcaddr} ${nandimgsize}; " \
104 "bootm ${loadaddr}\0" \
105 "spiboot=echo Booting from spi ...; " \
107 "sf probe ${spibusno}:0; " \
108 "sf read ${loadaddr} ${spisrcaddr} ${spiimgsize}; " \
109 "bootm ${loadaddr}\0" \
110 "ramboot=echo Booting from ramdisk ...; " \
112 "bootm ${loadaddr}\0" \
114 "if test $board_name = A335BONE; then " \
115 "setenv fdtfile am335x-bone.dtb; fi; " \
116 "if test $board_name = A33515BB; then " \
117 "setenv fdtfile am335x-evm.dtb; fi; " \
118 "if test $board_name = A335X_SK; then " \
119 "setenv fdtfile am335x-evmsk.dtb; fi\0" \
121 #define CONFIG_BOOTCOMMAND \
122 "mmc dev ${mmcdev}; if mmc rescan; then " \
123 "echo SD/MMC found on device ${mmcdev};" \
124 "if run loadbootenv; then " \
125 "echo Loaded environment from ${bootenv};" \
126 "run importbootenv;" \
128 "if test -n $uenvcmd; then " \
129 "echo Running uenvcmd ...;" \
132 "if run loaduimage; then " \
140 #define V_OSCK 24000000 /* Clock output from T2 */
141 #define V_SCLK (V_OSCK)
143 #define CONFIG_CMD_ECHO
145 /* max number of command args */
146 #define CONFIG_SYS_MAXARGS 16
148 /* Console I/O Buffer Size */
149 #define CONFIG_SYS_CBSIZE 512
151 /* Print Buffer Size */
152 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
153 + sizeof(CONFIG_SYS_PROMPT) + 16)
155 /* Boot Argument Buffer Size */
156 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
159 * memtest works on 8 MB in DRAM after skipping 32MB from
160 * start addr of ram disk
162 #define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
163 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
166 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */
167 #define CONFIG_SYS_HZ 1000 /* 1ms clock */
170 #define CONFIG_GENERIC_MMC
171 #define CONFIG_OMAP_HSMMC
172 #define CONFIG_CMD_MMC
173 #define CONFIG_DOS_PARTITION
174 #define CONFIG_CMD_FAT
175 #define CONFIG_CMD_EXT2
178 #define CONFIG_OMAP3_SPI
179 #define CONFIG_MTD_DEVICE
180 #define CONFIG_SPI_FLASH
181 #define CONFIG_SPI_FLASH_WINBOND
182 #define CONFIG_CMD_SF
183 #define CONFIG_SF_DEFAULT_SPEED (24000000)
185 /* Physical Memory Map */
186 #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
187 #define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
188 #define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
190 #define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
191 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
192 GENERATED_GBL_DATA_SIZE)
193 /* Platform/Board specific defs */
194 #define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */
195 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
196 #define CONFIG_SYS_HZ 1000
198 /* NS16550 Configuration */
199 #define CONFIG_SYS_NS16550
200 #define CONFIG_SYS_NS16550_SERIAL
201 #define CONFIG_SERIAL_MULTI
202 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
203 #define CONFIG_SYS_NS16550_CLK (48000000)
204 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* Base EVM has UART0 */
205 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
206 #define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */
207 #define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */
208 #define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */
209 #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
211 /* I2C Configuration */
213 #define CONFIG_CMD_I2C
214 #define CONFIG_HARD_I2C
215 #define CONFIG_SYS_I2C_SPEED 100000
216 #define CONFIG_SYS_I2C_SLAVE 1
217 #define CONFIG_I2C_MULTI_BUS
218 #define CONFIG_DRIVER_OMAP24XX_I2C
219 #define CONFIG_CMD_EEPROM
220 #define CONFIG_ENV_EEPROM_IS_ON_I2C
221 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
222 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
223 #define CONFIG_SYS_I2C_MULTI_EEPROMS
225 #define CONFIG_OMAP_GPIO
227 #define CONFIG_BAUDRATE 115200
228 #define CONFIG_SYS_BAUDRATE_TABLE { 110, 300, 600, 1200, 2400, \
229 4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
231 #define CONFIG_ENV_OVERWRITE 1
232 #define CONFIG_SYS_CONSOLE_INFO_QUIET
234 #define CONFIG_ENV_IS_NOWHERE
236 /* Defines for SPL */
238 #define CONFIG_SPL_FRAMEWORK
239 #define CONFIG_SPL_TEXT_BASE 0x402F0400
240 #define CONFIG_SPL_MAX_SIZE (101 * 1024)
241 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
243 #define CONFIG_SPL_BSS_START_ADDR 0x80000000
244 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
246 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
247 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
248 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
249 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
250 #define CONFIG_SPL_MMC_SUPPORT
251 #define CONFIG_SPL_FAT_SUPPORT
252 #define CONFIG_SPL_I2C_SUPPORT
254 #define CONFIG_SPL_LIBCOMMON_SUPPORT
255 #define CONFIG_SPL_LIBDISK_SUPPORT
256 #define CONFIG_SPL_LIBGENERIC_SUPPORT
257 #define CONFIG_SPL_SERIAL_SUPPORT
258 #define CONFIG_SPL_GPIO_SUPPORT
259 #define CONFIG_SPL_YMODEM_SUPPORT
260 #define CONFIG_SPL_NET_SUPPORT
261 #define CONFIG_SPL_NET_VCI_STRING "AM335x U-Boot SPL"
262 #define CONFIG_SPL_ETH_SUPPORT
263 #define CONFIG_SPL_SPI_SUPPORT
264 #define CONFIG_SPL_SPI_FLASH_SUPPORT
265 #define CONFIG_SPL_SPI_LOAD
266 #define CONFIG_SPL_SPI_BUS 0
267 #define CONFIG_SPL_SPI_CS 0
268 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
269 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000
270 #define CONFIG_SPL_MUSB_NEW_SUPPORT
271 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
273 #define CONFIG_SPL_BOARD_INIT
274 #define CONFIG_SPL_NAND_AM33XX_BCH
275 #define CONFIG_SPL_NAND_SUPPORT
276 #define CONFIG_SPL_NAND_BASE
277 #define CONFIG_SPL_NAND_DRIVERS
278 #define CONFIG_SPL_NAND_ECC
279 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
280 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
281 CONFIG_SYS_NAND_PAGE_SIZE)
282 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
283 #define CONFIG_SYS_NAND_OOBSIZE 64
284 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
285 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
286 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
287 10, 11, 12, 13, 14, 15, 16, 17, \
288 18, 19, 20, 21, 22, 23, 24, 25, \
289 26, 27, 28, 29, 30, 31, 32, 33, \
290 34, 35, 36, 37, 38, 39, 40, 41, \
291 42, 43, 44, 45, 46, 47, 48, 49, \
292 50, 51, 52, 53, 54, 55, 56, 57, }
294 #define CONFIG_SYS_NAND_ECCSIZE 512
295 #define CONFIG_SYS_NAND_ECCBYTES 14
297 #define CONFIG_SYS_NAND_ECCSTEPS 4
298 #define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
299 CONFIG_SYS_NAND_ECCSTEPS)
301 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
303 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
306 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
307 * 64 bytes before this address should be set aside for u-boot.img's
308 * header. That is 0x800FFFC0--0x80100000 should not be used for any
311 #define CONFIG_SYS_TEXT_BASE 0x80800000
312 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
313 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
315 /* Since SPL did pll and ddr initialization for us,
316 * we don't need to do it twice.
318 #ifndef CONFIG_SPL_BUILD
319 #define CONFIG_SKIP_LOWLEVEL_INIT
325 #define CONFIG_USB_MUSB_DSPS
326 #define CONFIG_ARCH_MISC_INIT
327 #define CONFIG_MUSB_GADGET
328 #define CONFIG_MUSB_PIO_ONLY
329 #define CONFIG_USB_GADGET_DUALSPEED
330 #define CONFIG_MUSB_HOST
331 #define CONFIG_AM335X_USB0
332 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL
333 #define CONFIG_AM335X_USB1
334 #define CONFIG_AM335X_USB1_MODE MUSB_HOST
336 #ifdef CONFIG_MUSB_HOST
337 #define CONFIG_CMD_USB
338 #define CONFIG_USB_STORAGE
341 #ifdef CONFIG_MUSB_GADGET
342 #define CONFIG_USB_ETHER
343 #define CONFIG_USB_ETH_RNDIS
344 #define CONFIG_USBNET_HOST_ADDR "de:ad:be:af:00:00"
345 #endif /* CONFIG_MUSB_GADGET */
347 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_USBETH_SUPPORT)
348 /* disable host part of MUSB in SPL */
349 #undef CONFIG_MUSB_HOST
351 * Disable UART, CPSW ethernet support and extra environment settings so we
352 * will fit within 101KiB.
354 #undef CONFIG_SPL_ETH_SUPPORT
355 #undef CONFIG_SPL_YMODEM_SUPPORT
356 #undef CONFIG_EXTRA_ENV_SETTINGS
359 /* Unsupported features */
360 #undef CONFIG_USE_IRQ
362 #define CONFIG_CMD_NET
363 #define CONFIG_CMD_DHCP
364 #define CONFIG_CMD_PING
365 #define CONFIG_DRIVER_TI_CPSW
367 #define CONFIG_BOOTP_DEFAULT
368 #define CONFIG_BOOTP_DNS
369 #define CONFIG_BOOTP_DNS2
370 #define CONFIG_BOOTP_SEND_HOSTNAME
371 #define CONFIG_BOOTP_GATEWAY
372 #define CONFIG_BOOTP_SUBNETMASK
373 #define CONFIG_NET_RETRY_COUNT 10
374 #define CONFIG_NET_MULTI
375 #define CONFIG_PHY_GIGE
376 #define CONFIG_PHYLIB
377 #define CONFIG_PHY_ADDR 0
378 #define CONFIG_PHY_SMSC
383 #define CONFIG_CMD_NAND
384 #define CONFIG_NAND_OMAP_GPMC
385 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
386 #define CONFIG_SYS_NAND_BASE (0x08000000) /* physical address */
387 /* to access nand at */
389 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND
391 #undef CONFIG_ENV_IS_NOWHERE
392 #define CONFIG_ENV_IS_IN_NAND
393 #define CONFIG_ENV_OFFSET 0x260000 /* environment starts here */
394 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
397 #endif /* ! __CONFIG_AM335X_EVM_H */