2 * U-boot - Configuration file for CM-BF537U board
5 #ifndef __CONFIG_CM_BF537U_H__
6 #define __CONFIG_CM_BF537U_H__
8 #include <asm/config-pre.h>
14 #define CONFIG_BFIN_CPU bf537-0.2
15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
23 /* CONFIG_CLKIN_HZ is any value in Hz */
24 #define CONFIG_CLKIN_HZ 30000000
25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
27 #define CONFIG_CLKIN_HALF 0
28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
30 #define CONFIG_PLL_BYPASS 0
31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32 /* Values can range from 0-63 (where 0 means 64) */
33 #define CONFIG_VCO_MULT 18
34 /* CCLK_DIV controls the core clock divider */
35 /* Values can be 1, 2, 4, or 8 ONLY */
36 #define CONFIG_CCLK_DIV 1
37 /* SCLK_DIV controls the system clock divider */
38 /* Values can range from 1-15 */
39 #define CONFIG_SCLK_DIV 5
41 #define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
47 #define CONFIG_MEM_ADD_WDTH 9
48 #define CONFIG_MEM_SIZE 32
50 #define CONFIG_EBIU_SDRRC_VAL 0x3f8
51 #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
53 #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
54 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
55 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
57 #define CONFIG_SYS_MONITOR_LEN (768 * 1024)
58 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
65 #define ADI_CMDS_NETWORK 1
66 #define CONFIG_SMC911X 1
67 #define CONFIG_SMC911X_BASE 0x20308000
68 #define CONFIG_SMC911X_16_BIT
69 #define CONFIG_NETCONSOLE 1
71 #define CONFIG_HOSTNAME cm-bf537u
72 /* Uncomment next line to use fixed MAC address */
73 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
74 #define CONFIG_LIB_RAND
79 #define CONFIG_FLASH_CFI_DRIVER
80 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
81 #define CONFIG_SYS_FLASH_BASE 0x20000000
82 #define CONFIG_SYS_FLASH_CFI
83 #define CONFIG_SYS_FLASH_PROTECTION
84 #define CONFIG_SYS_MAX_FLASH_BANKS 1
85 #define CONFIG_SYS_MAX_FLASH_SECT 35
91 #define CONFIG_BFIN_SPI
92 #define CONFIG_ENV_SPI_MAX_HZ 30000000
96 * Env Storage Settings
98 #define CONFIG_ENV_IS_IN_FLASH 1
99 #define CONFIG_ENV_OFFSET 0x8000
100 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
101 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
102 #define CONFIG_ENV_SECT_SIZE 0x8000
103 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
104 #define ENV_IS_EMBEDDED
106 #ifdef ENV_IS_EMBEDDED
107 /* WARNING - the following is hand-optimized to fit within
108 * the sector before the environment sector. If it throws
109 * an error during compilation remove an object here to get
110 * it linked after the configuration sector.
112 # define LDS_BOARD_TEXT \
113 arch/blackfin/lib/built-in.o (.text*); \
114 arch/blackfin/cpu/built-in.o (.text*); \
115 . = DEFINED(env_offset) ? env_offset : .; \
116 common/env_embedded.o (.text*);
123 #define CONFIG_BFIN_TWI_I2C 1
124 #define CONFIG_HARD_I2C 1
131 #define CONFIG_GENERIC_MMC
132 #define CONFIG_MMC_SPI
137 #define CONFIG_BAUDRATE 115200
138 #define CONFIG_MISC_INIT_R
139 #define CONFIG_RTC_BFIN
140 #define CONFIG_UART_CONSOLE 0
141 #define CONFIG_BOOTCOMMAND "run flashboot"
142 #define FLASHBOOT_ENV_SETTINGS \
143 "flashboot=flread 20040000 1000000 300000;" \
145 #define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024))
146 #define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED
149 * Pull in common ADI header for remaining command/environment setup
151 #include <configs/bfin_adi_common.h>