2 * Config file for Compulab CM-T335 board
4 * Copyright (C) 2013, Compulab Ltd - http://compulab.co.il/
6 * Author: Ilya Ledvich <ilya@compulab.co.il>
8 * SPDX-License-Identifier: GPL-2.0+
11 #ifndef __CONFIG_CM_T335_H
12 #define __CONFIG_CM_T335_H
14 #define CONFIG_CM_T335
17 #include <configs/ti_am335x_common.h>
19 #undef CONFIG_BOARD_LATE_INIT
21 #undef CONFIG_OMAP3_SPI
22 #undef CONFIG_SPL_OS_BOOT
23 #undef CONFIG_BOOTCOUNT_LIMIT
24 #undef CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC
26 #undef CONFIG_MAX_RAM_BANK_SIZE
27 #define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* 512MB */
29 #define CONFIG_OMAP_COMMON
31 #define MACH_TYPE_CM_T335 4586 /* Until the next sync */
32 #define CONFIG_MACH_TYPE MACH_TYPE_CM_T335
35 #define V_OSCK 25000000 /* Clock output from T2 */
36 #define V_SCLK (V_OSCK)
38 #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
40 #ifndef CONFIG_SPL_BUILD
43 "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \
44 "mmcrootfstype=ext4\0" \
45 "mmcargs=setenv bootargs console=${console} " \
47 "rootfstype=${mmcrootfstype}\0" \
48 "mmcboot=echo Booting from mmc ...; " \
53 "mtdids=" MTDIDS_DEFAULT "\0" \
54 "mtdparts=" MTDPARTS_DEFAULT "\0" \
55 "nandroot=ubi0:rootfs rw\0" \
56 "nandrootfstype=ubifs\0" \
57 "nandargs=setenv bootargs console=${console} " \
59 "rootfstype=${nandrootfstype} " \
60 "ubi.mtd=${rootfs_name}\0" \
61 "nandboot=echo Booting from nand ...; " \
63 "nboot ${loadaddr} nand0 900000; " \
67 #define CONFIG_EXTRA_ENV_SETTINGS \
68 "loadaddr=82000000\0" \
69 "console=ttyO0,115200n8\0" \
70 "rootfs_name=rootfs\0" \
71 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
72 "bootscript=echo Running bootscript from mmc ...; " \
73 "source ${loadaddr}\0" \
74 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
78 #define CONFIG_BOOTCOMMAND \
79 "mmc dev ${mmcdev}; if mmc rescan; then " \
80 "if run loadbootscript; then " \
83 "if run loaduimage; then " \
85 "else run nandboot; " \
88 "else run nandboot; fi"
89 #endif /* CONFIG_SPL_BUILD */
91 #define CONFIG_TIMESTAMP
92 #define CONFIG_SYS_AUTOLOAD "no"
94 /* Serial console configuration */
95 #define CONFIG_CONS_INDEX 1
96 #define CONFIG_SERIAL1 1 /* UART0 */
98 /* NS16550 Configuration */
99 #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */
100 #define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */
101 #define CONFIG_BAUDRATE 115200
103 /* I2C Configuration */
104 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
105 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
106 #define CONFIG_SYS_I2C_EEPROM_BUS 0
109 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds"
112 #define CONFIG_PHY_GIGE
113 #define CONFIG_PHYLIB
114 #define CONFIG_PHY_ATHEROS
117 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
118 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
119 CONFIG_SYS_NAND_PAGE_SIZE)
120 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
121 #define CONFIG_SYS_NAND_OOBSIZE 64
122 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
123 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
124 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
125 10, 11, 12, 13, 14, 15, 16, 17, \
126 18, 19, 20, 21, 22, 23, 24, 25, \
127 26, 27, 28, 29, 30, 31, 32, 33, \
128 34, 35, 36, 37, 38, 39, 40, 41, \
129 42, 43, 44, 45, 46, 47, 48, 49, \
130 50, 51, 52, 53, 54, 55, 56, 57, }
132 #define CONFIG_SYS_NAND_ECCSIZE 512
133 #define CONFIG_SYS_NAND_ECCBYTES 14
135 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
137 #undef CONFIG_SYS_NAND_U_BOOT_OFFS
138 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x200000
140 #define CONFIG_CMD_NAND
141 #define MTDIDS_DEFAULT "nand0=nand"
142 #define MTDPARTS_DEFAULT "mtdparts=nand:2m(spl)," \
143 "1m(u-boot),1m(u-boot-env)," \
144 "1m(dtb),4m(splash)," \
145 "6m(kernel),-(rootfs)"
146 #define CONFIG_ENV_IS_IN_NAND
147 #define CONFIG_ENV_OFFSET 0x300000 /* environment starts here */
148 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
149 #define CONFIG_SYS_NAND_ONFI_DETECTION
150 #ifdef CONFIG_SPL_OS_BOOT
151 #define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* un-assigned: (using dtb) */
152 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
153 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
156 /* GPIO pin + bank to pin ID mapping */
157 #define GPIO_PIN(_bank, _pin) ((_bank << 5) + _pin)
160 #define CONFIG_STATUS_LED
161 #define CONFIG_GPIO_LED
162 #define CONFIG_BOARD_SPECIFIC_LED
163 #define STATUS_LED_BIT GPIO_PIN(2, 0)
164 /* Status LED polarity is inversed, so init it in the "off" state */
165 #define STATUS_LED_STATE STATUS_LED_OFF
166 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
167 #define STATUS_LED_BOOT 0
169 #ifndef CONFIG_SPL_BUILD
171 * Enable PCA9555 at I2C0-0x26.
172 * First select the I2C0 bus with "i2c dev 0", then use "pca953x" command.
174 #define CONFIG_PCA953X
175 #define CONFIG_CMD_PCA953X
176 #define CONFIG_CMD_PCA953X_INFO
177 #define CONFIG_SYS_I2C_PCA953X_ADDR 0x26
178 #define CONFIG_SYS_I2C_PCA953X_WIDTH { {0x26, 16} }
179 #endif /* CONFIG_SPL_BUILD */
181 #endif /* __CONFIG_CM_T335_H */