2 * (C) Copyright 2006-2008
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
8 * Frederik Kriewitz <frederik@kriewitz.eu>
10 * Configuration settings for the DevKit8000 board.
12 * SPDX-License-Identifier: GPL-2.0+
18 /* High Level Configuration Options */
19 #define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */
20 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000
23 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
24 * 64 bytes before this address should be set aside for u-boot.img's
25 * header. That is 0x800FFFC0--0x80100000 should not be used for any
28 #define CONFIG_SYS_TEXT_BASE 0x80100000
30 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/
31 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
33 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
34 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
38 /* Physical Memory Map */
39 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
41 #include <configs/ti_omap3_common.h>
43 /* Display CPU and Board information */
44 #define CONFIG_DISPLAY_CPUINFO 1
45 #define CONFIG_DISPLAY_BOARDINFO 1
47 #define CONFIG_MISC_INIT_R
49 #define CONFIG_REVISION_TAG 1
51 /* Size of malloc() pool */
52 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
54 #undef CONFIG_SYS_MALLOC_LEN
55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
57 /* Hardware drivers */
59 #define CONFIG_NET_RETRY_COUNT 20
60 #define CONFIG_DRIVER_DM9000 1
61 #define CONFIG_DM9000_BASE 0x2c000000
62 #define DM9000_IO CONFIG_DM9000_BASE
63 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400)
64 #define CONFIG_DM9000_USE_16BIT 1
65 #define CONFIG_DM9000_NO_SROM 1
66 #undef CONFIG_DM9000_DEBUG
70 #undef CONFIG_OMAP3_SPI
73 #undef CONFIG_SYS_I2C_OMAP24XX
74 #define CONFIG_SYS_I2C_OMAP34XX
77 #define CONFIG_TWL4030_LED 1
80 #define MTDIDS_DEFAULT "nand0=nand"
81 #define MTDPARTS_DEFAULT "mtdparts=nand:" \
88 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
90 #define CONFIG_JFFS2_NAND
91 /* nand device jffs2 lives on */
92 #define CONFIG_JFFS2_DEV "nand0"
93 /* start of jffs2 partition */
94 #define CONFIG_JFFS2_PART_OFFSET 0x680000
95 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
98 /* commands to include */
99 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
100 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */
102 #undef CONFIG_CMD_ASKENV
103 #undef CONFIG_CMD_BOOTZ
104 #undef CONFIG_SUPPORT_RAW_INITRD
105 #undef CONFIG_FAT_WRITE
106 #undef CONFIG_CMD_EXT4
107 #undef CONFIG_CMD_FS_GENERIC
109 /* BOOTP/DHCP options */
110 #define CONFIG_BOOTP_SUBNETMASK
111 #define CONFIG_BOOTP_GATEWAY
112 #define CONFIG_BOOTP_HOSTNAME
113 #define CONFIG_BOOTP_NISDOMAIN
114 #define CONFIG_BOOTP_BOOTPATH
115 #define CONFIG_BOOTP_BOOTFILESIZE
116 #define CONFIG_BOOTP_DNS
117 #define CONFIG_BOOTP_DNS2
118 #define CONFIG_BOOTP_SEND_HOSTNAME
119 #define CONFIG_BOOTP_NTPSERVER
120 #define CONFIG_BOOTP_TIMEOFFSET
121 #undef CONFIG_BOOTP_VENDOREX
123 /* Environment information */
124 #define CONFIG_EXTRA_ENV_SETTINGS \
125 "loadaddr=0x82000000\0" \
126 "console=ttyO2,115200n8\0" \
129 "dvimode=1024x768MR-16@60\0" \
130 "defaultdisplay=dvi\0" \
131 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
134 "setenv bootargs console=${console} " \
136 "omapfb.mode=dvi:${dvimode} " \
137 "omapdss.def_disp=${defaultdisplay}\0" \
140 "setenv bootargs ${bootargs} " \
141 "root=/dev/mmcblk0p2 " \
146 "setenv bootargs ${bootargs} " \
147 "omapfb.mode=dvi:${dvimode} " \
148 "omapdss.def_disp=${defaultdisplay} " \
149 "root=/dev/mtdblock4 " \
150 "rootfstype=jffs2 " \
154 "setenv bootargs ${bootargs} " \
156 "nfsroot=${serverip}:${rootpath},${nfsopts} " \
157 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
160 "dnsip2=${dnsip2}\0" \
161 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
162 "bootscript=echo Running bootscript from mmc ...; " \
163 "source ${loadaddr}\0" \
164 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
165 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
166 "mmcboot=echo Booting from mmc ...; " \
168 "bootm ${loadaddr}\0" \
169 "nandboot=echo Booting from nand ...; " \
171 "nand read ${loadaddr} 280000 400000; " \
172 "bootm ${loadaddr}\0" \
173 "netboot=echo Booting from network ...; " \
174 "dhcp ${loadaddr}; " \
176 "bootm ${loadaddr}\0" \
177 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
178 "if run loadbootscript; then " \
181 "if run loaduimage; then " \
183 "else run nandboot; " \
186 "else run nandboot; fi\0"
189 #define CONFIG_BOOTCOMMAND "run autoboot"
191 /* Boot Argument Buffer Size */
192 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000)
193 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
194 0x01000000) /* 16MB */
196 /* NAND and environment organization */
197 #define CONFIG_ENV_IS_IN_NAND 1
198 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
200 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
203 #define CONFIG_SYS_SRAM_START 0x40200000
204 #define CONFIG_SYS_SRAM_SIZE 0x10000
206 /* Defines for SPL */
207 #undef CONFIG_SPL_MTD_SUPPORT
209 #undef CONFIG_SPL_TEXT_BASE
210 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
212 /* NAND boot config */
213 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
214 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
215 #define CONFIG_SYS_NAND_PAGE_COUNT 64
216 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
217 #define CONFIG_SYS_NAND_OOBSIZE 64
218 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
219 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
220 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
223 #define CONFIG_SYS_NAND_ECCSIZE 512
224 #define CONFIG_SYS_NAND_ECCBYTES 3
225 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
227 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
228 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
230 /* SPL OS boot options */
231 #define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
232 #define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
234 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
236 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
237 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
238 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
239 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */
240 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */
241 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */
243 #undef CONFIG_SYS_SPL_ARGS_ADDR
244 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
246 #endif /* __CONFIG_H */