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1 /*
2  * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 /************************************************************************
8  * board/config_EBONY.h - configuration for AMCC 440GP Ref (Ebony)
9  ***********************************************************************/
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 /*-----------------------------------------------------------------------
15  * High Level Configuration Options
16  *----------------------------------------------------------------------*/
17 #define CONFIG_EBONY            1           /* Board is ebony           */
18 #define CONFIG_440GP            1           /* Specifc GP support       */
19 #define CONFIG_440              1           /* ... PPC440 family        */
20 #define CONFIG_BOARD_EARLY_INIT_F 1         /* Call board_early_init_f  */
21 #define CONFIG_SYS_CLK_FREQ     33333333    /* external freq to pll     */
22
23 #define CONFIG_SYS_TEXT_BASE    0xFFFC0000
24
25 /*
26  * Include common defines/options for all AMCC eval boards
27  */
28 #define CONFIG_HOSTNAME         ebony
29 #include "amcc-common.h"
30
31 /*
32  * Define here the location of the environment variables (FLASH or NVRAM).
33  * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
34  *       supported for backward compatibility.
35  */
36 #if 1
37 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
38 #else
39 #define CONFIG_ENV_IS_IN_NVRAM  1       /* use NVRAM for environment vars       */
40 #endif
41
42 /*-----------------------------------------------------------------------
43  * Base addresses -- Note these are effective addresses where the
44  * actual resources get mapped (not physical addresses)
45  *----------------------------------------------------------------------*/
46 #define CONFIG_SYS_SDRAM_BASE       0x00000000      /* _must_ be 0              */
47 #define CONFIG_SYS_FLASH_BASE       0xff800000      /* start of FLASH           */
48 #define CONFIG_SYS_PCI_MEMBASE      0x80000000      /* mapped pci memory        */
49 #define CONFIG_SYS_ISRAM_BASE       0xc0000000      /* internal SRAM            */
50 #define CONFIG_SYS_PCI_BASE         0xd0000000      /* internal PCI regs        */
51
52 #define CONFIG_SYS_NVRAM_BASE_ADDR (CONFIG_SYS_PERIPHERAL_BASE + 0x08000000)
53 #define CONFIG_SYS_FPGA_BASE        (CONFIG_SYS_PERIPHERAL_BASE + 0x08300000)
54
55 /*-----------------------------------------------------------------------
56  * Initial RAM & stack pointer (placed in internal SRAM)
57  *----------------------------------------------------------------------*/
58 #define CONFIG_SYS_INIT_RAM_ADDR   CONFIG_SYS_ISRAM_BASE  /* Initial RAM address        */
59 #define CONFIG_SYS_INIT_RAM_SIZE    0x2000          /* Size of used area in RAM */
60
61 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
62 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
63
64 /*-----------------------------------------------------------------------
65  * Serial Port
66  *----------------------------------------------------------------------*/
67 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
68 #define CONFIG_SYS_EXT_SERIAL_CLOCK     (1843200 * 6)   /* Ext clk @ 11.059 MHz */
69
70 /*-----------------------------------------------------------------------
71  * NVRAM/RTC
72  *
73  * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
74  * The DS1743 code assumes this condition (i.e. -- it assumes the base
75  * address for the RTC registers is:
76  *
77  *      CONFIG_SYS_NVRAM_BASE_ADDR + CONFIG_SYS_NVRAM_SIZE
78  *
79  *----------------------------------------------------------------------*/
80 #define CONFIG_SYS_NVRAM_SIZE       (0x2000 - 8)    /* NVRAM size(8k)- RTC regs */
81 #define CONFIG_RTC_DS174x       1                   /* DS1743 RTC               */
82
83 #ifdef CONFIG_ENV_IS_IN_NVRAM
84 #define CONFIG_ENV_SIZE         0x1000      /* Size of Environment vars */
85 #define CONFIG_ENV_ADDR         \
86         (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE)
87 #endif /* CONFIG_ENV_IS_IN_NVRAM */
88
89 /*-----------------------------------------------------------------------
90  * FLASH related
91  *----------------------------------------------------------------------*/
92 #define CONFIG_SYS_MAX_FLASH_BANKS      3                   /* number of banks      */
93 #define CONFIG_SYS_MAX_FLASH_SECT       32                  /* sectors per device   */
94
95 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
96 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
97
98 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
99
100 #define CONFIG_SYS_FLASH_ADDR0         0x5555
101 #define CONFIG_SYS_FLASH_ADDR1         0x2aaa
102 #define CONFIG_SYS_FLASH_WORD_SIZE     unsigned char
103
104 #ifdef CONFIG_ENV_IS_IN_FLASH
105 #define CONFIG_ENV_SECT_SIZE    0x10000 /* size of one complete sector          */
106 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
107 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
108
109 /* Address and size of Redundant Environment Sector     */
110 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
111 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
112 #endif /* CONFIG_ENV_IS_IN_FLASH */
113
114 /*-----------------------------------------------------------------------
115  * DDR SDRAM
116  *----------------------------------------------------------------------*/
117 #define CONFIG_SPD_EEPROM       1       /* Use SPD EEPROM for setup     */
118 #define SPD_EEPROM_ADDRESS {0x53,0x52}  /* SPD i2c spd addresses        */
119 #define CONFIG_PROG_SDRAM_TLB   1       /* setup SDRAM TLB's dynamically*/
120
121 /*-----------------------------------------------------------------------
122  * I2C
123  *----------------------------------------------------------------------*/
124 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           400000
125
126 #define CONFIG_SYS_I2C_MULTI_EEPROMS
127 #define CONFIG_SYS_I2C_EEPROM_ADDR      (0xa8>>1)
128 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
129 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
130 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
131
132 /*
133  * Default environment variables
134  */
135 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
136         CONFIG_AMCC_DEF_ENV                                             \
137         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
138         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
139         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
140         "kernel_addr=ff800000\0"                                        \
141         "ramdisk_addr=ff810000\0"                                       \
142         ""
143
144 #define CONFIG_PHY_ADDR         8       /* PHY address                  */
145 #define CONFIG_HAS_ETH0
146 #define CONFIG_HAS_ETH1
147 #define CONFIG_PHY1_ADDR        9       /* EMAC1 PHY address            */
148
149 /*
150  * Commands additional to the ones defined in amcc-common.h
151  */
152 #define CONFIG_CMD_DATE
153 #define CONFIG_CMD_PCI
154 #define CONFIG_CMD_SDRAM
155 #define CONFIG_CMD_SNTP
156
157 /*-----------------------------------------------------------------------
158  * PCI stuff
159  *-----------------------------------------------------------------------
160  */
161 /* General PCI */
162 #define CONFIG_PCI                                  /* include pci support              */
163 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
164 #define CONFIG_PCI_PNP                          /* do pci plug-and-play         */
165 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
166 #define CONFIG_SYS_PCI_TARGBASE    0x80000000  /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
167
168 /* Board-specific PCI */
169 #define CONFIG_SYS_PCI_TARGET_INIT                  /* let board init pci target    */
170
171 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC */
172 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe  /* Whatever */
173
174 #endif  /* __CONFIG_H */