2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
5 * Configuration settings for the Embest RIoTboard
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
16 #include "mx6_common.h"
18 #define CONFIG_SYS_GENERIC_BOARD
20 #define CONFIG_MXC_UART_BASE UART2_BASE
21 #define CONFIG_CONSOLE_DEV "ttymxc1"
22 #define CONFIG_MMCROOT "/dev/mmcblk0p2"
24 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
27 #define CONFIG_DISPLAY_CPUINFO
28 #define CONFIG_DISPLAY_BOARDINFO
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_IMX6_THERMAL
36 /* Size of malloc() pool */
37 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
39 #define CONFIG_BOARD_EARLY_INIT_F
40 #define CONFIG_BOARD_LATE_INIT
41 #define CONFIG_MXC_GPIO
43 #define CONFIG_MXC_UART
45 #define CONFIG_CMD_FUSE
46 #ifdef CONFIG_CMD_FUSE
47 #define CONFIG_MXC_OCOTP
51 #define CONFIG_CMD_I2C
52 #define CONFIG_SYS_I2C
53 #define CONFIG_SYS_I2C_MXC
54 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
55 #define CONFIG_SYS_I2C_SPEED 100000
58 #define CONFIG_CMD_USB
59 #define CONFIG_USB_EHCI
60 #define CONFIG_USB_EHCI_MX6
61 #define CONFIG_USB_STORAGE
62 #define CONFIG_USB_HOST_ETHER
63 #define CONFIG_USB_ETHER_ASIX
64 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
65 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
66 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
67 #define CONFIG_MXC_USB_FLAGS 0
70 #define CONFIG_FSL_ESDHC
71 #define CONFIG_FSL_USDHC
72 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
75 #define CONFIG_CMD_MMC
76 #define CONFIG_GENERIC_MMC
77 #define CONFIG_BOUNCE_BUFFER
79 #define CONFIG_FEC_MXC
81 #define IMX_FEC_BASE ENET_BASE_ADDR
82 #define CONFIG_FEC_XCV_TYPE RGMII
83 #define CONFIG_ETHPRIME "FEC"
84 #define CONFIG_FEC_MXC_PHYADDR 4
87 #define CONFIG_PHY_ATHEROS
91 #define CONFIG_SPI_FLASH
92 #define CONFIG_SPI_FLASH_SST
93 #define CONFIG_MXC_SPI
94 #define CONFIG_SF_DEFAULT_BUS 0
95 #define CONFIG_SF_DEFAULT_CS 0
96 #define CONFIG_SF_DEFAULT_SPEED 20000000
97 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
100 /* allow to overwrite serial and ethaddr */
101 #define CONFIG_ENV_OVERWRITE
102 #define CONFIG_CONS_INDEX 1
103 #define CONFIG_BAUDRATE 115200
105 /* Command definition */
106 #undef CONFIG_CMD_FPGA
108 #define CONFIG_CMD_BMODE
109 #define CONFIG_CMD_SETEXPR
111 #define CONFIG_LOADADDR 0x12000000
112 #define CONFIG_SYS_TEXT_BASE 0x17800000
114 #ifdef CONFIG_SUPPORT_EMMC_BOOT
117 "update_emmc_firmware=" \
118 "if test ${ip_dyn} = yes; then " \
119 "setenv get_cmd dhcp; " \
121 "setenv get_cmd tftp; " \
123 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
124 "if mmc dev ${emmcdev}; then " \
125 "setexpr fw_sz ${filesize} / 0x200; " \
126 "setexpr fw_sz ${fw_sz} + 1; " \
127 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
136 "update_spi_firmware=" \
137 "if test ${ip_dyn} = yes; then " \
138 "setenv get_cmd dhcp; " \
140 "setenv get_cmd tftp; " \
142 "if ${get_cmd} ${update_spi_firmware_filename}; then " \
143 "if sf probe; then " \
144 "sf erase 0 0xc0000; " \
145 "sf write ${loadaddr} 0x400 ${filesize}; " \
152 #define CONFIG_EXTRA_ENV_SETTINGS \
153 "script=boot.scr\0" \
155 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
156 "fdt_addr=0x18000000\0" \
159 "console=" CONFIG_CONSOLE_DEV "\0" \
160 "fdt_high=0xffffffff\0" \
161 "initrd_high=0xffffffff\0" \
162 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
164 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
165 "update_sd_firmware=" \
166 "if test ${ip_dyn} = yes; then " \
167 "setenv get_cmd dhcp; " \
169 "setenv get_cmd tftp; " \
171 "if mmc dev ${mmcdev}; then " \
172 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
173 "setexpr fw_sz ${filesize} / 0x200; " \
174 "setexpr fw_sz ${fw_sz} + 1; " \
175 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
180 "mmcargs=setenv bootargs console=${console},${baudrate} " \
181 "root=${mmcroot}\0" \
183 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
184 "bootscript=echo Running bootscript from mmc ...; " \
186 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
187 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
188 "mmcboot=echo Booting from mmc ...; " \
190 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
191 "if run loadfdt; then " \
192 "bootz ${loadaddr} - ${fdt_addr}; " \
194 "if test ${boot_fdt} = try; then " \
197 "echo WARN: Cannot load the DT; " \
203 "netargs=setenv bootargs console=${console},${baudrate} " \
205 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
206 "netboot=echo Booting from net ...; " \
208 "if test ${ip_dyn} = yes; then " \
209 "setenv get_cmd dhcp; " \
211 "setenv get_cmd tftp; " \
213 "${get_cmd} ${image}; " \
214 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
215 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
216 "bootz ${loadaddr} - ${fdt_addr}; " \
218 "if test ${boot_fdt} = try; then " \
221 "echo WARN: Cannot load the DT; " \
228 #define CONFIG_BOOTCOMMAND \
229 "mmc dev ${mmcdev};" \
230 "if mmc rescan; then " \
231 "if run loadbootscript; then " \
234 "if run loadimage; then " \
236 "else run netboot; " \
239 "else run netboot; fi"
241 #define CONFIG_ARP_TIMEOUT 200UL
243 /* Miscellaneous configurable options */
244 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
245 #define CONFIG_SYS_CBSIZE 256
247 /* Print Buffer Size */
248 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
249 #define CONFIG_SYS_MAXARGS 16
250 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
252 #define CONFIG_SYS_MEMTEST_START 0x10000000
253 #define CONFIG_SYS_MEMTEST_END 0x10010000
254 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
256 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
258 #define CONFIG_STACKSIZE (128 * 1024)
260 /* Physical Memory Map */
261 #define CONFIG_NR_DRAM_BANKS 1
262 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
264 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
265 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
266 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
268 #define CONFIG_SYS_INIT_SP_OFFSET \
269 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
270 #define CONFIG_SYS_INIT_SP_ADDR \
271 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
273 /* Environment organization */
274 #define CONFIG_ENV_SIZE (8 * 1024)
276 #if defined(CONFIG_ENV_IS_IN_MMC)
278 #define CONFIG_DEFAULT_FDT_FILE "imx6dl-riotboard.dtb"
279 #define CONFIG_SYS_FSL_USDHC_NUM 3
280 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */
281 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
282 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
283 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
285 #define CONFIG_DEFAULT_FDT_FILE "imx6q-marsboard.dtb"
286 #define CONFIG_SYS_FSL_USDHC_NUM 2
287 #define CONFIG_ENV_OFFSET (768 * 1024)
288 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
289 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
290 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
291 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
292 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
295 #ifndef CONFIG_SYS_DCACHE_OFF
296 #define CONFIG_CMD_CACHE
301 #define CONFIG_VIDEO_IPUV3
302 #define CONFIG_CFB_CONSOLE
303 #define CONFIG_VGA_AS_SINGLE_DEVICE
304 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
305 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
306 #define CONFIG_VIDEO_BMP_RLE8
307 #define CONFIG_SPLASH_SCREEN
308 #define CONFIG_SPLASH_SCREEN_ALIGN
309 #define CONFIG_BMP_16BPP
310 #define CONFIG_VIDEO_LOGO
311 #define CONFIG_VIDEO_BMP_LOGO
312 #define CONFIG_IPUV3_CLK 260000000
313 #define CONFIG_IMX_HDMI
314 #define CONFIG_IMX_VIDEO_SKIP
316 #include <config_distro_defaults.h>
318 #endif /* __RIOTBOARD_CONFIG_H */