2 * Copyright (C) 2013 Gateworks Corporation
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <linux/sizes.h>
13 #define CONFIG_SPL_BOARD_INIT
14 #define CONFIG_SPL_NAND_SUPPORT
15 #define CONFIG_SPL_MMC_SUPPORT
16 #define CONFIG_SPL_POWER_SUPPORT
17 /* Location in NAND to read U-Boot from */
18 #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
21 #define CONFIG_CMD_SPL
22 #define CONFIG_SPL_OS_BOOT
23 #define CONFIG_SPL_ENV_SUPPORT
24 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
25 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
27 /* Falcon Mode - NAND support: args@17MB kernel@18MB */
28 #define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M)
29 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
31 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
32 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
33 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
34 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
36 #include "imx6_spl.h" /* common IMX6 SPL configuration */
37 #include "mx6_common.h"
38 #define CONFIG_DISPLAY_CPUINFO /* display cpu info */
39 #define CONFIG_DISPLAY_BOARDINFO_LATE /* display board info (after reloc) */
41 #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
43 #include <asm/arch/imx-regs.h>
44 #include <asm/imx-common/gpio.h>
47 #define CONFIG_CMDLINE_TAG
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_SERIAL_TAG
51 #define CONFIG_REVISION_TAG
53 #define CONFIG_SYS_GENERIC_BOARD
55 /* Size of malloc() pool */
56 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
59 #define CONFIG_BOARD_EARLY_INIT_F
60 #define CONFIG_MISC_INIT_R
63 #ifndef CONFIG_SPL_BUILD
65 #define CONFIG_DM_GPIO
66 #define CONFIG_DM_SERIAL
67 #define CONFIG_DM_THERMAL
72 #define CONFIG_MXC_GPIO
73 #define CONFIG_CMD_GPIO
76 #define CONFIG_IMX6_THERMAL
79 #define CONFIG_MXC_UART
80 #define CONFIG_MXC_UART_BASE UART2_BASE
82 #ifdef CONFIG_SPI_FLASH
87 #define CONFIG_MXC_SPI
88 #define CONFIG_SPI_FLASH_MTD
89 #define CONFIG_SPI_FLASH_BAR
90 #define CONFIG_SPI_FLASH_WINBOND
91 #define CONFIG_SF_DEFAULT_BUS 0
92 #define CONFIG_SF_DEFAULT_CS 0
93 /* GPIO 3-19 (21248) */
94 #define CONFIG_SF_DEFAULT_SPEED 30000000
95 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
99 /* Enable NAND support */
100 #define CONFIG_CMD_TIME
101 #define CONFIG_CMD_NAND
102 #define CONFIG_CMD_NAND_TRIMFFS
103 #ifdef CONFIG_CMD_NAND
104 #define CONFIG_NAND_MXS
105 #define CONFIG_SYS_MAX_NAND_DEVICE 1
106 #define CONFIG_SYS_NAND_BASE 0x40000000
107 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
108 #define CONFIG_SYS_NAND_ONFI_DETECTION
110 /* DMA stuff, needed for GPMI/MXS NAND support */
111 #define CONFIG_APBH_DMA
112 #define CONFIG_APBH_DMA_BURST
113 #define CONFIG_APBH_DMA_BURST8
116 #endif /* CONFIG_SPI_FLASH */
118 /* Flattened Image Tree Suport */
120 #define CONFIG_FIT_VERBOSE
123 #define CONFIG_CMD_I2C
124 #define CONFIG_SYS_I2C
125 #define CONFIG_SYS_I2C_MXC
126 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
127 #define CONFIG_SYS_I2C_SPEED 100000
128 #define CONFIG_I2C_GSC 0
129 #define CONFIG_I2C_PMIC 1
130 #define CONFIG_I2C_EDID
133 #define CONFIG_FSL_ESDHC
134 #define CONFIG_FSL_USDHC
135 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
136 #define CONFIG_SYS_FSL_USDHC_NUM 1
138 #define CONFIG_CMD_MMC
139 #define CONFIG_GENERIC_MMC
140 #define CONFIG_BOUNCE_BUFFER
142 /* Filesystem support */
143 #define CONFIG_CMD_EXT2
144 #define CONFIG_CMD_EXT4
145 #define CONFIG_CMD_EXT4_WRITE
146 #define CONFIG_CMD_FAT
147 #define CONFIG_CMD_UBIFS
148 #define CONFIG_DOS_PARTITION
153 #define CONFIG_CMD_SATA
154 #ifdef CONFIG_CMD_SATA
155 #define CONFIG_DWC_AHSATA
156 #define CONFIG_SYS_SATA_MAX_DEVICE 1
157 #define CONFIG_DWC_AHSATA_PORT_ID 0
158 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
160 #define CONFIG_LIBATA
166 #define CONFIG_CMD_PCI
167 #ifdef CONFIG_CMD_PCI
169 #define CONFIG_PCI_PNP
170 #define CONFIG_PCI_SCAN_SHOW
171 #define CONFIG_PCI_FIXUP_DEV
172 #define CONFIG_PCIE_IMX
179 #define CONFIG_POWER_I2C
180 #define CONFIG_POWER_PFUZE100
181 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
182 #define CONFIG_POWER_LTC3676
183 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
185 /* Various command support */
186 #include <config_cmd_default.h>
187 #undef CONFIG_CMD_IMLS
188 #define CONFIG_CMD_PING
189 #define CONFIG_CMD_DHCP
190 #define CONFIG_CMD_MII
191 #define CONFIG_CMD_NET
192 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
193 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
194 #define CONFIG_CMD_SETEXPR
195 #define CONFIG_CMD_BOOTZ
196 #define CONFIG_CMD_GSC
197 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
198 #define CONFIG_CMD_UBI
199 #define CONFIG_RBTREE
201 #define CONFIG_CMD_FUSE /* eFUSE read/write support */
202 #ifdef CONFIG_CMD_FUSE
203 #define CONFIG_MXC_OCOTP
207 /* Ethernet support */
208 #define CONFIG_FEC_MXC
211 #define IMX_FEC_BASE ENET_BASE_ADDR
212 #define CONFIG_FEC_XCV_TYPE RGMII
213 #define CONFIG_FEC_MXC_PHYADDR 0
214 #define CONFIG_PHYLIB
215 #define CONFIG_ARP_TIMEOUT 200UL
218 #define CONFIG_CMD_USB
219 #define CONFIG_USB_EHCI
220 #define CONFIG_USB_EHCI_MX6
221 #define CONFIG_USB_STORAGE
222 #define CONFIG_USB_HOST_ETHER
223 #define CONFIG_USB_ETHER_ASIX
224 #define CONFIG_USB_ETHER_SMSC95XX
225 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
226 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
227 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
228 #define CONFIG_MXC_USB_FLAGS 0
229 #define CONFIG_USB_KEYBOARD
230 #define CONFIG_CI_UDC
231 #define CONFIG_USBD_HS
232 #define CONFIG_USB_GADGET_DUALSPEED
233 #define CONFIG_USB_ETHER
234 #define CONFIG_USB_ETH_CDC
235 #define CONFIG_NETCONSOLE
236 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
238 /* USB Mass Storage Gadget */
239 #define CONFIG_USB_GADGET
240 #define CONFIG_CMD_USB_MASS_STORAGE
241 #define CONFIG_USB_GADGET_MASS_STORAGE
242 #define CONFIG_USBDOWNLOAD_GADGET
243 #define CONFIG_USB_GADGET_VBUS_DRAW 2
246 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
247 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
248 #define CONFIG_G_DNL_MANUFACTURER "Gateworks"
250 /* Framebuffer and LCD */
252 #define CONFIG_VIDEO_IPUV3
253 #define CONFIG_CFB_CONSOLE
254 #define CONFIG_VGA_AS_SINGLE_DEVICE
255 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
256 #define CONFIG_VIDEO_BMP_RLE8
257 #define CONFIG_SPLASH_SCREEN
258 #define CONFIG_BMP_16BPP
259 #define CONFIG_VIDEO_LOGO
260 #define CONFIG_IPUV3_CLK 260000000
261 #define CONFIG_CMD_HDMIDETECT
262 #define CONFIG_CONSOLE_MUX
263 #define CONFIG_IMX_HDMI
264 #define CONFIG_IMX_VIDEO_SKIP
266 /* serial console (ttymxc1,115200) */
267 #define CONFIG_CONS_INDEX 1
268 #define CONFIG_BAUDRATE 115200
270 /* Miscellaneous configurable options */
271 #define CONFIG_SYS_LONGHELP
272 #define CONFIG_SYS_HUSH_PARSER
273 #define CONFIG_SYS_PROMPT "Ventana > "
274 #define CONFIG_SYS_CBSIZE 1024
275 #define CONFIG_AUTO_COMPLETE
276 #define CONFIG_CMDLINE_EDITING
277 #define CONFIG_HWCONFIG
279 /* Print Buffer Size */
280 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
281 #define CONFIG_SYS_MAXARGS 16
282 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
284 /* Memory configuration */
285 #define CONFIG_SYS_MEMTEST_START 0x10000000
286 #define CONFIG_SYS_MEMTEST_END 0x10010000
287 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
288 #define CONFIG_SYS_TEXT_BASE 0x17800000
289 #define CONFIG_SYS_LOAD_ADDR 0x12000000
291 /* Physical Memory Map */
292 #define CONFIG_NR_DRAM_BANKS 1
293 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
294 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
295 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
296 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
298 #define CONFIG_SYS_INIT_SP_OFFSET \
299 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
300 #define CONFIG_SYS_INIT_SP_ADDR \
301 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
303 /* FLASH and environment organization */
304 #define CONFIG_SYS_NO_FLASH /* no NOR flash */
307 * MTD Command for mtdparts
309 #define CONFIG_CMD_MTDPARTS
310 #define CONFIG_MTD_DEVICE
311 #define CONFIG_MTD_PARTITIONS
312 #ifdef CONFIG_SPI_FLASH
313 #define MTDIDS_DEFAULT "nor0=nor"
314 #define MTDPARTS_DEFAULT \
315 "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
317 #define MTDIDS_DEFAULT "nand0=nand"
318 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
321 /* Persistent Environment Config */
322 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
323 #ifdef CONFIG_SPI_FLASH
324 #define CONFIG_ENV_IS_IN_SPI_FLASH
326 #define CONFIG_ENV_IS_IN_NAND
328 #if defined(CONFIG_ENV_IS_IN_MMC)
329 #define CONFIG_ENV_OFFSET (384 * SZ_1K)
330 #define CONFIG_ENV_SIZE (8 * SZ_1K)
331 #define CONFIG_SYS_MMC_ENV_DEV 0
332 #elif defined(CONFIG_ENV_IS_IN_NAND)
333 #define CONFIG_ENV_OFFSET (16 * SZ_1M)
334 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
335 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
336 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
337 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
338 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
339 #define CONFIG_ENV_OFFSET (512 * SZ_1K)
340 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
341 #define CONFIG_ENV_SIZE (8 * SZ_1K)
342 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
343 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
344 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
345 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
349 #define CONFIG_BOOTDELAY 3
350 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
351 #define CONFIG_IPADDR 192.168.1.1
352 #define CONFIG_SERVERIP 192.168.1.146
353 #define HWCONFIG_DEFAULT \
355 "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
357 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
358 "usb_pgood_delay=2000\0" \
359 "console=ttymxc1\0" \
360 "bootdevs=usb mmc sata flash\0" \
364 "mtdparts=" MTDPARTS_DEFAULT "\0" \
365 "mtdids=" MTDIDS_DEFAULT "\0" \
367 "fdt_high=0xffffffff\0" \
368 "fdt_addr=0x18000000\0" \
369 "initrd_high=0xffffffff\0" \
372 "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
373 "echo Loaded DTB from ${bootdir}/${fdt_file}; " \
374 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
375 "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
376 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
377 "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
380 "script=6x_bootscript-ventana\0" \
382 "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
387 "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
389 "setenv fsload 'ext2load mmc 0:1'; " \
390 "mmc dev 0 && mmc rescan && " \
391 "setenv dtype mmc; run loadscript; " \
392 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
393 "setenv bootargs console=${console},${baudrate} " \
394 "root=/dev/mmcblk0p1 rootfstype=ext4 " \
395 "rootwait rw ${video} ${extra}; " \
396 "if run loadfdt && fdt addr ${fdt_addr}; then " \
397 "bootm ${loadaddr} - ${fdt_addr}; " \
404 "setenv fsload 'ext2load sata 0:1'; sata init && " \
405 "setenv dtype sata; run loadscript; " \
406 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
407 "setenv bootargs console=${console},${baudrate} " \
408 "root=/dev/sda1 rootfstype=ext4 " \
409 "rootwait rw ${video} ${extra}; " \
410 "if run loadfdt && fdt addr ${fdt_addr}; then " \
411 "bootm ${loadaddr} - ${fdt_addr}; " \
417 "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
418 "setenv dtype usb; run loadscript; " \
419 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
420 "setenv bootargs console=${console},${baudrate} " \
421 "root=/dev/sda1 rootfstype=ext4 " \
422 "rootwait rw ${video} ${extra}; " \
423 "if run loadfdt && fdt addr ${fdt_addr}; then " \
424 "bootm ${loadaddr} - ${fdt_addr}; " \
430 #ifdef CONFIG_SPI_FLASH
431 #define CONFIG_EXTRA_ENV_SETTINGS \
432 CONFIG_EXTRA_ENV_SETTINGS_COMMON \
433 "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
434 "image_uboot=ventana/u-boot_spi.imx\0" \
436 "spi_koffset=0x90000\0" \
437 "spi_klen=0x200000\0" \
439 "spi_updateuboot=echo Updating uboot from " \
440 "${serverip}:${image_uboot}...; " \
441 "tftpboot ${loadaddr} ${image_uboot} && " \
442 "sf probe && sf erase 0 80000 && " \
443 "sf write ${loadaddr} 400 ${filesize}\0" \
444 "spi_update=echo Updating OS from ${serverip}:${image_os} " \
445 "to ${spi_koffset} ...; " \
446 "tftp ${loadaddr} ${image_os} && " \
448 "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
452 "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
453 "setenv bootargs console=${console},${baudrate} " \
454 "root=/dev/mtdblock3 " \
455 "rootfstype=squashfs,jffs2 " \
456 "${video} ${extra}; " \
460 #define CONFIG_EXTRA_ENV_SETTINGS \
461 CONFIG_EXTRA_ENV_SETTINGS_COMMON \
463 "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
464 "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
465 "tftp ${loadaddr} ${image_rootfs} && " \
466 "nand erase.part rootfs && " \
467 "nand write ${loadaddr} rootfs ${filesize}\0" \
470 "setenv fsload 'ubifsload'; " \
471 "ubi part rootfs; " \
472 "if ubi check boot; then " \
473 "ubifsmount ubi0:boot; " \
474 "setenv root ubi0:rootfs ubi.mtd=2 " \
475 "rootfstype=squashfs,ubifs; " \
477 "elif ubi check rootfs; then " \
478 "ubifsmount ubi0:rootfs; " \
479 "setenv root ubi0:rootfs ubi.mtd=2 " \
480 "rootfstype=ubifs; " \
482 "setenv dtype nand; run loadscript; " \
483 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
484 "setenv bootargs console=${console},${baudrate} " \
485 "root=${root} ${video} ${extra}; " \
486 "if run loadfdt && fdt addr ${fdt_addr}; then " \
488 "bootm ${loadaddr} - ${fdt_addr}; " \
490 "ubifsumount; bootm; " \
495 #define CONFIG_BOOTCOMMAND \
496 "for btype in ${bootdevs}; do " \
497 "echo; echo Attempting ${btype} boot...; " \
498 "if run ${btype}_boot; then; fi; " \
501 /* Device Tree Support */
502 #define CONFIG_OF_BOARD_SETUP
503 #define CONFIG_OF_LIBFDT
504 #define CONFIG_FDT_FIXUP_PARTITIONS
506 #ifndef CONFIG_SYS_DCACHE_OFF
507 #define CONFIG_CMD_CACHE
510 #endif /* __CONFIG_H */