2 * Copyright (C) 2013 Gateworks Corporation
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <linux/sizes.h>
13 #define CONFIG_SPL_BOARD_INIT
14 #define CONFIG_SPL_NAND_SUPPORT
15 #define CONFIG_SPL_MMC_SUPPORT
16 #define CONFIG_SPL_POWER_SUPPORT
17 /* Location in NAND to read U-Boot from */
18 #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M)
20 #include "imx6_spl.h" /* common IMX6 SPL configuration */
21 #include "mx6_common.h"
22 #define CONFIG_DISPLAY_CPUINFO /* display cpu info */
23 #define CONFIG_DISPLAY_BOARDINFO_LATE /* display board info (after reloc) */
25 #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */
27 #include <asm/arch/imx-regs.h>
28 #include <asm/imx-common/gpio.h>
31 #define CONFIG_CMDLINE_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG
34 #define CONFIG_SERIAL_TAG
35 #define CONFIG_REVISION_TAG
37 #define CONFIG_SYS_GENERIC_BOARD
39 /* Size of malloc() pool */
40 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
43 #define CONFIG_BOARD_EARLY_INIT_F
44 #define CONFIG_MISC_INIT_R
47 #ifndef CONFIG_SPL_BUILD
49 #define CONFIG_DM_GPIO
50 #define CONFIG_DM_SERIAL
51 #define CONFIG_DM_THERMAL
56 #define CONFIG_MXC_GPIO
57 #define CONFIG_CMD_GPIO
60 #define CONFIG_IMX6_THERMAL
63 #define CONFIG_MXC_UART
64 #define CONFIG_MXC_UART_BASE UART2_BASE
66 #ifdef CONFIG_SPI_FLASH
71 #define CONFIG_MXC_SPI
72 #define CONFIG_SPI_FLASH_MTD
73 #define CONFIG_SPI_FLASH_BAR
74 #define CONFIG_SPI_FLASH_WINBOND
75 #define CONFIG_SF_DEFAULT_BUS 0
76 #define CONFIG_SF_DEFAULT_CS 0
77 /* GPIO 3-19 (21248) */
78 #define CONFIG_SF_DEFAULT_SPEED 30000000
79 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
83 /* Enable NAND support */
84 #define CONFIG_CMD_TIME
85 #define CONFIG_CMD_NAND
86 #define CONFIG_CMD_NAND_TRIMFFS
87 #ifdef CONFIG_CMD_NAND
88 #define CONFIG_NAND_MXS
89 #define CONFIG_SYS_MAX_NAND_DEVICE 1
90 #define CONFIG_SYS_NAND_BASE 0x40000000
91 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
92 #define CONFIG_SYS_NAND_ONFI_DETECTION
94 /* DMA stuff, needed for GPMI/MXS NAND support */
95 #define CONFIG_APBH_DMA
96 #define CONFIG_APBH_DMA_BURST
97 #define CONFIG_APBH_DMA_BURST8
100 #endif /* CONFIG_SPI_FLASH */
102 /* Flattened Image Tree Suport */
104 #define CONFIG_FIT_VERBOSE
107 #define CONFIG_CMD_I2C
108 #define CONFIG_SYS_I2C
109 #define CONFIG_SYS_I2C_MXC
110 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
111 #define CONFIG_SYS_I2C_SPEED 100000
112 #define CONFIG_I2C_GSC 0
113 #define CONFIG_I2C_PMIC 1
114 #define CONFIG_I2C_EDID
117 #define CONFIG_FSL_ESDHC
118 #define CONFIG_FSL_USDHC
119 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
120 #define CONFIG_SYS_FSL_USDHC_NUM 1
122 #define CONFIG_CMD_MMC
123 #define CONFIG_GENERIC_MMC
124 #define CONFIG_BOUNCE_BUFFER
126 /* Filesystem support */
127 #define CONFIG_CMD_EXT2
128 #define CONFIG_CMD_EXT4
129 #define CONFIG_CMD_EXT4_WRITE
130 #define CONFIG_CMD_FAT
131 #define CONFIG_CMD_UBIFS
132 #define CONFIG_DOS_PARTITION
137 #define CONFIG_CMD_SATA
138 #ifdef CONFIG_CMD_SATA
139 #define CONFIG_DWC_AHSATA
140 #define CONFIG_SYS_SATA_MAX_DEVICE 1
141 #define CONFIG_DWC_AHSATA_PORT_ID 0
142 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
144 #define CONFIG_LIBATA
150 #define CONFIG_CMD_PCI
151 #ifdef CONFIG_CMD_PCI
153 #define CONFIG_PCI_PNP
154 #define CONFIG_PCI_SCAN_SHOW
155 #define CONFIG_PCI_FIXUP_DEV
156 #define CONFIG_PCIE_IMX
163 #define CONFIG_POWER_I2C
164 #define CONFIG_POWER_PFUZE100
165 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
166 #define CONFIG_POWER_LTC3676
167 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c
169 /* Various command support */
170 #include <config_cmd_default.h>
171 #undef CONFIG_CMD_IMLS
172 #define CONFIG_CMD_PING
173 #define CONFIG_CMD_DHCP
174 #define CONFIG_CMD_MII
175 #define CONFIG_CMD_NET
176 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */
177 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */
178 #define CONFIG_CMD_SETEXPR
179 #define CONFIG_CMD_BOOTZ
180 #define CONFIG_CMD_GSC
181 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */
182 #define CONFIG_CMD_UBI
183 #define CONFIG_RBTREE
185 #define CONFIG_CMD_FUSE /* eFUSE read/write support */
186 #ifdef CONFIG_CMD_FUSE
187 #define CONFIG_MXC_OCOTP
191 /* Ethernet support */
192 #define CONFIG_FEC_MXC
195 #define IMX_FEC_BASE ENET_BASE_ADDR
196 #define CONFIG_FEC_XCV_TYPE RGMII
197 #define CONFIG_FEC_MXC_PHYADDR 0
198 #define CONFIG_PHYLIB
199 #define CONFIG_ARP_TIMEOUT 200UL
202 #define CONFIG_CMD_USB
203 #define CONFIG_USB_EHCI
204 #define CONFIG_USB_EHCI_MX6
205 #define CONFIG_USB_STORAGE
206 #define CONFIG_USB_HOST_ETHER
207 #define CONFIG_USB_ETHER_ASIX
208 #define CONFIG_USB_ETHER_SMSC95XX
209 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
210 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
211 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
212 #define CONFIG_MXC_USB_FLAGS 0
213 #define CONFIG_USB_KEYBOARD
214 #define CONFIG_CI_UDC
215 #define CONFIG_USBD_HS
216 #define CONFIG_USB_GADGET_DUALSPEED
217 #define CONFIG_USB_ETHER
218 #define CONFIG_USB_ETH_CDC
219 #define CONFIG_NETCONSOLE
220 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
222 /* USB Mass Storage Gadget */
223 #define CONFIG_USB_GADGET
224 #define CONFIG_CMD_USB_MASS_STORAGE
225 #define CONFIG_USB_GADGET_MASS_STORAGE
226 #define CONFIG_USBDOWNLOAD_GADGET
227 #define CONFIG_USB_GADGET_VBUS_DRAW 2
230 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
231 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
232 #define CONFIG_G_DNL_MANUFACTURER "Gateworks"
234 /* Framebuffer and LCD */
236 #define CONFIG_VIDEO_IPUV3
237 #define CONFIG_CFB_CONSOLE
238 #define CONFIG_VGA_AS_SINGLE_DEVICE
239 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
240 #define CONFIG_VIDEO_BMP_RLE8
241 #define CONFIG_SPLASH_SCREEN
242 #define CONFIG_BMP_16BPP
243 #define CONFIG_VIDEO_LOGO
244 #define CONFIG_IPUV3_CLK 260000000
245 #define CONFIG_CMD_HDMIDETECT
246 #define CONFIG_CONSOLE_MUX
247 #define CONFIG_IMX_HDMI
248 #define CONFIG_IMX_VIDEO_SKIP
250 /* serial console (ttymxc1,115200) */
251 #define CONFIG_CONS_INDEX 1
252 #define CONFIG_BAUDRATE 115200
254 /* Miscellaneous configurable options */
255 #define CONFIG_SYS_LONGHELP
256 #define CONFIG_SYS_HUSH_PARSER
257 #define CONFIG_SYS_PROMPT "Ventana > "
258 #define CONFIG_SYS_CBSIZE 1024
259 #define CONFIG_AUTO_COMPLETE
260 #define CONFIG_CMDLINE_EDITING
261 #define CONFIG_HWCONFIG
263 /* Print Buffer Size */
264 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
265 #define CONFIG_SYS_MAXARGS 16
266 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
268 /* Memory configuration */
269 #define CONFIG_SYS_MEMTEST_START 0x10000000
270 #define CONFIG_SYS_MEMTEST_END 0x10010000
271 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
272 #define CONFIG_SYS_TEXT_BASE 0x17800000
273 #define CONFIG_SYS_LOAD_ADDR 0x12000000
275 /* Physical Memory Map */
276 #define CONFIG_NR_DRAM_BANKS 1
277 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
278 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
279 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
280 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
282 #define CONFIG_SYS_INIT_SP_OFFSET \
283 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
284 #define CONFIG_SYS_INIT_SP_ADDR \
285 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
287 /* FLASH and environment organization */
288 #define CONFIG_SYS_NO_FLASH /* no NOR flash */
291 * MTD Command for mtdparts
293 #define CONFIG_CMD_MTDPARTS
294 #define CONFIG_MTD_DEVICE
295 #define CONFIG_MTD_PARTITIONS
296 #ifdef CONFIG_SPI_FLASH
297 #define MTDIDS_DEFAULT "nor0=nor"
298 #define MTDPARTS_DEFAULT \
299 "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
301 #define MTDIDS_DEFAULT "nand0=nand"
302 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
305 /* Persistent Environment Config */
306 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
307 #ifdef CONFIG_SPI_FLASH
308 #define CONFIG_ENV_IS_IN_SPI_FLASH
310 #define CONFIG_ENV_IS_IN_NAND
312 #if defined(CONFIG_ENV_IS_IN_MMC)
313 #define CONFIG_ENV_OFFSET (384 * SZ_1K)
314 #define CONFIG_ENV_SIZE (8 * SZ_1K)
315 #define CONFIG_SYS_MMC_ENV_DEV 0
316 #elif defined(CONFIG_ENV_IS_IN_NAND)
317 #define CONFIG_ENV_OFFSET (16 * SZ_1M)
318 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K)
319 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
320 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K))
321 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
322 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
323 #define CONFIG_ENV_OFFSET (512 * SZ_1K)
324 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K)
325 #define CONFIG_ENV_SIZE (8 * SZ_1K)
326 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
327 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
328 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
329 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
333 #define CONFIG_BOOTDELAY 3
334 #define CONFIG_LOADADDR CONFIG_SYS_LOAD_ADDR
335 #define CONFIG_IPADDR 192.168.1.1
336 #define CONFIG_SERVERIP 192.168.1.146
337 #define HWCONFIG_DEFAULT \
339 "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \
341 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
342 "usb_pgood_delay=2000\0" \
343 "console=ttymxc1\0" \
344 "bootdevs=usb mmc sata flash\0" \
348 "mtdparts=" MTDPARTS_DEFAULT "\0" \
349 "mtdids=" MTDIDS_DEFAULT "\0" \
351 "fdt_high=0xffffffff\0" \
352 "fdt_addr=0x18000000\0" \
353 "initrd_high=0xffffffff\0" \
356 "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
357 "echo Loaded DTB from ${bootdir}/${fdt_file}; " \
358 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
359 "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
360 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
361 "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
364 "script=6x_bootscript-ventana\0" \
366 "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
371 "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \
373 "setenv fsload 'ext2load mmc 0:1'; " \
374 "mmc dev 0 && mmc rescan && " \
375 "setenv dtype mmc; run loadscript; " \
376 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
377 "setenv bootargs console=${console},${baudrate} " \
378 "root=/dev/mmcblk0p1 rootfstype=ext4 " \
379 "rootwait rw ${video} ${extra}; " \
380 "if run loadfdt && fdt addr ${fdt_addr}; then " \
381 "bootm ${loadaddr} - ${fdt_addr}; " \
388 "setenv fsload 'ext2load sata 0:1'; sata init && " \
389 "setenv dtype sata; run loadscript; " \
390 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
391 "setenv bootargs console=${console},${baudrate} " \
392 "root=/dev/sda1 rootfstype=ext4 " \
393 "rootwait rw ${video} ${extra}; " \
394 "if run loadfdt && fdt addr ${fdt_addr}; then " \
395 "bootm ${loadaddr} - ${fdt_addr}; " \
401 "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \
402 "setenv dtype usb; run loadscript; " \
403 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
404 "setenv bootargs console=${console},${baudrate} " \
405 "root=/dev/sda1 rootfstype=ext4 " \
406 "rootwait rw ${video} ${extra}; " \
407 "if run loadfdt && fdt addr ${fdt_addr}; then " \
408 "bootm ${loadaddr} - ${fdt_addr}; " \
414 #ifdef CONFIG_SPI_FLASH
415 #define CONFIG_EXTRA_ENV_SETTINGS \
416 CONFIG_EXTRA_ENV_SETTINGS_COMMON \
417 "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
418 "image_uboot=ventana/u-boot_spi.imx\0" \
420 "spi_koffset=0x90000\0" \
421 "spi_klen=0x200000\0" \
423 "spi_updateuboot=echo Updating uboot from " \
424 "${serverip}:${image_uboot}...; " \
425 "tftpboot ${loadaddr} ${image_uboot} && " \
426 "sf probe && sf erase 0 80000 && " \
427 "sf write ${loadaddr} 400 ${filesize}\0" \
428 "spi_update=echo Updating OS from ${serverip}:${image_os} " \
429 "to ${spi_koffset} ...; " \
430 "tftp ${loadaddr} ${image_os} && " \
432 "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
436 "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
437 "setenv bootargs console=${console},${baudrate} " \
438 "root=/dev/mtdblock3 " \
439 "rootfstype=squashfs,jffs2 " \
440 "${video} ${extra}; " \
444 #define CONFIG_EXTRA_ENV_SETTINGS \
445 CONFIG_EXTRA_ENV_SETTINGS_COMMON \
447 "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
448 "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
449 "tftp ${loadaddr} ${image_rootfs} && " \
450 "nand erase.part rootfs && " \
451 "nand write ${loadaddr} rootfs ${filesize}\0" \
454 "setenv fsload 'ubifsload'; " \
455 "ubi part rootfs; " \
456 "if ubi check boot; then " \
457 "ubifsmount ubi0:boot; " \
458 "setenv root ubi0:rootfs ubi.mtd=2 " \
459 "rootfstype=squashfs,ubifs; " \
461 "elif ubi check rootfs; then " \
462 "ubifsmount ubi0:rootfs; " \
463 "setenv root ubi0:rootfs ubi.mtd=2 " \
464 "rootfstype=ubifs; " \
466 "setenv dtype nand; run loadscript; " \
467 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
468 "setenv bootargs console=${console},${baudrate} " \
469 "root=${root} ${video} ${extra}; " \
470 "if run loadfdt && fdt addr ${fdt_addr}; then " \
472 "bootm ${loadaddr} - ${fdt_addr}; " \
474 "ubifsumount; bootm; " \
479 #define CONFIG_BOOTCOMMAND \
480 "for btype in ${bootdevs}; do " \
481 "echo; echo Attempting ${btype} boot...; " \
482 "if run ${btype}_boot; then; fi; " \
485 /* Device Tree Support */
486 #define CONFIG_OF_BOARD_SETUP
487 #define CONFIG_OF_LIBFDT
488 #define CONFIG_FDT_FIXUP_PARTITIONS
490 #ifndef CONFIG_SYS_DCACHE_OFF
491 #define CONFIG_CMD_CACHE
494 #endif /* __CONFIG_H */