include/configs/km82xx.h

   1 /*
   2  * (C) Copyright 2007-2011
   3  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_H
  25 #define __CONFIG_H
  26
  27 /*
  28  * High Level Configuration Options
  29  * (easy to change)
  30  */
  31
  32 #define CONFIG_MPC8247
  33 /* MGCOGE */
  34 #if defined(CONFIG_MGCOGE)
  35 #define CONFIG_HOSTNAME         mgcoge
  36 #define CONFIG_KM_BOARD_EXTRA_ENV       ""
  37
  38 /* MGCOGE3NE */
  39 #elif defined(CONFIG_MGCOGE3NE)
  40 #define CONFIG_HOSTNAME         mgcoge3ne
  41 #define CONFIG_KM_82XX
  42 #define CONFIG_KM_BOARD_EXTRA_ENV       "bobcatreset=true\0"
  43
  44 #else
  45 #error ("Board unsupported")
  46 #endif
  47
  48 #define CONFIG_SYS_TEXT_BASE    0xFE000000
  49
  50 /* include common defines/options for all Keymile boards */
  51 #include "km/keymile-common.h"
  52 #include "km/km-powerpc.h"
  53
  54 #define CONFIG_SYS_SDRAM_BASE           0x00000000
  55 #define CONFIG_SYS_FLASH_BASE           0xFE000000
  56 #define CONFIG_SYS_FLASH_SIZE           32
  57 #define CONFIG_SYS_FLASH_CFI
  58 #define CONFIG_FLASH_CFI_DRIVER
  59
  60 /* MGCOGE */
  61 #if defined(CONFIG_MGCOGE)
  62 #define CONFIG_SYS_MAX_FLASH_BANKS      3
  63 /* max num of sects on one chip */
  64 #define CONFIG_SYS_MAX_FLASH_SECT       512
  65
  66 #define CONFIG_SYS_FLASH_BASE_1 0x50000000
  67 #define CONFIG_SYS_FLASH_SIZE_1 32
  68 #define CONFIG_SYS_FLASH_BASE_2 0x52000000
  69 #define CONFIG_SYS_FLASH_SIZE_2 32
  70
  71 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
  72                                         CONFIG_SYS_FLASH_BASE_1, \
  73                                         CONFIG_SYS_FLASH_BASE_2 }
  74 #define MTDIDS_DEFAULT          "nor3=app"
  75
  76 /*
  77  * Bank 1 - 60x bus SDRAM
  78  */
  79 #define SDRAM_MAX_SIZE  0x08000000                      /* max. 128 MB  */
  80 #define CONFIG_SYS_GLOBAL_SDRAM_LIMIT   (256 << 20)     /* less than 256 MB */
  81
  82 /* SDRAM initialization values
  83 */
  84
  85 #define CONFIG_SYS_OR1  ((~(CONFIG_SYS_GLOBAL_SDRAM_LIMIT-1) & \
  86                            ORxS_SDAM_MSK)               |\
  87                         ORxS_BPD_8                      |\
  88                         ORxS_ROWST_PBI0_A7              |\
  89                         ORxS_NUMR_13)
  90
  91 #define CONFIG_SYS_PSDMR (                              \
  92                         PSDMR_SDAM_A14_IS_A5            |\
  93                         PSDMR_BSMA_A14_A16              |\
  94                         PSDMR_SDA10_PBI0_A9             |\
  95                         PSDMR_RFRC_5_CLK                |\
  96                         PSDMR_PRETOACT_2W               |\
  97                         PSDMR_ACTTORW_2W                |\
  98                         PSDMR_LDOTOPRE_1C               |\
  99                         PSDMR_WRC_1C                    |\
 100                         PSDMR_CL_2)
 101
 102 /* MGCOGE3NE */
 103 #elif defined(CONFIG_MGCOGE3NE)
 104 #define CONFIG_SYS_MAX_FLASH_BANKS      2       /* max num of flash banks */
 105 #define CONFIG_SYS_MAX_FLASH_SECT       1024    /*
 106                                                  * max num of sects on one
 107                                                  * chip
 108                                                  */
 109
 110 #define CONFIG_SYS_FLASH_BASE_1 0x50000000
 111 #define CONFIG_SYS_FLASH_SIZE_1 128
 112
 113 #define CONFIG_SYS_FLASH_SIZE_2 0       /* dummy value to calc SYS_OR5 */
 114
 115 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \
 116                                         CONFIG_SYS_FLASH_BASE_1 }
 117
 118 #define MTDIDS_DEFAULT          "nor2=app"
 119
 120 /*
 121  * Bank 1 - 60x bus SDRAM
 122  * mgcoge3ne has 256M.
 123  */
 124 #define SDRAM_MAX_SIZE 0x10000000                       /* max. 256 MB  */
 125 #define CONFIG_SYS_GLOBAL_SDRAM_LIMIT   (512 << 20)     /* less than 512 MB */
 126
 127 #define CONFIG_SYS_OR1  ((~(CONFIG_SYS_GLOBAL_SDRAM_LIMIT-1) & \
 128                            ORxS_SDAM_MSK)               |\
 129                         ORxS_BPD_4                      |\
 130                         ORxS_ROWST_PBI1_A4              |\
 131                         ORxS_NUMR_13)
 132
 133 #define CONFIG_SYS_PSDMR (                              \
 134                         PSDMR_PBI                       |\
 135                         PSDMR_SDAM_A17_IS_A5            |\
 136                         PSDMR_BSMA_A13_A15              |\
 137                         PSDMR_SDA10_PBI1_A6             |\
 138                         PSDMR_RFRC_5_CLK                |\
 139                         PSDMR_PRETOACT_2W               |\
 140                         PSDMR_ACTTORW_2W                |\
 141                         PSDMR_LDOTOPRE_1C               |\
 142                         PSDMR_WRC_2C                    |\
 143                         PSDMR_CL_2)
 144 #endif /* defined(CONFIG_MGCOGE3NE) */
 145
 146 /* include further common stuff for all keymile 82xx boards */
 147 #include "km/km82xx-common.h"
 148
 149 #endif /* __CONFIG_H */