2 * (C) Copyright 2010, Stefano Babic <sbabic@denx.de>
4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
8 * Configuration for the MX35pdk Freescale board.
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <asm/arch/imx-regs.h>
31 /* High Level Configuration Options */
32 #define CONFIG_ARM1136 /* This is an arm1136 CPU core */
35 #define CONFIG_DISPLAY_CPUINFO
37 /* Set TEXT at the beginning of the NOR flash */
38 #define CONFIG_SYS_TEXT_BASE 0xA0000000
39 #define CONFIG_SYS_CACHELINE_SIZE 32
41 #define CONFIG_BOARD_EARLY_INIT_F
42 #define CONFIG_BOARD_LATE_INIT
44 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
45 #define CONFIG_REVISION_TAG
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
50 * Size of malloc() pool
52 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
57 #define CONFIG_HARD_I2C
58 #define CONFIG_I2C_MXC
59 #define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
60 #define CONFIG_SYS_I2C_SPEED 100000
61 #define CONFIG_MXC_SPI
62 #define CONFIG_MXC_GPIO
69 #define CONFIG_PMIC_I2C
70 #define CONFIG_PMIC_FSL
71 #define CONFIG_PMIC_FSL_MC13892
72 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x08
73 #define CONFIG_RTC_MC13XXX
78 #define CONFIG_FSL_MC9SDZ60
79 #define CONFIG_SYS_FSL_MC9SDZ60_I2C_ADDR 0x69
84 #define CONFIG_MXC_UART
85 #define CONFIG_MXC_UART_BASE UART1_BASE
87 /* allow to overwrite serial and ethaddr */
88 #define CONFIG_ENV_OVERWRITE
89 #define CONFIG_CONS_INDEX 1
90 #define CONFIG_BAUDRATE 115200
96 #include <config_cmd_default.h>
98 #define CONFIG_CMD_PING
99 #define CONFIG_CMD_DHCP
100 #define CONFIG_BOOTP_SUBNETMASK
101 #define CONFIG_BOOTP_GATEWAY
102 #define CONFIG_BOOTP_DNS
104 #define CONFIG_CMD_NAND
105 #define CONFIG_CMD_CACHE
107 #define CONFIG_CMD_I2C
108 #define CONFIG_CMD_SPI
109 #define CONFIG_CMD_MII
110 #define CONFIG_CMD_NET
111 #define CONFIG_NET_RETRY_COUNT 100
112 #define CONFIG_CMD_DATE
114 #define CONFIG_CMD_MMC
115 #define CONFIG_DOS_PARTITION
116 #define CONFIG_EFI_PARTITION
117 #define CONFIG_CMD_EXT2
118 #define CONFIG_CMD_FAT
120 #define CONFIG_BOOTDELAY 3
122 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */
125 * Ethernet on the debug board (SMC911)
127 #define CONFIG_SMC911X
128 #define CONFIG_SMC911X_16_BIT 1
129 #define CONFIG_SMC911X_BASE CS5_BASE_ADDR
131 #define CONFIG_HAS_ETH1
132 #define CONFIG_ETHPRIME
135 * Ethernet on SOC (FEC)
137 #define CONFIG_FEC_MXC
138 #define IMX_FEC_BASE FEC_BASE_ADDR
139 #define CONFIG_FEC_MXC_PHYADDR 0x1F
143 #define CONFIG_ARP_TIMEOUT 200UL
146 * Miscellaneous configurable options
148 #define CONFIG_SYS_LONGHELP /* undef to save memory */
149 #define CONFIG_SYS_PROMPT "MX35 U-Boot > "
150 #define CONFIG_CMDLINE_EDITING
151 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */
153 #define CONFIG_AUTO_COMPLETE
154 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
155 /* Print Buffer Size */
156 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
157 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
158 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
160 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
161 #define CONFIG_SYS_MEMTEST_END 0x10000
163 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
165 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
167 #define CONFIG_SYS_HZ 1000
170 * Physical Memory Map
172 #define CONFIG_NR_DRAM_BANKS 2
173 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
174 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
175 #define PHYS_SDRAM_2 CSD1_BASE_ADDR
176 #define PHYS_SDRAM_2_SIZE (128 * 1024 * 1024)
178 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR
179 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000)
180 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2)
181 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \
182 GENERATED_GBL_DATA_SIZE)
183 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
184 CONFIG_SYS_GBL_DATA_OFFSET)
187 * MTD Command for mtdparts
189 #define CONFIG_CMD_MTDPARTS
190 #define CONFIG_MTD_DEVICE
191 #define CONFIG_FLASH_CFI_MTD
192 #define CONFIG_MTD_PARTITIONS
193 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0"
194 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:1m(boot),5m(linux)," \
195 "96m(root),8m(cfg),1938m(user);" \
196 "physmap-flash.0:512k(b),4m(k),30m(u),28m(r)"
199 * FLASH and environment organization
201 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR
202 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
203 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
204 /* Monitor at beginning of flash */
205 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
206 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
208 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
209 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
211 /* Address and size of Redundant Environment Sector */
212 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
213 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
215 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \
216 CONFIG_SYS_MONITOR_LEN)
218 #define CONFIG_ENV_IS_IN_FLASH
220 #if defined(CONFIG_FSL_ENV_IN_NAND)
221 #define CONFIG_ENV_IS_IN_NAND
222 #define CONFIG_ENV_OFFSET (1024 * 1024)
226 * CFI FLASH driver setup
228 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
229 #define CONFIG_FLASH_CFI_DRIVER
231 /* A non-standard buffered write algorithm */
232 #define CONFIG_FLASH_SPANSION_S29WS_N
233 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */
234 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
237 * NAND FLASH driver setup
239 #define CONFIG_NAND_MXC
240 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR)
241 #define CONFIG_SYS_MAX_NAND_DEVICE 1
242 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR)
243 #define CONFIG_MXC_NAND_HWECC
244 #define CONFIG_SYS_NAND_LARGEPAGE
248 #define CONFIG_GENERIC_MMC
249 #define CONFIG_FSL_ESDHC
250 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
251 #define CONFIG_SYS_FSL_ESDHC_NUM 1
254 * Default environment and default scripts
255 * to update uboot and load kernel
258 #define CONFIG_HOSTNAME "mx35pdk"
259 #define CONFIG_EXTRA_ENV_SETTINGS \
261 "ethprime=smc911x\0" \
262 "nfsargs=setenv bootargs root=/dev/nfs rw " \
263 "nfsroot=${serverip}:${rootpath}\0" \
264 "ramargs=setenv bootargs root=/dev/ram rw\0" \
265 "addip_sta=setenv bootargs ${bootargs} " \
266 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
267 ":${hostname}:${netdev}:off panic=1\0" \
268 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
269 "addip=if test -n ${ipdyn};then run addip_dyn;" \
270 "else run addip_sta;fi\0" \
271 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
272 "addtty=setenv bootargs ${bootargs}" \
273 " console=ttymxc0,${baudrate}\0" \
274 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
275 "loadaddr=80800000\0" \
276 "kernel_addr_r=80800000\0" \
277 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
278 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
279 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \
280 "flash_self=run ramargs addip addtty addmtd addmisc;" \
281 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
282 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
283 "bootm ${kernel_addr}\0" \
284 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
285 "run nfsargs addip addtty addmtd addmisc;" \
286 "bootm ${kernel_addr_r}\0" \
287 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \
288 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \
289 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \
290 "load=tftp ${loadaddr} ${u-boot}\0" \
291 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
292 "update=protect off ${uboot_addr} +80000;" \
293 "erase ${uboot_addr} +80000;" \
294 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \
295 "upd=if run load;then echo Updating u-boot;if run update;" \
296 "then echo U-Boot updated;" \
297 "else echo Error updating u-boot !;" \
298 "echo Board without bootloader !!;" \
300 "else echo U-Boot not downloaded..exiting;fi\0" \
301 "bootcmd=run net_nfs\0"
303 #endif /* __CONFIG_H */