2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
4 * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
6 * Configuration settings for the MX51-3Stack Freescale board.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 #include <asm/arch/mx51.h>
29 /* High Level Configuration Options */
30 #define CONFIG_ARMV7 1 /* This is armv7 Cortex-A8 CPU core */
34 #define CONFIG_MX51_BBG 1 /* in a mx51 */
35 #define CONFIG_FLASH_HEADER 1
36 #define CONFIG_FLASH_HEADER_OFFSET 0x400
37 #define CONFIG_FLASH_HEADER_BARKER 0xB1
39 #define CONFIG_SKIP_RELOCATE_UBOOT
41 #define CONFIG_MX51_HCLK_FREQ 24000000 /* RedBoot says 26MHz */
43 #define CONFIG_ARCH_CPU_INIT
44 #define CONFIG_ARCH_MMU
46 #define CONFIG_DISPLAY_CPUINFO
47 #define CONFIG_DISPLAY_BOARDINFO
49 #define BOARD_LATE_INIT
52 * Disabled for now due to build problems under Debian and a significant
53 * increase in the final file size: 144260 vs. 109536 Bytes.
56 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
57 #define CONFIG_REVISION_TAG 1
58 #define CONFIG_SETUP_MEMORY_TAGS 1
59 #define CONFIG_INITRD_TAG 1
62 * Size of malloc() pool
64 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
65 /* size in bytes reserved for initial data */
66 #define CONFIG_SYS_GBL_DATA_SIZE 128
71 #define CONFIG_MX51_UART 1
72 #define CONFIG_MX51_UART1 1
77 #define CONFIG_FSL_SF 1
78 #define CONFIG_SPI_FLASH_IMX_ATMEL 1
79 #define CONFIG_SPI_FLASH_CS 1
80 #define CONFIG_IMX_ECSPI
81 #define CONFIG_IMX_SPI_PMIC
82 #define CONFIG_IMX_SPI_PMIC_CS 0
83 #define IMX_CSPI_VER_2_3 1
84 #define MAX_SPI_BYTES (64 * 4)
93 #define CONFIG_HAS_ETH1
94 #define CONFIG_NET_MULTI 1
95 #define CONFIG_MXC_FEC
97 #define CONFIG_DISCOVER_PHY
99 #define CONFIG_FEC0_IOBASE FEC_BASE_ADDR
100 #define CONFIG_FEC0_PINMUX -1
101 #define CONFIG_FEC0_PHY_ADDR 0x1F
102 #define CONFIG_FEC0_MIIBASE -1
104 /* allow to overwrite serial and ethaddr */
105 #define CONFIG_ENV_OVERWRITE
106 #define CONFIG_CONS_INDEX 1
107 #define CONFIG_BAUDRATE 115200
108 #define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
110 /***********************************************************
112 ***********************************************************/
114 #include <config_cmd_default.h>
116 #define CONFIG_CMD_PING
117 #define CONFIG_CMD_DHCP
118 #define CONFIG_CMD_MII
119 #define CONFIG_CMD_NET
120 #define CONFIG_NET_RETRY_COUNT 100
132 #define CONFIG_HAS_ETH1
133 #define CONFIG_NET_MULTI 1
134 #define CONFIG_MXC_FEC
136 #define CONFIG_DISCOVER_PHY
138 #define CONFIG_FEC0_IOBASE FEC_BASE_ADDR
139 #define CONFIG_FEC0_PINMUX -1
140 #define CONFIG_FEC0_PHY_ADDR 0x1F
141 #define CONFIG_FEC0_MIIBASE -1
145 /* Enable below configure when supporting nand */
146 #define CONFIG_CMD_ENV
148 #undef CONFIG_CMD_IMLS
150 #define CONFIG_BOOTDELAY 0
152 #define CONFIG_PRIME "FEC0"
154 #define CONFIG_LOADADDR 0x90100000 /* loadaddr env var */
156 #define CONFIG_BOOTARGS "console=ttymxc0,115200 "\
159 #define CONFIG_BOOTCOMMAND "bootm ${loadaddr} 0x90800000"
160 #define CONFIG_ENV_IS_EMBEDDED
162 * The MX51 3stack board seems to have a hardware "peculiarity" confirmed under
163 * U-Boot, RedBoot and Linux: the ethernet Rx signal is reaching the CS8900A
164 * controller inverted. The controller is capable of detecting and correcting
165 * this, but it needs 4 network packets for that. Which means, at startup, you
166 * will not receive answers to the first 4 packest, unless there have been some
167 * broadcasts on the network, or your board is on a hub. Reducing the ARP
168 * timeout from default 5 seconds to 200ms we speed up the initial TFTP
169 * transfer, should the user wish one, significantly.
171 #define CONFIG_ARP_TIMEOUT 200UL
174 * Miscellaneous configurable options
176 #define CONFIG_SYS_LONGHELP /* undef to save memory */
177 #define CONFIG_SYS_PROMPT "BBG U-Boot > "
178 #define CONFIG_AUTO_COMPLETE
179 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
180 /* Print Buffer Size */
181 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
182 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
183 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
185 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
186 #define CONFIG_SYS_MEMTEST_END 0x10000
188 #undef CONFIG_SYS_CLKS_IN_HZ /* everything, incl board info, in Hz */
190 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
192 #define CONFIG_SYS_HZ 1000
194 #define CONFIG_CMDLINE_EDITING 1
196 /*-----------------------------------------------------------------------
199 * The stack sizes are set up in start.S using the settings below
201 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
203 /*-----------------------------------------------------------------------
204 * Physical Memory Map
206 #define CONFIG_NR_DRAM_BANKS 1
207 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
209 /* #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) */
210 #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
211 #define iomem_valid_addr(addr, size) \
212 (addr >= PHYS_SDRAM_1 && addr <= (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE))
214 /*-----------------------------------------------------------------------
215 * FLASH and environment organization
217 #define CONFIG_SYS_NO_FLASH
219 /* Monitor at beginning of flash */
220 /* #define CONFIG_FSL_ENV_IN_SF
222 /* #define CONFIG_FSL_ENV_IN_MMC */
224 #define CONFIG_ENV_SECT_SIZE (128 * 1024)
225 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
226 #define CONFIG_ENV_IS_NOWHERE
232 #undef CONFIG_JFFS2_CMDLINE
233 #define CONFIG_JFFS2_DEV "nand0"
235 #endif /* __CONFIG_H */